1 /*
2 * Frame buffer driver for Trident Blade and Image series
3 *
4 * Copyright 2001,2002 - Jani Monoses <jani@iv.ro>
5 *
6 *
7 * CREDITS:(in order of appearance)
8 * skeletonfb.c by Geert Uytterhoeven and other fb code in drivers/video
9 * Special thanks ;) to Mattia Crivellini <tia@mclink.it>
10 * much inspired by the XFree86 4.x Trident driver sources by Alan Hourihane
11 * the FreeVGA project
12 * Francesco Salvestrini <salvestrini@users.sf.net> XP support,code,suggestions
13 * TODO:
14 * timing value tweaking so it looks good on every monitor in every mode
15 * TGUI acceleration
16 */
17
18 #include <linux/config.h>
19 #include <linux/module.h>
20 #include <linux/fb.h>
21 #include <linux/init.h>
22 #include <linux/pci.h>
23
24 #include <video/fbcon.h>
25 #include <video/fbcon-cfb8.h>
26 #include <video/fbcon-cfb16.h>
27 #include <video/fbcon-cfb24.h>
28 #include <video/fbcon-cfb32.h>
29
30 #include "tridentfb.h"
31
32 #define VERSION "0.7.5"
33
34 struct tridentfb_par {
35 struct fb_var_screeninfo var;
36 int bpp;
37 int hres;
38 int vres;
39 int linelength;
40 int vclk; //in MHz
41
42 int vtotal;
43 int vdispend;
44 int vsyncstart;
45 int vsyncend;
46 int vblankstart;
47 int vblankend;
48
49 int htotal;
50 int hdispend;
51 int hsyncstart;
52 int hsyncend;
53 int hblankstart;
54 int hblankend;
55 };
56
57 struct tridentfb_info {
58 struct fb_info_gen gen;
59 unsigned long fbmem_virt; //framebuffer virtual memory address
60 unsigned long fbmem; //framebuffer physical memory address
61 unsigned int memsize; //size of fbmem
62 unsigned long io; //io space address
63 unsigned long io_virt; //iospace virtual memory address
64 unsigned int nativex; //flat panel xres
65 struct tridentfb_par currentmode;
66 unsigned char eng_oper; //engine operation...
67 };
68
69 static struct fb_ops tridentfb_ops;
70
71 static struct tridentfb_info fb_info;
72 static struct display disp;
73
74 static struct { unsigned char red,green,blue,transp; } palette[256];
75
76 static struct fb_var_screeninfo default_var;
77
78 static char * tridentfb_name = "Trident";
79
80 static int chip_id;
81
82 static int defaultaccel;
83 static int displaytype;
84
85 static int pseudo_pal[16];
86
87 /* defaults which are normally overriden by user values */
88
89 /* video mode */
90 static char * mode = "640x480";
91 static int bpp = 8;
92
93 static int noaccel;
94
95 static int center;
96 static int stretch;
97
98 static int fp;
99 static int crt;
100
101 static int memsize;
102 static int memdiff;
103 static int nativex;
104
105
106 MODULE_PARM(mode,"s");
107 MODULE_PARM(bpp,"i");
108 MODULE_PARM(center,"i");
109 MODULE_PARM(stretch,"i");
110 MODULE_PARM(noaccel,"i");
111 MODULE_PARM(memsize,"i");
112 MODULE_PARM(memdiff,"i");
113 MODULE_PARM(nativex,"i");
114 MODULE_PARM(fp,"i");
115 MODULE_PARM(crt,"i");
116
117 static int chip3D;
is3Dchip(int id)118 int is3Dchip(int id)
119 {
120 return ((id == BLADE3D) || (id == CYBERBLADEE4) ||
121 (id == CYBERBLADEi7) || (id == CYBERBLADEi7D) ||
122 (id == CYBER9397) || (id == CYBER9397DVD) ||
123 (id == CYBER9520) || (id == CYBER9525DVD) ||
124 (id == IMAGE975) || (id == IMAGE985) ||
125 (id == CYBERBLADEi1) || (id == CYBERBLADEi1D) ||
126 (id == CYBERBLADEAi1) || (id == CYBERBLADEAi1D) ||
127 (id == CYBERBLADEXPm8) || (id == CYBERBLADEXPm16) ||
128 (id == CYBERBLADEXPAi1));
129 }
130
131 #define CRT 0x3D0 //CRTC registers offset for color display
132
133 #ifndef TRIDENT_MMIO
134 #define TRIDENT_MMIO 1
135 #endif
136
137 #if TRIDENT_MMIO
138 #define t_outb(val,reg) writeb(val,fb_info.io_virt + reg)
139 #define t_inb(reg) readb(fb_info.io_virt + reg)
140 #else
141 #define t_outb(val,reg) outb(val,reg)
142 #define t_inb(reg) inb(reg)
143 #endif
144
145
146 static struct accel_switch {
147 void (*init_accel)(int,int);
148 void (*wait_engine)(void);
149 void (*fill_rect)(int,int,int,int,int);
150 void (*copy_rect)(int,int,int,int,int,int);
151 } *acc;
152
153 #define writemmr(r,v) writel(v, fb_info.io_virt + r)
154 #define readmmr(r) readl(fb_info.io_virt + r)
155
156
157
158 /*
159 * Blade specific acceleration.
160 */
161
162 #define point(x,y) ((y)<<16|(x))
163 #define STA 0x2120
164 #define CMD 0x2144
165 #define ROP 0x2148
166 #define CLR 0x2160
167 #define SR1 0x2100
168 #define SR2 0x2104
169 #define DR1 0x2108
170 #define DR2 0x210C
171
172 #define REPL(x) x = x | x<<16
173 #define ROP_S 0xCC
174
blade_init_accel(int pitch,int bpp)175 static void blade_init_accel(int pitch,int bpp)
176 {
177 int v1 = (pitch>>3)<<20;
178 int tmp = 0,v2;
179 switch (bpp) {
180 case 8:tmp = 0;break;
181 case 15:tmp = 5;break;
182 case 16:tmp = 1;break;
183 case 24:
184 case 32:tmp = 2;break;
185 }
186 v2 = v1 | (tmp<<29);
187 writemmr(0x21C0,v2);
188 writemmr(0x21C4,v2);
189 writemmr(0x21B8,v2);
190 writemmr(0x21BC,v2);
191 writemmr(0x21D0,v1);
192 writemmr(0x21D4,v1);
193 writemmr(0x21C8,v1);
194 writemmr(0x21CC,v1);
195 writemmr(0x216C,0);
196 }
197
blade_wait_engine(void)198 static void blade_wait_engine(void)
199 {
200 while(readmmr(STA) & 0xFA800000);
201 }
202
blade_fill_rect(int x,int y,int w,int h,int c)203 static void blade_fill_rect(int x,int y,int w,int h,int c)
204 {
205 writemmr(CLR,c);
206 writemmr(ROP,ROP_S);
207 writemmr(CMD,0x20000000|1<<19|1<<4|2<<2);
208
209 writemmr(DR1,point(x,y));
210 writemmr(DR2,point(x+w-1,y+h-1));
211 }
212
blade_copy_rect(int x1,int y1,int x2,int y2,int w,int h)213 static void blade_copy_rect(int x1,int y1,int x2,int y2,int w,int h)
214 {
215 int s1,s2,d1,d2;
216 int direction = 2;
217 s1 = point(x1,y1);
218 s2 = point(x1+w-1,y1+h-1);
219 d1 = point(x2,y2);
220 d2 = point(x2+w-1,y2+h-1);
221
222 if ((y1 > y2) || ((y1 == y2) && (x1 > x2)))
223 direction = 0;
224
225
226 writemmr(ROP,ROP_S);
227 writemmr(CMD,0xE0000000|1<<19|1<<4|1<<2|direction);
228
229 writemmr(SR1,direction?s2:s1);
230 writemmr(SR2,direction?s1:s2);
231 writemmr(DR1,direction?d2:d1);
232 writemmr(DR2,direction?d1:d2);
233 }
234
235 static struct accel_switch accel_blade = {
236 blade_init_accel,
237 blade_wait_engine,
238 blade_fill_rect,
239 blade_copy_rect,
240 };
241
242
243 /*
244 * BladeXP specific acceleration functions
245 */
246
247 #define ROP_P 0xF0
248 #define masked_point(x,y) ((y & 0xffff)<<16|(x & 0xffff))
249
xp_init_accel(int pitch,int bpp)250 static void xp_init_accel(int pitch,int bpp)
251 {
252 int tmp = 0,v1;
253 unsigned char x = 0;
254
255 switch (bpp) {
256 case 8: x = 0; break;
257 case 16: x = 1; break;
258 case 24: x = 3; break;
259 case 32: x = 2; break;
260 }
261
262 switch (pitch << (bpp >> 3)) {
263 case 8192:
264 case 512: x |= 0x00; break;
265 case 1024: x |= 0x04; break;
266 case 2048: x |= 0x08; break;
267 case 4096: x |= 0x0C; break;
268 }
269
270 t_outb(x,0x2125);
271
272 fb_info.eng_oper = x | 0x40;
273
274 switch (bpp) {
275 case 8: tmp = 18; break;
276 case 15:
277 case 16: tmp = 19; break;
278 case 24:
279 case 32: tmp = 20; break;
280 }
281
282 v1 = pitch << tmp;
283
284 writemmr(0x2154,v1);
285 writemmr(0x2150,v1);
286 t_outb(3,0x2126);
287 }
288
xp_wait_engine(void)289 static void xp_wait_engine(void)
290 {
291 int busy;
292 int count, timeout;
293
294 count = 0;
295 timeout = 0;
296 for (;;) {
297 busy = t_inb(STA) & 0x80;
298 if (busy != 0x80)
299 return;
300 count++;
301 if (count == 10000000) {
302 /* Timeout */
303 count = 9990000;
304 timeout++;
305 if (timeout == 8) {
306 /* Reset engine */
307 t_outb(0x00, 0x2120);
308 return;
309 }
310 }
311 }
312 }
313
xp_fill_rect(int x,int y,int w,int h,int c)314 static void xp_fill_rect(int x,int y,int w,int h,int c)
315 {
316 writemmr(0x2127,ROP_P);
317 writemmr(0x2158,c);
318 writemmr(0x2128,0x4000);
319 writemmr(0x2140,masked_point(h,w));
320 writemmr(0x2138,masked_point(y,x));
321 t_outb(0x01,0x2124);
322 t_outb(fb_info.eng_oper,0x2125);
323 }
324
xp_copy_rect(int x1,int y1,int x2,int y2,int w,int h)325 static void xp_copy_rect(int x1,int y1,int x2,int y2,int w,int h)
326 {
327 int direction;
328 int x1_tmp, x2_tmp, y1_tmp, y2_tmp;
329
330 direction = 0x0004;
331
332 if ((x1 < x2) && (y1 == y2)) {
333 direction |= 0x0200;
334 x1_tmp = x1 + w - 1;
335 x2_tmp = x2 + w - 1;
336 } else {
337 x1_tmp = x1;
338 x2_tmp = x2;
339 }
340
341 if (y1 < y2) {
342 direction |= 0x0100;
343 y1_tmp = y1 + h - 1;
344 y2_tmp = y2 + h - 1;
345 } else {
346 y1_tmp = y1;
347 y2_tmp = y2;
348 }
349
350 writemmr(0x2128,direction);
351 t_outb(ROP_S,0x2127);
352 writemmr(0x213C,masked_point(y1_tmp,x1_tmp));
353 writemmr(0x2138,masked_point(y2_tmp,x2_tmp));
354 writemmr(0x2140,masked_point(h,w));
355 t_outb(0x01,0x2124);
356 }
357
358 static struct accel_switch accel_xp = {
359 xp_init_accel,
360 xp_wait_engine,
361 xp_fill_rect,
362 xp_copy_rect,
363 };
364
365
366 /*
367 * Image specific acceleration functions
368 */
image_init_accel(int pitch,int bpp)369 static void image_init_accel(int pitch,int bpp)
370 {
371 int tmp = 0;
372 switch (bpp) {
373 case 8:tmp = 0;break;
374 case 15:tmp = 5;break;
375 case 16:tmp = 1;break;
376 case 24:
377 case 32:tmp = 2;break;
378 }
379 writemmr(0x2120, 0xF0000000);
380 writemmr(0x2120, 0x40000000|tmp);
381 writemmr(0x2120, 0x80000000);
382 writemmr(0x2144, 0x00000000);
383 writemmr(0x2148, 0x00000000);
384 writemmr(0x2150, 0x00000000);
385 writemmr(0x2154, 0x00000000);
386 writemmr(0x2120, 0x60000000|(pitch<<16) |pitch);
387 writemmr(0x216C, 0x00000000);
388 writemmr(0x2170, 0x00000000);
389 writemmr(0x217C, 0x00000000);
390 writemmr(0x2120, 0x10000000);
391 writemmr(0x2130, (2047 << 16) | 2047);
392 }
393
image_wait_engine(void)394 static void image_wait_engine(void)
395 {
396 while(readmmr(0x2164) & 0xF0000000);
397 }
398
image_fill_rect(int x,int y,int w,int h,int c)399 static void image_fill_rect(int x,int y,int w,int h,int c)
400 {
401 writemmr(0x2120,0x80000000);
402 writemmr(0x2120,0x90000000|ROP_S);
403
404 writemmr(0x2144,c);
405
406 writemmr(DR1,point(x,y));
407 writemmr(DR2,point(x+w-1,y+h-1));
408
409 writemmr(0x2124,0x80000000|3<<22|1<<10|1<<9);
410 }
411
image_copy_rect(int x1,int y1,int x2,int y2,int w,int h)412 static void image_copy_rect(int x1,int y1,int x2,int y2,int w,int h)
413 {
414 int s1,s2,d1,d2;
415 int direction = 2;
416 s1 = point(x1,y1);
417 s2 = point(x1+w-1,y1+h-1);
418 d1 = point(x2,y2);
419 d2 = point(x2+w-1,y2+h-1);
420
421 if ((y1 > y2) || ((y1 == y2) && (x1 >x2)))
422 direction = 0;
423
424 writemmr(0x2120,0x80000000);
425 writemmr(0x2120,0x90000000|ROP_S);
426
427 writemmr(SR1,direction?s2:s1);
428 writemmr(SR2,direction?s1:s2);
429 writemmr(DR1,direction?d2:d1);
430 writemmr(DR2,direction?d1:d2);
431 writemmr(0x2124,0x80000000|1<<22|1<<10|1<<7|direction);
432 }
433
434
435 static struct accel_switch accel_image = {
436 image_init_accel,
437 image_wait_engine,
438 image_fill_rect,
439 image_copy_rect,
440 };
441
442 /*
443 * Accel functions called by the upper layers
444 */
445
trident_bmove(struct display * p,int sy,int sx,int dy,int dx,int height,int width)446 static void trident_bmove (struct display *p, int sy, int sx,
447 int dy, int dx, int height, int width)
448 {
449 sx *= fontwidth(p);
450 dx *= fontwidth(p);
451 width *= fontwidth(p);
452 sy *= fontheight(p);
453 dy *= fontheight(p);
454 height *= fontheight(p);
455 acc->copy_rect(sx,sy,dx,dy,width,height);
456 acc->wait_engine();
457 }
trident_clear_helper(int c,struct display * p,int sy,int sx,int height,int width)458 static void trident_clear_helper (int c, struct display *p,
459 int sy, int sx, int height, int width)
460 {
461 sx *= fontwidth(p);
462 sy *= fontheight(p);
463 width *= fontwidth(p);
464 height *= fontheight(p);
465 acc->fill_rect(sx,sy,width,height,c);
466 acc->wait_engine();
467 }
468
469
470 #ifdef FBCON_HAS_CFB8
trident_8bpp_clear(struct vc_data * conp,struct display * p,int sy,int sx,int height,int width)471 static void trident_8bpp_clear (struct vc_data *conp, struct display *p,
472 int sy, int sx, int height, int width)
473 {
474 int c;
475 c = attr_bgcol_ec(p,conp) & 0xFF;
476 c |= c<<8;
477 c |= c<<16;
478 trident_clear_helper(c,p,sy,sx,height,width);
479 }
480
481 static struct display_switch trident_8bpp = {
482 setup: fbcon_cfb8_setup,
483 bmove: trident_bmove,
484 clear: trident_8bpp_clear,
485 putc: fbcon_cfb8_putc,
486 putcs: fbcon_cfb8_putcs,
487 revc: fbcon_cfb8_revc,
488 clear_margins: fbcon_cfb8_clear_margins,
489 fontwidthmask: FONTWIDTH (4) | FONTWIDTH (8) | FONTWIDTH (12) | FONTWIDTH (16)
490 };
491 #endif
492 #ifdef FBCON_HAS_CFB16
trident_16bpp_clear(struct vc_data * conp,struct display * p,int sy,int sx,int height,int width)493 static void trident_16bpp_clear (struct vc_data *conp, struct display *p,
494 int sy, int sx, int height, int width)
495 {
496 int c;
497 c = ((u16*)p->dispsw_data)[attr_bgcol_ec(p,conp)];
498 c = c | c<<16;
499 trident_clear_helper(c,p,sy,sx,height,width);
500 }
501
502 static struct display_switch trident_16bpp = {
503 setup: fbcon_cfb16_setup,
504 bmove: trident_bmove,
505 clear: trident_16bpp_clear,
506 putc: fbcon_cfb16_putc,
507 putcs: fbcon_cfb16_putcs,
508 revc: fbcon_cfb16_revc,
509 clear_margins: fbcon_cfb16_clear_margins,
510 fontwidthmask: FONTWIDTH (4) | FONTWIDTH (8) | FONTWIDTH (12) | FONTWIDTH (16)
511 };
512 #endif
513 #ifdef FBCON_HAS_CFB32
trident_32bpp_clear(struct vc_data * conp,struct display * p,int sy,int sx,int height,int width)514 static void trident_32bpp_clear (struct vc_data *conp, struct display *p,
515 int sy, int sx, int height, int width)
516 {
517 int c;
518 c = ((u32*)p->dispsw_data)[attr_bgcol_ec(p,conp)];
519 trident_clear_helper(c,p,sy,sx,height,width);
520 }
521
522 static struct display_switch trident_32bpp = {
523 setup: fbcon_cfb32_setup,
524 bmove: trident_bmove,
525 clear: trident_32bpp_clear,
526 putc: fbcon_cfb32_putc,
527 putcs: fbcon_cfb32_putcs,
528 revc: fbcon_cfb32_revc,
529 clear_margins: fbcon_cfb32_clear_margins,
530 fontwidthmask: FONTWIDTH (4) | FONTWIDTH (8) | FONTWIDTH (12) | FONTWIDTH (16)
531 };
532 #endif
533
534 /*
535 * Hardware access functions
536 */
537
read3X4(int reg)538 static inline unsigned char read3X4(int reg)
539 {
540 writeb(reg, fb_info.io_virt + CRT + 4);
541 return readb(fb_info.io_virt + CRT + 5);
542 }
543
write3X4(int reg,unsigned char val)544 static inline void write3X4(int reg, unsigned char val)
545 {
546 writeb(reg, fb_info.io_virt + CRT + 4);
547 writeb(val, fb_info.io_virt + CRT + 5);
548 }
549
read3C4(int reg)550 static inline unsigned char read3C4(int reg)
551 {
552 t_outb(reg, 0x3C4);
553 return t_inb(0x3C5);
554 }
555
write3C4(int reg,unsigned char val)556 static inline void write3C4(int reg, unsigned char val)
557 {
558 t_outb(reg, 0x3C4);
559 t_outb(val, 0x3C5);
560 }
561
read3CE(int reg)562 static inline unsigned char read3CE(int reg)
563 {
564 t_outb(reg, 0x3CE);
565 return t_inb(0x3CF);
566 }
567
writeAttr(int reg,unsigned char val)568 static inline void writeAttr(int reg, unsigned char val)
569 {
570 readb(fb_info.io_virt + CRT + 0x0A); //flip-flop to index
571 t_outb(reg, 0x3C0);
572 t_outb(val, 0x3C0);
573 }
574
readAttr(int reg)575 static inline unsigned char readAttr(int reg)
576 {
577 readb(fb_info.io_virt + CRT + 0x0A); //flip-flop to index
578 t_outb(reg, 0x3C0);
579 return t_inb(0x3C1);
580 }
581
write3CE(int reg,unsigned char val)582 static inline void write3CE(int reg, unsigned char val)
583 {
584 t_outb(reg, 0x3CE);
585 t_outb(val, 0x3CF);
586 }
587
588 #define bios_reg(reg) write3CE(BiosReg, reg)
589 #if 0
590 static inline void unprotect_all(void)
591 {
592 outb(Protection, 0x3C4);
593 outb(0x92, 0x3C5);
594 }
595 #endif
enable_mmio(void)596 static inline void enable_mmio(void)
597 {
598 /* Goto New Mode */
599 outb(0x0B, 0x3C4);
600 inb(0x3C5);
601
602 /* Unprotect registers */
603 outb(NewMode1, 0x3C4);
604 outb(0x80, 0x3C5);
605
606 /* Enable MMIO */
607 outb(PCIReg, 0x3D4);
608 outb(inb(0x3D5) | 0x01, 0x3D5);
609 }
610
611
612 #define crtc_unlock() write3X4(CRTVSyncEnd, read3X4(CRTVSyncEnd) & 0x7F)
613
614 /* Return flat panel's maximum x resolution */
get_nativex(void)615 static int __init get_nativex(void)
616 {
617 int x,y,tmp;
618
619 if (nativex)
620 return nativex;
621
622 tmp = (read3CE(VertStretch) >> 4) & 3;
623
624 switch (tmp) {
625 case 0: x = 1280; y = 1024; break;
626 case 2: x = 1024; y = 768; break;
627 case 3: x = 800; y = 600; break;
628 case 4: x = 1400; y = 1050; break;
629 case 1:
630 default:x = 640; y = 480; break;
631 }
632
633 output("%dx%d flat panel found\n", x, y);
634 return x;
635 }
636
637 /* Set pitch */
set_lwidth(int width)638 static void set_lwidth(int width)
639 {
640 write3X4(Offset, width & 0xFF);
641 write3X4(AddColReg, (read3X4(AddColReg) & 0xCF) | ((width & 0x300) >>4));
642 }
643
644 /* For resolutions smaller than FP resolution stretch */
screen_stretch(void)645 static void screen_stretch(void)
646 {
647 write3CE(VertStretch,(read3CE(VertStretch) & 0x7C) | 1);
648 write3CE(HorStretch,(read3CE(HorStretch) & 0x7C) | 1);
649 }
650
651 /* For resolutions smaller than FP resolution center */
screen_center(void)652 static void screen_center(void)
653 {
654 bios_reg(0); // no stretch
655 write3CE(VertStretch,(read3CE(VertStretch) & 0x7C) | 0x80);
656 write3CE(HorStretch,(read3CE(HorStretch) & 0x7C) | 0x80);
657 }
658
659 /* Address of first shown pixel in display memory */
set_screen_start(int base)660 static void set_screen_start(int base)
661 {
662 write3X4(StartAddrLow, base & 0xFF);
663 write3X4(StartAddrHigh, (base & 0xFF00) >> 8);
664 write3X4(CRTCModuleTest, (read3X4(CRTCModuleTest) & 0xDF) | ((base & 0x10000) >> 11));
665 write3X4(CRTHiOrd, (read3X4(CRTHiOrd) & 0xF8) | ((base & 0xE0000) >> 17));
666 }
667
668 /* Use 20.12 fixed-point for NTSC value and frequency calculation */
669 #define calc_freq(n,m,k) ( ((unsigned long)0xE517 * (n+8) / ((m+2)*(1<<k))) >> 12 )
670
671 /* Set dotclock frequency */
set_vclk(int freq)672 static void set_vclk(int freq)
673 {
674 int m,n,k;
675 int f,fi,d,di;
676 unsigned char lo=0,hi=0;
677
678 d = 20;
679 for(k = 2;k>=0;k--)
680 for(m = 0;m<63;m++)
681 for(n = 0;n<128;n++) {
682 fi = calc_freq(n,m,k);
683 if ((di = abs(fi - freq)) < d) {
684 d = di;
685 f = fi;
686 lo = n;
687 hi = (k<<6) | m;
688 }
689 }
690 if (chip3D) {
691 write3C4(ClockHigh,hi);
692 write3C4(ClockLow,lo);
693 } else {
694 outb(lo,0x43C8);
695 outb(hi,0x43C9);
696 }
697 debug("VCLK = %X %X\n",hi,lo);
698 }
699
700 /* Set number of lines for flat panels*/
set_number_of_lines(int lines)701 static void set_number_of_lines(int lines)
702 {
703 int tmp = read3CE(CyberEnhance) & 0x8F;
704 if (lines > 768)
705 tmp |= 0x30;
706 else if (lines > 600)
707 tmp |= 0x20;
708 else if (lines > 480)
709 tmp |= 0x10;
710 write3CE(CyberEnhance, tmp);
711 }
712
713 /*
714 * If we see that FP is active we assume we have one.
715 * Otherwise we have a CRT display.User can override.
716 */
get_displaytype(void)717 static unsigned int __init get_displaytype(void)
718 {
719 if (fp)
720 return DISPLAY_FP;
721 if (crt)
722 return DISPLAY_CRT;
723 return (read3CE(FPConfig) & 0x10)?DISPLAY_FP:DISPLAY_CRT;
724 }
725
726 /* Try detecting the video memory size */
get_memsize(void)727 static unsigned int __init get_memsize(void)
728 {
729 unsigned char tmp, tmp2;
730 unsigned int k;
731
732 /* If memory size provided by user */
733 if (memsize)
734 k = memsize * Kb;
735 else
736 switch (chip_id) {
737 case CYBER9525DVD: k = 2560 * Kb; break;
738 default:
739 tmp = read3X4(SPR) & 0x0F;
740 switch (tmp) {
741
742 case 0x01: k = 512; break;
743 case 0x02: k = 6 * Mb; break; /* XP */
744 case 0x03: k = 1 * Mb; break;
745 case 0x04: k = 8 * Mb; break;
746 case 0x06: k = 10 * Mb; break; /* XP */
747 case 0x07: k = 2 * Mb; break;
748 case 0x08: k = 12 * Mb; break; /* XP */
749 case 0x0A: k = 14 * Mb; break; /* XP */
750 case 0x0C: k = 16 * Mb; break; /* XP */
751 case 0x0E: /* XP */
752
753 tmp2 = read3C4(0xC1);
754 switch (tmp2) {
755 case 0x00: k = 20 * Mb; break;
756 case 0x01: k = 24 * Mb; break;
757 case 0x10: k = 28 * Mb; break;
758 case 0x11: k = 32 * Mb; break;
759 default: k = 1 * Mb; break;
760 }
761 break;
762
763 case 0x0F: k = 4 * Mb; break;
764 default: k = 1 * Mb;
765 }
766 }
767
768 k -= memdiff * Kb;
769 output("framebuffer size = %d Kb\n", k/Kb);
770 return k;
771 }
772
773 /* Fill in fix */
trident_encode_fix(struct fb_fix_screeninfo * fix,const void * par,struct fb_info_gen * info)774 static int trident_encode_fix(struct fb_fix_screeninfo *fix,
775 const void *par,
776 struct fb_info_gen *info)
777 {
778 struct tridentfb_info * i = (struct tridentfb_info *)info;
779 struct tridentfb_par * p = (struct tridentfb_par *)par;
780
781 debug("enter\n");
782
783 memset(fix, 0, sizeof(struct fb_fix_screeninfo));
784 strcpy(fix->id,tridentfb_name);
785
786 fix->smem_start = i->fbmem;
787 fix->smem_len = i->memsize;
788
789 fix->type = FB_TYPE_PACKED_PIXELS;
790 fix->type_aux = 0;
791
792 fix->visual = p->bpp==8 ? FB_VISUAL_PSEUDOCOLOR:FB_VISUAL_TRUECOLOR;
793
794 fix->xpanstep = fix->ywrapstep = 0;
795 fix->ypanstep = 1;
796 fix->line_length = p->linelength;
797 fix->mmio_start = 0;
798 fix->mmio_len = 0;
799
800 fix->accel = FB_ACCEL_NONE;
801
802 debug("exit\n");
803 return 0;
804 }
805
806 /* Fill in par from var */
trident_decode_var(const struct fb_var_screeninfo * var,void * par,struct fb_info_gen * info)807 static int trident_decode_var(const struct fb_var_screeninfo *var,
808 void *par,
809 struct fb_info_gen *info)
810 {
811 struct tridentfb_par * p = (struct tridentfb_par *)par;
812 struct tridentfb_info * i = (struct tridentfb_info *)info;
813 int vres,vfront,vback,vsync;
814 debug("enter\n");
815 p->var = *var;
816 p->bpp = var->bits_per_pixel;
817
818 if (p->bpp == 24 )
819 p->bpp = 32;
820
821 p->linelength = var->xres_virtual * p->bpp/8;
822
823 switch (p->bpp) {
824 case 8:
825 p->var.red.offset = 0;
826 p->var.green.offset = 0;
827 p->var.blue.offset = 0;
828 p->var.red.length = 6;
829 p->var.green.length = 6;
830 p->var.blue.length = 6;
831 break;
832 case 16:
833 p->var.red.offset = 11;
834 p->var.green.offset = 5;
835 p->var.blue.offset = 0;
836 p->var.red.length = 5;
837 p->var.green.length = 6;
838 p->var.blue.length = 5;
839 break;
840 case 32:
841 p->var.red.offset = 16;
842 p->var.green.offset = 8;
843 p->var.blue.offset = 0;
844 p->var.red.length = 8;
845 p->var.green.length = 8;
846 p->var.blue.length = 8;
847 break;
848 default:
849 return -EINVAL;
850 }
851
852 /* convert from picoseconds to MHz */
853 p->vclk = 1000000/var->pixclock;
854
855 if (p->bpp == 32)
856 p->vclk *=2;
857
858 p->hres = var->xres;
859 vres = p->vres = var->yres;
860
861 /* See if requested resolution is larger than flat panel */
862 if (p->hres > i->nativex && flatpanel) {
863 return -EINVAL;
864 }
865
866 /* See if requested resolution fits in available memory */
867 if (p->hres * p->vres * p->bpp/8 > i->memsize) {
868 return -EINVAL;
869 }
870
871 vfront = var->upper_margin;
872 vback = var->lower_margin;
873 vsync = var->vsync_len;
874
875 /* Compute horizontal and vertical VGA CRTC timing values */
876 if (var->vmode & FB_VMODE_INTERLACED) {
877 vres /= 2;
878 vfront /=2;
879 vback /=2;
880 vsync /=2;
881 }
882
883 if (var->vmode & FB_VMODE_DOUBLE) {
884 vres *= 2;
885 vfront *=2;
886 vback *=2;
887 vsync *=2;
888 }
889
890 p->htotal = (p->hres + var->left_margin + var->right_margin + var->hsync_len)/8 - 10;
891 p->hdispend = p->hres/8 - 1;
892 p->hsyncstart = (p->hres + var->right_margin)/8;
893 p->hsyncend = var->hsync_len/8;
894 p->hblankstart = p->hdispend + 1;
895 p->hblankend = p->htotal + 5;
896
897 p->vtotal = vres + vfront + vback + vsync - 2;
898 p->vdispend = vres - 1;
899 p->vsyncstart = vres + vback;
900 p->vsyncend = vsync;
901 p->vblankstart = vres;
902 p->vblankend = p->vtotal + 2;
903
904 debug("exit\n");
905
906 return 0;
907 }
908
909
910 /* Fill in var from info */
trident_encode_var(struct fb_var_screeninfo * var,const void * par,struct fb_info_gen * info)911 static int trident_encode_var(struct fb_var_screeninfo *var,
912 const void *par,
913 struct fb_info_gen *info)
914 {
915 struct tridentfb_par * p = (struct tridentfb_par *)par;
916 debug("enter\n");
917 *var = p->var;
918 var->bits_per_pixel = p->bpp;
919 debug("exit\n");
920 return 0;
921 }
922
923 /* Fill in par from hardware */
trident_get_par(void * par,struct fb_info_gen * info)924 static void trident_get_par(void *par, struct fb_info_gen *info)
925 {
926 struct tridentfb_par * p = (struct tridentfb_par *)par;
927 struct tridentfb_info * i = (struct tridentfb_info *)info;
928
929 debug("enter\n");
930 *p = i->currentmode;
931 debug("exit\n");
932 }
933
934 /* Pan the display */
trident_pan_display(const struct fb_var_screeninfo * var,struct fb_info_gen * info)935 static int trident_pan_display(const struct fb_var_screeninfo *var,
936 struct fb_info_gen *info)
937 {
938 unsigned int offset;
939 struct tridentfb_info * i = (struct tridentfb_info *)info;
940
941 debug("enter\n");
942
943 offset = (var->xoffset + (var->yoffset * var->xres))
944 * var->bits_per_pixel/32;
945 i->currentmode.var.xoffset = var->xoffset;
946 i->currentmode.var.yoffset = var->yoffset;
947 set_screen_start(offset);
948 debug("exit\n");
949 return 0;
950 }
951
952 /* Set the hardware from par */
trident_set_par(const void * par,struct fb_info_gen * info)953 static void trident_set_par(const void *par, struct fb_info_gen *info)
954 {
955 struct tridentfb_par * p = (struct tridentfb_par *)par;
956 struct tridentfb_info * i = (struct tridentfb_info *)info;
957 unsigned char tmp;
958 debug("enter\n");
959
960 i->currentmode = *p;
961 enable_mmio();
962 crtc_unlock();
963
964 write3CE(CyberControl,8);
965 if (flatpanel && p->hres < i->nativex) {
966 /*
967 * on flat panels with native size larger
968 * than requested resolution decide whether
969 * we stretch or center
970 */
971 t_outb(0xEB,0x3C2);
972 write3CE(CyberControl,0x81);
973 if (center)
974 screen_center();
975 else if (stretch)
976 screen_stretch();
977
978 } else {
979 t_outb(0x2B,0x3C2);
980 write3CE(CyberControl,8);
981 }
982
983 /* vertical timing values */
984 write3X4(CRTVTotal, p->vtotal & 0xFF);
985 write3X4(CRTVDispEnd, p->vdispend & 0xFF);
986 write3X4(CRTVSyncStart, p->vsyncstart & 0xFF);
987 write3X4(CRTVSyncEnd, (p->vsyncend & 0x0F));
988 write3X4(CRTVBlankStart, p->vblankstart & 0xFF);
989 write3X4(CRTVBlankEnd, 0/*p->vblankend & 0xFF*/);
990
991 /* horizontal timing values */
992 write3X4(CRTHTotal, p->htotal & 0xFF);
993 write3X4(CRTHDispEnd, p->hdispend & 0xFF);
994 write3X4(CRTHSyncStart, p->hsyncstart & 0xFF);
995 write3X4(CRTHSyncEnd, (p->hsyncend & 0x1F) | ((p->hblankend & 0x20)<<2));
996 write3X4(CRTHBlankStart, p->hblankstart & 0xFF);
997 write3X4(CRTHBlankEnd, 0/*(p->hblankend & 0x1F)*/);
998
999 /* higher bits of vertical timing values */
1000 tmp = 0x10;
1001 if (p->vtotal & 0x100) tmp |= 0x01;
1002 if (p->vdispend & 0x100) tmp |= 0x02;
1003 if (p->vsyncstart & 0x100) tmp |= 0x04;
1004 if (p->vblankstart & 0x100) tmp |= 0x08;
1005
1006 if (p->vtotal & 0x200) tmp |= 0x20;
1007 if (p->vdispend & 0x200) tmp |= 0x40;
1008 if (p->vsyncstart & 0x200) tmp |= 0x80;
1009
1010 write3X4(CRTOverflow, tmp);
1011
1012
1013 tmp = read3X4(CRTHiOrd) | 0x08; //line compare bit 10
1014
1015 if (p->vtotal & 0x400) tmp |= 0x80;
1016 if (p->vblankstart & 0x400) tmp |= 0x40;
1017 if (p->vsyncstart & 0x400) tmp |= 0x20;
1018 if (p->vdispend & 0x400) tmp |= 0x10;
1019 write3X4(CRTHiOrd, tmp);
1020
1021 write3X4(HorizOverflow, 0);
1022
1023 tmp = 0x40;
1024 if (p->vblankstart & 0x200) tmp |= 0x20;
1025 if (p->var.vmode & FB_VMODE_DOUBLE) tmp |= 0x80; //double scan for 200 line modes
1026 write3X4(CRTMaxScanLine, tmp);
1027 write3X4(CRTLineCompare,0xFF);
1028 write3X4(CRTPRowScan,0);
1029 write3X4(CRTModeControl,0xC3);
1030 write3X4(LinearAddReg,0x20); //enable linear addressing
1031 tmp = (p->var.vmode & FB_VMODE_INTERLACED) ? 0x84:0x80;
1032 write3X4(CRTCModuleTest,tmp); //enable access extended memory
1033 write3X4(GraphEngReg, 0x80); //enable GE for text acceleration
1034
1035 if (p->var.accel_flags & FB_ACCELF_TEXT)
1036 acc->init_accel(p->hres,p->bpp);
1037
1038 switch (p->bpp) {
1039 case 8:tmp=0;break;
1040 case 16:tmp=5;break;
1041 case 24:
1042 /* tmp=0x29;break; */
1043 /* seems like 24bpp is same as 32bpp when using vesafb */
1044 case 32:tmp=9;break;
1045 }
1046 write3X4(PixelBusReg, tmp);
1047
1048 write3X4(InterfaceSel, 0x5B); //32bit internal data path
1049 write3X4(DRAMControl, 0x30); //both IO,linear enable
1050 write3X4(Performance, 0xBF);
1051 write3X4(PCIReg,0x07); //MMIO & PCI read and write burst enable
1052
1053 set_vclk(p->vclk);
1054
1055 write3C4(0,3);
1056 write3C4(1,1); //set char clock 8 dots wide
1057 write3C4(2,0x0F); //enable 4 maps because needed in chain4 mode
1058 write3C4(3,0);
1059 write3C4(4,0x0E); //memory mode enable bitmaps ??
1060
1061 write3CE(MiscExtFunc,(p->bpp==32)?0x1A:0x12); //divide clock by 2 if 32bpp
1062 //chain4 mode display and CPU path
1063 write3CE(0x5,0x40); //no CGA compat,allow 256 col
1064 write3CE(0x6,0x05); //graphics mode
1065 write3CE(0x7,0x0F); //planes?
1066
1067 writeAttr(0x10,0x41); //graphics mode and support 256 color modes
1068 writeAttr(0x12,0x0F); //planes
1069 writeAttr(0x13,0); //horizontal pel panning
1070
1071 //colors
1072 for(tmp = 0;tmp < 0x10;tmp++)
1073 writeAttr(tmp,tmp);
1074 readb(fb_info.io_virt + CRT + 0x0A); //flip-flop to index
1075 t_outb(0x20, 0x3C0); //enable attr
1076
1077 switch (p->bpp) {
1078 case 8: tmp = 0;break; //256 colors
1079 case 15: tmp = 0x10;break;
1080 case 16: tmp = 0x30;break; //hicolor
1081 case 24: //truecolor
1082 case 32: tmp = 0xD0;break;
1083 }
1084
1085 t_inb(0x3C8);
1086 t_inb(0x3C6);
1087 t_inb(0x3C6);
1088 t_inb(0x3C6);
1089 t_inb(0x3C6);
1090 t_outb(tmp,0x3C6);
1091 t_inb(0x3C8);
1092
1093 if (flatpanel)
1094 set_number_of_lines(p->vres);
1095 set_lwidth(p->hres*p->bpp/(4*16));
1096
1097 trident_pan_display(&p->var,info);
1098 debug("exit\n");
1099 }
1100
1101 /* Get value of one color register */
trident_getcolreg(unsigned regno,unsigned * red,unsigned * green,unsigned * blue,unsigned * transp,struct fb_info * info)1102 static int trident_getcolreg(unsigned regno, unsigned *red,
1103 unsigned *green, unsigned *blue,
1104 unsigned *transp, struct fb_info *info)
1105 {
1106 struct tridentfb_info * i = (struct tridentfb_info *)info;
1107 int m = i->currentmode.bpp==8?256:16;
1108
1109 debug("enter %d\n",regno);
1110
1111 if (regno >= m)
1112 return 1;
1113
1114 *red = palette[regno].red;
1115 *green = palette[regno].green;
1116 *blue = palette[regno].blue;
1117 *transp = palette[regno].transp;
1118
1119 debug("exit\n");
1120 return 0;
1121 }
1122
1123 /* Set one color register */
trident_setcolreg(unsigned regno,unsigned red,unsigned green,unsigned blue,unsigned transp,struct fb_info * info)1124 static int trident_setcolreg(unsigned regno, unsigned red, unsigned green,
1125 unsigned blue, unsigned transp,
1126 struct fb_info *info)
1127 {
1128 struct tridentfb_info * i = (struct tridentfb_info *)info;
1129 int bpp = i->currentmode.bpp;
1130 int m = bpp==8?256:16;
1131
1132 debug("enter %d\n",regno);
1133
1134 if (regno >= m)
1135 return 1;
1136
1137 palette[regno].red = red;
1138 palette[regno].green = green;
1139 palette[regno].blue = blue;
1140 palette[regno].transp = transp;
1141
1142 if (bpp==8) {
1143 t_outb(0xFF,0x3C6);
1144 t_outb(regno,0x3C8);
1145
1146 t_outb(red>>10,0x3C9);
1147 t_outb(green>>10,0x3C9);
1148 t_outb(blue>>10,0x3C9);
1149
1150 } else
1151 if (bpp == 16) /* RGB 565 */
1152 ((u16*)info->pseudo_palette)[regno] = (red & 0xF800) |
1153 ((green & 0xFC00) >> 5) | ((blue & 0xF800) >> 11);
1154 else
1155 if (bpp == 32) /* ARGB 8888 */
1156 ((u32*)info->pseudo_palette)[regno] =
1157 ((transp & 0xFF00) <<16) |
1158 ((red & 0xFF00) << 8) |
1159 ((green & 0xFF00)) |
1160 ((blue & 0xFF00)>>8);
1161
1162 debug("exit\n");
1163 return 0;
1164 }
1165
1166 /* Try blanking the screen.For flat panels it does nothing */
trident_blank(int blank_mode,struct fb_info_gen * info)1167 static int trident_blank(int blank_mode, struct fb_info_gen *info)
1168 {
1169 unsigned char PMCont,DPMSCont;
1170
1171 debug("enter\n");
1172 if (flatpanel)
1173 return 0;
1174 t_outb(0x04,0x83C8); /* Read DPMS Control */
1175 PMCont = t_inb(0x83C6) & 0xFC;
1176 DPMSCont = read3CE(PowerStatus) & 0xFC;
1177 switch (blank_mode)
1178 {
1179 case VESA_NO_BLANKING:
1180 /* Screen: On, HSync: On, VSync: On */
1181 PMCont |= 0x03;
1182 DPMSCont |= 0x00;
1183 break;
1184 case VESA_HSYNC_SUSPEND:
1185 /* Screen: Off, HSync: Off, VSync: On */
1186 PMCont |= 0x02;
1187 DPMSCont |= 0x01;
1188 break;
1189 case VESA_VSYNC_SUSPEND:
1190 /* Screen: Off, HSync: On, VSync: Off */
1191 PMCont |= 0x02;
1192 DPMSCont |= 0x02;
1193 break;
1194 case VESA_POWERDOWN:
1195 /* Screen: Off, HSync: Off, VSync: Off */
1196 PMCont |= 0x00;
1197 DPMSCont |= 0x03;
1198 break;
1199 }
1200
1201 write3CE(PowerStatus,DPMSCont);
1202 t_outb(4,0x83C8);
1203 t_outb(PMCont,0x83C6);
1204
1205 debug("exit\n");
1206 return 0;
1207 }
1208
1209 /* Set display switch used by console */
trident_set_disp(const void * par,struct display * disp,struct fb_info_gen * info)1210 static void trident_set_disp(const void *par, struct display *disp,
1211 struct fb_info_gen *info)
1212 {
1213 struct tridentfb_info * i = (struct tridentfb_info *)info;
1214 struct fb_info * ii = (struct fb_info *)info;
1215 struct tridentfb_par * p = (struct tridentfb_par *)par;
1216 int isaccel = p->var.accel_flags & FB_ACCELF_TEXT;
1217
1218 disp->screen_base = (char *)i->fbmem_virt;
1219 debug("enter\n");
1220 #ifdef FBCON_HAS_CFB8
1221 if (p->bpp == 8 ) {
1222 if (isaccel)
1223 disp->dispsw = &trident_8bpp;
1224 else
1225 disp->dispsw = &fbcon_cfb8;
1226 } else
1227 #endif
1228 #ifdef FBCON_HAS_CFB16
1229 if (p->bpp == 16) {
1230 if (isaccel)
1231 disp->dispsw = &trident_16bpp;
1232 else
1233 disp->dispsw = &fbcon_cfb16;
1234 disp->dispsw_data =ii->pseudo_palette; /* console palette */
1235 } else
1236 #endif
1237 #ifdef FBCON_HAS_CFB32
1238 if (p->bpp == 32) {
1239 if (isaccel)
1240 disp->dispsw = &trident_32bpp;
1241 else
1242 disp->dispsw = &fbcon_cfb32;
1243 disp->dispsw_data =ii->pseudo_palette; /* console palette */
1244 } else
1245 #endif
1246 disp->dispsw = &fbcon_dummy;
1247 debug("exit\n");
1248 }
1249
1250 static struct fbgen_hwswitch trident_hwswitch = {
1251 NULL, /* detect not needed */
1252 trident_encode_fix,
1253 trident_decode_var,
1254 trident_encode_var,
1255 trident_get_par,
1256 trident_set_par,
1257 trident_getcolreg,
1258 trident_setcolreg,
1259 trident_pan_display,
1260 trident_blank,
1261 trident_set_disp
1262 };
1263
1264 static int trident_iosize;
1265
trident_pci_probe(struct pci_dev * dev,const struct pci_device_id * id)1266 static int __devinit trident_pci_probe(struct pci_dev * dev, const struct pci_device_id * id)
1267 {
1268 int err;
1269 unsigned char revision;
1270
1271 err = pci_enable_device(dev);
1272 if (err)
1273 return err;
1274
1275 chip_id = id->device;
1276
1277 /* If PCI id is 0x9660 then further detect chip type */
1278
1279 if (chip_id == TGUI9660) {
1280 outb(RevisionID,0x3C4);
1281 revision = inb(0x3C5);
1282
1283 switch (revision) {
1284 case 0x22:
1285 case 0x23: chip_id = CYBER9397;break;
1286 case 0x2A: chip_id = CYBER9397DVD;break;
1287 case 0x30:
1288 case 0x33:
1289 case 0x34:
1290 case 0x35:
1291 case 0x38:
1292 case 0x3A:
1293 case 0xB3: chip_id = CYBER9385;break;
1294 case 0x40 ... 0x43: chip_id = CYBER9382;break;
1295 case 0x4A: chip_id = CYBER9388;break;
1296 default:break;
1297 }
1298 }
1299
1300 chip3D = is3Dchip(chip_id);
1301
1302 if (is_xp(chip_id)) {
1303 acc = &accel_xp;
1304 } else
1305 if (is_blade(chip_id)) {
1306 acc = &accel_blade;
1307 } else {
1308 acc = &accel_image;
1309 }
1310
1311 /* acceleration is on by default for 3D chips */
1312 defaultaccel = chip3D && !noaccel;
1313
1314 fb_info.io = pci_resource_start(dev,1);
1315 fb_info.fbmem = pci_resource_start(dev,0);
1316
1317 trident_iosize = chip3D ? 0x20000:0x10000;
1318
1319 if (!request_mem_region(fb_info.io, trident_iosize, "tridentfb")) {
1320 debug("request_region failed!\n");
1321 return -1;
1322 }
1323
1324 fb_info.io_virt = (unsigned long)ioremap_nocache(fb_info.io, trident_iosize);
1325
1326 if (!fb_info.io_virt) {
1327 release_region(fb_info.io, trident_iosize);
1328 debug("ioremap failed\n");
1329 return -1;
1330 }
1331
1332 enable_mmio();
1333
1334 fb_info.memsize = get_memsize();
1335 if (!request_mem_region(fb_info.fbmem, fb_info.memsize, "tridentfb")) {
1336 debug("request_mem_region failed!\n");
1337 return -1;
1338 }
1339
1340 fb_info.fbmem_virt = (unsigned long)ioremap_nocache(fb_info.fbmem, fb_info.memsize);
1341
1342 if (!fb_info.fbmem_virt) {
1343 release_mem_region(fb_info.fbmem, fb_info.memsize);
1344 debug("ioremap failed\n");
1345 return -1;
1346 }
1347
1348 output("%s board found\n", dev->name);
1349 debug("Trident board found : mem = %X,io = %X, mem_v = %X, io_v = %X\n",
1350 fb_info.fbmem, fb_info.io, fb_info.fbmem_virt, fb_info.io_virt);
1351
1352 fb_info.gen.parsize = sizeof (struct tridentfb_par);
1353 fb_info.gen.fbhw = &trident_hwswitch;
1354
1355 strcpy(fb_info.gen.info.modename, tridentfb_name);
1356 displaytype = get_displaytype();
1357
1358 if(flatpanel)
1359 fb_info.nativex = get_nativex();
1360
1361 fb_info.gen.info.changevar = NULL;
1362 fb_info.gen.info.node = NODEV;
1363 fb_info.gen.info.fbops = &tridentfb_ops;
1364 fb_info.gen.info.disp = &disp;
1365
1366 fb_info.gen.info.switch_con = &fbgen_switch;
1367 fb_info.gen.info.updatevar = &fbgen_update_var;
1368 fb_info.gen.info.blank = &fbgen_blank;
1369
1370 fb_info.gen.info.flags = FBINFO_FLAG_DEFAULT;
1371 fb_info.gen.info.fontname[0] = '\0';
1372 fb_info.gen.info.pseudo_palette = pseudo_pal;
1373
1374 /* This should give a reasonable default video mode */
1375 fb_find_mode(&default_var,&fb_info.gen.info,mode,NULL,0,NULL,bpp);
1376
1377 if (defaultaccel && acc)
1378 default_var.accel_flags |= FB_ACCELF_TEXT;
1379 else
1380 default_var.accel_flags &= ~FB_ACCELF_TEXT;
1381
1382 trident_decode_var(&default_var, &fb_info.currentmode, &fb_info.gen);
1383 fbgen_get_var(&disp.var, -1, &fb_info.gen.info);
1384 default_var.activate |= FB_ACTIVATE_NOW;
1385 fbgen_set_disp(-1, &fb_info.gen);
1386
1387 if (register_framebuffer(&fb_info.gen.info) < 0) {
1388 printk("Could not register Trident framebuffer\n");
1389 return -EINVAL;
1390 }
1391
1392 output("fb%d: %s frame buffer device %dx%d-%dbpp\n",
1393 GET_FB_IDX(fb_info.gen.info.node), fb_info.gen.info.modename,default_var.xres,
1394 default_var.yres,default_var.bits_per_pixel);
1395 return 0;
1396 }
1397
trident_pci_remove(struct pci_dev * dev)1398 static void __devexit trident_pci_remove(struct pci_dev * dev)
1399 {
1400 unregister_framebuffer(&fb_info.gen.info);
1401 iounmap((void *)fb_info.io_virt);
1402 iounmap((void *)fb_info.fbmem_virt);
1403 release_mem_region(fb_info.fbmem, fb_info.memsize);
1404 release_region(fb_info.io, trident_iosize);
1405 }
1406
1407 /* List of boards that we are trying to support */
1408 static struct pci_device_id trident_devices[] __devinitdata = {
1409 {PCI_VENDOR_ID_TRIDENT, BLADE3D, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1410 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1411 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7D, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1412 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1413 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1D, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1414 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1415 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1D, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1416 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEE4, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1417 {PCI_VENDOR_ID_TRIDENT, TGUI9660, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1418 {PCI_VENDOR_ID_TRIDENT, IMAGE975, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1419 {PCI_VENDOR_ID_TRIDENT, IMAGE985, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1420 {PCI_VENDOR_ID_TRIDENT, CYBER9320, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1421 {PCI_VENDOR_ID_TRIDENT, CYBER9388, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1422 {PCI_VENDOR_ID_TRIDENT, CYBER9520, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1423 {PCI_VENDOR_ID_TRIDENT, CYBER9525DVD, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1424 {PCI_VENDOR_ID_TRIDENT, CYBER9397, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1425 {PCI_VENDOR_ID_TRIDENT, CYBER9397DVD, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1426 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPAi1, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1427 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm8, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1428 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm16, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1429 {0,}
1430 };
1431
1432 MODULE_DEVICE_TABLE(pci,trident_devices);
1433
1434 static struct pci_driver tridentfb_pci_driver = {
1435 name:"tridentfb",
1436 id_table:trident_devices,
1437 probe:trident_pci_probe,
1438 remove:__devexit_p(trident_pci_remove),
1439 };
1440
tridentfb_init(void)1441 int __init tridentfb_init(void)
1442 {
1443 output("Trident framebuffer %s initializing\n", VERSION);
1444 return pci_module_init(&tridentfb_pci_driver);
1445 }
1446
tridentfb_exit(void)1447 void __exit tridentfb_exit(void)
1448 {
1449 pci_unregister_driver(&tridentfb_pci_driver);
1450 }
1451
1452
1453 /*
1454 * Parse user specified options (`video=trident:')
1455 * example:
1456 * video=trident:800x600,bpp=16,noaccel
1457 */
tridentfb_setup(char * options)1458 int tridentfb_setup(char *options)
1459 {
1460 char * opt;
1461 if (!options || !*options)
1462 return 0;
1463 while((opt = strsep(&options,",")) != NULL ) {
1464 if (!*opt) continue;
1465 if (!strncmp(opt,"noaccel",7))
1466 noaccel = 1;
1467 else if (!strncmp(opt,"fp",2))
1468 displaytype = DISPLAY_FP;
1469 else if (!strncmp(opt,"crt",3))
1470 displaytype = DISPLAY_CRT;
1471 else if (!strncmp(opt,"bpp=",4))
1472 bpp = simple_strtoul(opt+4,NULL,0);
1473 else if (!strncmp(opt,"center",6))
1474 center = 1;
1475 else if (!strncmp(opt,"stretch",7))
1476 stretch = 1;
1477 else if (!strncmp(opt,"memsize=",8))
1478 memsize = simple_strtoul(opt+8,NULL,0);
1479 else if (!strncmp(opt,"memdiff=",8))
1480 memdiff = simple_strtoul(opt+8,NULL,0);
1481 else if (!strncmp(opt,"nativex=",8))
1482 nativex = simple_strtoul(opt+8,NULL,0);
1483 else
1484 mode = opt;
1485 }
1486 return 0;
1487 }
1488
1489 static struct fb_ops tridentfb_ops = {
1490 fb_get_fix:fbgen_get_fix,
1491 fb_get_var:fbgen_get_var,
1492 fb_set_var:fbgen_set_var,
1493 fb_get_cmap:fbgen_get_cmap,
1494 fb_set_cmap:fbgen_set_cmap,
1495 fb_pan_display:fbgen_pan_display,
1496 };
1497
1498 #ifdef MODULE
1499 module_init(tridentfb_init);
1500 #endif
1501 module_exit(tridentfb_exit);
1502
1503 MODULE_AUTHOR("Jani Monoses <jani@iv.ro>");
1504 MODULE_DESCRIPTION("Framebuffer driver for Trident cards");
1505 MODULE_LICENSE("GPL");
1506
1507