1 /*
2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License as published by the
4 * Free Software Foundation; either version 2 of the License, or (at your
5 * option) any later version.
6 *
7 * Copyright (C) 2003 PMC-Sierra Inc.
8 * Author: Manish Lachwani (lachwani@pmc-sierra.com)
9 */
10
11 #include <linux/sched.h>
12 #include <linux/mm.h>
13 #include <asm/io.h>
14 #include <asm/pgtable.h>
15 #include <asm/processor.h>
16 #include <asm/reboot.h>
17 #include <asm/system.h>
18 #include <linux/delay.h>
19 #include <linux/smp.h>
20 #include <asm/bootinfo.h>
21
22 #include "setup.h"
23
24 /* Call Vectors */
25 struct callvectors {
26 int (*open) (char*, int, int);
27 int (*close) (int);
28 int (*read) (int, void*, int);
29 int (*write) (int, void*, int);
30 off_t (*lseek) (int, off_t, int);
31 int (*printf) (const char*, ...);
32 void (*cacheflush) (void);
33 char* (*gets) (char*);
34 };
35
36 struct callvectors* debug_vectors;
37 char arcs_cmdline[CL_SIZE];
38
39 extern unsigned long yosemite_base;
40 extern unsigned long cpu_clock;
41 unsigned char titan_ge_mac_addr_base[6];
42
get_system_type(void)43 const char *get_system_type(void)
44 {
45 return "PMC-Sierra Yosemite";
46 }
47
prom_cpu0_exit(void)48 static void prom_cpu0_exit(void)
49 {
50 void *nvram = YOSEMITE_NVRAM_BASE_ADDR;
51
52 /* Ask the NVRAM/RTC/watchdog chip to assert reset in 1/16 second */
53 writeb(0x84, nvram + 0xff7);
54
55 /* wait for the watchdog to go off */
56 mdelay(100+(1000/16));
57
58 /* if the watchdog fails for some reason, let people know */
59 printk(KERN_NOTICE "Watchdog reset failed\n");
60 }
61
62 /*
63 * Reset the NVRAM over the local bus
64 */
prom_exit(void)65 static void prom_exit(void)
66 {
67 #ifdef CONFIG_SMP
68 if (smp_processor_id())
69 /* CPU 1 */
70 smp_call_function(prom_cpu0_exit, NULL, 1, 1);
71 #endif
72 prom_cpu0_exit;
73 }
74
75 /*
76 * Get the MAC address from the EEPROM using the I2C protocol
77 */
get_mac_address(char dest[6])78 void get_mac_address(char dest[6])
79 {
80 /* Use the I2C command code in the i2c-yosemite */
81 }
82
83 /*
84 * Halt the system
85 */
prom_halt(void)86 static void prom_halt(void)
87 {
88 printk(KERN_NOTICE "\n** You can safely turn off the power\n");
89 while (1)
90 __asm__(".set\tmips3\n\t"
91 "wait\n\t"
92 ".set\tmips0");
93 }
94
95 /*
96 * Init routine which accepts the variables from PMON
97 */
prom_init(int argc,char ** arg,char ** env,struct callvectors * cv)98 __init prom_init(int argc, char **arg, char **env, struct callvectors *cv)
99 {
100 int i = 0;
101
102 /* Callbacks for halt, restart */
103 _machine_restart = (void (*)(char *))prom_exit;
104 _machine_halt = prom_halt;
105 _machine_power_off = prom_halt;
106
107 #ifdef CONFIG_MIPS64
108
109 /* Do nothing for the 64-bit for now. Just implement for the 32-bit */
110
111 #else /* CONFIG_MIPS64 */
112
113 debug_vectors = cv;
114 arcs_cmdline[0] = '\0';
115
116 /* Get the boot parameters */
117 for (i = 1; i < argc; i++) {
118 if (strlen(arcs_cmdline) + strlen(arg[i] + 1) >= sizeof(arcs_cmdline))
119 break;
120
121 strcat(arcs_cmdline, arg[i]);
122 strcat(arcs_cmdline, " ");
123 }
124
125 while (*env) {
126 if (strncmp("ocd_base", *env, strlen("ocd_base")) == 0)
127 yosemite_base = simple_strtol(*env + strlen("ocd_base="),
128 NULL, 16);
129
130 if (strncmp("cpuclock", *env, strlen("cpuclock")) == 0)
131 cpu_clock = simple_strtol(*env + strlen("cpuclock="),
132 NULL, 10);
133
134 env++;
135 }
136 #endif /* CONFIG_MIPS64 */
137
138 mips_machgroup = MACH_GROUP_TITAN;
139 mips_machtype = MACH_TITAN_YOSEMITE;
140
141 get_mac_address(titan_ge_mac_addr_base);
142
143 debug_vectors->printf("Booting Linux kernel...\n");
144 }
145
prom_free_prom_memory(void)146 void __init prom_free_prom_memory(void)
147 {
148 }
149
prom_fixup_mem_map(unsigned long start,unsigned long end)150 void __init prom_fixup_mem_map(unsigned long start, unsigned long end)
151 {
152 }
153
154 /*
155 * SMP support
156 */
prom_setup_smp(void)157 int prom_setup_smp(void)
158 {
159 int num_cpus = 2;
160
161 /*
162 * We know that the RM9000 on the Jaguar ATX board has 2 cores. Hence, this
163 * can be hardcoded for now.
164 */
165 return num_cpus;
166 }
167
prom_boot_secondary(int cpu,unsigned long sp,unsigned long gp)168 int prom_boot_secondary(int cpu, unsigned long sp, unsigned long gp)
169 {
170 /* Clear the semaphore */
171 *(volatile u_int32_t *)(0xbb000a68) = 0x80000000;
172
173 return 1;
174 }
175
prom_init_secondary(void)176 void prom_init_secondary(void)
177 {
178 clear_c0_config(CONF_CM_CMASK);
179 set_c0_config(0x2);
180
181 clear_c0_status(ST0_IM);
182 set_c0_status(0x1ffff);
183 }
184
prom_smp_finish(void)185 void prom_smp_finish(void)
186 {
187 }
188
189