1 /*
2 * Copyright (c) 2015, Mellanox Technologies, Ltd. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #ifndef __MLX5_ESWITCH_H__
34 #define __MLX5_ESWITCH_H__
35
36 #include <linux/if_ether.h>
37 #include <linux/if_link.h>
38 #include <linux/atomic.h>
39 #include <linux/xarray.h>
40 #include <net/devlink.h>
41 #include <linux/mlx5/device.h>
42 #include <linux/mlx5/eswitch.h>
43 #include <linux/mlx5/vport.h>
44 #include <linux/mlx5/fs.h>
45 #include "lib/mpfs.h"
46 #include "lib/fs_chains.h"
47 #include "sf/sf.h"
48 #include "en/tc_ct.h"
49 #include "en/tc/sample.h"
50
51 enum mlx5_mapped_obj_type {
52 MLX5_MAPPED_OBJ_CHAIN,
53 MLX5_MAPPED_OBJ_SAMPLE,
54 MLX5_MAPPED_OBJ_INT_PORT_METADATA,
55 };
56
57 struct mlx5_mapped_obj {
58 enum mlx5_mapped_obj_type type;
59 union {
60 u32 chain;
61 struct {
62 u32 group_id;
63 u32 rate;
64 u32 trunc_size;
65 u32 tunnel_id;
66 } sample;
67 u32 int_port_metadata;
68 };
69 };
70
71 #ifdef CONFIG_MLX5_ESWITCH
72
73 #define ESW_OFFLOADS_DEFAULT_NUM_GROUPS 15
74
75 #define MLX5_MAX_UC_PER_VPORT(dev) \
76 (1 << MLX5_CAP_GEN(dev, log_max_current_uc_list))
77
78 #define MLX5_MAX_MC_PER_VPORT(dev) \
79 (1 << MLX5_CAP_GEN(dev, log_max_current_mc_list))
80
81 #define mlx5_esw_has_fwd_fdb(dev) \
82 MLX5_CAP_ESW_FLOWTABLE(dev, fdb_multi_path_to_table)
83
84 #define esw_chains(esw) \
85 ((esw)->fdb_table.offloads.esw_chains_priv)
86
87 enum {
88 MAPPING_TYPE_CHAIN,
89 MAPPING_TYPE_TUNNEL,
90 MAPPING_TYPE_TUNNEL_ENC_OPTS,
91 MAPPING_TYPE_LABELS,
92 MAPPING_TYPE_ZONE,
93 MAPPING_TYPE_INT_PORT,
94 };
95
96 struct vport_ingress {
97 struct mlx5_flow_table *acl;
98 struct mlx5_flow_handle *allow_rule;
99 struct {
100 struct mlx5_flow_group *allow_spoofchk_only_grp;
101 struct mlx5_flow_group *allow_untagged_spoofchk_grp;
102 struct mlx5_flow_group *allow_untagged_only_grp;
103 struct mlx5_flow_group *drop_grp;
104 struct mlx5_flow_handle *drop_rule;
105 struct mlx5_fc *drop_counter;
106 } legacy;
107 struct {
108 /* Optional group to add an FTE to do internal priority
109 * tagging on ingress packets.
110 */
111 struct mlx5_flow_group *metadata_prio_tag_grp;
112 /* Group to add default match-all FTE entry to tag ingress
113 * packet with metadata.
114 */
115 struct mlx5_flow_group *metadata_allmatch_grp;
116 /* Optional group to add a drop all rule */
117 struct mlx5_flow_group *drop_grp;
118 struct mlx5_modify_hdr *modify_metadata;
119 struct mlx5_flow_handle *modify_metadata_rule;
120 struct mlx5_flow_handle *drop_rule;
121 } offloads;
122 };
123
124 struct vport_egress {
125 struct mlx5_flow_table *acl;
126 struct mlx5_flow_handle *allowed_vlan;
127 struct mlx5_flow_group *vlan_grp;
128 union {
129 struct {
130 struct mlx5_flow_group *drop_grp;
131 struct mlx5_flow_handle *drop_rule;
132 struct mlx5_fc *drop_counter;
133 } legacy;
134 struct {
135 struct mlx5_flow_group *fwd_grp;
136 struct mlx5_flow_handle *fwd_rule;
137 struct mlx5_flow_handle *bounce_rule;
138 struct mlx5_flow_group *bounce_grp;
139 } offloads;
140 };
141 };
142
143 struct mlx5_vport_drop_stats {
144 u64 rx_dropped;
145 u64 tx_dropped;
146 };
147
148 struct mlx5_vport_info {
149 u8 mac[ETH_ALEN];
150 u16 vlan;
151 u64 node_guid;
152 int link_state;
153 u8 qos;
154 u8 spoofchk: 1;
155 u8 trusted: 1;
156 };
157
158 /* Vport context events */
159 enum mlx5_eswitch_vport_event {
160 MLX5_VPORT_UC_ADDR_CHANGE = BIT(0),
161 MLX5_VPORT_MC_ADDR_CHANGE = BIT(1),
162 MLX5_VPORT_PROMISC_CHANGE = BIT(3),
163 };
164
165 struct mlx5_vport {
166 struct mlx5_core_dev *dev;
167 struct hlist_head uc_list[MLX5_L2_ADDR_HASH_SIZE];
168 struct hlist_head mc_list[MLX5_L2_ADDR_HASH_SIZE];
169 struct mlx5_flow_handle *promisc_rule;
170 struct mlx5_flow_handle *allmulti_rule;
171 struct work_struct vport_change_handler;
172
173 struct vport_ingress ingress;
174 struct vport_egress egress;
175 u32 default_metadata;
176 u32 metadata;
177
178 struct mlx5_vport_info info;
179
180 struct {
181 bool enabled;
182 u32 esw_tsar_ix;
183 u32 bw_share;
184 u32 min_rate;
185 u32 max_rate;
186 struct mlx5_esw_rate_group *group;
187 } qos;
188
189 u16 vport;
190 bool enabled;
191 enum mlx5_eswitch_vport_event enabled_events;
192 int index;
193 struct devlink_port *dl_port;
194 };
195
196 struct mlx5_esw_indir_table;
197
198 struct mlx5_eswitch_fdb {
199 union {
200 struct legacy_fdb {
201 struct mlx5_flow_table *fdb;
202 struct mlx5_flow_group *addr_grp;
203 struct mlx5_flow_group *allmulti_grp;
204 struct mlx5_flow_group *promisc_grp;
205 struct mlx5_flow_table *vepa_fdb;
206 struct mlx5_flow_handle *vepa_uplink_rule;
207 struct mlx5_flow_handle *vepa_star_rule;
208 } legacy;
209
210 struct offloads_fdb {
211 struct mlx5_flow_namespace *ns;
212 struct mlx5_flow_table *tc_miss_table;
213 struct mlx5_flow_table *slow_fdb;
214 struct mlx5_flow_group *send_to_vport_grp;
215 struct mlx5_flow_group *send_to_vport_meta_grp;
216 struct mlx5_flow_group *peer_miss_grp;
217 struct mlx5_flow_handle **peer_miss_rules;
218 struct mlx5_flow_group *miss_grp;
219 struct mlx5_flow_handle **send_to_vport_meta_rules;
220 struct mlx5_flow_handle *miss_rule_uni;
221 struct mlx5_flow_handle *miss_rule_multi;
222 int vlan_push_pop_refcount;
223
224 struct mlx5_fs_chains *esw_chains_priv;
225 struct {
226 DECLARE_HASHTABLE(table, 8);
227 /* Protects vports.table */
228 struct mutex lock;
229 } vports;
230
231 struct mlx5_esw_indir_table *indir;
232
233 } offloads;
234 };
235 u32 flags;
236 };
237
238 struct mlx5_esw_offload {
239 struct mlx5_flow_table *ft_offloads_restore;
240 struct mlx5_flow_group *restore_group;
241 struct mlx5_modify_hdr *restore_copy_hdr_id;
242 struct mapping_ctx *reg_c0_obj_pool;
243
244 struct mlx5_flow_table *ft_offloads;
245 struct mlx5_flow_group *vport_rx_group;
246 struct xarray vport_reps;
247 struct list_head peer_flows;
248 struct mutex peer_mutex;
249 struct mutex encap_tbl_lock; /* protects encap_tbl */
250 DECLARE_HASHTABLE(encap_tbl, 8);
251 struct mutex decap_tbl_lock; /* protects decap_tbl */
252 DECLARE_HASHTABLE(decap_tbl, 8);
253 struct mod_hdr_tbl mod_hdr;
254 DECLARE_HASHTABLE(termtbl_tbl, 8);
255 struct mutex termtbl_mutex; /* protects termtbl hash */
256 struct xarray vhca_map;
257 const struct mlx5_eswitch_rep_ops *rep_ops[NUM_REP_TYPES];
258 u8 inline_mode;
259 atomic64_t num_flows;
260 enum devlink_eswitch_encap_mode encap;
261 struct ida vport_metadata_ida;
262 unsigned int host_number; /* ECPF supports one external host */
263 };
264
265 /* E-Switch MC FDB table hash node */
266 struct esw_mc_addr { /* SRIOV only */
267 struct l2addr_node node;
268 struct mlx5_flow_handle *uplink_rule; /* Forward to uplink rule */
269 u32 refcnt;
270 };
271
272 struct mlx5_host_work {
273 struct work_struct work;
274 struct mlx5_eswitch *esw;
275 };
276
277 struct mlx5_esw_functions {
278 struct mlx5_nb nb;
279 u16 num_vfs;
280 };
281
282 enum {
283 MLX5_ESWITCH_VPORT_MATCH_METADATA = BIT(0),
284 MLX5_ESWITCH_REG_C1_LOOPBACK_ENABLED = BIT(1),
285 };
286
287 struct mlx5_esw_bridge_offloads;
288
289 struct mlx5_eswitch {
290 struct mlx5_core_dev *dev;
291 struct mlx5_nb nb;
292 struct mlx5_eswitch_fdb fdb_table;
293 /* legacy data structures */
294 struct hlist_head mc_table[MLX5_L2_ADDR_HASH_SIZE];
295 struct esw_mc_addr mc_promisc;
296 /* end of legacy */
297 struct workqueue_struct *work_queue;
298 struct xarray vports;
299 u32 flags;
300 int total_vports;
301 int enabled_vports;
302 /* Synchronize between vport change events
303 * and async SRIOV admin state changes
304 */
305 struct mutex state_lock;
306
307 /* Protects eswitch mode change that occurs via one or more
308 * user commands, i.e. sriov state change, devlink commands.
309 */
310 struct rw_semaphore mode_lock;
311 atomic64_t user_count;
312
313 struct {
314 u32 root_tsar_ix;
315 struct mlx5_esw_rate_group *group0;
316 struct list_head groups; /* Protected by esw->state_lock */
317
318 /* Protected by esw->state_lock.
319 * Initially 0, meaning no QoS users and QoS is disabled.
320 */
321 refcount_t refcnt;
322 } qos;
323
324 struct mlx5_esw_bridge_offloads *br_offloads;
325 struct mlx5_esw_offload offloads;
326 int mode;
327 u16 manager_vport;
328 u16 first_host_vport;
329 struct mlx5_esw_functions esw_funcs;
330 struct {
331 u32 large_group_num;
332 } params;
333 struct blocking_notifier_head n_head;
334 };
335
336 void esw_offloads_disable(struct mlx5_eswitch *esw);
337 int esw_offloads_enable(struct mlx5_eswitch *esw);
338 void esw_offloads_cleanup_reps(struct mlx5_eswitch *esw);
339 int esw_offloads_init_reps(struct mlx5_eswitch *esw);
340
341 bool mlx5_esw_vport_match_metadata_supported(const struct mlx5_eswitch *esw);
342 int mlx5_esw_offloads_vport_metadata_set(struct mlx5_eswitch *esw, bool enable);
343 u32 mlx5_esw_match_metadata_alloc(struct mlx5_eswitch *esw);
344 void mlx5_esw_match_metadata_free(struct mlx5_eswitch *esw, u32 metadata);
345
346 int mlx5_esw_qos_modify_vport_rate(struct mlx5_eswitch *esw, u16 vport_num, u32 rate_mbps);
347
348 /* E-Switch API */
349 int mlx5_eswitch_init(struct mlx5_core_dev *dev);
350 void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw);
351
352 #define MLX5_ESWITCH_IGNORE_NUM_VFS (-1)
353 int mlx5_eswitch_enable_locked(struct mlx5_eswitch *esw, int mode, int num_vfs);
354 int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs);
355 void mlx5_eswitch_disable_locked(struct mlx5_eswitch *esw, bool clear_vf);
356 void mlx5_eswitch_disable(struct mlx5_eswitch *esw, bool clear_vf);
357 int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,
358 u16 vport, const u8 *mac);
359 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw,
360 u16 vport, int link_state);
361 int mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
362 u16 vport, u16 vlan, u8 qos);
363 int mlx5_eswitch_set_vport_spoofchk(struct mlx5_eswitch *esw,
364 u16 vport, bool spoofchk);
365 int mlx5_eswitch_set_vport_trust(struct mlx5_eswitch *esw,
366 u16 vport_num, bool setting);
367 int mlx5_eswitch_set_vport_rate(struct mlx5_eswitch *esw, u16 vport,
368 u32 max_rate, u32 min_rate);
369 int mlx5_esw_qos_vport_update_group(struct mlx5_eswitch *esw,
370 struct mlx5_vport *vport,
371 struct mlx5_esw_rate_group *group,
372 struct netlink_ext_ack *extack);
373 int mlx5_eswitch_set_vepa(struct mlx5_eswitch *esw, u8 setting);
374 int mlx5_eswitch_get_vepa(struct mlx5_eswitch *esw, u8 *setting);
375 int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw,
376 u16 vport, struct ifla_vf_info *ivi);
377 int mlx5_eswitch_get_vport_stats(struct mlx5_eswitch *esw,
378 u16 vport,
379 struct ifla_vf_stats *vf_stats);
380 void mlx5_eswitch_del_send_to_vport_rule(struct mlx5_flow_handle *rule);
381
382 int mlx5_eswitch_modify_esw_vport_context(struct mlx5_core_dev *dev, u16 vport,
383 bool other_vport, void *in);
384
385 struct mlx5_flow_spec;
386 struct mlx5_esw_flow_attr;
387 struct mlx5_termtbl_handle;
388
389 bool
390 mlx5_eswitch_termtbl_required(struct mlx5_eswitch *esw,
391 struct mlx5_flow_attr *attr,
392 struct mlx5_flow_act *flow_act,
393 struct mlx5_flow_spec *spec);
394
395 struct mlx5_flow_handle *
396 mlx5_eswitch_add_termtbl_rule(struct mlx5_eswitch *esw,
397 struct mlx5_flow_table *ft,
398 struct mlx5_flow_spec *spec,
399 struct mlx5_esw_flow_attr *attr,
400 struct mlx5_flow_act *flow_act,
401 struct mlx5_flow_destination *dest,
402 int num_dest);
403
404 void
405 mlx5_eswitch_termtbl_put(struct mlx5_eswitch *esw,
406 struct mlx5_termtbl_handle *tt);
407
408 void
409 mlx5_eswitch_clear_rule_source_port(struct mlx5_eswitch *esw, struct mlx5_flow_spec *spec);
410
411 struct mlx5_flow_handle *
412 mlx5_eswitch_add_offloaded_rule(struct mlx5_eswitch *esw,
413 struct mlx5_flow_spec *spec,
414 struct mlx5_flow_attr *attr);
415 struct mlx5_flow_handle *
416 mlx5_eswitch_add_fwd_rule(struct mlx5_eswitch *esw,
417 struct mlx5_flow_spec *spec,
418 struct mlx5_flow_attr *attr);
419 void
420 mlx5_eswitch_del_offloaded_rule(struct mlx5_eswitch *esw,
421 struct mlx5_flow_handle *rule,
422 struct mlx5_flow_attr *attr);
423 void
424 mlx5_eswitch_del_fwd_rule(struct mlx5_eswitch *esw,
425 struct mlx5_flow_handle *rule,
426 struct mlx5_flow_attr *attr);
427
428 struct mlx5_flow_handle *
429 mlx5_eswitch_create_vport_rx_rule(struct mlx5_eswitch *esw, u16 vport,
430 struct mlx5_flow_destination *dest);
431
432 enum {
433 SET_VLAN_STRIP = BIT(0),
434 SET_VLAN_INSERT = BIT(1)
435 };
436
437 enum mlx5_flow_match_level {
438 MLX5_MATCH_NONE = MLX5_INLINE_MODE_NONE,
439 MLX5_MATCH_L2 = MLX5_INLINE_MODE_L2,
440 MLX5_MATCH_L3 = MLX5_INLINE_MODE_IP,
441 MLX5_MATCH_L4 = MLX5_INLINE_MODE_TCP_UDP,
442 };
443
444 /* current maximum for flow based vport multicasting */
445 #define MLX5_MAX_FLOW_FWD_VPORTS 32
446
447 enum {
448 MLX5_ESW_DEST_ENCAP = BIT(0),
449 MLX5_ESW_DEST_ENCAP_VALID = BIT(1),
450 MLX5_ESW_DEST_CHAIN_WITH_SRC_PORT_CHANGE = BIT(2),
451 };
452
453 struct mlx5_esw_flow_attr {
454 struct mlx5_eswitch_rep *in_rep;
455 struct mlx5_core_dev *in_mdev;
456 struct mlx5_core_dev *counter_dev;
457 struct mlx5e_tc_int_port *dest_int_port;
458 struct mlx5e_tc_int_port *int_port;
459
460 int split_count;
461 int out_count;
462
463 __be16 vlan_proto[MLX5_FS_VLAN_DEPTH];
464 u16 vlan_vid[MLX5_FS_VLAN_DEPTH];
465 u8 vlan_prio[MLX5_FS_VLAN_DEPTH];
466 u8 total_vlan;
467 struct {
468 u32 flags;
469 struct mlx5_eswitch_rep *rep;
470 struct mlx5_pkt_reformat *pkt_reformat;
471 struct mlx5_core_dev *mdev;
472 struct mlx5_termtbl_handle *termtbl;
473 int src_port_rewrite_act_id;
474 } dests[MLX5_MAX_FLOW_FWD_VPORTS];
475 struct mlx5_rx_tun_attr *rx_tun_attr;
476 struct ethhdr eth;
477 struct mlx5_pkt_reformat *decap_pkt_reformat;
478 };
479
480 int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode,
481 struct netlink_ext_ack *extack);
482 int mlx5_devlink_eswitch_mode_get(struct devlink *devlink, u16 *mode);
483 int mlx5_devlink_eswitch_inline_mode_set(struct devlink *devlink, u8 mode,
484 struct netlink_ext_ack *extack);
485 int mlx5_devlink_eswitch_inline_mode_get(struct devlink *devlink, u8 *mode);
486 int mlx5_devlink_eswitch_encap_mode_set(struct devlink *devlink,
487 enum devlink_eswitch_encap_mode encap,
488 struct netlink_ext_ack *extack);
489 int mlx5_devlink_eswitch_encap_mode_get(struct devlink *devlink,
490 enum devlink_eswitch_encap_mode *encap);
491 int mlx5_devlink_port_function_hw_addr_get(struct devlink_port *port,
492 u8 *hw_addr, int *hw_addr_len,
493 struct netlink_ext_ack *extack);
494 int mlx5_devlink_port_function_hw_addr_set(struct devlink_port *port,
495 const u8 *hw_addr, int hw_addr_len,
496 struct netlink_ext_ack *extack);
497
498 void *mlx5_eswitch_get_uplink_priv(struct mlx5_eswitch *esw, u8 rep_type);
499
500 int mlx5_eswitch_add_vlan_action(struct mlx5_eswitch *esw,
501 struct mlx5_flow_attr *attr);
502 int mlx5_eswitch_del_vlan_action(struct mlx5_eswitch *esw,
503 struct mlx5_flow_attr *attr);
504 int __mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
505 u16 vport, u16 vlan, u8 qos, u8 set_flags);
506
mlx5_eswitch_vlan_actions_supported(struct mlx5_core_dev * dev,u8 vlan_depth)507 static inline bool mlx5_eswitch_vlan_actions_supported(struct mlx5_core_dev *dev,
508 u8 vlan_depth)
509 {
510 bool ret = MLX5_CAP_ESW_FLOWTABLE_FDB(dev, pop_vlan) &&
511 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, push_vlan);
512
513 if (vlan_depth == 1)
514 return ret;
515
516 return ret && MLX5_CAP_ESW_FLOWTABLE_FDB(dev, pop_vlan_2) &&
517 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, push_vlan_2);
518 }
519
520 bool mlx5_esw_multipath_prereq(struct mlx5_core_dev *dev0,
521 struct mlx5_core_dev *dev1);
522
523 const u32 *mlx5_esw_query_functions(struct mlx5_core_dev *dev);
524
525 #define MLX5_DEBUG_ESWITCH_MASK BIT(3)
526
527 #define esw_info(__dev, format, ...) \
528 dev_info((__dev)->device, "E-Switch: " format, ##__VA_ARGS__)
529
530 #define esw_warn(__dev, format, ...) \
531 dev_warn((__dev)->device, "E-Switch: " format, ##__VA_ARGS__)
532
533 #define esw_debug(dev, format, ...) \
534 mlx5_core_dbg_mask(dev, MLX5_DEBUG_ESWITCH_MASK, format, ##__VA_ARGS__)
535
mlx5_esw_allowed(const struct mlx5_eswitch * esw)536 static inline bool mlx5_esw_allowed(const struct mlx5_eswitch *esw)
537 {
538 return esw && MLX5_ESWITCH_MANAGER(esw->dev);
539 }
540
541 /* The returned number is valid only when the dev is eswitch manager. */
mlx5_eswitch_manager_vport(struct mlx5_core_dev * dev)542 static inline u16 mlx5_eswitch_manager_vport(struct mlx5_core_dev *dev)
543 {
544 return mlx5_core_is_ecpf_esw_manager(dev) ?
545 MLX5_VPORT_ECPF : MLX5_VPORT_PF;
546 }
547
548 static inline bool
mlx5_esw_is_manager_vport(const struct mlx5_eswitch * esw,u16 vport_num)549 mlx5_esw_is_manager_vport(const struct mlx5_eswitch *esw, u16 vport_num)
550 {
551 return esw->manager_vport == vport_num;
552 }
553
mlx5_eswitch_first_host_vport_num(struct mlx5_core_dev * dev)554 static inline u16 mlx5_eswitch_first_host_vport_num(struct mlx5_core_dev *dev)
555 {
556 return mlx5_core_is_ecpf_esw_manager(dev) ?
557 MLX5_VPORT_PF : MLX5_VPORT_FIRST_VF;
558 }
559
mlx5_eswitch_is_funcs_handler(const struct mlx5_core_dev * dev)560 static inline bool mlx5_eswitch_is_funcs_handler(const struct mlx5_core_dev *dev)
561 {
562 return mlx5_core_is_ecpf_esw_manager(dev);
563 }
564
565 static inline unsigned int
mlx5_esw_vport_to_devlink_port_index(const struct mlx5_core_dev * dev,u16 vport_num)566 mlx5_esw_vport_to_devlink_port_index(const struct mlx5_core_dev *dev,
567 u16 vport_num)
568 {
569 return (MLX5_CAP_GEN(dev, vhca_id) << 16) | vport_num;
570 }
571
572 static inline u16
mlx5_esw_devlink_port_index_to_vport_num(unsigned int dl_port_index)573 mlx5_esw_devlink_port_index_to_vport_num(unsigned int dl_port_index)
574 {
575 return dl_port_index & 0xffff;
576 }
577
578 /* TODO: This mlx5e_tc function shouldn't be called by eswitch */
579 void mlx5e_tc_clean_fdb_peer_flows(struct mlx5_eswitch *esw);
580
581 /* Each mark identifies eswitch vport type.
582 * MLX5_ESW_VPT_HOST_FN is used to identify both PF and VF ports using
583 * a single mark.
584 * MLX5_ESW_VPT_VF identifies a SRIOV VF vport.
585 * MLX5_ESW_VPT_SF identifies SF vport.
586 */
587 #define MLX5_ESW_VPT_HOST_FN XA_MARK_0
588 #define MLX5_ESW_VPT_VF XA_MARK_1
589 #define MLX5_ESW_VPT_SF XA_MARK_2
590
591 /* The vport iterator is valid only after vport are initialized in mlx5_eswitch_init.
592 * Borrowed the idea from xa_for_each_marked() but with support for desired last element.
593 */
594
595 #define mlx5_esw_for_each_vport(esw, index, vport) \
596 xa_for_each(&((esw)->vports), index, vport)
597
598 #define mlx5_esw_for_each_entry_marked(xa, index, entry, last, filter) \
599 for (index = 0, entry = xa_find(xa, &index, last, filter); \
600 entry; entry = xa_find_after(xa, &index, last, filter))
601
602 #define mlx5_esw_for_each_vport_marked(esw, index, vport, last, filter) \
603 mlx5_esw_for_each_entry_marked(&((esw)->vports), index, vport, last, filter)
604
605 #define mlx5_esw_for_each_vf_vport(esw, index, vport, last) \
606 mlx5_esw_for_each_vport_marked(esw, index, vport, last, MLX5_ESW_VPT_VF)
607
608 #define mlx5_esw_for_each_host_func_vport(esw, index, vport, last) \
609 mlx5_esw_for_each_vport_marked(esw, index, vport, last, MLX5_ESW_VPT_HOST_FN)
610
611 struct mlx5_eswitch *mlx5_devlink_eswitch_get(struct devlink *devlink);
612 struct mlx5_vport *__must_check
613 mlx5_eswitch_get_vport(struct mlx5_eswitch *esw, u16 vport_num);
614
615 bool mlx5_eswitch_is_vf_vport(struct mlx5_eswitch *esw, u16 vport_num);
616 bool mlx5_esw_is_sf_vport(struct mlx5_eswitch *esw, u16 vport_num);
617
618 int mlx5_esw_funcs_changed_handler(struct notifier_block *nb, unsigned long type, void *data);
619
620 int
621 mlx5_eswitch_enable_pf_vf_vports(struct mlx5_eswitch *esw,
622 enum mlx5_eswitch_vport_event enabled_events);
623 void mlx5_eswitch_disable_pf_vf_vports(struct mlx5_eswitch *esw);
624
625 int mlx5_esw_vport_enable(struct mlx5_eswitch *esw, u16 vport_num,
626 enum mlx5_eswitch_vport_event enabled_events);
627 void mlx5_esw_vport_disable(struct mlx5_eswitch *esw, u16 vport_num);
628
629 int
630 esw_vport_create_offloads_acl_tables(struct mlx5_eswitch *esw,
631 struct mlx5_vport *vport);
632 void
633 esw_vport_destroy_offloads_acl_tables(struct mlx5_eswitch *esw,
634 struct mlx5_vport *vport);
635
636 struct esw_vport_tbl_namespace {
637 int max_fte;
638 int max_num_groups;
639 u32 flags;
640 };
641
642 struct mlx5_vport_tbl_attr {
643 u32 chain;
644 u16 prio;
645 u16 vport;
646 const struct esw_vport_tbl_namespace *vport_ns;
647 };
648
649 struct mlx5_flow_table *
650 mlx5_esw_vporttbl_get(struct mlx5_eswitch *esw, struct mlx5_vport_tbl_attr *attr);
651 void
652 mlx5_esw_vporttbl_put(struct mlx5_eswitch *esw, struct mlx5_vport_tbl_attr *attr);
653
654 struct mlx5_flow_handle *
655 esw_add_restore_rule(struct mlx5_eswitch *esw, u32 tag);
656
657 int esw_offloads_load_rep(struct mlx5_eswitch *esw, u16 vport_num);
658 void esw_offloads_unload_rep(struct mlx5_eswitch *esw, u16 vport_num);
659
660 int mlx5_esw_offloads_rep_load(struct mlx5_eswitch *esw, u16 vport_num);
661 void mlx5_esw_offloads_rep_unload(struct mlx5_eswitch *esw, u16 vport_num);
662
663 int mlx5_eswitch_load_vport(struct mlx5_eswitch *esw, u16 vport_num,
664 enum mlx5_eswitch_vport_event enabled_events);
665 void mlx5_eswitch_unload_vport(struct mlx5_eswitch *esw, u16 vport_num);
666
667 int mlx5_eswitch_load_vf_vports(struct mlx5_eswitch *esw, u16 num_vfs,
668 enum mlx5_eswitch_vport_event enabled_events);
669 void mlx5_eswitch_unload_vf_vports(struct mlx5_eswitch *esw, u16 num_vfs);
670
671 int mlx5_esw_offloads_devlink_port_register(struct mlx5_eswitch *esw, u16 vport_num);
672 void mlx5_esw_offloads_devlink_port_unregister(struct mlx5_eswitch *esw, u16 vport_num);
673 struct devlink_port *mlx5_esw_offloads_devlink_port(struct mlx5_eswitch *esw, u16 vport_num);
674
675 int mlx5_esw_devlink_sf_port_register(struct mlx5_eswitch *esw, struct devlink_port *dl_port,
676 u16 vport_num, u32 controller, u32 sfnum);
677 void mlx5_esw_devlink_sf_port_unregister(struct mlx5_eswitch *esw, u16 vport_num);
678
679 int mlx5_esw_offloads_sf_vport_enable(struct mlx5_eswitch *esw, struct devlink_port *dl_port,
680 u16 vport_num, u32 controller, u32 sfnum);
681 void mlx5_esw_offloads_sf_vport_disable(struct mlx5_eswitch *esw, u16 vport_num);
682 int mlx5_esw_sf_max_hpf_functions(struct mlx5_core_dev *dev, u16 *max_sfs, u16 *sf_base_id);
683
684 int mlx5_esw_vport_vhca_id_set(struct mlx5_eswitch *esw, u16 vport_num);
685 void mlx5_esw_vport_vhca_id_clear(struct mlx5_eswitch *esw, u16 vport_num);
686 int mlx5_eswitch_vhca_id_to_vport(struct mlx5_eswitch *esw, u16 vhca_id, u16 *vport_num);
687
688 /**
689 * mlx5_esw_event_info - Indicates eswitch mode changed/changing.
690 *
691 * @new_mode: New mode of eswitch.
692 */
693 struct mlx5_esw_event_info {
694 u16 new_mode;
695 };
696
697 int mlx5_esw_event_notifier_register(struct mlx5_eswitch *esw, struct notifier_block *n);
698 void mlx5_esw_event_notifier_unregister(struct mlx5_eswitch *esw, struct notifier_block *n);
699
700 bool mlx5_esw_hold(struct mlx5_core_dev *dev);
701 void mlx5_esw_release(struct mlx5_core_dev *dev);
702 void mlx5_esw_get(struct mlx5_core_dev *dev);
703 void mlx5_esw_put(struct mlx5_core_dev *dev);
704 int mlx5_esw_try_lock(struct mlx5_eswitch *esw);
705 void mlx5_esw_unlock(struct mlx5_eswitch *esw);
706
707 void esw_vport_change_handle_locked(struct mlx5_vport *vport);
708
709 bool mlx5_esw_offloads_controller_valid(const struct mlx5_eswitch *esw, u32 controller);
710
711 int mlx5_eswitch_offloads_config_single_fdb(struct mlx5_eswitch *master_esw,
712 struct mlx5_eswitch *slave_esw);
713 void mlx5_eswitch_offloads_destroy_single_fdb(struct mlx5_eswitch *master_esw,
714 struct mlx5_eswitch *slave_esw);
715 int mlx5_eswitch_reload_reps(struct mlx5_eswitch *esw);
716
717 #else /* CONFIG_MLX5_ESWITCH */
718 /* eswitch API stubs */
mlx5_eswitch_init(struct mlx5_core_dev * dev)719 static inline int mlx5_eswitch_init(struct mlx5_core_dev *dev) { return 0; }
mlx5_eswitch_cleanup(struct mlx5_eswitch * esw)720 static inline void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw) {}
mlx5_eswitch_enable(struct mlx5_eswitch * esw,int num_vfs)721 static inline int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs) { return 0; }
mlx5_eswitch_disable(struct mlx5_eswitch * esw,bool clear_vf)722 static inline void mlx5_eswitch_disable(struct mlx5_eswitch *esw, bool clear_vf) {}
mlx5_eswitch_is_funcs_handler(struct mlx5_core_dev * dev)723 static inline bool mlx5_eswitch_is_funcs_handler(struct mlx5_core_dev *dev) { return false; }
724 static inline
mlx5_eswitch_set_vport_state(struct mlx5_eswitch * esw,u16 vport,int link_state)725 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw, u16 vport, int link_state) { return 0; }
mlx5_esw_query_functions(struct mlx5_core_dev * dev)726 static inline const u32 *mlx5_esw_query_functions(struct mlx5_core_dev *dev)
727 {
728 return ERR_PTR(-EOPNOTSUPP);
729 }
730
731 static inline struct mlx5_flow_handle *
esw_add_restore_rule(struct mlx5_eswitch * esw,u32 tag)732 esw_add_restore_rule(struct mlx5_eswitch *esw, u32 tag)
733 {
734 return ERR_PTR(-EOPNOTSUPP);
735 }
736
737 static inline unsigned int
mlx5_esw_vport_to_devlink_port_index(const struct mlx5_core_dev * dev,u16 vport_num)738 mlx5_esw_vport_to_devlink_port_index(const struct mlx5_core_dev *dev,
739 u16 vport_num)
740 {
741 return vport_num;
742 }
743
744 static inline int
mlx5_eswitch_offloads_config_single_fdb(struct mlx5_eswitch * master_esw,struct mlx5_eswitch * slave_esw)745 mlx5_eswitch_offloads_config_single_fdb(struct mlx5_eswitch *master_esw,
746 struct mlx5_eswitch *slave_esw)
747 {
748 return 0;
749 }
750
751 static inline void
mlx5_eswitch_offloads_destroy_single_fdb(struct mlx5_eswitch * master_esw,struct mlx5_eswitch * slave_esw)752 mlx5_eswitch_offloads_destroy_single_fdb(struct mlx5_eswitch *master_esw,
753 struct mlx5_eswitch *slave_esw) {}
754
755 static inline int
mlx5_eswitch_reload_reps(struct mlx5_eswitch * esw)756 mlx5_eswitch_reload_reps(struct mlx5_eswitch *esw)
757 {
758 return 0;
759 }
760 #endif /* CONFIG_MLX5_ESWITCH */
761
762 #endif /* __MLX5_ESWITCH_H__ */
763