1 /*
2  * arch/arm/mach-tegra/fuse.c
3  *
4  * Copyright (C) 2010 Google, Inc.
5  *
6  * Author:
7  *	Colin Cross <ccross@android.com>
8  *
9  * This software is licensed under the terms of the GNU General Public
10  * License version 2, as published by the Free Software Foundation, and
11  * may be copied, distributed, and modified under those terms.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  */
19 
20 #include <linux/kernel.h>
21 #include <linux/io.h>
22 
23 #include <mach/iomap.h>
24 
25 #include "fuse.h"
26 
27 #define FUSE_UID_LOW		0x108
28 #define FUSE_UID_HIGH		0x10c
29 #define FUSE_SKU_INFO		0x110
30 #define FUSE_SPARE_BIT		0x200
31 
fuse_readl(unsigned long offset)32 static inline u32 fuse_readl(unsigned long offset)
33 {
34 	return readl(IO_TO_VIRT(TEGRA_FUSE_BASE + offset));
35 }
36 
fuse_writel(u32 value,unsigned long offset)37 static inline void fuse_writel(u32 value, unsigned long offset)
38 {
39 	writel(value, IO_TO_VIRT(TEGRA_FUSE_BASE + offset));
40 }
41 
tegra_init_fuse(void)42 void tegra_init_fuse(void)
43 {
44 	u32 reg = readl(IO_TO_VIRT(TEGRA_CLK_RESET_BASE + 0x48));
45 	reg |= 1 << 28;
46 	writel(reg, IO_TO_VIRT(TEGRA_CLK_RESET_BASE + 0x48));
47 
48 	pr_info("Tegra SKU: %d CPU Process: %d Core Process: %d\n",
49 		tegra_sku_id(), tegra_cpu_process_id(),
50 		tegra_core_process_id());
51 }
52 
tegra_chip_uid(void)53 unsigned long long tegra_chip_uid(void)
54 {
55 	unsigned long long lo, hi;
56 
57 	lo = fuse_readl(FUSE_UID_LOW);
58 	hi = fuse_readl(FUSE_UID_HIGH);
59 	return (hi << 32ull) | lo;
60 }
61 
tegra_sku_id(void)62 int tegra_sku_id(void)
63 {
64 	int sku_id;
65 	u32 reg = fuse_readl(FUSE_SKU_INFO);
66 	sku_id = reg & 0xFF;
67 	return sku_id;
68 }
69 
tegra_cpu_process_id(void)70 int tegra_cpu_process_id(void)
71 {
72 	int cpu_process_id;
73 	u32 reg = fuse_readl(FUSE_SPARE_BIT);
74 	cpu_process_id = (reg >> 6) & 3;
75 	return cpu_process_id;
76 }
77 
tegra_core_process_id(void)78 int tegra_core_process_id(void)
79 {
80 	int core_process_id;
81 	u32 reg = fuse_readl(FUSE_SPARE_BIT);
82 	core_process_id = (reg >> 12) & 3;
83 	return core_process_id;
84 }
85