1 /*
2  * Copyright (C) 2010,2011 Google, Inc.
3  *
4  * Author:
5  *	Colin Cross <ccross@android.com>
6  *	Erik Gilling <ccross@android.com>
7  *
8  * This software is licensed under the terms of the GNU General Public
9  * License version 2, as published by the Free Software Foundation, and
10  * may be copied, distributed, and modified under those terms.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  */
18 
19 
20 #include <linux/resource.h>
21 #include <linux/platform_device.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/fsl_devices.h>
24 #include <linux/serial_8250.h>
25 #include <linux/i2c-tegra.h>
26 #include <asm/pmu.h>
27 #include <mach/irqs.h>
28 #include <mach/iomap.h>
29 #include <mach/dma.h>
30 #include <mach/usb_phy.h>
31 
32 #include "gpio-names.h"
33 #include "devices.h"
34 
35 static struct resource gpio_resource[] = {
36 	[0] = {
37 		.start	= TEGRA_GPIO_BASE,
38 		.end	= TEGRA_GPIO_BASE + TEGRA_GPIO_SIZE-1,
39 		.flags	= IORESOURCE_MEM,
40 	},
41 	[1] = {
42 		.start	= INT_GPIO1,
43 		.end	= INT_GPIO1,
44 		.flags	= IORESOURCE_IRQ,
45 	},
46 	[2] = {
47 		.start	= INT_GPIO2,
48 		.end	= INT_GPIO2,
49 		.flags	= IORESOURCE_IRQ,
50 	},
51 	[3] = {
52 		.start	= INT_GPIO3,
53 		.end	= INT_GPIO3,
54 		.flags	= IORESOURCE_IRQ,
55 	},
56 	[4] = {
57 		.start	= INT_GPIO4,
58 		.end	= INT_GPIO4,
59 		.flags	= IORESOURCE_IRQ,
60 	},
61 	[5] = {
62 		.start	= INT_GPIO5,
63 		.end	= INT_GPIO5,
64 		.flags	= IORESOURCE_IRQ,
65 	},
66 	[6] = {
67 		.start	= INT_GPIO6,
68 		.end	= INT_GPIO6,
69 		.flags	= IORESOURCE_IRQ,
70 	},
71 	[7] = {
72 		.start	= INT_GPIO7,
73 		.end	= INT_GPIO7,
74 		.flags	= IORESOURCE_IRQ,
75 	},
76 };
77 
78 struct platform_device tegra_gpio_device = {
79 	.name		= "tegra-gpio",
80 	.id		= -1,
81 	.resource	= gpio_resource,
82 	.num_resources	= ARRAY_SIZE(gpio_resource),
83 };
84 
85 static struct resource pinmux_resource[] = {
86 	[0] = {
87 		/* Tri-state registers */
88 		.start	= TEGRA_APB_MISC_BASE + 0x14,
89 		.end	= TEGRA_APB_MISC_BASE + 0x20 + 3,
90 		.flags	= IORESOURCE_MEM,
91 	},
92 	[1] = {
93 		/* Mux registers */
94 		.start	= TEGRA_APB_MISC_BASE + 0x80,
95 		.end	= TEGRA_APB_MISC_BASE + 0x9c + 3,
96 		.flags	= IORESOURCE_MEM,
97 	},
98 	[2] = {
99 		/* Pull-up/down registers */
100 		.start	= TEGRA_APB_MISC_BASE + 0xa0,
101 		.end	= TEGRA_APB_MISC_BASE + 0xb0 + 3,
102 		.flags	= IORESOURCE_MEM,
103 	},
104 	[3] = {
105 		/* Pad control registers */
106 		.start	= TEGRA_APB_MISC_BASE + 0x868,
107 		.end	= TEGRA_APB_MISC_BASE + 0x90c + 3,
108 		.flags	= IORESOURCE_MEM,
109 	},
110 };
111 
112 struct platform_device tegra_pinmux_device = {
113 	.name		= "tegra-pinmux",
114 	.id		= -1,
115 	.resource	= pinmux_resource,
116 	.num_resources	= ARRAY_SIZE(pinmux_resource),
117 };
118 
119 static struct resource i2c_resource1[] = {
120 	[0] = {
121 		.start	= INT_I2C,
122 		.end	= INT_I2C,
123 		.flags	= IORESOURCE_IRQ,
124 	},
125 	[1] = {
126 		.start	= TEGRA_I2C_BASE,
127 		.end	= TEGRA_I2C_BASE + TEGRA_I2C_SIZE-1,
128 		.flags	= IORESOURCE_MEM,
129 	},
130 };
131 
132 static struct resource i2c_resource2[] = {
133 	[0] = {
134 		.start	= INT_I2C2,
135 		.end	= INT_I2C2,
136 		.flags	= IORESOURCE_IRQ,
137 	},
138 	[1] = {
139 		.start	= TEGRA_I2C2_BASE,
140 		.end	= TEGRA_I2C2_BASE + TEGRA_I2C2_SIZE-1,
141 		.flags	= IORESOURCE_MEM,
142 	},
143 };
144 
145 static struct resource i2c_resource3[] = {
146 	[0] = {
147 		.start	= INT_I2C3,
148 		.end	= INT_I2C3,
149 		.flags	= IORESOURCE_IRQ,
150 	},
151 	[1] = {
152 		.start	= TEGRA_I2C3_BASE,
153 		.end	= TEGRA_I2C3_BASE + TEGRA_I2C3_SIZE-1,
154 		.flags	= IORESOURCE_MEM,
155 	},
156 };
157 
158 static struct resource i2c_resource4[] = {
159 	[0] = {
160 		.start	= INT_DVC,
161 		.end	= INT_DVC,
162 		.flags	= IORESOURCE_IRQ,
163 	},
164 	[1] = {
165 		.start	= TEGRA_DVC_BASE,
166 		.end	= TEGRA_DVC_BASE + TEGRA_DVC_SIZE-1,
167 		.flags	= IORESOURCE_MEM,
168 	},
169 };
170 
171 static struct tegra_i2c_platform_data tegra_i2c1_platform_data = {
172 	.bus_clk_rate   = 400000,
173 };
174 
175 static struct tegra_i2c_platform_data tegra_i2c2_platform_data = {
176 	.bus_clk_rate   = 400000,
177 };
178 
179 static struct tegra_i2c_platform_data tegra_i2c3_platform_data = {
180 	.bus_clk_rate   = 400000,
181 };
182 
183 static struct tegra_i2c_platform_data tegra_dvc_platform_data = {
184 	.bus_clk_rate   = 400000,
185 };
186 
187 struct platform_device tegra_i2c_device1 = {
188 	.name		= "tegra-i2c",
189 	.id		= 0,
190 	.resource	= i2c_resource1,
191 	.num_resources	= ARRAY_SIZE(i2c_resource1),
192 	.dev = {
193 		.platform_data = &tegra_i2c1_platform_data,
194 	},
195 };
196 
197 struct platform_device tegra_i2c_device2 = {
198 	.name		= "tegra-i2c",
199 	.id		= 1,
200 	.resource	= i2c_resource2,
201 	.num_resources	= ARRAY_SIZE(i2c_resource2),
202 	.dev = {
203 		.platform_data = &tegra_i2c2_platform_data,
204 	},
205 };
206 
207 struct platform_device tegra_i2c_device3 = {
208 	.name		= "tegra-i2c",
209 	.id		= 2,
210 	.resource	= i2c_resource3,
211 	.num_resources	= ARRAY_SIZE(i2c_resource3),
212 	.dev = {
213 		.platform_data = &tegra_i2c3_platform_data,
214 	},
215 };
216 
217 struct platform_device tegra_i2c_device4 = {
218 	.name		= "tegra-i2c",
219 	.id		= 3,
220 	.resource	= i2c_resource4,
221 	.num_resources	= ARRAY_SIZE(i2c_resource4),
222 	.dev = {
223 		.platform_data = &tegra_dvc_platform_data,
224 	},
225 };
226 
227 static struct resource spi_resource1[] = {
228 	[0] = {
229 		.start	= INT_S_LINK1,
230 		.end	= INT_S_LINK1,
231 		.flags	= IORESOURCE_IRQ,
232 	},
233 	[1] = {
234 		.start	= TEGRA_SPI1_BASE,
235 		.end	= TEGRA_SPI1_BASE + TEGRA_SPI1_SIZE-1,
236 		.flags	= IORESOURCE_MEM,
237 	},
238 };
239 
240 static struct resource spi_resource2[] = {
241 	[0] = {
242 		.start	= INT_SPI_2,
243 		.end	= INT_SPI_2,
244 		.flags	= IORESOURCE_IRQ,
245 	},
246 	[1] = {
247 		.start	= TEGRA_SPI2_BASE,
248 		.end	= TEGRA_SPI2_BASE + TEGRA_SPI2_SIZE-1,
249 		.flags	= IORESOURCE_MEM,
250 	},
251 };
252 
253 static struct resource spi_resource3[] = {
254 	[0] = {
255 		.start	= INT_SPI_3,
256 		.end	= INT_SPI_3,
257 		.flags	= IORESOURCE_IRQ,
258 	},
259 	[1] = {
260 		.start	= TEGRA_SPI3_BASE,
261 		.end	= TEGRA_SPI3_BASE + TEGRA_SPI3_SIZE-1,
262 		.flags	= IORESOURCE_MEM,
263 	},
264 };
265 
266 static struct resource spi_resource4[] = {
267 	[0] = {
268 		.start	= INT_SPI_4,
269 		.end	= INT_SPI_4,
270 		.flags	= IORESOURCE_IRQ,
271 	},
272 	[1] = {
273 		.start	= TEGRA_SPI4_BASE,
274 		.end	= TEGRA_SPI4_BASE + TEGRA_SPI4_SIZE-1,
275 		.flags	= IORESOURCE_MEM,
276 	},
277 };
278 
279 struct platform_device tegra_spi_device1 = {
280 	.name		= "spi_tegra",
281 	.id		= 0,
282 	.resource	= spi_resource1,
283 	.num_resources	= ARRAY_SIZE(spi_resource1),
284 	.dev		= {
285 		.coherent_dma_mask	= 0xffffffff,
286 	},
287 };
288 
289 struct platform_device tegra_spi_device2 = {
290 	.name		= "spi_tegra",
291 	.id		= 1,
292 	.resource	= spi_resource2,
293 	.num_resources	= ARRAY_SIZE(spi_resource2),
294 	.dev		= {
295 		.coherent_dma_mask	= 0xffffffff,
296 	},
297 };
298 
299 struct platform_device tegra_spi_device3 = {
300 	.name		= "spi_tegra",
301 	.id		= 2,
302 	.resource	= spi_resource3,
303 	.num_resources	= ARRAY_SIZE(spi_resource3),
304 	.dev		= {
305 		.coherent_dma_mask	= 0xffffffff,
306 	},
307 };
308 
309 struct platform_device tegra_spi_device4 = {
310 	.name		= "spi_tegra",
311 	.id		= 3,
312 	.resource	= spi_resource4,
313 	.num_resources	= ARRAY_SIZE(spi_resource4),
314 	.dev		= {
315 		.coherent_dma_mask	= 0xffffffff,
316 	},
317 };
318 
319 
320 static struct resource sdhci_resource1[] = {
321 	[0] = {
322 		.start	= INT_SDMMC1,
323 		.end	= INT_SDMMC1,
324 		.flags	= IORESOURCE_IRQ,
325 	},
326 	[1] = {
327 		.start	= TEGRA_SDMMC1_BASE,
328 		.end	= TEGRA_SDMMC1_BASE + TEGRA_SDMMC1_SIZE-1,
329 		.flags	= IORESOURCE_MEM,
330 	},
331 };
332 
333 static struct resource sdhci_resource2[] = {
334 	[0] = {
335 		.start	= INT_SDMMC2,
336 		.end	= INT_SDMMC2,
337 		.flags	= IORESOURCE_IRQ,
338 	},
339 	[1] = {
340 		.start	= TEGRA_SDMMC2_BASE,
341 		.end	= TEGRA_SDMMC2_BASE + TEGRA_SDMMC2_SIZE-1,
342 		.flags	= IORESOURCE_MEM,
343 	},
344 };
345 
346 static struct resource sdhci_resource3[] = {
347 	[0] = {
348 		.start	= INT_SDMMC3,
349 		.end	= INT_SDMMC3,
350 		.flags	= IORESOURCE_IRQ,
351 	},
352 	[1] = {
353 		.start	= TEGRA_SDMMC3_BASE,
354 		.end	= TEGRA_SDMMC3_BASE + TEGRA_SDMMC3_SIZE-1,
355 		.flags	= IORESOURCE_MEM,
356 	},
357 };
358 
359 static struct resource sdhci_resource4[] = {
360 	[0] = {
361 		.start	= INT_SDMMC4,
362 		.end	= INT_SDMMC4,
363 		.flags	= IORESOURCE_IRQ,
364 	},
365 	[1] = {
366 		.start	= TEGRA_SDMMC4_BASE,
367 		.end	= TEGRA_SDMMC4_BASE + TEGRA_SDMMC4_SIZE-1,
368 		.flags	= IORESOURCE_MEM,
369 	},
370 };
371 
372 /* board files should fill in platform_data register the devices themselvs.
373  * See board-harmony.c for an example
374  */
375 struct platform_device tegra_sdhci_device1 = {
376 	.name		= "sdhci-tegra",
377 	.id		= 0,
378 	.resource	= sdhci_resource1,
379 	.num_resources	= ARRAY_SIZE(sdhci_resource1),
380 };
381 
382 struct platform_device tegra_sdhci_device2 = {
383 	.name		= "sdhci-tegra",
384 	.id		= 1,
385 	.resource	= sdhci_resource2,
386 	.num_resources	= ARRAY_SIZE(sdhci_resource2),
387 };
388 
389 struct platform_device tegra_sdhci_device3 = {
390 	.name		= "sdhci-tegra",
391 	.id		= 2,
392 	.resource	= sdhci_resource3,
393 	.num_resources	= ARRAY_SIZE(sdhci_resource3),
394 };
395 
396 struct platform_device tegra_sdhci_device4 = {
397 	.name		= "sdhci-tegra",
398 	.id		= 3,
399 	.resource	= sdhci_resource4,
400 	.num_resources	= ARRAY_SIZE(sdhci_resource4),
401 };
402 
403 static struct resource tegra_usb1_resources[] = {
404 	[0] = {
405 		.start	= TEGRA_USB_BASE,
406 		.end	= TEGRA_USB_BASE + TEGRA_USB_SIZE - 1,
407 		.flags	= IORESOURCE_MEM,
408 	},
409 	[1] = {
410 		.start	= INT_USB,
411 		.end	= INT_USB,
412 		.flags	= IORESOURCE_IRQ,
413 	},
414 };
415 
416 static struct resource tegra_usb2_resources[] = {
417 	[0] = {
418 		.start	= TEGRA_USB2_BASE,
419 		.end	= TEGRA_USB2_BASE + TEGRA_USB2_SIZE - 1,
420 		.flags	= IORESOURCE_MEM,
421 	},
422 	[1] = {
423 		.start	= INT_USB2,
424 		.end	= INT_USB2,
425 		.flags	= IORESOURCE_IRQ,
426 	},
427 };
428 
429 static struct resource tegra_usb3_resources[] = {
430 	[0] = {
431 		.start	= TEGRA_USB3_BASE,
432 		.end	= TEGRA_USB3_BASE + TEGRA_USB3_SIZE - 1,
433 		.flags	= IORESOURCE_MEM,
434 	},
435 	[1] = {
436 		.start	= INT_USB3,
437 		.end	= INT_USB3,
438 		.flags	= IORESOURCE_IRQ,
439 	},
440 };
441 
442 static struct tegra_ulpi_config tegra_ehci2_ulpi_phy_config = {
443 	/* All existing boards use GPIO PV0 for phy reset */
444 	.reset_gpio = TEGRA_GPIO_PV0,
445 	.clk = "cdev2",
446 };
447 
448 struct tegra_ehci_platform_data tegra_ehci1_pdata = {
449 	.operating_mode = TEGRA_USB_OTG,
450 	.power_down_on_bus_suspend = 1,
451 };
452 
453 struct tegra_ehci_platform_data tegra_ehci2_pdata = {
454 	.phy_config = &tegra_ehci2_ulpi_phy_config,
455 	.operating_mode = TEGRA_USB_HOST,
456 	.power_down_on_bus_suspend = 1,
457 };
458 
459 struct tegra_ehci_platform_data tegra_ehci3_pdata = {
460 	.operating_mode = TEGRA_USB_HOST,
461 	.power_down_on_bus_suspend = 1,
462 };
463 
464 static u64 tegra_ehci_dmamask = DMA_BIT_MASK(32);
465 
466 struct platform_device tegra_ehci1_device = {
467 	.name	= "tegra-ehci",
468 	.id	= 0,
469 	.dev	= {
470 		.dma_mask	= &tegra_ehci_dmamask,
471 		.coherent_dma_mask = DMA_BIT_MASK(32),
472 		.platform_data = &tegra_ehci1_pdata,
473 	},
474 	.resource = tegra_usb1_resources,
475 	.num_resources = ARRAY_SIZE(tegra_usb1_resources),
476 };
477 
478 struct platform_device tegra_ehci2_device = {
479 	.name	= "tegra-ehci",
480 	.id	= 1,
481 	.dev	= {
482 		.dma_mask	= &tegra_ehci_dmamask,
483 		.coherent_dma_mask = DMA_BIT_MASK(32),
484 		.platform_data = &tegra_ehci2_pdata,
485 	},
486 	.resource = tegra_usb2_resources,
487 	.num_resources = ARRAY_SIZE(tegra_usb2_resources),
488 };
489 
490 struct platform_device tegra_ehci3_device = {
491 	.name	= "tegra-ehci",
492 	.id	= 2,
493 	.dev	= {
494 		.dma_mask	= &tegra_ehci_dmamask,
495 		.coherent_dma_mask = DMA_BIT_MASK(32),
496 		.platform_data = &tegra_ehci3_pdata,
497 	},
498 	.resource = tegra_usb3_resources,
499 	.num_resources = ARRAY_SIZE(tegra_usb3_resources),
500 };
501 
502 static struct resource tegra_pmu_resources[] = {
503 	[0] = {
504 		.start	= INT_CPU0_PMU_INTR,
505 		.end	= INT_CPU0_PMU_INTR,
506 		.flags	= IORESOURCE_IRQ,
507 	},
508 	[1] = {
509 		.start	= INT_CPU1_PMU_INTR,
510 		.end	= INT_CPU1_PMU_INTR,
511 		.flags	= IORESOURCE_IRQ,
512 	},
513 };
514 
515 struct platform_device tegra_pmu_device = {
516 	.name		= "arm-pmu",
517 	.id		= ARM_PMU_DEVICE_CPU,
518 	.num_resources	= ARRAY_SIZE(tegra_pmu_resources),
519 	.resource	= tegra_pmu_resources,
520 };
521 
522 static struct resource tegra_uarta_resources[] = {
523 	[0] = {
524 		.start	= TEGRA_UARTA_BASE,
525 		.end	= TEGRA_UARTA_BASE + TEGRA_UARTA_SIZE - 1,
526 		.flags	= IORESOURCE_MEM,
527 	},
528 	[1] = {
529 		.start	= INT_UARTA,
530 		.end	= INT_UARTA,
531 		.flags	= IORESOURCE_IRQ,
532 	},
533 };
534 
535 static struct resource tegra_uartb_resources[] = {
536 	[0] = {
537 		.start	= TEGRA_UARTB_BASE,
538 		.end	= TEGRA_UARTB_BASE + TEGRA_UARTB_SIZE - 1,
539 		.flags	= IORESOURCE_MEM,
540 	},
541 	[1] = {
542 		.start	= INT_UARTB,
543 		.end	= INT_UARTB,
544 		.flags	= IORESOURCE_IRQ,
545 	},
546 };
547 
548 static struct resource tegra_uartc_resources[] = {
549 	[0] = {
550 		.start	= TEGRA_UARTC_BASE,
551 		.end	= TEGRA_UARTC_BASE + TEGRA_UARTC_SIZE - 1,
552 		.flags	= IORESOURCE_MEM,
553 	},
554 	[1] = {
555 		.start	= INT_UARTC,
556 		.end	= INT_UARTC,
557 		.flags	= IORESOURCE_IRQ,
558 	},
559 };
560 
561 static struct resource tegra_uartd_resources[] = {
562 	[0] = {
563 		.start	= TEGRA_UARTD_BASE,
564 		.end	= TEGRA_UARTD_BASE + TEGRA_UARTD_SIZE - 1,
565 		.flags	= IORESOURCE_MEM,
566 	},
567 	[1] = {
568 		.start	= INT_UARTD,
569 		.end	= INT_UARTD,
570 		.flags	= IORESOURCE_IRQ,
571 	},
572 };
573 
574 static struct resource tegra_uarte_resources[] = {
575 	[0] = {
576 		.start	= TEGRA_UARTE_BASE,
577 		.end	= TEGRA_UARTE_BASE + TEGRA_UARTE_SIZE - 1,
578 		.flags	= IORESOURCE_MEM,
579 	},
580 	[1] = {
581 		.start	= INT_UARTE,
582 		.end	= INT_UARTE,
583 		.flags	= IORESOURCE_IRQ,
584 	},
585 };
586 
587 struct platform_device tegra_uarta_device = {
588 	.name	= "tegra_uart",
589 	.id	= 0,
590 	.num_resources	= ARRAY_SIZE(tegra_uarta_resources),
591 	.resource	= tegra_uarta_resources,
592 	.dev	= {
593 		.coherent_dma_mask	= DMA_BIT_MASK(32),
594 	},
595 };
596 
597 struct platform_device tegra_uartb_device = {
598 	.name	= "tegra_uart",
599 	.id	= 1,
600 	.num_resources	= ARRAY_SIZE(tegra_uartb_resources),
601 	.resource	= tegra_uartb_resources,
602 	.dev	= {
603 		.coherent_dma_mask	= DMA_BIT_MASK(32),
604 	},
605 };
606 
607 struct platform_device tegra_uartc_device = {
608 	.name	= "tegra_uart",
609 	.id	= 2,
610 	.num_resources	= ARRAY_SIZE(tegra_uartc_resources),
611 	.resource	= tegra_uartc_resources,
612 	.dev	= {
613 		.coherent_dma_mask	= DMA_BIT_MASK(32),
614 	},
615 };
616 
617 struct platform_device tegra_uartd_device = {
618 	.name	= "tegra_uart",
619 	.id	= 3,
620 	.num_resources	= ARRAY_SIZE(tegra_uartd_resources),
621 	.resource	= tegra_uartd_resources,
622 	.dev	= {
623 		.coherent_dma_mask	= DMA_BIT_MASK(32),
624 	},
625 };
626 
627 struct platform_device tegra_uarte_device = {
628 	.name	= "tegra_uart",
629 	.id	= 4,
630 	.num_resources	= ARRAY_SIZE(tegra_uarte_resources),
631 	.resource	= tegra_uarte_resources,
632 	.dev	= {
633 		.coherent_dma_mask	= DMA_BIT_MASK(32),
634 	},
635 };
636 
637 static struct resource i2s_resource1[] = {
638 	[0] = {
639 		.start	= INT_I2S1,
640 		.end	= INT_I2S1,
641 		.flags	= IORESOURCE_IRQ
642 	},
643 	[1] = {
644 		.start	= TEGRA_DMA_REQ_SEL_I2S_1,
645 		.end	= TEGRA_DMA_REQ_SEL_I2S_1,
646 		.flags	= IORESOURCE_DMA
647 	},
648 	[2] = {
649 		.start	= TEGRA_I2S1_BASE,
650 		.end	= TEGRA_I2S1_BASE + TEGRA_I2S1_SIZE - 1,
651 		.flags	= IORESOURCE_MEM
652 	}
653 };
654 
655 static struct resource i2s_resource2[] = {
656 	[0] = {
657 		.start	= INT_I2S2,
658 		.end	= INT_I2S2,
659 		.flags	= IORESOURCE_IRQ
660 	},
661 	[1] = {
662 		.start	= TEGRA_DMA_REQ_SEL_I2S2_1,
663 		.end	= TEGRA_DMA_REQ_SEL_I2S2_1,
664 		.flags	= IORESOURCE_DMA
665 	},
666 	[2] = {
667 		.start	= TEGRA_I2S2_BASE,
668 		.end	= TEGRA_I2S2_BASE + TEGRA_I2S2_SIZE - 1,
669 		.flags	= IORESOURCE_MEM
670 	}
671 };
672 
673 struct platform_device tegra_i2s_device1 = {
674 	.name		= "tegra-i2s",
675 	.id		= 0,
676 	.resource	= i2s_resource1,
677 	.num_resources	= ARRAY_SIZE(i2s_resource1),
678 };
679 
680 struct platform_device tegra_i2s_device2 = {
681 	.name		= "tegra-i2s",
682 	.id		= 1,
683 	.resource	= i2s_resource2,
684 	.num_resources	= ARRAY_SIZE(i2s_resource2),
685 };
686 
687 static struct resource tegra_das_resources[] = {
688 	[0] = {
689 		.start = TEGRA_APB_MISC_DAS_BASE,
690 		.end = TEGRA_APB_MISC_DAS_BASE + TEGRA_APB_MISC_DAS_SIZE - 1,
691 		.flags = IORESOURCE_MEM,
692 	},
693 };
694 
695 struct platform_device tegra_das_device = {
696 	.name		= "tegra-das",
697 	.id		= -1,
698 	.num_resources	= ARRAY_SIZE(tegra_das_resources),
699 	.resource	= tegra_das_resources,
700 };
701 
702 struct platform_device tegra_pcm_device = {
703 	.name = "tegra-pcm-audio",
704 	.id = -1,
705 };
706