1 /*
2 * arch/s390/kernel/time.c
3 * Time of day based timer functions.
4 *
5 * S390 version
6 * Copyright IBM Corp. 1999, 2008
7 * Author(s): Hartmut Penner (hp@de.ibm.com),
8 * Martin Schwidefsky (schwidefsky@de.ibm.com),
9 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
10 *
11 * Derived from "arch/i386/kernel/time.c"
12 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
13 */
14
15 #define KMSG_COMPONENT "time"
16 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
17
18 #include <linux/kernel_stat.h>
19 #include <linux/errno.h>
20 #include <linux/module.h>
21 #include <linux/sched.h>
22 #include <linux/kernel.h>
23 #include <linux/param.h>
24 #include <linux/string.h>
25 #include <linux/mm.h>
26 #include <linux/interrupt.h>
27 #include <linux/cpu.h>
28 #include <linux/stop_machine.h>
29 #include <linux/time.h>
30 #include <linux/device.h>
31 #include <linux/delay.h>
32 #include <linux/init.h>
33 #include <linux/smp.h>
34 #include <linux/types.h>
35 #include <linux/profile.h>
36 #include <linux/timex.h>
37 #include <linux/notifier.h>
38 #include <linux/clocksource.h>
39 #include <linux/clockchips.h>
40 #include <linux/gfp.h>
41 #include <linux/kprobes.h>
42 #include <asm/uaccess.h>
43 #include <asm/delay.h>
44 #include <asm/div64.h>
45 #include <asm/vdso.h>
46 #include <asm/irq.h>
47 #include <asm/irq_regs.h>
48 #include <asm/timer.h>
49 #include <asm/etr.h>
50 #include <asm/cio.h>
51 #include "entry.h"
52
53 /* change this if you have some constant time drift */
54 #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
55 #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
56
57 u64 sched_clock_base_cc = -1; /* Force to data section. */
58 EXPORT_SYMBOL_GPL(sched_clock_base_cc);
59
60 static DEFINE_PER_CPU(struct clock_event_device, comparators);
61
62 /*
63 * Scheduler clock - returns current time in nanosec units.
64 */
sched_clock(void)65 unsigned long long notrace __kprobes sched_clock(void)
66 {
67 return tod_to_ns(get_clock_monotonic());
68 }
69
70 /*
71 * Monotonic_clock - returns # of nanoseconds passed since time_init()
72 */
monotonic_clock(void)73 unsigned long long monotonic_clock(void)
74 {
75 return sched_clock();
76 }
77 EXPORT_SYMBOL(monotonic_clock);
78
tod_to_timeval(__u64 todval,struct timespec * xt)79 void tod_to_timeval(__u64 todval, struct timespec *xt)
80 {
81 unsigned long long sec;
82
83 sec = todval >> 12;
84 do_div(sec, 1000000);
85 xt->tv_sec = sec;
86 todval -= (sec * 1000000) << 12;
87 xt->tv_nsec = ((todval * 1000) >> 12);
88 }
89 EXPORT_SYMBOL(tod_to_timeval);
90
clock_comparator_work(void)91 void clock_comparator_work(void)
92 {
93 struct clock_event_device *cd;
94
95 S390_lowcore.clock_comparator = -1ULL;
96 set_clock_comparator(S390_lowcore.clock_comparator);
97 cd = &__get_cpu_var(comparators);
98 cd->event_handler(cd);
99 }
100
101 /*
102 * Fixup the clock comparator.
103 */
fixup_clock_comparator(unsigned long long delta)104 static void fixup_clock_comparator(unsigned long long delta)
105 {
106 /* If nobody is waiting there's nothing to fix. */
107 if (S390_lowcore.clock_comparator == -1ULL)
108 return;
109 S390_lowcore.clock_comparator += delta;
110 set_clock_comparator(S390_lowcore.clock_comparator);
111 }
112
s390_next_ktime(ktime_t expires,struct clock_event_device * evt)113 static int s390_next_ktime(ktime_t expires,
114 struct clock_event_device *evt)
115 {
116 struct timespec ts;
117 u64 nsecs;
118
119 ts.tv_sec = ts.tv_nsec = 0;
120 monotonic_to_bootbased(&ts);
121 nsecs = ktime_to_ns(ktime_add(timespec_to_ktime(ts), expires));
122 do_div(nsecs, 125);
123 S390_lowcore.clock_comparator = sched_clock_base_cc + (nsecs << 9);
124 /* Program the maximum value if we have an overflow (== year 2042) */
125 if (unlikely(S390_lowcore.clock_comparator < sched_clock_base_cc))
126 S390_lowcore.clock_comparator = -1ULL;
127 set_clock_comparator(S390_lowcore.clock_comparator);
128 return 0;
129 }
130
s390_set_mode(enum clock_event_mode mode,struct clock_event_device * evt)131 static void s390_set_mode(enum clock_event_mode mode,
132 struct clock_event_device *evt)
133 {
134 }
135
136 /*
137 * Set up lowcore and control register of the current cpu to
138 * enable TOD clock and clock comparator interrupts.
139 */
init_cpu_timer(void)140 void init_cpu_timer(void)
141 {
142 struct clock_event_device *cd;
143 int cpu;
144
145 S390_lowcore.clock_comparator = -1ULL;
146 set_clock_comparator(S390_lowcore.clock_comparator);
147
148 cpu = smp_processor_id();
149 cd = &per_cpu(comparators, cpu);
150 cd->name = "comparator";
151 cd->features = CLOCK_EVT_FEAT_ONESHOT |
152 CLOCK_EVT_FEAT_KTIME;
153 cd->mult = 16777;
154 cd->shift = 12;
155 cd->min_delta_ns = 1;
156 cd->max_delta_ns = LONG_MAX;
157 cd->rating = 400;
158 cd->cpumask = cpumask_of(cpu);
159 cd->set_next_ktime = s390_next_ktime;
160 cd->set_mode = s390_set_mode;
161
162 clockevents_register_device(cd);
163
164 /* Enable clock comparator timer interrupt. */
165 __ctl_set_bit(0,11);
166
167 /* Always allow the timing alert external interrupt. */
168 __ctl_set_bit(0, 4);
169 }
170
clock_comparator_interrupt(struct ext_code ext_code,unsigned int param32,unsigned long param64)171 static void clock_comparator_interrupt(struct ext_code ext_code,
172 unsigned int param32,
173 unsigned long param64)
174 {
175 kstat_cpu(smp_processor_id()).irqs[EXTINT_CLK]++;
176 if (S390_lowcore.clock_comparator == -1ULL)
177 set_clock_comparator(S390_lowcore.clock_comparator);
178 }
179
180 static void etr_timing_alert(struct etr_irq_parm *);
181 static void stp_timing_alert(struct stp_irq_parm *);
182
timing_alert_interrupt(struct ext_code ext_code,unsigned int param32,unsigned long param64)183 static void timing_alert_interrupt(struct ext_code ext_code,
184 unsigned int param32, unsigned long param64)
185 {
186 kstat_cpu(smp_processor_id()).irqs[EXTINT_TLA]++;
187 if (param32 & 0x00c40000)
188 etr_timing_alert((struct etr_irq_parm *) ¶m32);
189 if (param32 & 0x00038000)
190 stp_timing_alert((struct stp_irq_parm *) ¶m32);
191 }
192
193 static void etr_reset(void);
194 static void stp_reset(void);
195
read_persistent_clock(struct timespec * ts)196 void read_persistent_clock(struct timespec *ts)
197 {
198 tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, ts);
199 }
200
read_boot_clock(struct timespec * ts)201 void read_boot_clock(struct timespec *ts)
202 {
203 tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts);
204 }
205
read_tod_clock(struct clocksource * cs)206 static cycle_t read_tod_clock(struct clocksource *cs)
207 {
208 return get_clock();
209 }
210
211 static struct clocksource clocksource_tod = {
212 .name = "tod",
213 .rating = 400,
214 .read = read_tod_clock,
215 .mask = -1ULL,
216 .mult = 1000,
217 .shift = 12,
218 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
219 };
220
clocksource_default_clock(void)221 struct clocksource * __init clocksource_default_clock(void)
222 {
223 return &clocksource_tod;
224 }
225
update_vsyscall(struct timespec * wall_time,struct timespec * wtm,struct clocksource * clock,u32 mult)226 void update_vsyscall(struct timespec *wall_time, struct timespec *wtm,
227 struct clocksource *clock, u32 mult)
228 {
229 if (clock != &clocksource_tod)
230 return;
231
232 /* Make userspace gettimeofday spin until we're done. */
233 ++vdso_data->tb_update_count;
234 smp_wmb();
235 vdso_data->xtime_tod_stamp = clock->cycle_last;
236 vdso_data->xtime_clock_sec = wall_time->tv_sec;
237 vdso_data->xtime_clock_nsec = wall_time->tv_nsec;
238 vdso_data->wtom_clock_sec = wtm->tv_sec;
239 vdso_data->wtom_clock_nsec = wtm->tv_nsec;
240 vdso_data->ntp_mult = mult;
241 smp_wmb();
242 ++vdso_data->tb_update_count;
243 }
244
245 extern struct timezone sys_tz;
246
update_vsyscall_tz(void)247 void update_vsyscall_tz(void)
248 {
249 /* Make userspace gettimeofday spin until we're done. */
250 ++vdso_data->tb_update_count;
251 smp_wmb();
252 vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
253 vdso_data->tz_dsttime = sys_tz.tz_dsttime;
254 smp_wmb();
255 ++vdso_data->tb_update_count;
256 }
257
258 /*
259 * Initialize the TOD clock and the CPU timer of
260 * the boot cpu.
261 */
time_init(void)262 void __init time_init(void)
263 {
264 /* Reset time synchronization interfaces. */
265 etr_reset();
266 stp_reset();
267
268 /* request the clock comparator external interrupt */
269 if (register_external_interrupt(0x1004, clock_comparator_interrupt))
270 panic("Couldn't request external interrupt 0x1004");
271
272 /* request the timing alert external interrupt */
273 if (register_external_interrupt(0x1406, timing_alert_interrupt))
274 panic("Couldn't request external interrupt 0x1406");
275
276 if (clocksource_register(&clocksource_tod) != 0)
277 panic("Could not register TOD clock source");
278
279 /* Enable TOD clock interrupts on the boot cpu. */
280 init_cpu_timer();
281
282 /* Enable cpu timer interrupts on the boot cpu. */
283 vtime_init();
284 }
285
286 /*
287 * The time is "clock". old is what we think the time is.
288 * Adjust the value by a multiple of jiffies and add the delta to ntp.
289 * "delay" is an approximation how long the synchronization took. If
290 * the time correction is positive, then "delay" is subtracted from
291 * the time difference and only the remaining part is passed to ntp.
292 */
adjust_time(unsigned long long old,unsigned long long clock,unsigned long long delay)293 static unsigned long long adjust_time(unsigned long long old,
294 unsigned long long clock,
295 unsigned long long delay)
296 {
297 unsigned long long delta, ticks;
298 struct timex adjust;
299
300 if (clock > old) {
301 /* It is later than we thought. */
302 delta = ticks = clock - old;
303 delta = ticks = (delta < delay) ? 0 : delta - delay;
304 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
305 adjust.offset = ticks * (1000000 / HZ);
306 } else {
307 /* It is earlier than we thought. */
308 delta = ticks = old - clock;
309 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
310 delta = -delta;
311 adjust.offset = -ticks * (1000000 / HZ);
312 }
313 sched_clock_base_cc += delta;
314 if (adjust.offset != 0) {
315 pr_notice("The ETR interface has adjusted the clock "
316 "by %li microseconds\n", adjust.offset);
317 adjust.modes = ADJ_OFFSET_SINGLESHOT;
318 do_adjtimex(&adjust);
319 }
320 return delta;
321 }
322
323 static DEFINE_PER_CPU(atomic_t, clock_sync_word);
324 static DEFINE_MUTEX(clock_sync_mutex);
325 static unsigned long clock_sync_flags;
326
327 #define CLOCK_SYNC_HAS_ETR 0
328 #define CLOCK_SYNC_HAS_STP 1
329 #define CLOCK_SYNC_ETR 2
330 #define CLOCK_SYNC_STP 3
331
332 /*
333 * The synchronous get_clock function. It will write the current clock
334 * value to the clock pointer and return 0 if the clock is in sync with
335 * the external time source. If the clock mode is local it will return
336 * -ENOSYS and -EAGAIN if the clock is not in sync with the external
337 * reference.
338 */
get_sync_clock(unsigned long long * clock)339 int get_sync_clock(unsigned long long *clock)
340 {
341 atomic_t *sw_ptr;
342 unsigned int sw0, sw1;
343
344 sw_ptr = &get_cpu_var(clock_sync_word);
345 sw0 = atomic_read(sw_ptr);
346 *clock = get_clock();
347 sw1 = atomic_read(sw_ptr);
348 put_cpu_var(clock_sync_word);
349 if (sw0 == sw1 && (sw0 & 0x80000000U))
350 /* Success: time is in sync. */
351 return 0;
352 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
353 !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
354 return -ENOSYS;
355 if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
356 !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
357 return -EACCES;
358 return -EAGAIN;
359 }
360 EXPORT_SYMBOL(get_sync_clock);
361
362 /*
363 * Make get_sync_clock return -EAGAIN.
364 */
disable_sync_clock(void * dummy)365 static void disable_sync_clock(void *dummy)
366 {
367 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
368 /*
369 * Clear the in-sync bit 2^31. All get_sync_clock calls will
370 * fail until the sync bit is turned back on. In addition
371 * increase the "sequence" counter to avoid the race of an
372 * etr event and the complete recovery against get_sync_clock.
373 */
374 atomic_clear_mask(0x80000000, sw_ptr);
375 atomic_inc(sw_ptr);
376 }
377
378 /*
379 * Make get_sync_clock return 0 again.
380 * Needs to be called from a context disabled for preemption.
381 */
enable_sync_clock(void)382 static void enable_sync_clock(void)
383 {
384 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
385 atomic_set_mask(0x80000000, sw_ptr);
386 }
387
388 /*
389 * Function to check if the clock is in sync.
390 */
check_sync_clock(void)391 static inline int check_sync_clock(void)
392 {
393 atomic_t *sw_ptr;
394 int rc;
395
396 sw_ptr = &get_cpu_var(clock_sync_word);
397 rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
398 put_cpu_var(clock_sync_word);
399 return rc;
400 }
401
402 /* Single threaded workqueue used for etr and stp sync events */
403 static struct workqueue_struct *time_sync_wq;
404
time_init_wq(void)405 static void __init time_init_wq(void)
406 {
407 if (time_sync_wq)
408 return;
409 time_sync_wq = create_singlethread_workqueue("timesync");
410 }
411
412 /*
413 * External Time Reference (ETR) code.
414 */
415 static int etr_port0_online;
416 static int etr_port1_online;
417 static int etr_steai_available;
418
early_parse_etr(char * p)419 static int __init early_parse_etr(char *p)
420 {
421 if (strncmp(p, "off", 3) == 0)
422 etr_port0_online = etr_port1_online = 0;
423 else if (strncmp(p, "port0", 5) == 0)
424 etr_port0_online = 1;
425 else if (strncmp(p, "port1", 5) == 0)
426 etr_port1_online = 1;
427 else if (strncmp(p, "on", 2) == 0)
428 etr_port0_online = etr_port1_online = 1;
429 return 0;
430 }
431 early_param("etr", early_parse_etr);
432
433 enum etr_event {
434 ETR_EVENT_PORT0_CHANGE,
435 ETR_EVENT_PORT1_CHANGE,
436 ETR_EVENT_PORT_ALERT,
437 ETR_EVENT_SYNC_CHECK,
438 ETR_EVENT_SWITCH_LOCAL,
439 ETR_EVENT_UPDATE,
440 };
441
442 /*
443 * Valid bit combinations of the eacr register are (x = don't care):
444 * e0 e1 dp p0 p1 ea es sl
445 * 0 0 x 0 0 0 0 0 initial, disabled state
446 * 0 0 x 0 1 1 0 0 port 1 online
447 * 0 0 x 1 0 1 0 0 port 0 online
448 * 0 0 x 1 1 1 0 0 both ports online
449 * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
450 * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
451 * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
452 * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
453 * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
454 * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
455 * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
456 * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
457 * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
458 * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
459 * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
460 * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
461 * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
462 * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
463 * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
464 * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
465 */
466 static struct etr_eacr etr_eacr;
467 static u64 etr_tolec; /* time of last eacr update */
468 static struct etr_aib etr_port0;
469 static int etr_port0_uptodate;
470 static struct etr_aib etr_port1;
471 static int etr_port1_uptodate;
472 static unsigned long etr_events;
473 static struct timer_list etr_timer;
474
475 static void etr_timeout(unsigned long dummy);
476 static void etr_work_fn(struct work_struct *work);
477 static DEFINE_MUTEX(etr_work_mutex);
478 static DECLARE_WORK(etr_work, etr_work_fn);
479
480 /*
481 * Reset ETR attachment.
482 */
etr_reset(void)483 static void etr_reset(void)
484 {
485 etr_eacr = (struct etr_eacr) {
486 .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
487 .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
488 .es = 0, .sl = 0 };
489 if (etr_setr(&etr_eacr) == 0) {
490 etr_tolec = get_clock();
491 set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
492 if (etr_port0_online && etr_port1_online)
493 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
494 } else if (etr_port0_online || etr_port1_online) {
495 pr_warning("The real or virtual hardware system does "
496 "not provide an ETR interface\n");
497 etr_port0_online = etr_port1_online = 0;
498 }
499 }
500
etr_init(void)501 static int __init etr_init(void)
502 {
503 struct etr_aib aib;
504
505 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
506 return 0;
507 time_init_wq();
508 /* Check if this machine has the steai instruction. */
509 if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
510 etr_steai_available = 1;
511 setup_timer(&etr_timer, etr_timeout, 0UL);
512 if (etr_port0_online) {
513 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
514 queue_work(time_sync_wq, &etr_work);
515 }
516 if (etr_port1_online) {
517 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
518 queue_work(time_sync_wq, &etr_work);
519 }
520 return 0;
521 }
522
523 arch_initcall(etr_init);
524
525 /*
526 * Two sorts of ETR machine checks. The architecture reads:
527 * "When a machine-check niterruption occurs and if a switch-to-local or
528 * ETR-sync-check interrupt request is pending but disabled, this pending
529 * disabled interruption request is indicated and is cleared".
530 * Which means that we can get etr_switch_to_local events from the machine
531 * check handler although the interruption condition is disabled. Lovely..
532 */
533
534 /*
535 * Switch to local machine check. This is called when the last usable
536 * ETR port goes inactive. After switch to local the clock is not in sync.
537 */
etr_switch_to_local(void)538 void etr_switch_to_local(void)
539 {
540 if (!etr_eacr.sl)
541 return;
542 disable_sync_clock(NULL);
543 if (!test_and_set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) {
544 etr_eacr.es = etr_eacr.sl = 0;
545 etr_setr(&etr_eacr);
546 queue_work(time_sync_wq, &etr_work);
547 }
548 }
549
550 /*
551 * ETR sync check machine check. This is called when the ETR OTE and the
552 * local clock OTE are farther apart than the ETR sync check tolerance.
553 * After a ETR sync check the clock is not in sync. The machine check
554 * is broadcasted to all cpus at the same time.
555 */
etr_sync_check(void)556 void etr_sync_check(void)
557 {
558 if (!etr_eacr.es)
559 return;
560 disable_sync_clock(NULL);
561 if (!test_and_set_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) {
562 etr_eacr.es = 0;
563 etr_setr(&etr_eacr);
564 queue_work(time_sync_wq, &etr_work);
565 }
566 }
567
568 /*
569 * ETR timing alert. There are two causes:
570 * 1) port state change, check the usability of the port
571 * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
572 * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
573 * or ETR-data word 4 (edf4) has changed.
574 */
etr_timing_alert(struct etr_irq_parm * intparm)575 static void etr_timing_alert(struct etr_irq_parm *intparm)
576 {
577 if (intparm->pc0)
578 /* ETR port 0 state change. */
579 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
580 if (intparm->pc1)
581 /* ETR port 1 state change. */
582 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
583 if (intparm->eai)
584 /*
585 * ETR port alert on either port 0, 1 or both.
586 * Both ports are not up-to-date now.
587 */
588 set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
589 queue_work(time_sync_wq, &etr_work);
590 }
591
etr_timeout(unsigned long dummy)592 static void etr_timeout(unsigned long dummy)
593 {
594 set_bit(ETR_EVENT_UPDATE, &etr_events);
595 queue_work(time_sync_wq, &etr_work);
596 }
597
598 /*
599 * Check if the etr mode is pss.
600 */
etr_mode_is_pps(struct etr_eacr eacr)601 static inline int etr_mode_is_pps(struct etr_eacr eacr)
602 {
603 return eacr.es && !eacr.sl;
604 }
605
606 /*
607 * Check if the etr mode is etr.
608 */
etr_mode_is_etr(struct etr_eacr eacr)609 static inline int etr_mode_is_etr(struct etr_eacr eacr)
610 {
611 return eacr.es && eacr.sl;
612 }
613
614 /*
615 * Check if the port can be used for TOD synchronization.
616 * For PPS mode the port has to receive OTEs. For ETR mode
617 * the port has to receive OTEs, the ETR stepping bit has to
618 * be zero and the validity bits for data frame 1, 2, and 3
619 * have to be 1.
620 */
etr_port_valid(struct etr_aib * aib,int port)621 static int etr_port_valid(struct etr_aib *aib, int port)
622 {
623 unsigned int psc;
624
625 /* Check that this port is receiving OTEs. */
626 if (aib->tsp == 0)
627 return 0;
628
629 psc = port ? aib->esw.psc1 : aib->esw.psc0;
630 if (psc == etr_lpsc_pps_mode)
631 return 1;
632 if (psc == etr_lpsc_operational_step)
633 return !aib->esw.y && aib->slsw.v1 &&
634 aib->slsw.v2 && aib->slsw.v3;
635 return 0;
636 }
637
638 /*
639 * Check if two ports are on the same network.
640 */
etr_compare_network(struct etr_aib * aib1,struct etr_aib * aib2)641 static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
642 {
643 // FIXME: any other fields we have to compare?
644 return aib1->edf1.net_id == aib2->edf1.net_id;
645 }
646
647 /*
648 * Wrapper for etr_stei that converts physical port states
649 * to logical port states to be consistent with the output
650 * of stetr (see etr_psc vs. etr_lpsc).
651 */
etr_steai_cv(struct etr_aib * aib,unsigned int func)652 static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
653 {
654 BUG_ON(etr_steai(aib, func) != 0);
655 /* Convert port state to logical port state. */
656 if (aib->esw.psc0 == 1)
657 aib->esw.psc0 = 2;
658 else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
659 aib->esw.psc0 = 1;
660 if (aib->esw.psc1 == 1)
661 aib->esw.psc1 = 2;
662 else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
663 aib->esw.psc1 = 1;
664 }
665
666 /*
667 * Check if the aib a2 is still connected to the same attachment as
668 * aib a1, the etv values differ by one and a2 is valid.
669 */
etr_aib_follows(struct etr_aib * a1,struct etr_aib * a2,int p)670 static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
671 {
672 int state_a1, state_a2;
673
674 /* Paranoia check: e0/e1 should better be the same. */
675 if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
676 a1->esw.eacr.e1 != a2->esw.eacr.e1)
677 return 0;
678
679 /* Still connected to the same etr ? */
680 state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
681 state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
682 if (state_a1 == etr_lpsc_operational_step) {
683 if (state_a2 != etr_lpsc_operational_step ||
684 a1->edf1.net_id != a2->edf1.net_id ||
685 a1->edf1.etr_id != a2->edf1.etr_id ||
686 a1->edf1.etr_pn != a2->edf1.etr_pn)
687 return 0;
688 } else if (state_a2 != etr_lpsc_pps_mode)
689 return 0;
690
691 /* The ETV value of a2 needs to be ETV of a1 + 1. */
692 if (a1->edf2.etv + 1 != a2->edf2.etv)
693 return 0;
694
695 if (!etr_port_valid(a2, p))
696 return 0;
697
698 return 1;
699 }
700
701 struct clock_sync_data {
702 atomic_t cpus;
703 int in_sync;
704 unsigned long long fixup_cc;
705 int etr_port;
706 struct etr_aib *etr_aib;
707 };
708
clock_sync_cpu(struct clock_sync_data * sync)709 static void clock_sync_cpu(struct clock_sync_data *sync)
710 {
711 atomic_dec(&sync->cpus);
712 enable_sync_clock();
713 /*
714 * This looks like a busy wait loop but it isn't. etr_sync_cpus
715 * is called on all other cpus while the TOD clocks is stopped.
716 * __udelay will stop the cpu on an enabled wait psw until the
717 * TOD is running again.
718 */
719 while (sync->in_sync == 0) {
720 __udelay(1);
721 /*
722 * A different cpu changes *in_sync. Therefore use
723 * barrier() to force memory access.
724 */
725 barrier();
726 }
727 if (sync->in_sync != 1)
728 /* Didn't work. Clear per-cpu in sync bit again. */
729 disable_sync_clock(NULL);
730 /*
731 * This round of TOD syncing is done. Set the clock comparator
732 * to the next tick and let the processor continue.
733 */
734 fixup_clock_comparator(sync->fixup_cc);
735 }
736
737 /*
738 * Sync the TOD clock using the port referred to by aibp. This port
739 * has to be enabled and the other port has to be disabled. The
740 * last eacr update has to be more than 1.6 seconds in the past.
741 */
etr_sync_clock(void * data)742 static int etr_sync_clock(void *data)
743 {
744 static int first;
745 unsigned long long clock, old_clock, delay, delta;
746 struct clock_sync_data *etr_sync;
747 struct etr_aib *sync_port, *aib;
748 int port;
749 int rc;
750
751 etr_sync = data;
752
753 if (xchg(&first, 1) == 1) {
754 /* Slave */
755 clock_sync_cpu(etr_sync);
756 return 0;
757 }
758
759 /* Wait until all other cpus entered the sync function. */
760 while (atomic_read(&etr_sync->cpus) != 0)
761 cpu_relax();
762
763 port = etr_sync->etr_port;
764 aib = etr_sync->etr_aib;
765 sync_port = (port == 0) ? &etr_port0 : &etr_port1;
766 enable_sync_clock();
767
768 /* Set clock to next OTE. */
769 __ctl_set_bit(14, 21);
770 __ctl_set_bit(0, 29);
771 clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
772 old_clock = get_clock();
773 if (set_clock(clock) == 0) {
774 __udelay(1); /* Wait for the clock to start. */
775 __ctl_clear_bit(0, 29);
776 __ctl_clear_bit(14, 21);
777 etr_stetr(aib);
778 /* Adjust Linux timing variables. */
779 delay = (unsigned long long)
780 (aib->edf2.etv - sync_port->edf2.etv) << 32;
781 delta = adjust_time(old_clock, clock, delay);
782 etr_sync->fixup_cc = delta;
783 fixup_clock_comparator(delta);
784 /* Verify that the clock is properly set. */
785 if (!etr_aib_follows(sync_port, aib, port)) {
786 /* Didn't work. */
787 disable_sync_clock(NULL);
788 etr_sync->in_sync = -EAGAIN;
789 rc = -EAGAIN;
790 } else {
791 etr_sync->in_sync = 1;
792 rc = 0;
793 }
794 } else {
795 /* Could not set the clock ?!? */
796 __ctl_clear_bit(0, 29);
797 __ctl_clear_bit(14, 21);
798 disable_sync_clock(NULL);
799 etr_sync->in_sync = -EAGAIN;
800 rc = -EAGAIN;
801 }
802 xchg(&first, 0);
803 return rc;
804 }
805
etr_sync_clock_stop(struct etr_aib * aib,int port)806 static int etr_sync_clock_stop(struct etr_aib *aib, int port)
807 {
808 struct clock_sync_data etr_sync;
809 struct etr_aib *sync_port;
810 int follows;
811 int rc;
812
813 /* Check if the current aib is adjacent to the sync port aib. */
814 sync_port = (port == 0) ? &etr_port0 : &etr_port1;
815 follows = etr_aib_follows(sync_port, aib, port);
816 memcpy(sync_port, aib, sizeof(*aib));
817 if (!follows)
818 return -EAGAIN;
819 memset(&etr_sync, 0, sizeof(etr_sync));
820 etr_sync.etr_aib = aib;
821 etr_sync.etr_port = port;
822 get_online_cpus();
823 atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
824 rc = stop_machine(etr_sync_clock, &etr_sync, cpu_online_mask);
825 put_online_cpus();
826 return rc;
827 }
828
829 /*
830 * Handle the immediate effects of the different events.
831 * The port change event is used for online/offline changes.
832 */
etr_handle_events(struct etr_eacr eacr)833 static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
834 {
835 if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
836 eacr.es = 0;
837 if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
838 eacr.es = eacr.sl = 0;
839 if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
840 etr_port0_uptodate = etr_port1_uptodate = 0;
841
842 if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
843 if (eacr.e0)
844 /*
845 * Port change of an enabled port. We have to
846 * assume that this can have caused an stepping
847 * port switch.
848 */
849 etr_tolec = get_clock();
850 eacr.p0 = etr_port0_online;
851 if (!eacr.p0)
852 eacr.e0 = 0;
853 etr_port0_uptodate = 0;
854 }
855 if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
856 if (eacr.e1)
857 /*
858 * Port change of an enabled port. We have to
859 * assume that this can have caused an stepping
860 * port switch.
861 */
862 etr_tolec = get_clock();
863 eacr.p1 = etr_port1_online;
864 if (!eacr.p1)
865 eacr.e1 = 0;
866 etr_port1_uptodate = 0;
867 }
868 clear_bit(ETR_EVENT_UPDATE, &etr_events);
869 return eacr;
870 }
871
872 /*
873 * Set up a timer that expires after the etr_tolec + 1.6 seconds if
874 * one of the ports needs an update.
875 */
etr_set_tolec_timeout(unsigned long long now)876 static void etr_set_tolec_timeout(unsigned long long now)
877 {
878 unsigned long micros;
879
880 if ((!etr_eacr.p0 || etr_port0_uptodate) &&
881 (!etr_eacr.p1 || etr_port1_uptodate))
882 return;
883 micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
884 micros = (micros > 1600000) ? 0 : 1600000 - micros;
885 mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
886 }
887
888 /*
889 * Set up a time that expires after 1/2 second.
890 */
etr_set_sync_timeout(void)891 static void etr_set_sync_timeout(void)
892 {
893 mod_timer(&etr_timer, jiffies + HZ/2);
894 }
895
896 /*
897 * Update the aib information for one or both ports.
898 */
etr_handle_update(struct etr_aib * aib,struct etr_eacr eacr)899 static struct etr_eacr etr_handle_update(struct etr_aib *aib,
900 struct etr_eacr eacr)
901 {
902 /* With both ports disabled the aib information is useless. */
903 if (!eacr.e0 && !eacr.e1)
904 return eacr;
905
906 /* Update port0 or port1 with aib stored in etr_work_fn. */
907 if (aib->esw.q == 0) {
908 /* Information for port 0 stored. */
909 if (eacr.p0 && !etr_port0_uptodate) {
910 etr_port0 = *aib;
911 if (etr_port0_online)
912 etr_port0_uptodate = 1;
913 }
914 } else {
915 /* Information for port 1 stored. */
916 if (eacr.p1 && !etr_port1_uptodate) {
917 etr_port1 = *aib;
918 if (etr_port0_online)
919 etr_port1_uptodate = 1;
920 }
921 }
922
923 /*
924 * Do not try to get the alternate port aib if the clock
925 * is not in sync yet.
926 */
927 if (!eacr.es || !check_sync_clock())
928 return eacr;
929
930 /*
931 * If steai is available we can get the information about
932 * the other port immediately. If only stetr is available the
933 * data-port bit toggle has to be used.
934 */
935 if (etr_steai_available) {
936 if (eacr.p0 && !etr_port0_uptodate) {
937 etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
938 etr_port0_uptodate = 1;
939 }
940 if (eacr.p1 && !etr_port1_uptodate) {
941 etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
942 etr_port1_uptodate = 1;
943 }
944 } else {
945 /*
946 * One port was updated above, if the other
947 * port is not uptodate toggle dp bit.
948 */
949 if ((eacr.p0 && !etr_port0_uptodate) ||
950 (eacr.p1 && !etr_port1_uptodate))
951 eacr.dp ^= 1;
952 else
953 eacr.dp = 0;
954 }
955 return eacr;
956 }
957
958 /*
959 * Write new etr control register if it differs from the current one.
960 * Return 1 if etr_tolec has been updated as well.
961 */
etr_update_eacr(struct etr_eacr eacr)962 static void etr_update_eacr(struct etr_eacr eacr)
963 {
964 int dp_changed;
965
966 if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
967 /* No change, return. */
968 return;
969 /*
970 * The disable of an active port of the change of the data port
971 * bit can/will cause a change in the data port.
972 */
973 dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
974 (etr_eacr.dp ^ eacr.dp) != 0;
975 etr_eacr = eacr;
976 etr_setr(&etr_eacr);
977 if (dp_changed)
978 etr_tolec = get_clock();
979 }
980
981 /*
982 * ETR work. In this function you'll find the main logic. In
983 * particular this is the only function that calls etr_update_eacr(),
984 * it "controls" the etr control register.
985 */
etr_work_fn(struct work_struct * work)986 static void etr_work_fn(struct work_struct *work)
987 {
988 unsigned long long now;
989 struct etr_eacr eacr;
990 struct etr_aib aib;
991 int sync_port;
992
993 /* prevent multiple execution. */
994 mutex_lock(&etr_work_mutex);
995
996 /* Create working copy of etr_eacr. */
997 eacr = etr_eacr;
998
999 /* Check for the different events and their immediate effects. */
1000 eacr = etr_handle_events(eacr);
1001
1002 /* Check if ETR is supposed to be active. */
1003 eacr.ea = eacr.p0 || eacr.p1;
1004 if (!eacr.ea) {
1005 /* Both ports offline. Reset everything. */
1006 eacr.dp = eacr.es = eacr.sl = 0;
1007 on_each_cpu(disable_sync_clock, NULL, 1);
1008 del_timer_sync(&etr_timer);
1009 etr_update_eacr(eacr);
1010 goto out_unlock;
1011 }
1012
1013 /* Store aib to get the current ETR status word. */
1014 BUG_ON(etr_stetr(&aib) != 0);
1015 etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
1016 now = get_clock();
1017
1018 /*
1019 * Update the port information if the last stepping port change
1020 * or data port change is older than 1.6 seconds.
1021 */
1022 if (now >= etr_tolec + (1600000 << 12))
1023 eacr = etr_handle_update(&aib, eacr);
1024
1025 /*
1026 * Select ports to enable. The preferred synchronization mode is PPS.
1027 * If a port can be enabled depends on a number of things:
1028 * 1) The port needs to be online and uptodate. A port is not
1029 * disabled just because it is not uptodate, but it is only
1030 * enabled if it is uptodate.
1031 * 2) The port needs to have the same mode (pps / etr).
1032 * 3) The port needs to be usable -> etr_port_valid() == 1
1033 * 4) To enable the second port the clock needs to be in sync.
1034 * 5) If both ports are useable and are ETR ports, the network id
1035 * has to be the same.
1036 * The eacr.sl bit is used to indicate etr mode vs. pps mode.
1037 */
1038 if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
1039 eacr.sl = 0;
1040 eacr.e0 = 1;
1041 if (!etr_mode_is_pps(etr_eacr))
1042 eacr.es = 0;
1043 if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
1044 eacr.e1 = 0;
1045 // FIXME: uptodate checks ?
1046 else if (etr_port0_uptodate && etr_port1_uptodate)
1047 eacr.e1 = 1;
1048 sync_port = (etr_port0_uptodate &&
1049 etr_port_valid(&etr_port0, 0)) ? 0 : -1;
1050 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
1051 eacr.sl = 0;
1052 eacr.e0 = 0;
1053 eacr.e1 = 1;
1054 if (!etr_mode_is_pps(etr_eacr))
1055 eacr.es = 0;
1056 sync_port = (etr_port1_uptodate &&
1057 etr_port_valid(&etr_port1, 1)) ? 1 : -1;
1058 } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
1059 eacr.sl = 1;
1060 eacr.e0 = 1;
1061 if (!etr_mode_is_etr(etr_eacr))
1062 eacr.es = 0;
1063 if (!eacr.es || !eacr.p1 ||
1064 aib.esw.psc1 != etr_lpsc_operational_alt)
1065 eacr.e1 = 0;
1066 else if (etr_port0_uptodate && etr_port1_uptodate &&
1067 etr_compare_network(&etr_port0, &etr_port1))
1068 eacr.e1 = 1;
1069 sync_port = (etr_port0_uptodate &&
1070 etr_port_valid(&etr_port0, 0)) ? 0 : -1;
1071 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
1072 eacr.sl = 1;
1073 eacr.e0 = 0;
1074 eacr.e1 = 1;
1075 if (!etr_mode_is_etr(etr_eacr))
1076 eacr.es = 0;
1077 sync_port = (etr_port1_uptodate &&
1078 etr_port_valid(&etr_port1, 1)) ? 1 : -1;
1079 } else {
1080 /* Both ports not usable. */
1081 eacr.es = eacr.sl = 0;
1082 sync_port = -1;
1083 }
1084
1085 /*
1086 * If the clock is in sync just update the eacr and return.
1087 * If there is no valid sync port wait for a port update.
1088 */
1089 if ((eacr.es && check_sync_clock()) || sync_port < 0) {
1090 etr_update_eacr(eacr);
1091 etr_set_tolec_timeout(now);
1092 goto out_unlock;
1093 }
1094
1095 /*
1096 * Prepare control register for clock syncing
1097 * (reset data port bit, set sync check control.
1098 */
1099 eacr.dp = 0;
1100 eacr.es = 1;
1101
1102 /*
1103 * Update eacr and try to synchronize the clock. If the update
1104 * of eacr caused a stepping port switch (or if we have to
1105 * assume that a stepping port switch has occurred) or the
1106 * clock syncing failed, reset the sync check control bit
1107 * and set up a timer to try again after 0.5 seconds
1108 */
1109 etr_update_eacr(eacr);
1110 if (now < etr_tolec + (1600000 << 12) ||
1111 etr_sync_clock_stop(&aib, sync_port) != 0) {
1112 /* Sync failed. Try again in 1/2 second. */
1113 eacr.es = 0;
1114 etr_update_eacr(eacr);
1115 etr_set_sync_timeout();
1116 } else
1117 etr_set_tolec_timeout(now);
1118 out_unlock:
1119 mutex_unlock(&etr_work_mutex);
1120 }
1121
1122 /*
1123 * Sysfs interface functions
1124 */
1125 static struct bus_type etr_subsys = {
1126 .name = "etr",
1127 .dev_name = "etr",
1128 };
1129
1130 static struct device etr_port0_dev = {
1131 .id = 0,
1132 .bus = &etr_subsys,
1133 };
1134
1135 static struct device etr_port1_dev = {
1136 .id = 1,
1137 .bus = &etr_subsys,
1138 };
1139
1140 /*
1141 * ETR subsys attributes
1142 */
etr_stepping_port_show(struct device * dev,struct device_attribute * attr,char * buf)1143 static ssize_t etr_stepping_port_show(struct device *dev,
1144 struct device_attribute *attr,
1145 char *buf)
1146 {
1147 return sprintf(buf, "%i\n", etr_port0.esw.p);
1148 }
1149
1150 static DEVICE_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
1151
etr_stepping_mode_show(struct device * dev,struct device_attribute * attr,char * buf)1152 static ssize_t etr_stepping_mode_show(struct device *dev,
1153 struct device_attribute *attr,
1154 char *buf)
1155 {
1156 char *mode_str;
1157
1158 if (etr_mode_is_pps(etr_eacr))
1159 mode_str = "pps";
1160 else if (etr_mode_is_etr(etr_eacr))
1161 mode_str = "etr";
1162 else
1163 mode_str = "local";
1164 return sprintf(buf, "%s\n", mode_str);
1165 }
1166
1167 static DEVICE_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
1168
1169 /*
1170 * ETR port attributes
1171 */
etr_aib_from_dev(struct device * dev)1172 static inline struct etr_aib *etr_aib_from_dev(struct device *dev)
1173 {
1174 if (dev == &etr_port0_dev)
1175 return etr_port0_online ? &etr_port0 : NULL;
1176 else
1177 return etr_port1_online ? &etr_port1 : NULL;
1178 }
1179
etr_online_show(struct device * dev,struct device_attribute * attr,char * buf)1180 static ssize_t etr_online_show(struct device *dev,
1181 struct device_attribute *attr,
1182 char *buf)
1183 {
1184 unsigned int online;
1185
1186 online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
1187 return sprintf(buf, "%i\n", online);
1188 }
1189
etr_online_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1190 static ssize_t etr_online_store(struct device *dev,
1191 struct device_attribute *attr,
1192 const char *buf, size_t count)
1193 {
1194 unsigned int value;
1195
1196 value = simple_strtoul(buf, NULL, 0);
1197 if (value != 0 && value != 1)
1198 return -EINVAL;
1199 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
1200 return -EOPNOTSUPP;
1201 mutex_lock(&clock_sync_mutex);
1202 if (dev == &etr_port0_dev) {
1203 if (etr_port0_online == value)
1204 goto out; /* Nothing to do. */
1205 etr_port0_online = value;
1206 if (etr_port0_online && etr_port1_online)
1207 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1208 else
1209 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1210 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
1211 queue_work(time_sync_wq, &etr_work);
1212 } else {
1213 if (etr_port1_online == value)
1214 goto out; /* Nothing to do. */
1215 etr_port1_online = value;
1216 if (etr_port0_online && etr_port1_online)
1217 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1218 else
1219 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1220 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
1221 queue_work(time_sync_wq, &etr_work);
1222 }
1223 out:
1224 mutex_unlock(&clock_sync_mutex);
1225 return count;
1226 }
1227
1228 static DEVICE_ATTR(online, 0600, etr_online_show, etr_online_store);
1229
etr_stepping_control_show(struct device * dev,struct device_attribute * attr,char * buf)1230 static ssize_t etr_stepping_control_show(struct device *dev,
1231 struct device_attribute *attr,
1232 char *buf)
1233 {
1234 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1235 etr_eacr.e0 : etr_eacr.e1);
1236 }
1237
1238 static DEVICE_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
1239
etr_mode_code_show(struct device * dev,struct device_attribute * attr,char * buf)1240 static ssize_t etr_mode_code_show(struct device *dev,
1241 struct device_attribute *attr, char *buf)
1242 {
1243 if (!etr_port0_online && !etr_port1_online)
1244 /* Status word is not uptodate if both ports are offline. */
1245 return -ENODATA;
1246 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1247 etr_port0.esw.psc0 : etr_port0.esw.psc1);
1248 }
1249
1250 static DEVICE_ATTR(state_code, 0400, etr_mode_code_show, NULL);
1251
etr_untuned_show(struct device * dev,struct device_attribute * attr,char * buf)1252 static ssize_t etr_untuned_show(struct device *dev,
1253 struct device_attribute *attr, char *buf)
1254 {
1255 struct etr_aib *aib = etr_aib_from_dev(dev);
1256
1257 if (!aib || !aib->slsw.v1)
1258 return -ENODATA;
1259 return sprintf(buf, "%i\n", aib->edf1.u);
1260 }
1261
1262 static DEVICE_ATTR(untuned, 0400, etr_untuned_show, NULL);
1263
etr_network_id_show(struct device * dev,struct device_attribute * attr,char * buf)1264 static ssize_t etr_network_id_show(struct device *dev,
1265 struct device_attribute *attr, char *buf)
1266 {
1267 struct etr_aib *aib = etr_aib_from_dev(dev);
1268
1269 if (!aib || !aib->slsw.v1)
1270 return -ENODATA;
1271 return sprintf(buf, "%i\n", aib->edf1.net_id);
1272 }
1273
1274 static DEVICE_ATTR(network, 0400, etr_network_id_show, NULL);
1275
etr_id_show(struct device * dev,struct device_attribute * attr,char * buf)1276 static ssize_t etr_id_show(struct device *dev,
1277 struct device_attribute *attr, char *buf)
1278 {
1279 struct etr_aib *aib = etr_aib_from_dev(dev);
1280
1281 if (!aib || !aib->slsw.v1)
1282 return -ENODATA;
1283 return sprintf(buf, "%i\n", aib->edf1.etr_id);
1284 }
1285
1286 static DEVICE_ATTR(id, 0400, etr_id_show, NULL);
1287
etr_port_number_show(struct device * dev,struct device_attribute * attr,char * buf)1288 static ssize_t etr_port_number_show(struct device *dev,
1289 struct device_attribute *attr, char *buf)
1290 {
1291 struct etr_aib *aib = etr_aib_from_dev(dev);
1292
1293 if (!aib || !aib->slsw.v1)
1294 return -ENODATA;
1295 return sprintf(buf, "%i\n", aib->edf1.etr_pn);
1296 }
1297
1298 static DEVICE_ATTR(port, 0400, etr_port_number_show, NULL);
1299
etr_coupled_show(struct device * dev,struct device_attribute * attr,char * buf)1300 static ssize_t etr_coupled_show(struct device *dev,
1301 struct device_attribute *attr, char *buf)
1302 {
1303 struct etr_aib *aib = etr_aib_from_dev(dev);
1304
1305 if (!aib || !aib->slsw.v3)
1306 return -ENODATA;
1307 return sprintf(buf, "%i\n", aib->edf3.c);
1308 }
1309
1310 static DEVICE_ATTR(coupled, 0400, etr_coupled_show, NULL);
1311
etr_local_time_show(struct device * dev,struct device_attribute * attr,char * buf)1312 static ssize_t etr_local_time_show(struct device *dev,
1313 struct device_attribute *attr, char *buf)
1314 {
1315 struct etr_aib *aib = etr_aib_from_dev(dev);
1316
1317 if (!aib || !aib->slsw.v3)
1318 return -ENODATA;
1319 return sprintf(buf, "%i\n", aib->edf3.blto);
1320 }
1321
1322 static DEVICE_ATTR(local_time, 0400, etr_local_time_show, NULL);
1323
etr_utc_offset_show(struct device * dev,struct device_attribute * attr,char * buf)1324 static ssize_t etr_utc_offset_show(struct device *dev,
1325 struct device_attribute *attr, char *buf)
1326 {
1327 struct etr_aib *aib = etr_aib_from_dev(dev);
1328
1329 if (!aib || !aib->slsw.v3)
1330 return -ENODATA;
1331 return sprintf(buf, "%i\n", aib->edf3.buo);
1332 }
1333
1334 static DEVICE_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
1335
1336 static struct device_attribute *etr_port_attributes[] = {
1337 &dev_attr_online,
1338 &dev_attr_stepping_control,
1339 &dev_attr_state_code,
1340 &dev_attr_untuned,
1341 &dev_attr_network,
1342 &dev_attr_id,
1343 &dev_attr_port,
1344 &dev_attr_coupled,
1345 &dev_attr_local_time,
1346 &dev_attr_utc_offset,
1347 NULL
1348 };
1349
etr_register_port(struct device * dev)1350 static int __init etr_register_port(struct device *dev)
1351 {
1352 struct device_attribute **attr;
1353 int rc;
1354
1355 rc = device_register(dev);
1356 if (rc)
1357 goto out;
1358 for (attr = etr_port_attributes; *attr; attr++) {
1359 rc = device_create_file(dev, *attr);
1360 if (rc)
1361 goto out_unreg;
1362 }
1363 return 0;
1364 out_unreg:
1365 for (; attr >= etr_port_attributes; attr--)
1366 device_remove_file(dev, *attr);
1367 device_unregister(dev);
1368 out:
1369 return rc;
1370 }
1371
etr_unregister_port(struct device * dev)1372 static void __init etr_unregister_port(struct device *dev)
1373 {
1374 struct device_attribute **attr;
1375
1376 for (attr = etr_port_attributes; *attr; attr++)
1377 device_remove_file(dev, *attr);
1378 device_unregister(dev);
1379 }
1380
etr_init_sysfs(void)1381 static int __init etr_init_sysfs(void)
1382 {
1383 int rc;
1384
1385 rc = subsys_system_register(&etr_subsys, NULL);
1386 if (rc)
1387 goto out;
1388 rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_port);
1389 if (rc)
1390 goto out_unreg_subsys;
1391 rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
1392 if (rc)
1393 goto out_remove_stepping_port;
1394 rc = etr_register_port(&etr_port0_dev);
1395 if (rc)
1396 goto out_remove_stepping_mode;
1397 rc = etr_register_port(&etr_port1_dev);
1398 if (rc)
1399 goto out_remove_port0;
1400 return 0;
1401
1402 out_remove_port0:
1403 etr_unregister_port(&etr_port0_dev);
1404 out_remove_stepping_mode:
1405 device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
1406 out_remove_stepping_port:
1407 device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_port);
1408 out_unreg_subsys:
1409 bus_unregister(&etr_subsys);
1410 out:
1411 return rc;
1412 }
1413
1414 device_initcall(etr_init_sysfs);
1415
1416 /*
1417 * Server Time Protocol (STP) code.
1418 */
1419 static int stp_online;
1420 static struct stp_sstpi stp_info;
1421 static void *stp_page;
1422
1423 static void stp_work_fn(struct work_struct *work);
1424 static DEFINE_MUTEX(stp_work_mutex);
1425 static DECLARE_WORK(stp_work, stp_work_fn);
1426 static struct timer_list stp_timer;
1427
early_parse_stp(char * p)1428 static int __init early_parse_stp(char *p)
1429 {
1430 if (strncmp(p, "off", 3) == 0)
1431 stp_online = 0;
1432 else if (strncmp(p, "on", 2) == 0)
1433 stp_online = 1;
1434 return 0;
1435 }
1436 early_param("stp", early_parse_stp);
1437
1438 /*
1439 * Reset STP attachment.
1440 */
stp_reset(void)1441 static void __init stp_reset(void)
1442 {
1443 int rc;
1444
1445 stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
1446 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1447 if (rc == 0)
1448 set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
1449 else if (stp_online) {
1450 pr_warning("The real or virtual hardware system does "
1451 "not provide an STP interface\n");
1452 free_page((unsigned long) stp_page);
1453 stp_page = NULL;
1454 stp_online = 0;
1455 }
1456 }
1457
stp_timeout(unsigned long dummy)1458 static void stp_timeout(unsigned long dummy)
1459 {
1460 queue_work(time_sync_wq, &stp_work);
1461 }
1462
stp_init(void)1463 static int __init stp_init(void)
1464 {
1465 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1466 return 0;
1467 setup_timer(&stp_timer, stp_timeout, 0UL);
1468 time_init_wq();
1469 if (!stp_online)
1470 return 0;
1471 queue_work(time_sync_wq, &stp_work);
1472 return 0;
1473 }
1474
1475 arch_initcall(stp_init);
1476
1477 /*
1478 * STP timing alert. There are three causes:
1479 * 1) timing status change
1480 * 2) link availability change
1481 * 3) time control parameter change
1482 * In all three cases we are only interested in the clock source state.
1483 * If a STP clock source is now available use it.
1484 */
stp_timing_alert(struct stp_irq_parm * intparm)1485 static void stp_timing_alert(struct stp_irq_parm *intparm)
1486 {
1487 if (intparm->tsc || intparm->lac || intparm->tcpc)
1488 queue_work(time_sync_wq, &stp_work);
1489 }
1490
1491 /*
1492 * STP sync check machine check. This is called when the timing state
1493 * changes from the synchronized state to the unsynchronized state.
1494 * After a STP sync check the clock is not in sync. The machine check
1495 * is broadcasted to all cpus at the same time.
1496 */
stp_sync_check(void)1497 void stp_sync_check(void)
1498 {
1499 disable_sync_clock(NULL);
1500 queue_work(time_sync_wq, &stp_work);
1501 }
1502
1503 /*
1504 * STP island condition machine check. This is called when an attached
1505 * server attempts to communicate over an STP link and the servers
1506 * have matching CTN ids and have a valid stratum-1 configuration
1507 * but the configurations do not match.
1508 */
stp_island_check(void)1509 void stp_island_check(void)
1510 {
1511 disable_sync_clock(NULL);
1512 queue_work(time_sync_wq, &stp_work);
1513 }
1514
1515
stp_sync_clock(void * data)1516 static int stp_sync_clock(void *data)
1517 {
1518 static int first;
1519 unsigned long long old_clock, delta;
1520 struct clock_sync_data *stp_sync;
1521 int rc;
1522
1523 stp_sync = data;
1524
1525 if (xchg(&first, 1) == 1) {
1526 /* Slave */
1527 clock_sync_cpu(stp_sync);
1528 return 0;
1529 }
1530
1531 /* Wait until all other cpus entered the sync function. */
1532 while (atomic_read(&stp_sync->cpus) != 0)
1533 cpu_relax();
1534
1535 enable_sync_clock();
1536
1537 rc = 0;
1538 if (stp_info.todoff[0] || stp_info.todoff[1] ||
1539 stp_info.todoff[2] || stp_info.todoff[3] ||
1540 stp_info.tmd != 2) {
1541 old_clock = get_clock();
1542 rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
1543 if (rc == 0) {
1544 delta = adjust_time(old_clock, get_clock(), 0);
1545 fixup_clock_comparator(delta);
1546 rc = chsc_sstpi(stp_page, &stp_info,
1547 sizeof(struct stp_sstpi));
1548 if (rc == 0 && stp_info.tmd != 2)
1549 rc = -EAGAIN;
1550 }
1551 }
1552 if (rc) {
1553 disable_sync_clock(NULL);
1554 stp_sync->in_sync = -EAGAIN;
1555 } else
1556 stp_sync->in_sync = 1;
1557 xchg(&first, 0);
1558 return 0;
1559 }
1560
1561 /*
1562 * STP work. Check for the STP state and take over the clock
1563 * synchronization if the STP clock source is usable.
1564 */
stp_work_fn(struct work_struct * work)1565 static void stp_work_fn(struct work_struct *work)
1566 {
1567 struct clock_sync_data stp_sync;
1568 int rc;
1569
1570 /* prevent multiple execution. */
1571 mutex_lock(&stp_work_mutex);
1572
1573 if (!stp_online) {
1574 chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1575 del_timer_sync(&stp_timer);
1576 goto out_unlock;
1577 }
1578
1579 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
1580 if (rc)
1581 goto out_unlock;
1582
1583 rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
1584 if (rc || stp_info.c == 0)
1585 goto out_unlock;
1586
1587 /* Skip synchronization if the clock is already in sync. */
1588 if (check_sync_clock())
1589 goto out_unlock;
1590
1591 memset(&stp_sync, 0, sizeof(stp_sync));
1592 get_online_cpus();
1593 atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
1594 stop_machine(stp_sync_clock, &stp_sync, cpu_online_mask);
1595 put_online_cpus();
1596
1597 if (!check_sync_clock())
1598 /*
1599 * There is a usable clock but the synchonization failed.
1600 * Retry after a second.
1601 */
1602 mod_timer(&stp_timer, jiffies + HZ);
1603
1604 out_unlock:
1605 mutex_unlock(&stp_work_mutex);
1606 }
1607
1608 /*
1609 * STP subsys sysfs interface functions
1610 */
1611 static struct bus_type stp_subsys = {
1612 .name = "stp",
1613 .dev_name = "stp",
1614 };
1615
stp_ctn_id_show(struct device * dev,struct device_attribute * attr,char * buf)1616 static ssize_t stp_ctn_id_show(struct device *dev,
1617 struct device_attribute *attr,
1618 char *buf)
1619 {
1620 if (!stp_online)
1621 return -ENODATA;
1622 return sprintf(buf, "%016llx\n",
1623 *(unsigned long long *) stp_info.ctnid);
1624 }
1625
1626 static DEVICE_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
1627
stp_ctn_type_show(struct device * dev,struct device_attribute * attr,char * buf)1628 static ssize_t stp_ctn_type_show(struct device *dev,
1629 struct device_attribute *attr,
1630 char *buf)
1631 {
1632 if (!stp_online)
1633 return -ENODATA;
1634 return sprintf(buf, "%i\n", stp_info.ctn);
1635 }
1636
1637 static DEVICE_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
1638
stp_dst_offset_show(struct device * dev,struct device_attribute * attr,char * buf)1639 static ssize_t stp_dst_offset_show(struct device *dev,
1640 struct device_attribute *attr,
1641 char *buf)
1642 {
1643 if (!stp_online || !(stp_info.vbits & 0x2000))
1644 return -ENODATA;
1645 return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
1646 }
1647
1648 static DEVICE_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
1649
stp_leap_seconds_show(struct device * dev,struct device_attribute * attr,char * buf)1650 static ssize_t stp_leap_seconds_show(struct device *dev,
1651 struct device_attribute *attr,
1652 char *buf)
1653 {
1654 if (!stp_online || !(stp_info.vbits & 0x8000))
1655 return -ENODATA;
1656 return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
1657 }
1658
1659 static DEVICE_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
1660
stp_stratum_show(struct device * dev,struct device_attribute * attr,char * buf)1661 static ssize_t stp_stratum_show(struct device *dev,
1662 struct device_attribute *attr,
1663 char *buf)
1664 {
1665 if (!stp_online)
1666 return -ENODATA;
1667 return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
1668 }
1669
1670 static DEVICE_ATTR(stratum, 0400, stp_stratum_show, NULL);
1671
stp_time_offset_show(struct device * dev,struct device_attribute * attr,char * buf)1672 static ssize_t stp_time_offset_show(struct device *dev,
1673 struct device_attribute *attr,
1674 char *buf)
1675 {
1676 if (!stp_online || !(stp_info.vbits & 0x0800))
1677 return -ENODATA;
1678 return sprintf(buf, "%i\n", (int) stp_info.tto);
1679 }
1680
1681 static DEVICE_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
1682
stp_time_zone_offset_show(struct device * dev,struct device_attribute * attr,char * buf)1683 static ssize_t stp_time_zone_offset_show(struct device *dev,
1684 struct device_attribute *attr,
1685 char *buf)
1686 {
1687 if (!stp_online || !(stp_info.vbits & 0x4000))
1688 return -ENODATA;
1689 return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
1690 }
1691
1692 static DEVICE_ATTR(time_zone_offset, 0400,
1693 stp_time_zone_offset_show, NULL);
1694
stp_timing_mode_show(struct device * dev,struct device_attribute * attr,char * buf)1695 static ssize_t stp_timing_mode_show(struct device *dev,
1696 struct device_attribute *attr,
1697 char *buf)
1698 {
1699 if (!stp_online)
1700 return -ENODATA;
1701 return sprintf(buf, "%i\n", stp_info.tmd);
1702 }
1703
1704 static DEVICE_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
1705
stp_timing_state_show(struct device * dev,struct device_attribute * attr,char * buf)1706 static ssize_t stp_timing_state_show(struct device *dev,
1707 struct device_attribute *attr,
1708 char *buf)
1709 {
1710 if (!stp_online)
1711 return -ENODATA;
1712 return sprintf(buf, "%i\n", stp_info.tst);
1713 }
1714
1715 static DEVICE_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
1716
stp_online_show(struct device * dev,struct device_attribute * attr,char * buf)1717 static ssize_t stp_online_show(struct device *dev,
1718 struct device_attribute *attr,
1719 char *buf)
1720 {
1721 return sprintf(buf, "%i\n", stp_online);
1722 }
1723
stp_online_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1724 static ssize_t stp_online_store(struct device *dev,
1725 struct device_attribute *attr,
1726 const char *buf, size_t count)
1727 {
1728 unsigned int value;
1729
1730 value = simple_strtoul(buf, NULL, 0);
1731 if (value != 0 && value != 1)
1732 return -EINVAL;
1733 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1734 return -EOPNOTSUPP;
1735 mutex_lock(&clock_sync_mutex);
1736 stp_online = value;
1737 if (stp_online)
1738 set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1739 else
1740 clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1741 queue_work(time_sync_wq, &stp_work);
1742 mutex_unlock(&clock_sync_mutex);
1743 return count;
1744 }
1745
1746 /*
1747 * Can't use DEVICE_ATTR because the attribute should be named
1748 * stp/online but dev_attr_online already exists in this file ..
1749 */
1750 static struct device_attribute dev_attr_stp_online = {
1751 .attr = { .name = "online", .mode = 0600 },
1752 .show = stp_online_show,
1753 .store = stp_online_store,
1754 };
1755
1756 static struct device_attribute *stp_attributes[] = {
1757 &dev_attr_ctn_id,
1758 &dev_attr_ctn_type,
1759 &dev_attr_dst_offset,
1760 &dev_attr_leap_seconds,
1761 &dev_attr_stp_online,
1762 &dev_attr_stratum,
1763 &dev_attr_time_offset,
1764 &dev_attr_time_zone_offset,
1765 &dev_attr_timing_mode,
1766 &dev_attr_timing_state,
1767 NULL
1768 };
1769
stp_init_sysfs(void)1770 static int __init stp_init_sysfs(void)
1771 {
1772 struct device_attribute **attr;
1773 int rc;
1774
1775 rc = subsys_system_register(&stp_subsys, NULL);
1776 if (rc)
1777 goto out;
1778 for (attr = stp_attributes; *attr; attr++) {
1779 rc = device_create_file(stp_subsys.dev_root, *attr);
1780 if (rc)
1781 goto out_unreg;
1782 }
1783 return 0;
1784 out_unreg:
1785 for (; attr >= stp_attributes; attr--)
1786 device_remove_file(stp_subsys.dev_root, *attr);
1787 bus_unregister(&stp_subsys);
1788 out:
1789 return rc;
1790 }
1791
1792 device_initcall(stp_init_sysfs);
1793