1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /*
3 * Copyright (c) 2018 Synopsys, Inc. and/or its affiliates.
4 * stmmac HW Interface Handling
5 */
6
7 #include "common.h"
8 #include "stmmac.h"
9 #include "stmmac_ptp.h"
10
stmmac_get_id(struct stmmac_priv * priv,u32 id_reg)11 static u32 stmmac_get_id(struct stmmac_priv *priv, u32 id_reg)
12 {
13 u32 reg = readl(priv->ioaddr + id_reg);
14
15 if (!reg) {
16 dev_info(priv->device, "Version ID not available\n");
17 return 0x0;
18 }
19
20 dev_info(priv->device, "User ID: 0x%x, Synopsys ID: 0x%x\n",
21 (unsigned int)(reg & GENMASK(15, 8)) >> 8,
22 (unsigned int)(reg & GENMASK(7, 0)));
23 return reg & GENMASK(7, 0);
24 }
25
stmmac_get_dev_id(struct stmmac_priv * priv,u32 id_reg)26 static u32 stmmac_get_dev_id(struct stmmac_priv *priv, u32 id_reg)
27 {
28 u32 reg = readl(priv->ioaddr + id_reg);
29
30 if (!reg) {
31 dev_info(priv->device, "Version ID not available\n");
32 return 0x0;
33 }
34
35 return (reg & GENMASK(15, 8)) >> 8;
36 }
37
stmmac_dwmac_mode_quirk(struct stmmac_priv * priv)38 static void stmmac_dwmac_mode_quirk(struct stmmac_priv *priv)
39 {
40 struct mac_device_info *mac = priv->hw;
41
42 if (priv->chain_mode) {
43 dev_info(priv->device, "Chain mode enabled\n");
44 priv->mode = STMMAC_CHAIN_MODE;
45 mac->mode = &chain_mode_ops;
46 } else {
47 dev_info(priv->device, "Ring mode enabled\n");
48 priv->mode = STMMAC_RING_MODE;
49 mac->mode = &ring_mode_ops;
50 }
51 }
52
stmmac_dwmac1_quirks(struct stmmac_priv * priv)53 static int stmmac_dwmac1_quirks(struct stmmac_priv *priv)
54 {
55 struct mac_device_info *mac = priv->hw;
56
57 if (priv->plat->enh_desc) {
58 dev_info(priv->device, "Enhanced/Alternate descriptors\n");
59
60 /* GMAC older than 3.50 has no extended descriptors */
61 if (priv->synopsys_id >= DWMAC_CORE_3_50) {
62 dev_info(priv->device, "Enabled extended descriptors\n");
63 priv->extend_desc = 1;
64 } else {
65 dev_warn(priv->device, "Extended descriptors not supported\n");
66 }
67
68 mac->desc = &enh_desc_ops;
69 } else {
70 dev_info(priv->device, "Normal descriptors\n");
71 mac->desc = &ndesc_ops;
72 }
73
74 stmmac_dwmac_mode_quirk(priv);
75 return 0;
76 }
77
stmmac_dwmac4_quirks(struct stmmac_priv * priv)78 static int stmmac_dwmac4_quirks(struct stmmac_priv *priv)
79 {
80 stmmac_dwmac_mode_quirk(priv);
81 return 0;
82 }
83
stmmac_dwxlgmac_quirks(struct stmmac_priv * priv)84 static int stmmac_dwxlgmac_quirks(struct stmmac_priv *priv)
85 {
86 priv->hw->xlgmac = true;
87 return 0;
88 }
89
stmmac_reset(struct stmmac_priv * priv,void __iomem * ioaddr)90 int stmmac_reset(struct stmmac_priv *priv, void __iomem *ioaddr)
91 {
92 struct plat_stmmacenet_data *plat = priv ? priv->plat : NULL;
93
94 if (!priv)
95 return -EINVAL;
96
97 if (plat && plat->fix_soc_reset)
98 return plat->fix_soc_reset(plat, ioaddr);
99
100 return stmmac_do_callback(priv, dma, reset, ioaddr);
101 }
102
103 static const struct stmmac_hwif_entry {
104 bool gmac;
105 bool gmac4;
106 bool xgmac;
107 u32 min_id;
108 u32 dev_id;
109 const struct stmmac_regs_off regs;
110 const void *desc;
111 const void *dma;
112 const void *mac;
113 const void *hwtimestamp;
114 const void *mode;
115 const void *tc;
116 const void *mmc;
117 int (*setup)(struct stmmac_priv *priv);
118 int (*quirks)(struct stmmac_priv *priv);
119 } stmmac_hw[] = {
120 /* NOTE: New HW versions shall go to the end of this table */
121 {
122 .gmac = false,
123 .gmac4 = false,
124 .xgmac = false,
125 .min_id = 0,
126 .regs = {
127 .ptp_off = PTP_GMAC3_X_OFFSET,
128 .mmc_off = MMC_GMAC3_X_OFFSET,
129 },
130 .desc = NULL,
131 .dma = &dwmac100_dma_ops,
132 .mac = &dwmac100_ops,
133 .hwtimestamp = &stmmac_ptp,
134 .mode = NULL,
135 .tc = NULL,
136 .mmc = &dwmac_mmc_ops,
137 .setup = dwmac100_setup,
138 .quirks = stmmac_dwmac1_quirks,
139 }, {
140 .gmac = true,
141 .gmac4 = false,
142 .xgmac = false,
143 .min_id = 0,
144 .regs = {
145 .ptp_off = PTP_GMAC3_X_OFFSET,
146 .mmc_off = MMC_GMAC3_X_OFFSET,
147 },
148 .desc = NULL,
149 .dma = &dwmac1000_dma_ops,
150 .mac = &dwmac1000_ops,
151 .hwtimestamp = &stmmac_ptp,
152 .mode = NULL,
153 .tc = NULL,
154 .mmc = &dwmac_mmc_ops,
155 .setup = dwmac1000_setup,
156 .quirks = stmmac_dwmac1_quirks,
157 }, {
158 .gmac = false,
159 .gmac4 = true,
160 .xgmac = false,
161 .min_id = 0,
162 .regs = {
163 .ptp_off = PTP_GMAC4_OFFSET,
164 .mmc_off = MMC_GMAC4_OFFSET,
165 },
166 .desc = &dwmac4_desc_ops,
167 .dma = &dwmac4_dma_ops,
168 .mac = &dwmac4_ops,
169 .hwtimestamp = &stmmac_ptp,
170 .mode = NULL,
171 .tc = &dwmac510_tc_ops,
172 .mmc = &dwmac_mmc_ops,
173 .setup = dwmac4_setup,
174 .quirks = stmmac_dwmac4_quirks,
175 }, {
176 .gmac = false,
177 .gmac4 = true,
178 .xgmac = false,
179 .min_id = DWMAC_CORE_4_00,
180 .regs = {
181 .ptp_off = PTP_GMAC4_OFFSET,
182 .mmc_off = MMC_GMAC4_OFFSET,
183 },
184 .desc = &dwmac4_desc_ops,
185 .dma = &dwmac4_dma_ops,
186 .mac = &dwmac410_ops,
187 .hwtimestamp = &stmmac_ptp,
188 .mode = &dwmac4_ring_mode_ops,
189 .tc = &dwmac510_tc_ops,
190 .mmc = &dwmac_mmc_ops,
191 .setup = dwmac4_setup,
192 .quirks = NULL,
193 }, {
194 .gmac = false,
195 .gmac4 = true,
196 .xgmac = false,
197 .min_id = DWMAC_CORE_4_10,
198 .regs = {
199 .ptp_off = PTP_GMAC4_OFFSET,
200 .mmc_off = MMC_GMAC4_OFFSET,
201 },
202 .desc = &dwmac4_desc_ops,
203 .dma = &dwmac410_dma_ops,
204 .mac = &dwmac410_ops,
205 .hwtimestamp = &stmmac_ptp,
206 .mode = &dwmac4_ring_mode_ops,
207 .tc = &dwmac510_tc_ops,
208 .mmc = &dwmac_mmc_ops,
209 .setup = dwmac4_setup,
210 .quirks = NULL,
211 }, {
212 .gmac = false,
213 .gmac4 = true,
214 .xgmac = false,
215 .min_id = DWMAC_CORE_5_10,
216 .regs = {
217 .ptp_off = PTP_GMAC4_OFFSET,
218 .mmc_off = MMC_GMAC4_OFFSET,
219 },
220 .desc = &dwmac4_desc_ops,
221 .dma = &dwmac410_dma_ops,
222 .mac = &dwmac510_ops,
223 .hwtimestamp = &stmmac_ptp,
224 .mode = &dwmac4_ring_mode_ops,
225 .tc = &dwmac510_tc_ops,
226 .mmc = &dwmac_mmc_ops,
227 .setup = dwmac4_setup,
228 .quirks = NULL,
229 }, {
230 .gmac = false,
231 .gmac4 = false,
232 .xgmac = true,
233 .min_id = DWXGMAC_CORE_2_10,
234 .dev_id = DWXGMAC_ID,
235 .regs = {
236 .ptp_off = PTP_XGMAC_OFFSET,
237 .mmc_off = MMC_XGMAC_OFFSET,
238 },
239 .desc = &dwxgmac210_desc_ops,
240 .dma = &dwxgmac210_dma_ops,
241 .mac = &dwxgmac210_ops,
242 .hwtimestamp = &stmmac_ptp,
243 .mode = NULL,
244 .tc = &dwmac510_tc_ops,
245 .mmc = &dwxgmac_mmc_ops,
246 .setup = dwxgmac2_setup,
247 .quirks = NULL,
248 }, {
249 .gmac = false,
250 .gmac4 = false,
251 .xgmac = true,
252 .min_id = DWXLGMAC_CORE_2_00,
253 .dev_id = DWXLGMAC_ID,
254 .regs = {
255 .ptp_off = PTP_XGMAC_OFFSET,
256 .mmc_off = MMC_XGMAC_OFFSET,
257 },
258 .desc = &dwxgmac210_desc_ops,
259 .dma = &dwxgmac210_dma_ops,
260 .mac = &dwxlgmac2_ops,
261 .hwtimestamp = &stmmac_ptp,
262 .mode = NULL,
263 .tc = &dwmac510_tc_ops,
264 .mmc = &dwxgmac_mmc_ops,
265 .setup = dwxlgmac2_setup,
266 .quirks = stmmac_dwxlgmac_quirks,
267 },
268 };
269
stmmac_hwif_init(struct stmmac_priv * priv)270 int stmmac_hwif_init(struct stmmac_priv *priv)
271 {
272 bool needs_xgmac = priv->plat->has_xgmac;
273 bool needs_gmac4 = priv->plat->has_gmac4;
274 bool needs_gmac = priv->plat->has_gmac;
275 const struct stmmac_hwif_entry *entry;
276 struct mac_device_info *mac;
277 bool needs_setup = true;
278 u32 id, dev_id = 0;
279 int i, ret;
280
281 if (needs_gmac) {
282 id = stmmac_get_id(priv, GMAC_VERSION);
283 } else if (needs_gmac4 || needs_xgmac) {
284 id = stmmac_get_id(priv, GMAC4_VERSION);
285 if (needs_xgmac)
286 dev_id = stmmac_get_dev_id(priv, GMAC4_VERSION);
287 } else {
288 id = 0;
289 }
290
291 /* Save ID for later use */
292 priv->synopsys_id = id;
293
294 /* Lets assume some safe values first */
295 priv->ptpaddr = priv->ioaddr +
296 (needs_gmac4 ? PTP_GMAC4_OFFSET : PTP_GMAC3_X_OFFSET);
297 priv->mmcaddr = priv->ioaddr +
298 (needs_gmac4 ? MMC_GMAC4_OFFSET : MMC_GMAC3_X_OFFSET);
299
300 /* Check for HW specific setup first */
301 if (priv->plat->setup) {
302 mac = priv->plat->setup(priv);
303 needs_setup = false;
304 } else {
305 mac = devm_kzalloc(priv->device, sizeof(*mac), GFP_KERNEL);
306 }
307
308 if (!mac)
309 return -ENOMEM;
310
311 /* Fallback to generic HW */
312 for (i = ARRAY_SIZE(stmmac_hw) - 1; i >= 0; i--) {
313 entry = &stmmac_hw[i];
314
315 if (needs_gmac ^ entry->gmac)
316 continue;
317 if (needs_gmac4 ^ entry->gmac4)
318 continue;
319 if (needs_xgmac ^ entry->xgmac)
320 continue;
321 /* Use synopsys_id var because some setups can override this */
322 if (priv->synopsys_id < entry->min_id)
323 continue;
324 if (needs_xgmac && (dev_id ^ entry->dev_id))
325 continue;
326
327 /* Only use generic HW helpers if needed */
328 mac->desc = mac->desc ? : entry->desc;
329 mac->dma = mac->dma ? : entry->dma;
330 mac->mac = mac->mac ? : entry->mac;
331 mac->ptp = mac->ptp ? : entry->hwtimestamp;
332 mac->mode = mac->mode ? : entry->mode;
333 mac->tc = mac->tc ? : entry->tc;
334 mac->mmc = mac->mmc ? : entry->mmc;
335
336 priv->hw = mac;
337 priv->ptpaddr = priv->ioaddr + entry->regs.ptp_off;
338 priv->mmcaddr = priv->ioaddr + entry->regs.mmc_off;
339
340 /* Entry found */
341 if (needs_setup) {
342 ret = entry->setup(priv);
343 if (ret)
344 return ret;
345 }
346
347 /* Save quirks, if needed for posterior use */
348 priv->hwif_quirks = entry->quirks;
349 return 0;
350 }
351
352 dev_err(priv->device, "Failed to find HW IF (id=0x%x, gmac=%d/%d)\n",
353 id, needs_gmac, needs_gmac4);
354 return -EINVAL;
355 }
356