1 /*
2 * Copyright (c) 2001-2002 by David Brownell
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19 /* this file is part of ehci-hcd.c */
20
21 /*-------------------------------------------------------------------------*/
22
23 /*
24 * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
25 *
26 * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
27 * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
28 * buffers needed for the larger number). We use one QH per endpoint, queue
29 * multiple urbs (all three types) per endpoint. URBs may need several qtds.
30 *
31 * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
32 * interrupts) needs careful scheduling. Performance improvements can be
33 * an ongoing challenge. That's in "ehci-sched.c".
34 *
35 * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
36 * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
37 * (b) special fields in qh entries or (c) split iso entries. TTs will
38 * buffer low/full speed data so the host collects it at high speed.
39 */
40
41 /*-------------------------------------------------------------------------*/
42
43 /* fill a qtd, returning how much of the buffer we were able to queue up */
44
45 static int
qtd_fill(struct ehci_qtd * qtd,dma_addr_t buf,size_t len,int token,int maxpacket)46 qtd_fill (struct ehci_qtd *qtd, dma_addr_t buf, size_t len,
47 int token, int maxpacket)
48 {
49 int i, count;
50 u64 addr = buf;
51
52 /* one buffer entry per 4K ... first might be short or unaligned */
53 qtd->hw_buf [0] = cpu_to_le32 ((u32)addr);
54 qtd->hw_buf_hi [0] = cpu_to_le32 ((u32)(addr >> 32));
55 count = 0x1000 - (buf & 0x0fff); /* rest of that page */
56 if (likely (len < count)) /* ... iff needed */
57 count = len;
58 else {
59 buf += 0x1000;
60 buf &= ~0x0fff;
61
62 /* per-qtd limit: from 16K to 20K (best alignment) */
63 for (i = 1; count < len && i < 5; i++) {
64 addr = buf;
65 qtd->hw_buf [i] = cpu_to_le32 ((u32)addr);
66 qtd->hw_buf_hi [i] = cpu_to_le32 ((u32)(addr >> 32));
67 buf += 0x1000;
68 if ((count + 0x1000) < len)
69 count += 0x1000;
70 else
71 count = len;
72 }
73
74 /* short packets may only terminate transfers */
75 if (count != len)
76 count -= (count % maxpacket);
77 }
78 qtd->hw_token = cpu_to_le32 ((count << 16) | token);
79 qtd->length = count;
80
81 return count;
82 }
83
84 /*-------------------------------------------------------------------------*/
85
86 static inline void
qh_update(struct ehci_hcd * ehci,struct ehci_qh * qh,struct ehci_qtd * qtd)87 qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
88 {
89 BUG_ON(qh->qh_state != QH_STATE_IDLE);
90
91 qh->hw_qtd_next = QTD_NEXT (qtd->qtd_dma);
92 qh->hw_alt_next = EHCI_LIST_END;
93
94 /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
95 wmb ();
96 qh->hw_token &= __constant_cpu_to_le32 (QTD_TOGGLE | QTD_STS_PING);
97 }
98
99 static void
qh_refresh(struct ehci_hcd * ehci,struct ehci_qh * qh)100 qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
101 {
102 struct ehci_qtd *qtd;
103
104 if (list_empty (&qh->qtd_list))
105 qtd = qh->dummy;
106 else {
107 qtd = list_entry (qh->qtd_list.next,
108 struct ehci_qtd, qtd_list);
109 /* first qtd may already be partially processed */
110 if (cpu_to_le32 (qtd->qtd_dma) == qh->hw_current)
111 qtd = NULL;
112 }
113 if (qtd)
114 qh_update (ehci, qh, qtd);
115 }
116
117 /*-------------------------------------------------------------------------*/
118
qtd_copy_status(struct ehci_hcd * ehci,struct urb * urb,size_t length,u32 token)119 static void qtd_copy_status (
120 struct ehci_hcd *ehci,
121 struct urb *urb,
122 size_t length,
123 u32 token
124 )
125 {
126 /* count IN/OUT bytes, not SETUP (even short packets) */
127 if (likely (QTD_PID (token) != 2))
128 urb->actual_length += length - QTD_LENGTH (token);
129
130 /* don't modify error codes */
131 if (unlikely (urb->status != -EINPROGRESS))
132 return;
133
134 /* force cleanup after short read; not always an error */
135 if (unlikely (IS_SHORT_READ (token)))
136 urb->status = -EREMOTEIO;
137
138 /* serious "can't proceed" faults reported by the hardware */
139 if (token & QTD_STS_HALT) {
140 if (token & QTD_STS_BABBLE) {
141 /* FIXME "must" disable babbling device's port too */
142 urb->status = -EOVERFLOW;
143 } else if (token & QTD_STS_MMF) {
144 /* fs/ls interrupt xfer missed the complete-split */
145 urb->status = -EPROTO;
146 } else if (token & QTD_STS_DBE) {
147 urb->status = (QTD_PID (token) == 1) /* IN ? */
148 ? -ENOSR /* hc couldn't read data */
149 : -ECOMM; /* hc couldn't write data */
150 } else if (token & QTD_STS_XACT) {
151 /* timeout, bad crc, wrong PID, etc; retried */
152 if (QTD_CERR (token))
153 urb->status = -EPIPE;
154 else {
155 ehci_dbg (ehci, "devpath %s ep%d%s 3strikes\n",
156 urb->dev->devpath,
157 usb_pipeendpoint (urb->pipe),
158 usb_pipein (urb->pipe) ? "in" : "out");
159 urb->status = -EPROTO;
160 }
161 /* CERR nonzero + no errors + halt --> stall */
162 } else if (QTD_CERR (token))
163 urb->status = -EPIPE;
164 else /* unknown */
165 urb->status = -EPROTO;
166
167 ehci_vdbg (ehci,
168 "dev%d ep%d%s qtd token %08x --> status %d\n",
169 usb_pipedevice (urb->pipe),
170 usb_pipeendpoint (urb->pipe),
171 usb_pipein (urb->pipe) ? "in" : "out",
172 token, urb->status);
173
174 /* stall indicates some recovery action is needed */
175 if (urb->status == -EPIPE) {
176 int pipe = urb->pipe;
177
178 if (!usb_pipecontrol (pipe))
179 usb_endpoint_halt (urb->dev,
180 usb_pipeendpoint (pipe),
181 usb_pipeout (pipe));
182 if (urb->dev->tt && !usb_pipeint (pipe)) {
183 #ifdef DEBUG
184 struct usb_device *tt = urb->dev->tt->hub;
185 dbg ("clear tt %s-%s p%d buffer, a%d ep%d",
186 tt->bus->bus_name, tt->devpath,
187 urb->dev->ttport, urb->dev->devnum,
188 usb_pipeendpoint (pipe));
189 #endif /* DEBUG */
190 usb_hub_tt_clear_buffer (urb->dev, pipe);
191 }
192 }
193 }
194 }
195
196 static void
ehci_urb_done(struct ehci_hcd * ehci,struct urb * urb,struct pt_regs * regs)197 ehci_urb_done (struct ehci_hcd *ehci, struct urb *urb, struct pt_regs *regs)
198 {
199 #ifdef INTR_AUTOMAGIC
200 struct urb *resubmit = 0;
201 struct usb_device *dev = 0;
202 #endif
203
204 if (likely (urb->hcpriv != 0)) {
205 struct ehci_qh *qh = (struct ehci_qh *) urb->hcpriv;
206
207 /* S-mask in a QH means it's an interrupt urb */
208 if ((qh->hw_info2 & __constant_cpu_to_le32 (0x00ff)) != 0) {
209
210 /* ... update hc-wide periodic stats (for usbfs) */
211 hcd_to_bus (&ehci->hcd)->bandwidth_int_reqs--;
212
213 #ifdef INTR_AUTOMAGIC
214 if (!((urb->status == -ENOENT)
215 || (urb->status == -ECONNRESET))) {
216 resubmit = usb_get_urb (urb);
217 dev = urb->dev;
218 }
219 #endif
220 }
221 qh_put (ehci, qh);
222 }
223
224 spin_lock (&urb->lock);
225 urb->hcpriv = 0;
226 switch (urb->status) {
227 case -EINPROGRESS: /* success */
228 urb->status = 0;
229 default: /* fault */
230 COUNT (ehci->stats.complete);
231 break;
232 case -EREMOTEIO: /* fault or normal */
233 if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
234 urb->status = 0;
235 COUNT (ehci->stats.complete);
236 break;
237 case -ECONNRESET: /* canceled */
238 case -ENOENT:
239 COUNT (ehci->stats.unlink);
240 break;
241 }
242 spin_unlock (&urb->lock);
243
244 #ifdef EHCI_URB_TRACE
245 ehci_dbg (ehci,
246 "%s %s urb %p ep%d%s status %d len %d/%d\n",
247 __FUNCTION__, urb->dev->devpath, urb,
248 usb_pipeendpoint (urb->pipe),
249 usb_pipein (urb->pipe) ? "in" : "out",
250 urb->status,
251 urb->actual_length, urb->transfer_buffer_length);
252 #endif
253
254 /* complete() can reenter this HCD */
255 spin_unlock (&ehci->lock);
256 usb_hcd_giveback_urb (&ehci->hcd, urb, regs);
257
258 #ifdef INTR_AUTOMAGIC
259 if (resubmit && ((urb->status == -ENOENT)
260 || (urb->status == -ECONNRESET))) {
261 usb_put_urb (resubmit);
262 resubmit = 0;
263 }
264 // device drivers will soon be doing something like this
265 if (resubmit) {
266 int status;
267
268 resubmit->dev = dev;
269 status = SUBMIT_URB (resubmit, SLAB_ATOMIC);
270 if (status != 0)
271 err ("can't resubmit interrupt urb %p: status %d",
272 resubmit, status);
273 usb_put_urb (resubmit);
274 }
275 #endif
276
277 spin_lock (&ehci->lock);
278 }
279
280 static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
281 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
282
283 /*
284 * Process and free completed qtds for a qh, returning URBs to drivers.
285 * Chases up to qh->hw_current. Returns number of completions called,
286 * indicating how much "real" work we did.
287 */
288 #define HALT_BIT __constant_cpu_to_le32(QTD_STS_HALT)
289 static unsigned
qh_completions(struct ehci_hcd * ehci,struct ehci_qh * qh,struct pt_regs * regs)290 qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh, struct pt_regs *regs)
291 {
292 struct ehci_qtd *last = 0, *end = qh->dummy;
293 struct list_head *entry, *tmp;
294 int stopped;
295 unsigned count = 0;
296 int do_status = 0;
297 u8 state;
298
299 if (unlikely (list_empty (&qh->qtd_list)))
300 return count;
301
302 /* completions (or tasks on other cpus) must never clobber HALT
303 * till we've gone through and cleaned everything up, even when
304 * they add urbs to this qh's queue or mark them for unlinking.
305 *
306 * NOTE: unlinking expects to be done in queue order.
307 */
308 state = qh->qh_state;
309 qh->qh_state = QH_STATE_COMPLETING;
310 stopped = (state == QH_STATE_IDLE);
311
312 /* remove de-activated QTDs from front of queue.
313 * after faults (including short reads), cleanup this urb
314 * then let the queue advance.
315 * if queue is stopped, handles unlinks.
316 */
317 list_for_each_safe (entry, tmp, &qh->qtd_list) {
318 struct ehci_qtd *qtd;
319 struct urb *urb;
320 u32 token = 0;
321
322 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
323 urb = qtd->urb;
324
325 /* clean up any state from previous QTD ...*/
326 if (last) {
327 if (likely (last->urb != urb)) {
328 ehci_urb_done (ehci, last->urb, regs);
329 count++;
330 }
331 ehci_qtd_free (ehci, last);
332 last = 0;
333 }
334
335 /* ignore urbs submitted during completions we reported */
336 if (qtd == end)
337 break;
338
339 /* hardware copies qtd out of qh overlay */
340 rmb ();
341 token = le32_to_cpu (qtd->hw_token);
342
343 /* always clean up qtds the hc de-activated */
344 if ((token & QTD_STS_ACTIVE) == 0) {
345
346 if ((token & QTD_STS_HALT) != 0) {
347 stopped = 1;
348
349 /* magic dummy for some short reads; qh won't advance */
350 } else if (IS_SHORT_READ (token)
351 && (qh->hw_alt_next & QTD_MASK)
352 == ehci->async->hw_alt_next) {
353 stopped = 1;
354 goto halt;
355 }
356
357 /* stop scanning when we reach qtds the hc is using */
358 } else if (likely (!stopped
359 && HCD_IS_RUNNING (ehci->hcd.state))) {
360 break;
361
362 } else {
363 stopped = 1;
364
365 /* ignore active urbs unless some previous qtd
366 * for the urb faulted (including short read) or
367 * its urb was canceled. we may patch qh or qtds.
368 */
369 if (likely (urb->status == -EINPROGRESS))
370 continue;
371
372 /* issue status after short control reads */
373 if (unlikely (do_status != 0)
374 && QTD_PID (token) == 0 /* OUT */) {
375 do_status = 0;
376 continue;
377 }
378
379 /* token in overlay may be most current */
380 if (state == QH_STATE_IDLE
381 && cpu_to_le32 (qtd->qtd_dma)
382 == qh->hw_current)
383 token = le32_to_cpu (qh->hw_token);
384
385 /* force halt for unlinked or blocked qh, so we'll
386 * patch the qh later and so that completions can't
387 * activate it while we "know" it's stopped.
388 */
389 if ((HALT_BIT & qh->hw_token) == 0) {
390 halt:
391 qh->hw_token |= HALT_BIT;
392 wmb ();
393 }
394 }
395
396 /* remove it from the queue */
397 spin_lock (&urb->lock);
398 qtd_copy_status (ehci, urb, qtd->length, token);
399 do_status = (urb->status == -EREMOTEIO)
400 && usb_pipecontrol (urb->pipe);
401 spin_unlock (&urb->lock);
402
403 if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
404 last = list_entry (qtd->qtd_list.prev,
405 struct ehci_qtd, qtd_list);
406 last->hw_next = qtd->hw_next;
407 }
408 list_del (&qtd->qtd_list);
409 last = qtd;
410 }
411
412 /* last urb's completion might still need calling */
413 if (likely (last != 0)) {
414 ehci_urb_done (ehci, last->urb, regs);
415 count++;
416 ehci_qtd_free (ehci, last);
417 }
418
419 /* restore original state; caller must unlink or relink */
420 qh->qh_state = state;
421
422 /* be sure the hardware's done with the qh before refreshing
423 * it after fault cleanup, or recovering from silicon wrongly
424 * overlaying the dummy qtd (which reduces DMA chatter).
425 */
426 if (stopped != 0 || qh->hw_qtd_next == EHCI_LIST_END) {
427 switch (state) {
428 case QH_STATE_IDLE:
429 qh_refresh(ehci, qh);
430 break;
431 case QH_STATE_LINKED:
432 unlink_async (ehci, qh);
433 break;
434 /* otherwise, unlink already started */
435 }
436 }
437
438 return count;
439 }
440
441 /*-------------------------------------------------------------------------*/
442
443 // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
444 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
445 // ... and packet size, for any kind of endpoint descriptor
446 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
447
448 /*
449 * reverse of qh_urb_transaction: free a list of TDs.
450 * used for cleanup after errors, before HC sees an URB's TDs.
451 */
qtd_list_free(struct ehci_hcd * ehci,struct urb * urb,struct list_head * qtd_list)452 static void qtd_list_free (
453 struct ehci_hcd *ehci,
454 struct urb *urb,
455 struct list_head *qtd_list
456 ) {
457 struct list_head *entry, *temp;
458
459 list_for_each_safe (entry, temp, qtd_list) {
460 struct ehci_qtd *qtd;
461
462 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
463 list_del (&qtd->qtd_list);
464 ehci_qtd_free (ehci, qtd);
465 }
466 }
467
468 /*
469 * create a list of filled qtds for this URB; won't link into qh.
470 */
471 static struct list_head *
qh_urb_transaction(struct ehci_hcd * ehci,struct urb * urb,struct list_head * head,int flags)472 qh_urb_transaction (
473 struct ehci_hcd *ehci,
474 struct urb *urb,
475 struct list_head *head,
476 int flags
477 ) {
478 struct ehci_qtd *qtd, *qtd_prev;
479 dma_addr_t buf;
480 int len, maxpacket;
481 int is_input;
482 u32 token;
483
484 /*
485 * URBs map to sequences of QTDs: one logical transaction
486 */
487 qtd = ehci_qtd_alloc (ehci, flags);
488 if (unlikely (!qtd))
489 return 0;
490 list_add_tail (&qtd->qtd_list, head);
491 qtd->urb = urb;
492
493 token = QTD_STS_ACTIVE;
494 token |= (EHCI_TUNE_CERR << 10);
495 /* for split transactions, SplitXState initialized to zero */
496
497 len = urb->transfer_buffer_length;
498 is_input = usb_pipein (urb->pipe);
499 if (usb_pipecontrol (urb->pipe)) {
500 /* SETUP pid */
501 qtd_fill (qtd, urb->setup_dma, sizeof (struct usb_ctrlrequest),
502 token | (2 /* "setup" */ << 8), 8);
503
504 /* ... and always at least one more pid */
505 token ^= QTD_TOGGLE;
506 qtd_prev = qtd;
507 qtd = ehci_qtd_alloc (ehci, flags);
508 if (unlikely (!qtd))
509 goto cleanup;
510 qtd->urb = urb;
511 qtd_prev->hw_next = QTD_NEXT (qtd->qtd_dma);
512 list_add_tail (&qtd->qtd_list, head);
513 }
514
515 /*
516 * data transfer stage: buffer setup
517 */
518 if (likely (len > 0))
519 buf = urb->transfer_dma;
520 else
521 buf = 0;
522
523 // FIXME this 'buf' check break some zlps...
524 if (!buf || is_input)
525 token |= (1 /* "in" */ << 8);
526 /* else it's already initted to "out" pid (0 << 8) */
527
528 maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
529
530 /*
531 * buffer gets wrapped in one or more qtds;
532 * last one may be "short" (including zero len)
533 * and may serve as a control status ack
534 */
535 for (;;) {
536 int this_qtd_len;
537
538 this_qtd_len = qtd_fill (qtd, buf, len, token, maxpacket);
539 len -= this_qtd_len;
540 buf += this_qtd_len;
541 if (is_input)
542 qtd->hw_alt_next = ehci->async->hw_alt_next;
543
544 /* qh makes control packets use qtd toggle; maybe switch it */
545 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
546 token ^= QTD_TOGGLE;
547
548 if (likely (len <= 0))
549 break;
550
551 qtd_prev = qtd;
552 qtd = ehci_qtd_alloc (ehci, flags);
553 if (unlikely (!qtd))
554 goto cleanup;
555 qtd->urb = urb;
556 qtd_prev->hw_next = QTD_NEXT (qtd->qtd_dma);
557 list_add_tail (&qtd->qtd_list, head);
558 }
559
560 /* unless the bulk/interrupt caller wants a chance to clean
561 * up after short reads, hc should advance qh past this urb
562 */
563 if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
564 || usb_pipecontrol (urb->pipe)))
565 qtd->hw_alt_next = EHCI_LIST_END;
566
567 /*
568 * control requests may need a terminating data "status" ack;
569 * bulk ones may need a terminating short packet (zero length).
570 */
571 if (likely (buf != 0)) {
572 int one_more = 0;
573
574 if (usb_pipecontrol (urb->pipe)) {
575 one_more = 1;
576 token ^= 0x0100; /* "in" <--> "out" */
577 token |= QTD_TOGGLE; /* force DATA1 */
578 } else if (usb_pipebulk (urb->pipe)
579 && (urb->transfer_flags & URB_ZERO_PACKET)
580 && !(urb->transfer_buffer_length % maxpacket)) {
581 one_more = 1;
582 }
583 if (one_more) {
584 qtd_prev = qtd;
585 qtd = ehci_qtd_alloc (ehci, flags);
586 if (unlikely (!qtd))
587 goto cleanup;
588 qtd->urb = urb;
589 qtd_prev->hw_next = QTD_NEXT (qtd->qtd_dma);
590 list_add_tail (&qtd->qtd_list, head);
591
592 /* never any data in such packets */
593 qtd_fill (qtd, 0, 0, token, 0);
594 }
595 }
596
597 /* by default, enable interrupt on urb completion */
598 if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
599 qtd->hw_token |= __constant_cpu_to_le32 (QTD_IOC);
600 return head;
601
602 cleanup:
603 qtd_list_free (ehci, urb, head);
604 return 0;
605 }
606
607 /*-------------------------------------------------------------------------*/
608
609 /*
610 * Hardware maintains data toggle (like OHCI) ... here we (re)initialize
611 * the hardware data toggle in the QH, and set the pseudo-toggle in udev
612 * so we can see if usb_clear_halt() was called. NOP for control, since
613 * we set up qh->hw_info1 to always use the QTD toggle bits.
614 */
615 static inline void
clear_toggle(struct usb_device * udev,int ep,int is_out,struct ehci_qh * qh)616 clear_toggle (struct usb_device *udev, int ep, int is_out, struct ehci_qh *qh)
617 {
618 vdbg ("clear toggle, dev %d ep 0x%x-%s",
619 udev->devnum, ep, is_out ? "out" : "in");
620 qh->hw_token &= ~__constant_cpu_to_le32 (QTD_TOGGLE);
621 usb_settoggle (udev, ep, is_out, 1);
622 }
623
624 // Would be best to create all qh's from config descriptors,
625 // when each interface/altsetting is established. Unlink
626 // any previous qh and cancel its urbs first; endpoints are
627 // implicitly reset then (data toggle too).
628 // That'd mean updating how usbcore talks to HCDs. (2.5?)
629
630
631 /*
632 * Each QH holds a qtd list; a QH is used for everything except iso.
633 *
634 * For interrupt urbs, the scheduler must set the microframe scheduling
635 * mask(s) each time the QH gets scheduled. For highspeed, that's
636 * just one microframe in the s-mask. For split interrupt transactions
637 * there are additional complications: c-mask, maybe FSTNs.
638 */
639 static struct ehci_qh *
qh_make(struct ehci_hcd * ehci,struct urb * urb,int flags)640 qh_make (
641 struct ehci_hcd *ehci,
642 struct urb *urb,
643 int flags
644 ) {
645 struct ehci_qh *qh = ehci_qh_alloc (ehci, flags);
646 u32 info1 = 0, info2 = 0;
647 int is_input, type;
648 int maxp = 0;
649
650 if (!qh)
651 return qh;
652
653 /*
654 * init endpoint/device data for this QH
655 */
656 info1 |= usb_pipeendpoint (urb->pipe) << 8;
657 info1 |= usb_pipedevice (urb->pipe) << 0;
658
659 is_input = usb_pipein (urb->pipe);
660 type = usb_pipetype (urb->pipe);
661 maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
662
663 /* Compute interrupt scheduling parameters just once, and save.
664 * - allowing for high bandwidth, how many nsec/uframe are used?
665 * - split transactions need a second CSPLIT uframe; same question
666 * - splits also need a schedule gap (for full/low speed I/O)
667 * - qh has a polling interval
668 *
669 * For control/bulk requests, the HC or TT handles these.
670 */
671 if (type == PIPE_INTERRUPT) {
672 qh->usecs = usb_calc_bus_time (USB_SPEED_HIGH, is_input, 0,
673 hb_mult (maxp) * max_packet (maxp));
674 qh->start = NO_FRAME;
675
676 if (urb->dev->speed == USB_SPEED_HIGH) {
677 qh->c_usecs = 0;
678 qh->gap_uf = 0;
679
680 /* FIXME handle HS periods of less than 1 frame. */
681 qh->period = urb->interval >> 3;
682 if (qh->period < 1) {
683 dbg ("intr period %d uframes, NYET!",
684 urb->interval);
685 goto done;
686 }
687 } else {
688 /* gap is f(FS/LS transfer times) */
689 qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
690 is_input, 0, maxp) / (125 * 1000);
691
692 /* FIXME this just approximates SPLIT/CSPLIT times */
693 if (is_input) { // SPLIT, gap, CSPLIT+DATA
694 qh->c_usecs = qh->usecs + HS_USECS (0);
695 qh->usecs = HS_USECS (1);
696 } else { // SPLIT+DATA, gap, CSPLIT
697 qh->usecs += HS_USECS (1);
698 qh->c_usecs = HS_USECS (0);
699 }
700
701 qh->period = urb->interval;
702 }
703
704 /* support for tt scheduling */
705 // qh->dev = usb_get_dev (urb->dev);
706 qh->dev = urb->dev;
707 }
708
709 /* using TT? */
710 switch (urb->dev->speed) {
711 case USB_SPEED_LOW:
712 info1 |= (1 << 12); /* EPS "low" */
713 /* FALL THROUGH */
714
715 case USB_SPEED_FULL:
716 /* EPS 0 means "full" */
717 if (type != PIPE_INTERRUPT)
718 info1 |= (EHCI_TUNE_RL_TT << 28);
719 if (type == PIPE_CONTROL) {
720 info1 |= (1 << 27); /* for TT */
721 info1 |= 1 << 14; /* toggle from qtd */
722 }
723 info1 |= maxp << 16;
724
725 info2 |= (EHCI_TUNE_MULT_TT << 30);
726 info2 |= urb->dev->ttport << 23;
727 info2 |= urb->dev->tt->hub->devnum << 16;
728
729 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
730
731 break;
732
733 case USB_SPEED_HIGH: /* no TT involved */
734 info1 |= (2 << 12); /* EPS "high" */
735 if (type == PIPE_CONTROL) {
736 info1 |= (EHCI_TUNE_RL_HS << 28);
737 info1 |= 64 << 16; /* usb2 fixed maxpacket */
738 info1 |= 1 << 14; /* toggle from qtd */
739 info2 |= (EHCI_TUNE_MULT_HS << 30);
740 } else if (type == PIPE_BULK) {
741 info1 |= (EHCI_TUNE_RL_HS << 28);
742 info1 |= 512 << 16; /* usb2 fixed maxpacket */
743 info2 |= (EHCI_TUNE_MULT_HS << 30);
744 } else { /* PIPE_INTERRUPT */
745 info1 |= max_packet (maxp) << 16;
746 info2 |= hb_mult (maxp) << 30;
747 }
748 break;
749 default:
750 dbg ("bogus dev %p speed %d", urb->dev, urb->dev->speed);
751 done:
752 qh_put (ehci, qh);
753 return 0;
754 }
755
756 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
757
758 /* init as live, toggle clear, advance to dummy */
759 qh->qh_state = QH_STATE_IDLE;
760 qh->hw_info1 = cpu_to_le32 (info1);
761 qh->hw_info2 = cpu_to_le32 (info2);
762 usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
763 qh_refresh (ehci, qh);
764 return qh;
765 }
766
767 /*-------------------------------------------------------------------------*/
768
769 /* move qh (and its qtds) onto async queue; maybe enable queue. */
770
qh_link_async(struct ehci_hcd * ehci,struct ehci_qh * qh)771 static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
772 {
773 u32 dma = QH_NEXT (qh->qh_dma);
774 struct ehci_qh *head;
775
776 /* (re)start the async schedule? */
777 head = ehci->async;
778 timer_action_done (ehci, TIMER_ASYNC_OFF);
779 if (!head->qh_next.qh) {
780 u32 cmd = readl (&ehci->regs->command);
781
782 if (!(cmd & CMD_ASE)) {
783 /* in case a clear of CMD_ASE didn't take yet */
784 (void) handshake (&ehci->regs->status, STS_ASS, 0, 150);
785 cmd |= CMD_ASE | CMD_RUN;
786 writel (cmd, &ehci->regs->command);
787 ehci->hcd.state = USB_STATE_RUNNING;
788 /* posted write need not be known to HC yet ... */
789 }
790 }
791
792 /* clear halt and/or toggle; and maybe recover from silicon quirk */
793 if (qh->qh_state == QH_STATE_IDLE)
794 qh_refresh (ehci, qh);
795
796 /* splice right after start */
797 qh->qh_next = head->qh_next;
798 qh->hw_next = head->hw_next;
799 wmb ();
800
801 head->qh_next.qh = qh;
802 head->hw_next = dma;
803
804 qh->qh_state = QH_STATE_LINKED;
805 /* qtd completions reported later by interrupt */
806 }
807
808 /*-------------------------------------------------------------------------*/
809
810 #define QH_ADDR_MASK __constant_le32_to_cpu(0x7f)
811
812 /*
813 * For control/bulk/interrupt, return QH with these TDs appended.
814 * Allocates and initializes the QH if necessary.
815 * Returns null if it can't allocate a QH it needs to.
816 * If the QH has TDs (urbs) already, that's great.
817 */
qh_append_tds(struct ehci_hcd * ehci,struct urb * urb,struct list_head * qtd_list,int epnum,void ** ptr)818 static struct ehci_qh *qh_append_tds (
819 struct ehci_hcd *ehci,
820 struct urb *urb,
821 struct list_head *qtd_list,
822 int epnum,
823 void **ptr
824 )
825 {
826 struct ehci_qh *qh = 0;
827
828 qh = (struct ehci_qh *) *ptr;
829 if (unlikely (qh == 0)) {
830 /* can't sleep here, we have ehci->lock... */
831 qh = qh_make (ehci, urb, SLAB_ATOMIC);
832 *ptr = qh;
833 }
834 if (likely (qh != 0)) {
835 struct ehci_qtd *qtd;
836
837 if (unlikely (list_empty (qtd_list)))
838 qtd = 0;
839 else
840 qtd = list_entry (qtd_list->next, struct ehci_qtd,
841 qtd_list);
842
843 /* control qh may need patching after enumeration */
844 if (unlikely (epnum == 0)) {
845 /* set_address changes the address */
846 if ((qh->hw_info1 & QH_ADDR_MASK) == 0)
847 qh->hw_info1 |= cpu_to_le32 (
848 usb_pipedevice (urb->pipe));
849
850 /* for full speed, ep0 maxpacket can grow */
851 else if (!(qh->hw_info1
852 & __constant_cpu_to_le32 (0x3 << 12))) {
853 u32 info, max;
854
855 info = le32_to_cpu (qh->hw_info1);
856 max = urb->dev->descriptor.bMaxPacketSize0;
857 if (max > (0x07ff & (info >> 16))) {
858 info &= ~(0x07ff << 16);
859 info |= max << 16;
860 qh->hw_info1 = cpu_to_le32 (info);
861 }
862 }
863
864 /* usb_reset_device() briefly reverts to address 0 */
865 if (usb_pipedevice (urb->pipe) == 0)
866 qh->hw_info1 &= ~QH_ADDR_MASK;
867 }
868
869 /* NOTE: changing config or interface setting is not
870 * supported without the 2.5 endpoint disable logic.
871 */
872
873 /* usb_clear_halt() means qh data toggle gets reset */
874 if (unlikely (!usb_gettoggle (urb->dev,
875 (epnum & 0x0f), !(epnum & 0x10)))
876 && !usb_pipecontrol (urb->pipe)) {
877 /* "never happens": drivers do stall cleanup right */
878 if (qh->qh_state != QH_STATE_IDLE
879 && !list_empty (&qh->qtd_list)
880 && qh->qh_state != QH_STATE_COMPLETING)
881 ehci_warn (ehci, "clear toggle dev%d "
882 "ep%d%s: not idle\n",
883 usb_pipedevice (urb->pipe),
884 epnum & 0x0f,
885 usb_pipein (urb->pipe)
886 ? "in" : "out");
887 /* else we know this overlay write is safe */
888 clear_toggle (urb->dev,
889 epnum & 0x0f, !(epnum & 0x10), qh);
890 }
891
892 /* just one way to queue requests: swap with the dummy qtd.
893 * only hc or qh_completions() usually modify the overlay.
894 */
895 if (likely (qtd != 0)) {
896 struct ehci_qtd *dummy;
897 dma_addr_t dma;
898 u32 token;
899
900 /* to avoid racing the HC, use the dummy td instead of
901 * the first td of our list (becomes new dummy). both
902 * tds stay deactivated until we're done, when the
903 * HC is allowed to fetch the old dummy (4.10.2).
904 */
905 token = qtd->hw_token;
906 qtd->hw_token = HALT_BIT;
907 wmb ();
908 dummy = qh->dummy;
909
910 dma = dummy->qtd_dma;
911 *dummy = *qtd;
912 dummy->qtd_dma = dma;
913
914 list_del (&qtd->qtd_list);
915 list_add (&dummy->qtd_list, qtd_list);
916 __list_splice (qtd_list, qh->qtd_list.prev);
917
918 ehci_qtd_init (qtd, qtd->qtd_dma);
919 qh->dummy = qtd;
920
921 /* hc must see the new dummy at list end */
922 dma = qtd->qtd_dma;
923 qtd = list_entry (qh->qtd_list.prev,
924 struct ehci_qtd, qtd_list);
925 qtd->hw_next = QTD_NEXT (dma);
926
927 /* let the hc process these next qtds */
928 wmb ();
929 dummy->hw_token = token;
930
931 urb->hcpriv = qh_get (qh);
932 }
933 }
934 return qh;
935 }
936
937 /*-------------------------------------------------------------------------*/
938
939 static int
submit_async(struct ehci_hcd * ehci,struct urb * urb,struct list_head * qtd_list,int mem_flags)940 submit_async (
941 struct ehci_hcd *ehci,
942 struct urb *urb,
943 struct list_head *qtd_list,
944 int mem_flags
945 ) {
946 struct ehci_qtd *qtd;
947 struct hcd_dev *dev;
948 int epnum;
949 unsigned long flags;
950 struct ehci_qh *qh = 0;
951
952 qtd = list_entry (qtd_list->next, struct ehci_qtd, qtd_list);
953 dev = (struct hcd_dev *)urb->dev->hcpriv;
954 epnum = usb_pipeendpoint (urb->pipe);
955 if (usb_pipein (urb->pipe) && !usb_pipecontrol (urb->pipe))
956 epnum |= 0x10;
957
958 #ifdef EHCI_URB_TRACE
959 ehci_dbg (ehci,
960 "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
961 __FUNCTION__, urb->dev->devpath, urb,
962 epnum & 0x0f, usb_pipein (urb->pipe) ? "in" : "out",
963 urb->transfer_buffer_length,
964 qtd, dev ? dev->ep [epnum] : (void *)~0);
965 #endif
966
967 spin_lock_irqsave (&ehci->lock, flags);
968 qh = qh_append_tds (ehci, urb, qtd_list, epnum, &dev->ep [epnum]);
969
970 /* Control/bulk operations through TTs don't need scheduling,
971 * the HC and TT handle it when the TT has a buffer ready.
972 */
973 if (likely (qh != 0)) {
974 if (likely (qh->qh_state == QH_STATE_IDLE))
975 qh_link_async (ehci, qh_get (qh));
976 }
977 spin_unlock_irqrestore (&ehci->lock, flags);
978 if (unlikely (qh == 0)) {
979 qtd_list_free (ehci, urb, qtd_list);
980 return -ENOMEM;
981 }
982 return 0;
983 }
984
985 /*-------------------------------------------------------------------------*/
986
987 /* the async qh for the qtds being reclaimed are now unlinked from the HC */
988
end_unlink_async(struct ehci_hcd * ehci,struct pt_regs * regs)989 static void end_unlink_async (struct ehci_hcd *ehci, struct pt_regs *regs)
990 {
991 struct ehci_qh *qh = ehci->reclaim;
992 struct ehci_qh *next;
993
994 timer_action_done (ehci, TIMER_IAA_WATCHDOG);
995
996 // qh->hw_next = cpu_to_le32 (qh->qh_dma);
997 qh->qh_state = QH_STATE_IDLE;
998 qh->qh_next.qh = 0;
999 qh_put (ehci, qh); // refcount from reclaim
1000
1001 /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
1002 next = qh->reclaim;
1003 ehci->reclaim = next;
1004 ehci->reclaim_ready = 0;
1005 qh->reclaim = 0;
1006
1007 qh_completions (ehci, qh, regs);
1008
1009 if (!list_empty (&qh->qtd_list)
1010 && HCD_IS_RUNNING (ehci->hcd.state))
1011 qh_link_async (ehci, qh);
1012 else {
1013 qh_put (ehci, qh); // refcount from async list
1014
1015 /* it's not free to turn the async schedule on/off; leave it
1016 * active but idle for a while once it empties.
1017 */
1018 if (HCD_IS_RUNNING (ehci->hcd.state)
1019 && ehci->async->qh_next.qh == 0)
1020 timer_action (ehci, TIMER_ASYNC_OFF);
1021 }
1022
1023 if (next) {
1024 ehci->reclaim = 0;
1025 start_unlink_async (ehci, next);
1026 }
1027 }
1028
1029 /* makes sure the async qh will become idle */
1030 /* caller must own ehci->lock */
1031
start_unlink_async(struct ehci_hcd * ehci,struct ehci_qh * qh)1032 static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
1033 {
1034 int cmd = readl (&ehci->regs->command);
1035 struct ehci_qh *prev;
1036
1037 #ifdef DEBUG
1038 if (ehci->reclaim
1039 || (qh->qh_state != QH_STATE_LINKED
1040 && qh->qh_state != QH_STATE_UNLINK_WAIT)
1041 #ifdef CONFIG_SMP
1042 // this macro lies except on SMP compiles
1043 || !spin_is_locked (&ehci->lock)
1044 #endif
1045 )
1046 BUG ();
1047 #endif
1048
1049 /* stop async schedule right now? */
1050 if (unlikely (qh == ehci->async)) {
1051 /* can't get here without STS_ASS set */
1052 if (ehci->hcd.state != USB_STATE_HALT) {
1053 writel (cmd & ~CMD_ASE, &ehci->regs->command);
1054 wmb ();
1055 // handshake later, if we need to
1056 }
1057 timer_action_done (ehci, TIMER_ASYNC_OFF);
1058 return;
1059 }
1060
1061 qh->qh_state = QH_STATE_UNLINK;
1062 ehci->reclaim = qh = qh_get (qh);
1063
1064 prev = ehci->async;
1065 while (prev->qh_next.qh != qh)
1066 prev = prev->qh_next.qh;
1067
1068 prev->hw_next = qh->hw_next;
1069 prev->qh_next = qh->qh_next;
1070 wmb ();
1071
1072 if (unlikely (ehci->hcd.state == USB_STATE_HALT)) {
1073 /* if (unlikely (qh->reclaim != 0))
1074 * this will recurse, probably not much
1075 */
1076 end_unlink_async (ehci, NULL);
1077 return;
1078 }
1079
1080 ehci->reclaim_ready = 0;
1081 cmd |= CMD_IAAD;
1082 writel (cmd, &ehci->regs->command);
1083 (void) readl (&ehci->regs->command);
1084 timer_action (ehci, TIMER_IAA_WATCHDOG);
1085 }
1086
1087 /*-------------------------------------------------------------------------*/
1088
1089 static void
scan_async(struct ehci_hcd * ehci,struct pt_regs * regs)1090 scan_async (struct ehci_hcd *ehci, struct pt_regs *regs)
1091 {
1092 struct ehci_qh *qh;
1093 enum ehci_timer_action action = TIMER_IO_WATCHDOG;
1094
1095 if (!++(ehci->stamp))
1096 ehci->stamp++;
1097 timer_action_done (ehci, TIMER_ASYNC_SHRINK);
1098 rescan:
1099 qh = ehci->async->qh_next.qh;
1100 if (likely (qh != 0)) {
1101 do {
1102 /* clean any finished work for this qh */
1103 if (!list_empty (&qh->qtd_list)
1104 && qh->stamp != ehci->stamp) {
1105 int temp;
1106
1107 /* unlinks could happen here; completion
1108 * reporting drops the lock. rescan using
1109 * the latest schedule, but don't rescan
1110 * qhs we already finished (no looping).
1111 */
1112 qh = qh_get (qh);
1113 qh->stamp = ehci->stamp;
1114 temp = qh_completions (ehci, qh, regs);
1115 qh_put (ehci, qh);
1116 if (temp != 0) {
1117 goto rescan;
1118 }
1119 }
1120
1121 /* unlink idle entries, reducing HC PCI usage as well
1122 * as HCD schedule-scanning costs. delay for any qh
1123 * we just scanned, there's a not-unusual case that it
1124 * doesn't stay idle for long.
1125 * (plus, avoids some kind of re-activation race.)
1126 */
1127 if (list_empty (&qh->qtd_list)) {
1128 if (qh->stamp == ehci->stamp)
1129 action = TIMER_ASYNC_SHRINK;
1130 else if (!ehci->reclaim
1131 && qh->qh_state == QH_STATE_LINKED)
1132 start_unlink_async (ehci, qh);
1133 }
1134
1135 qh = qh->qh_next.qh;
1136 } while (qh);
1137 }
1138 if (action == TIMER_ASYNC_SHRINK)
1139 timer_action (ehci, TIMER_ASYNC_SHRINK);
1140 }
1141