1 /*
2 * Copyright (C) 2010 Bluecherry, LLC www.bluecherrydvr.com
3 * Copyright (C) 2010 Ben Collins <bcollins@bluecherry.net>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 */
19
20 #include <linux/kernel.h>
21 #include <linux/scatterlist.h>
22 #include "solo6x10.h"
23
24 /* #define SOLO_TEST_P2M */
25
solo_p2m_dma(struct solo_dev * solo_dev,u8 id,int wr,void * sys_addr,u32 ext_addr,u32 size)26 int solo_p2m_dma(struct solo_dev *solo_dev, u8 id, int wr,
27 void *sys_addr, u32 ext_addr, u32 size)
28 {
29 dma_addr_t dma_addr;
30 int ret;
31
32 WARN_ON(!size);
33 BUG_ON(id >= SOLO_NR_P2M);
34
35 if (!size)
36 return -EINVAL;
37
38 dma_addr = pci_map_single(solo_dev->pdev, sys_addr, size,
39 wr ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
40
41 ret = solo_p2m_dma_t(solo_dev, id, wr, dma_addr, ext_addr, size);
42
43 pci_unmap_single(solo_dev->pdev, dma_addr, size,
44 wr ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
45
46 return ret;
47 }
48
solo_p2m_dma_t(struct solo_dev * solo_dev,u8 id,int wr,dma_addr_t dma_addr,u32 ext_addr,u32 size)49 int solo_p2m_dma_t(struct solo_dev *solo_dev, u8 id, int wr,
50 dma_addr_t dma_addr, u32 ext_addr, u32 size)
51 {
52 struct p2m_desc *desc = kzalloc(sizeof(*desc) * 2, GFP_DMA);
53 int ret;
54
55 if (desc == NULL)
56 return -ENOMEM;
57
58 solo_p2m_push_desc(&desc[1], wr, dma_addr, ext_addr, size, 0, 0);
59 ret = solo_p2m_dma_desc(solo_dev, id, desc, 2);
60 kfree(desc);
61
62 return ret;
63 }
64
solo_p2m_push_desc(struct p2m_desc * desc,int wr,dma_addr_t dma_addr,u32 ext_addr,u32 size,int repeat,u32 ext_size)65 void solo_p2m_push_desc(struct p2m_desc *desc, int wr, dma_addr_t dma_addr,
66 u32 ext_addr, u32 size, int repeat, u32 ext_size)
67 {
68 desc->ta = cpu_to_le32(dma_addr);
69 desc->fa = cpu_to_le32(ext_addr);
70
71 desc->ext = cpu_to_le32(SOLO_P2M_COPY_SIZE(size >> 2));
72 desc->ctrl = cpu_to_le32(SOLO_P2M_BURST_SIZE(SOLO_P2M_BURST_256) |
73 (wr ? SOLO_P2M_WRITE : 0) | SOLO_P2M_TRANS_ON);
74
75 /* Ext size only matters when we're repeating */
76 if (repeat) {
77 desc->ext |= cpu_to_le32(SOLO_P2M_EXT_INC(ext_size >> 2));
78 desc->ctrl |= cpu_to_le32(SOLO_P2M_PCI_INC(size >> 2) |
79 SOLO_P2M_REPEAT(repeat));
80 }
81 }
82
solo_p2m_dma_desc(struct solo_dev * solo_dev,u8 id,struct p2m_desc * desc,int desc_count)83 int solo_p2m_dma_desc(struct solo_dev *solo_dev, u8 id,
84 struct p2m_desc *desc, int desc_count)
85 {
86 struct solo_p2m_dev *p2m_dev;
87 unsigned int timeout;
88 int ret = 0;
89 u32 config = 0;
90 dma_addr_t desc_dma = 0;
91
92 BUG_ON(id >= SOLO_NR_P2M);
93 BUG_ON(!desc_count || desc_count > SOLO_NR_P2M_DESC);
94
95 p2m_dev = &solo_dev->p2m_dev[id];
96
97 mutex_lock(&p2m_dev->mutex);
98
99 solo_reg_write(solo_dev, SOLO_P2M_CONTROL(id), 0);
100
101 INIT_COMPLETION(p2m_dev->completion);
102 p2m_dev->error = 0;
103
104 /* Enable the descriptors */
105 config = solo_reg_read(solo_dev, SOLO_P2M_CONFIG(id));
106 desc_dma = pci_map_single(solo_dev->pdev, desc,
107 desc_count * sizeof(*desc),
108 PCI_DMA_TODEVICE);
109 solo_reg_write(solo_dev, SOLO_P2M_DES_ADR(id), desc_dma);
110 solo_reg_write(solo_dev, SOLO_P2M_DESC_ID(id), desc_count - 1);
111 solo_reg_write(solo_dev, SOLO_P2M_CONFIG(id), config |
112 SOLO_P2M_DESC_MODE);
113
114 /* Should have all descriptors completed from one interrupt */
115 timeout = wait_for_completion_timeout(&p2m_dev->completion, HZ);
116
117 solo_reg_write(solo_dev, SOLO_P2M_CONTROL(id), 0);
118
119 /* Reset back to non-descriptor mode */
120 solo_reg_write(solo_dev, SOLO_P2M_CONFIG(id), config);
121 solo_reg_write(solo_dev, SOLO_P2M_DESC_ID(id), 0);
122 solo_reg_write(solo_dev, SOLO_P2M_DES_ADR(id), 0);
123 pci_unmap_single(solo_dev->pdev, desc_dma,
124 desc_count * sizeof(*desc),
125 PCI_DMA_TODEVICE);
126
127 if (p2m_dev->error)
128 ret = -EIO;
129 else if (timeout == 0)
130 ret = -EAGAIN;
131
132 mutex_unlock(&p2m_dev->mutex);
133
134 WARN_ON_ONCE(ret);
135
136 return ret;
137 }
138
solo_p2m_dma_sg(struct solo_dev * solo_dev,u8 id,struct p2m_desc * pdesc,int wr,struct scatterlist * sg,u32 sg_off,u32 ext_addr,u32 size)139 int solo_p2m_dma_sg(struct solo_dev *solo_dev, u8 id,
140 struct p2m_desc *pdesc, int wr,
141 struct scatterlist *sg, u32 sg_off,
142 u32 ext_addr, u32 size)
143 {
144 int i;
145 int idx;
146
147 BUG_ON(id >= SOLO_NR_P2M);
148
149 if (WARN_ON_ONCE(!size))
150 return -EINVAL;
151
152 memset(pdesc, 0, sizeof(*pdesc));
153
154 /* Should rewrite this to handle > SOLO_NR_P2M_DESC transactions */
155 for (i = 0, idx = 1; idx < SOLO_NR_P2M_DESC && sg && size > 0;
156 i++, sg = sg_next(sg)) {
157 struct p2m_desc *desc = &pdesc[idx];
158 u32 sg_len = sg_dma_len(sg);
159 u32 len;
160
161 if (sg_off >= sg_len) {
162 sg_off -= sg_len;
163 continue;
164 }
165
166 sg_len -= sg_off;
167 len = min(sg_len, size);
168
169 solo_p2m_push_desc(desc, wr, sg_dma_address(sg) + sg_off,
170 ext_addr, len, 0, 0);
171
172 size -= len;
173 ext_addr += len;
174 idx++;
175
176 sg_off = 0;
177 }
178
179 WARN_ON_ONCE(size || i >= SOLO_NR_P2M_DESC);
180
181 return solo_p2m_dma_desc(solo_dev, id, pdesc, idx);
182 }
183
184 #ifdef SOLO_TEST_P2M
185
186 #define P2M_TEST_CHAR 0xbe
187
p2m_test(struct solo_dev * solo_dev,u8 id,u32 base,int size)188 static unsigned long long p2m_test(struct solo_dev *solo_dev, u8 id,
189 u32 base, int size)
190 {
191 u8 *wr_buf;
192 u8 *rd_buf;
193 int i;
194 unsigned long long err_cnt = 0;
195
196 wr_buf = kmalloc(size, GFP_KERNEL);
197 if (!wr_buf) {
198 printk(SOLO6X10_NAME ": Failed to malloc for p2m_test\n");
199 return size;
200 }
201
202 rd_buf = kmalloc(size, GFP_KERNEL);
203 if (!rd_buf) {
204 printk(SOLO6X10_NAME ": Failed to malloc for p2m_test\n");
205 kfree(wr_buf);
206 return size;
207 }
208
209 memset(wr_buf, P2M_TEST_CHAR, size);
210 memset(rd_buf, P2M_TEST_CHAR + 1, size);
211
212 solo_p2m_dma(solo_dev, id, 1, wr_buf, base, size);
213 solo_p2m_dma(solo_dev, id, 0, rd_buf, base, size);
214
215 for (i = 0; i < size; i++)
216 if (wr_buf[i] != rd_buf[i])
217 err_cnt++;
218
219 kfree(wr_buf);
220 kfree(rd_buf);
221
222 return err_cnt;
223 }
224
225 #define TEST_CHUNK_SIZE (8 * 1024)
226
run_p2m_test(struct solo_dev * solo_dev)227 static void run_p2m_test(struct solo_dev *solo_dev)
228 {
229 unsigned long long errs = 0;
230 u32 size = SOLO_JPEG_EXT_ADDR(solo_dev) + SOLO_JPEG_EXT_SIZE(solo_dev);
231 int i, d;
232
233 printk(KERN_WARNING "%s: Testing %u bytes of external ram\n",
234 SOLO6X10_NAME, size);
235
236 for (i = 0; i < size; i += TEST_CHUNK_SIZE)
237 for (d = 0; d < 4; d++)
238 errs += p2m_test(solo_dev, d, i, TEST_CHUNK_SIZE);
239
240 printk(KERN_WARNING "%s: Found %llu errors during p2m test\n",
241 SOLO6X10_NAME, errs);
242
243 return;
244 }
245 #else
246 #define run_p2m_test(__solo) do {} while (0)
247 #endif
248
solo_p2m_isr(struct solo_dev * solo_dev,int id)249 void solo_p2m_isr(struct solo_dev *solo_dev, int id)
250 {
251 struct solo_p2m_dev *p2m_dev = &solo_dev->p2m_dev[id];
252
253 solo_reg_write(solo_dev, SOLO_IRQ_STAT, SOLO_IRQ_P2M(id));
254
255 complete(&p2m_dev->completion);
256 }
257
solo_p2m_error_isr(struct solo_dev * solo_dev,u32 status)258 void solo_p2m_error_isr(struct solo_dev *solo_dev, u32 status)
259 {
260 struct solo_p2m_dev *p2m_dev;
261 int i;
262
263 if (!(status & SOLO_PCI_ERR_P2M))
264 return;
265
266 for (i = 0; i < SOLO_NR_P2M; i++) {
267 p2m_dev = &solo_dev->p2m_dev[i];
268 p2m_dev->error = 1;
269 solo_reg_write(solo_dev, SOLO_P2M_CONTROL(i), 0);
270 complete(&p2m_dev->completion);
271 }
272 }
273
solo_p2m_exit(struct solo_dev * solo_dev)274 void solo_p2m_exit(struct solo_dev *solo_dev)
275 {
276 int i;
277
278 for (i = 0; i < SOLO_NR_P2M; i++)
279 solo_irq_off(solo_dev, SOLO_IRQ_P2M(i));
280 }
281
solo_p2m_init(struct solo_dev * solo_dev)282 int solo_p2m_init(struct solo_dev *solo_dev)
283 {
284 struct solo_p2m_dev *p2m_dev;
285 int i;
286
287 for (i = 0; i < SOLO_NR_P2M; i++) {
288 p2m_dev = &solo_dev->p2m_dev[i];
289
290 mutex_init(&p2m_dev->mutex);
291 init_completion(&p2m_dev->completion);
292
293 solo_reg_write(solo_dev, SOLO_P2M_CONTROL(i), 0);
294 solo_reg_write(solo_dev, SOLO_P2M_CONFIG(i),
295 SOLO_P2M_CSC_16BIT_565 |
296 SOLO_P2M_DMA_INTERVAL(3) |
297 SOLO_P2M_DESC_INTR_OPT |
298 SOLO_P2M_PCI_MASTER_MODE);
299 solo_irq_on(solo_dev, SOLO_IRQ_P2M(i));
300 }
301
302 run_p2m_test(solo_dev);
303
304 return 0;
305 }
306