1 /*
2 *
3 * This file is subject to the terms and conditions of the GNU General Public
4 * License. See the file "COPYING" in the main directory of this archive
5 * for more details.
6 *
7 * Copyright (C) 2001-2003 Silicon Graphics, Inc. All rights reserved.
8 *
9 */
10
11 #include <asm/pgalloc.h>
12
13 /**
14 * sn_flush_all_caches - flush a range of address from all caches (incl. L4)
15 * @flush_addr: identity mapped region 7 address to start flushing
16 * @bytes: number of bytes to flush
17 *
18 * Flush a range of addresses from all caches including L4.
19 * All addresses fully or partially contained within
20 * @flush_addr to @flush_addr + @bytes are flushed
21 * from the all caches.
22 */
23 void
sn_flush_all_caches(long flush_addr,long bytes)24 sn_flush_all_caches(long flush_addr, long bytes)
25 {
26 /*
27 * The following double call to flush_icache_range has
28 * the following effect which is required:
29 *
30 * The first flush_icache_range ensures the fc() address
31 * is visible on the FSB. The NUMA controller however has
32 * not necessarily forwarded the fc() request to all other
33 * NUMA controllers. The second call will stall
34 * at the associated fc() instruction until the first
35 * has been forwarded to all other NUMA controllers.
36 */
37 flush_icache_range(flush_addr, flush_addr+bytes);
38 flush_icache_range(flush_addr, flush_addr+bytes);
39 mb();
40 }
41