1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 1992 - 1997, 2000-2006 Silicon Graphics, Inc. All rights reserved.
7  */
8 
9 #include <linux/slab.h>
10 #include <linux/export.h>
11 #include <asm/sn/types.h>
12 #include <asm/sn/addrs.h>
13 #include <asm/sn/io.h>
14 #include <asm/sn/module.h>
15 #include <asm/sn/intr.h>
16 #include <asm/sn/pcibus_provider_defs.h>
17 #include <asm/sn/pcidev.h>
18 #include <asm/sn/sn_sal.h>
19 #include "xtalk/hubdev.h"
20 
21 /*
22  * The code in this file will only be executed when running with
23  * a PROM that does _not_ have base ACPI IO support.
24  * (i.e., SN_ACPI_BASE_SUPPORT() == 0)
25  */
26 
27 static int max_segment_number;		 /* Default highest segment number */
28 static int max_pcibus_number = 255;	/* Default highest pci bus number */
29 
30 
31 /*
32  * Retrieve the hub device info structure for the given nasid.
33  */
sal_get_hubdev_info(u64 handle,u64 address)34 static inline u64 sal_get_hubdev_info(u64 handle, u64 address)
35 {
36 	struct ia64_sal_retval ret_stuff;
37 	ret_stuff.status = 0;
38 	ret_stuff.v0 = 0;
39 
40 	SAL_CALL_NOLOCK(ret_stuff,
41 			(u64) SN_SAL_IOIF_GET_HUBDEV_INFO,
42 			(u64) handle, (u64) address, 0, 0, 0, 0, 0);
43 	return ret_stuff.v0;
44 }
45 
46 /*
47  * Retrieve the pci bus information given the bus number.
48  */
sal_get_pcibus_info(u64 segment,u64 busnum,u64 address)49 static inline u64 sal_get_pcibus_info(u64 segment, u64 busnum, u64 address)
50 {
51 	struct ia64_sal_retval ret_stuff;
52 	ret_stuff.status = 0;
53 	ret_stuff.v0 = 0;
54 
55 	SAL_CALL_NOLOCK(ret_stuff,
56 			(u64) SN_SAL_IOIF_GET_PCIBUS_INFO,
57 			(u64) segment, (u64) busnum, (u64) address, 0, 0, 0, 0);
58 	return ret_stuff.v0;
59 }
60 
61 /*
62  * Retrieve the pci device information given the bus and device|function number.
63  */
64 static inline u64
sal_get_pcidev_info(u64 segment,u64 bus_number,u64 devfn,u64 pci_dev,u64 sn_irq_info)65 sal_get_pcidev_info(u64 segment, u64 bus_number, u64 devfn, u64 pci_dev,
66 		    u64 sn_irq_info)
67 {
68 	struct ia64_sal_retval ret_stuff;
69 	ret_stuff.status = 0;
70 	ret_stuff.v0 = 0;
71 
72 	SAL_CALL_NOLOCK(ret_stuff,
73 			(u64) SN_SAL_IOIF_GET_PCIDEV_INFO,
74 			(u64) segment, (u64) bus_number, (u64) devfn,
75 			(u64) pci_dev,
76 			sn_irq_info, 0, 0);
77 	return ret_stuff.v0;
78 }
79 
80 
81 /*
82  * sn_fixup_ionodes() - This routine initializes the HUB data structure for
83  *			each node in the system. This function is only
84  *			executed when running with a non-ACPI capable PROM.
85  */
sn_fixup_ionodes(void)86 static void __init sn_fixup_ionodes(void)
87 {
88 
89 	struct hubdev_info *hubdev;
90 	u64 status;
91 	u64 nasid;
92 	int i;
93 	extern void sn_common_hubdev_init(struct hubdev_info *);
94 
95 	/*
96 	 * Get SGI Specific HUB chipset information.
97 	 * Inform Prom that this kernel can support domain bus numbering.
98 	 */
99 	for (i = 0; i < num_cnodes; i++) {
100 		hubdev = (struct hubdev_info *)(NODEPDA(i)->pdinfo);
101 		nasid = cnodeid_to_nasid(i);
102 		hubdev->max_segment_number = 0xffffffff;
103 		hubdev->max_pcibus_number = 0xff;
104 		status = sal_get_hubdev_info(nasid, (u64) __pa(hubdev));
105 		if (status)
106 			continue;
107 
108 		/* Save the largest Domain and pcibus numbers found. */
109 		if (hubdev->max_segment_number) {
110 			/*
111 			 * Dealing with a Prom that supports segments.
112 			 */
113 			max_segment_number = hubdev->max_segment_number;
114 			max_pcibus_number = hubdev->max_pcibus_number;
115 		}
116 		sn_common_hubdev_init(hubdev);
117 	}
118 }
119 
120 /*
121  * sn_pci_legacy_window_fixup - Create PCI controller windows for
122  *				legacy IO and MEM space. This needs to
123  *				be done here, as the PROM does not have
124  *				ACPI support defining the root buses
125  *				and their resources (_CRS),
126  */
127 static void
sn_legacy_pci_window_fixup(struct pci_controller * controller,u64 legacy_io,u64 legacy_mem)128 sn_legacy_pci_window_fixup(struct pci_controller *controller,
129 			   u64 legacy_io, u64 legacy_mem)
130 {
131 		controller->window = kcalloc(2, sizeof(struct pci_window),
132 					     GFP_KERNEL);
133 		BUG_ON(controller->window == NULL);
134 		controller->window[0].offset = legacy_io;
135 		controller->window[0].resource.name = "legacy_io";
136 		controller->window[0].resource.flags = IORESOURCE_IO;
137 		controller->window[0].resource.start = legacy_io;
138 		controller->window[0].resource.end =
139 	    			controller->window[0].resource.start + 0xffff;
140 		controller->window[0].resource.parent = &ioport_resource;
141 		controller->window[1].offset = legacy_mem;
142 		controller->window[1].resource.name = "legacy_mem";
143 		controller->window[1].resource.flags = IORESOURCE_MEM;
144 		controller->window[1].resource.start = legacy_mem;
145 		controller->window[1].resource.end =
146 	    	       controller->window[1].resource.start + (1024 * 1024) - 1;
147 		controller->window[1].resource.parent = &iomem_resource;
148 		controller->windows = 2;
149 }
150 
151 /*
152  * sn_pci_window_fixup() - Create a pci_window for each device resource.
153  *			   It will setup pci_windows for use by
154  *			   pcibios_bus_to_resource(), pcibios_resource_to_bus(),
155  *			   etc.
156  */
157 static void
sn_pci_window_fixup(struct pci_dev * dev,unsigned int count,s64 * pci_addrs)158 sn_pci_window_fixup(struct pci_dev *dev, unsigned int count,
159 		    s64 * pci_addrs)
160 {
161 	struct pci_controller *controller = PCI_CONTROLLER(dev->bus);
162 	unsigned int i;
163 	unsigned int idx;
164 	unsigned int new_count;
165 	struct pci_window *new_window;
166 
167 	if (count == 0)
168 		return;
169 	idx = controller->windows;
170 	new_count = controller->windows + count;
171 	new_window = kcalloc(new_count, sizeof(struct pci_window), GFP_KERNEL);
172 	BUG_ON(new_window == NULL);
173 	if (controller->window) {
174 		memcpy(new_window, controller->window,
175 		       sizeof(struct pci_window) * controller->windows);
176 		kfree(controller->window);
177 	}
178 
179 	/* Setup a pci_window for each device resource. */
180 	for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
181 		if (pci_addrs[i] == -1)
182 			continue;
183 
184 		new_window[idx].offset = dev->resource[i].start - pci_addrs[i];
185 		new_window[idx].resource = dev->resource[i];
186 		idx++;
187 	}
188 
189 	controller->windows = new_count;
190 	controller->window = new_window;
191 }
192 
193 /*
194  * sn_io_slot_fixup() -   We are not running with an ACPI capable PROM,
195  *			  and need to convert the pci_dev->resource
196  *			  'start' and 'end' addresses to mapped addresses,
197  *			  and setup the pci_controller->window array entries.
198  */
199 void
sn_io_slot_fixup(struct pci_dev * dev)200 sn_io_slot_fixup(struct pci_dev *dev)
201 {
202 	unsigned int count = 0;
203 	int idx;
204 	s64 pci_addrs[PCI_ROM_RESOURCE + 1];
205 	unsigned long addr, end, size, start;
206 	struct pcidev_info *pcidev_info;
207 	struct sn_irq_info *sn_irq_info;
208 	int status;
209 
210 	pcidev_info = kzalloc(sizeof(struct pcidev_info), GFP_KERNEL);
211 	if (!pcidev_info)
212 		panic("%s: Unable to alloc memory for pcidev_info", __func__);
213 
214 	sn_irq_info = kzalloc(sizeof(struct sn_irq_info), GFP_KERNEL);
215 	if (!sn_irq_info)
216 		panic("%s: Unable to alloc memory for sn_irq_info", __func__);
217 
218 	/* Call to retrieve pci device information needed by kernel. */
219 	status = sal_get_pcidev_info((u64) pci_domain_nr(dev),
220 		(u64) dev->bus->number,
221 		dev->devfn,
222 		(u64) __pa(pcidev_info),
223 		(u64) __pa(sn_irq_info));
224 
225 	BUG_ON(status); /* Cannot get platform pci device information */
226 
227 
228 	/* Copy over PIO Mapped Addresses */
229 	for (idx = 0; idx <= PCI_ROM_RESOURCE; idx++) {
230 
231 		if (!pcidev_info->pdi_pio_mapped_addr[idx]) {
232 			pci_addrs[idx] = -1;
233 			continue;
234 		}
235 
236 		start = dev->resource[idx].start;
237 		end = dev->resource[idx].end;
238 		size = end - start;
239 		if (size == 0) {
240 			pci_addrs[idx] = -1;
241 			continue;
242 		}
243 		pci_addrs[idx] = start;
244 		count++;
245 		addr = pcidev_info->pdi_pio_mapped_addr[idx];
246 		addr = ((addr << 4) >> 4) | __IA64_UNCACHED_OFFSET;
247 		dev->resource[idx].start = addr;
248 		dev->resource[idx].end = addr + size;
249 
250 		/*
251 		 * if it's already in the device structure, remove it before
252 		 * inserting
253 		 */
254 		if (dev->resource[idx].parent && dev->resource[idx].parent->child)
255 			release_resource(&dev->resource[idx]);
256 
257 		if (dev->resource[idx].flags & IORESOURCE_IO)
258 			insert_resource(&ioport_resource, &dev->resource[idx]);
259 		else
260 			insert_resource(&iomem_resource, &dev->resource[idx]);
261 		/*
262 		 * If ROM, set the actual ROM image size, and mark as
263 		 * shadowed in PROM.
264 		 */
265 		if (idx == PCI_ROM_RESOURCE) {
266 			size_t image_size;
267 			void __iomem *rom;
268 
269 			rom = ioremap(pci_resource_start(dev, PCI_ROM_RESOURCE),
270 				      size + 1);
271 			image_size = pci_get_rom_size(dev, rom, size + 1);
272 			dev->resource[PCI_ROM_RESOURCE].end =
273 				dev->resource[PCI_ROM_RESOURCE].start +
274 				image_size - 1;
275 			dev->resource[PCI_ROM_RESOURCE].flags |=
276 						 IORESOURCE_ROM_BIOS_COPY;
277 		}
278 	}
279 	/* Create a pci_window in the pci_controller struct for
280 	 * each device resource.
281 	 */
282 	if (count > 0)
283 		sn_pci_window_fixup(dev, count, pci_addrs);
284 
285 	sn_pci_fixup_slot(dev, pcidev_info, sn_irq_info);
286 }
287 
288 EXPORT_SYMBOL(sn_io_slot_fixup);
289 
290 /*
291  * sn_pci_controller_fixup() - This routine sets up a bus's resources
292  *			       consistent with the Linux PCI abstraction layer.
293  */
294 static void __init
sn_pci_controller_fixup(int segment,int busnum,struct pci_bus * bus)295 sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus)
296 {
297 	s64 status = 0;
298 	struct pci_controller *controller;
299 	struct pcibus_bussoft *prom_bussoft_ptr;
300 	LIST_HEAD(resources);
301 	int i;
302 
303  	status = sal_get_pcibus_info((u64) segment, (u64) busnum,
304  				     (u64) ia64_tpa(&prom_bussoft_ptr));
305  	if (status > 0)
306 		return;		/*bus # does not exist */
307 	prom_bussoft_ptr = __va(prom_bussoft_ptr);
308 
309 	controller = kzalloc(sizeof(*controller), GFP_KERNEL);
310 	BUG_ON(!controller);
311 	controller->segment = segment;
312 
313 	/*
314 	 * Temporarily save the prom_bussoft_ptr for use by sn_bus_fixup().
315 	 * (platform_data will be overwritten later in sn_common_bus_fixup())
316 	 */
317 	controller->platform_data = prom_bussoft_ptr;
318 
319 	sn_legacy_pci_window_fixup(controller,
320 				   prom_bussoft_ptr->bs_legacy_io,
321 				   prom_bussoft_ptr->bs_legacy_mem);
322 	for (i = 0; i < controller->windows; i++)
323 		pci_add_resource_offset(&resources,
324 					&controller->window[i].resource,
325 					controller->window[i].offset);
326 	bus = pci_scan_root_bus(NULL, busnum, &pci_root_ops, controller,
327 				&resources);
328  	if (bus == NULL)
329  		goto error_return; /* error, or bus already scanned */
330 
331 	bus->sysdata = controller;
332 
333 	return;
334 
335 error_return:
336 
337 	kfree(controller);
338 	return;
339 }
340 
341 /*
342  * sn_bus_fixup
343  */
344 void
sn_bus_fixup(struct pci_bus * bus)345 sn_bus_fixup(struct pci_bus *bus)
346 {
347 	struct pci_dev *pci_dev = NULL;
348 	struct pcibus_bussoft *prom_bussoft_ptr;
349 
350 	if (!bus->parent) {  /* If root bus */
351 		prom_bussoft_ptr = PCI_CONTROLLER(bus)->platform_data;
352 		if (prom_bussoft_ptr == NULL) {
353 			printk(KERN_ERR
354 			       "sn_bus_fixup: 0x%04x:0x%02x Unable to "
355 			       "obtain prom_bussoft_ptr\n",
356 			       pci_domain_nr(bus), bus->number);
357 			return;
358 		}
359 		sn_common_bus_fixup(bus, prom_bussoft_ptr);
360         }
361         list_for_each_entry(pci_dev, &bus->devices, bus_list) {
362                 sn_io_slot_fixup(pci_dev);
363         }
364 
365 }
366 
367 /*
368  * sn_io_init - PROM does not have ACPI support to define nodes or root buses,
369  *		so we need to do things the hard way, including initiating the
370  *		bus scanning ourselves.
371  */
372 
sn_io_init(void)373 void __init sn_io_init(void)
374 {
375 	int i, j;
376 
377 	sn_fixup_ionodes();
378 
379 	/* busses are not known yet ... */
380 	for (i = 0; i <= max_segment_number; i++)
381 		for (j = 0; j <= max_pcibus_number; j++)
382 			sn_pci_controller_fixup(i, j, NULL);
383 }
384