1 /* two abstractions specific to kernel/smpboot.c, mainly to cater to visws
2  * which needs to alter them. */
3 
smpboot_clear_io_apic_irqs(void)4 static inline void smpboot_clear_io_apic_irqs(void)
5 {
6 #ifdef CONFIG_X86_IO_APIC
7 	io_apic_irqs = 0;
8 #endif
9 }
10 
smpboot_setup_warm_reset_vector(unsigned long start_eip)11 static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip)
12 {
13 	unsigned long flags;
14 
15 	spin_lock_irqsave(&rtc_lock, flags);
16 	CMOS_WRITE(0xa, 0xf);
17 	spin_unlock_irqrestore(&rtc_lock, flags);
18 	local_flush_tlb();
19 	pr_debug("1.\n");
20 	*((volatile unsigned short *)phys_to_virt(apic->trampoline_phys_high)) =
21 								 start_eip >> 4;
22 	pr_debug("2.\n");
23 	*((volatile unsigned short *)phys_to_virt(apic->trampoline_phys_low)) =
24 							 start_eip & 0xf;
25 	pr_debug("3.\n");
26 }
27 
smpboot_restore_warm_reset_vector(void)28 static inline void smpboot_restore_warm_reset_vector(void)
29 {
30 	unsigned long flags;
31 
32 	/*
33 	 * Install writable page 0 entry to set BIOS data area.
34 	 */
35 	local_flush_tlb();
36 
37 	/*
38 	 * Paranoid:  Set warm reset code and vector here back
39 	 * to default values.
40 	 */
41 	spin_lock_irqsave(&rtc_lock, flags);
42 	CMOS_WRITE(0, 0xf);
43 	spin_unlock_irqrestore(&rtc_lock, flags);
44 
45 	*((volatile u32 *)phys_to_virt(apic->trampoline_phys_low)) = 0;
46 }
47 
smpboot_setup_io_apic(void)48 static inline void __init smpboot_setup_io_apic(void)
49 {
50 #ifdef CONFIG_X86_IO_APIC
51 	/*
52 	 * Here we can be sure that there is an IO-APIC in the system. Let's
53 	 * go and set it up:
54 	 */
55 	if (!skip_ioapic_setup && nr_ioapics)
56 		setup_IO_APIC();
57 	else {
58 		nr_ioapics = 0;
59 	}
60 #endif
61 }
62 
smpboot_clear_io_apic(void)63 static inline void smpboot_clear_io_apic(void)
64 {
65 #ifdef CONFIG_X86_IO_APIC
66 	nr_ioapics = 0;
67 #endif
68 }
69