1 /* SMP support routines.
2 *
3 * Copyright (C) 2006-2008 Panasonic Corporation
4 * All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16 #include <linux/interrupt.h>
17 #include <linux/spinlock.h>
18 #include <linux/init.h>
19 #include <linux/jiffies.h>
20 #include <linux/cpumask.h>
21 #include <linux/err.h>
22 #include <linux/kernel.h>
23 #include <linux/delay.h>
24 #include <linux/sched.h>
25 #include <linux/profile.h>
26 #include <linux/smp.h>
27 #include <asm/tlbflush.h>
28 #include <asm/system.h>
29 #include <asm/bitops.h>
30 #include <asm/processor.h>
31 #include <asm/bug.h>
32 #include <asm/exceptions.h>
33 #include <asm/hardirq.h>
34 #include <asm/fpu.h>
35 #include <asm/mmu_context.h>
36 #include <asm/thread_info.h>
37 #include <asm/cpu-regs.h>
38 #include <asm/intctl-regs.h>
39 #include "internal.h"
40
41 #ifdef CONFIG_HOTPLUG_CPU
42 #include <linux/cpu.h>
43 #include <asm/cacheflush.h>
44
45 static unsigned long sleep_mode[NR_CPUS];
46
47 static void run_sleep_cpu(unsigned int cpu);
48 static void run_wakeup_cpu(unsigned int cpu);
49 #endif /* CONFIG_HOTPLUG_CPU */
50
51 /*
52 * Debug Message function
53 */
54
55 #undef DEBUG_SMP
56 #ifdef DEBUG_SMP
57 #define Dprintk(fmt, ...) printk(KERN_DEBUG fmt, ##__VA_ARGS__)
58 #else
59 #define Dprintk(fmt, ...) no_printk(KERN_DEBUG fmt, ##__VA_ARGS__)
60 #endif
61
62 /* timeout value in msec for smp_nmi_call_function. zero is no timeout. */
63 #define CALL_FUNCTION_NMI_IPI_TIMEOUT 0
64
65 /*
66 * Structure and data for smp_nmi_call_function().
67 */
68 struct nmi_call_data_struct {
69 smp_call_func_t func;
70 void *info;
71 cpumask_t started;
72 cpumask_t finished;
73 int wait;
74 char size_alignment[0]
75 __attribute__ ((__aligned__(SMP_CACHE_BYTES)));
76 } __attribute__ ((__aligned__(SMP_CACHE_BYTES)));
77
78 static DEFINE_SPINLOCK(smp_nmi_call_lock);
79 static struct nmi_call_data_struct *nmi_call_data;
80
81 /*
82 * Data structures and variables
83 */
84 static cpumask_t cpu_callin_map; /* Bitmask of callin CPUs */
85 static cpumask_t cpu_callout_map; /* Bitmask of callout CPUs */
86 cpumask_t cpu_boot_map; /* Bitmask of boot APs */
87 unsigned long start_stack[NR_CPUS - 1];
88
89 /*
90 * Per CPU parameters
91 */
92 struct mn10300_cpuinfo cpu_data[NR_CPUS] __cacheline_aligned;
93
94 static int cpucount; /* The count of boot CPUs */
95 static cpumask_t smp_commenced_mask;
96 cpumask_t cpu_initialized __initdata = CPU_MASK_NONE;
97
98 /*
99 * Function Prototypes
100 */
101 static int do_boot_cpu(int);
102 static void smp_show_cpu_info(int cpu_id);
103 static void smp_callin(void);
104 static void smp_online(void);
105 static void smp_store_cpu_info(int);
106 static void smp_cpu_init(void);
107 static void smp_tune_scheduling(void);
108 static void send_IPI_mask(const cpumask_t *cpumask, int irq);
109 static void init_ipi(void);
110
111 /*
112 * IPI Initialization interrupt definitions
113 */
114 static void mn10300_ipi_disable(unsigned int irq);
115 static void mn10300_ipi_enable(unsigned int irq);
116 static void mn10300_ipi_chip_disable(struct irq_data *d);
117 static void mn10300_ipi_chip_enable(struct irq_data *d);
118 static void mn10300_ipi_ack(struct irq_data *d);
119 static void mn10300_ipi_nop(struct irq_data *d);
120
121 static struct irq_chip mn10300_ipi_type = {
122 .name = "cpu_ipi",
123 .irq_disable = mn10300_ipi_chip_disable,
124 .irq_enable = mn10300_ipi_chip_enable,
125 .irq_ack = mn10300_ipi_ack,
126 .irq_eoi = mn10300_ipi_nop
127 };
128
129 static irqreturn_t smp_reschedule_interrupt(int irq, void *dev_id);
130 static irqreturn_t smp_call_function_interrupt(int irq, void *dev_id);
131
132 static struct irqaction reschedule_ipi = {
133 .handler = smp_reschedule_interrupt,
134 .name = "smp reschedule IPI"
135 };
136 static struct irqaction call_function_ipi = {
137 .handler = smp_call_function_interrupt,
138 .name = "smp call function IPI"
139 };
140
141 #if !defined(CONFIG_GENERIC_CLOCKEVENTS) || defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
142 static irqreturn_t smp_ipi_timer_interrupt(int irq, void *dev_id);
143 static struct irqaction local_timer_ipi = {
144 .handler = smp_ipi_timer_interrupt,
145 .flags = IRQF_DISABLED,
146 .name = "smp local timer IPI"
147 };
148 #endif
149
150 /**
151 * init_ipi - Initialise the IPI mechanism
152 */
init_ipi(void)153 static void init_ipi(void)
154 {
155 unsigned long flags;
156 u16 tmp16;
157
158 /* set up the reschedule IPI */
159 irq_set_chip_and_handler(RESCHEDULE_IPI, &mn10300_ipi_type,
160 handle_percpu_irq);
161 setup_irq(RESCHEDULE_IPI, &reschedule_ipi);
162 set_intr_level(RESCHEDULE_IPI, RESCHEDULE_GxICR_LV);
163 mn10300_ipi_enable(RESCHEDULE_IPI);
164
165 /* set up the call function IPI */
166 irq_set_chip_and_handler(CALL_FUNC_SINGLE_IPI, &mn10300_ipi_type,
167 handle_percpu_irq);
168 setup_irq(CALL_FUNC_SINGLE_IPI, &call_function_ipi);
169 set_intr_level(CALL_FUNC_SINGLE_IPI, CALL_FUNCTION_GxICR_LV);
170 mn10300_ipi_enable(CALL_FUNC_SINGLE_IPI);
171
172 /* set up the local timer IPI */
173 #if !defined(CONFIG_GENERIC_CLOCKEVENTS) || \
174 defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
175 irq_set_chip_and_handler(LOCAL_TIMER_IPI, &mn10300_ipi_type,
176 handle_percpu_irq);
177 setup_irq(LOCAL_TIMER_IPI, &local_timer_ipi);
178 set_intr_level(LOCAL_TIMER_IPI, LOCAL_TIMER_GxICR_LV);
179 mn10300_ipi_enable(LOCAL_TIMER_IPI);
180 #endif
181
182 #ifdef CONFIG_MN10300_CACHE_ENABLED
183 /* set up the cache flush IPI */
184 flags = arch_local_cli_save();
185 __set_intr_stub(NUM2EXCEP_IRQ_LEVEL(FLUSH_CACHE_GxICR_LV),
186 mn10300_low_ipi_handler);
187 GxICR(FLUSH_CACHE_IPI) = FLUSH_CACHE_GxICR_LV | GxICR_DETECT;
188 mn10300_ipi_enable(FLUSH_CACHE_IPI);
189 arch_local_irq_restore(flags);
190 #endif
191
192 /* set up the NMI call function IPI */
193 flags = arch_local_cli_save();
194 GxICR(CALL_FUNCTION_NMI_IPI) = GxICR_NMI | GxICR_ENABLE | GxICR_DETECT;
195 tmp16 = GxICR(CALL_FUNCTION_NMI_IPI);
196 arch_local_irq_restore(flags);
197
198 /* set up the SMP boot IPI */
199 flags = arch_local_cli_save();
200 __set_intr_stub(NUM2EXCEP_IRQ_LEVEL(SMP_BOOT_GxICR_LV),
201 mn10300_low_ipi_handler);
202 arch_local_irq_restore(flags);
203 }
204
205 /**
206 * mn10300_ipi_shutdown - Shut down handling of an IPI
207 * @irq: The IPI to be shut down.
208 */
mn10300_ipi_shutdown(unsigned int irq)209 static void mn10300_ipi_shutdown(unsigned int irq)
210 {
211 unsigned long flags;
212 u16 tmp;
213
214 flags = arch_local_cli_save();
215
216 tmp = GxICR(irq);
217 GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_DETECT;
218 tmp = GxICR(irq);
219
220 arch_local_irq_restore(flags);
221 }
222
223 /**
224 * mn10300_ipi_enable - Enable an IPI
225 * @irq: The IPI to be enabled.
226 */
mn10300_ipi_enable(unsigned int irq)227 static void mn10300_ipi_enable(unsigned int irq)
228 {
229 unsigned long flags;
230 u16 tmp;
231
232 flags = arch_local_cli_save();
233
234 tmp = GxICR(irq);
235 GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_ENABLE;
236 tmp = GxICR(irq);
237
238 arch_local_irq_restore(flags);
239 }
240
mn10300_ipi_chip_enable(struct irq_data * d)241 static void mn10300_ipi_chip_enable(struct irq_data *d)
242 {
243 mn10300_ipi_enable(d->irq);
244 }
245
246 /**
247 * mn10300_ipi_disable - Disable an IPI
248 * @irq: The IPI to be disabled.
249 */
mn10300_ipi_disable(unsigned int irq)250 static void mn10300_ipi_disable(unsigned int irq)
251 {
252 unsigned long flags;
253 u16 tmp;
254
255 flags = arch_local_cli_save();
256
257 tmp = GxICR(irq);
258 GxICR(irq) = tmp & GxICR_LEVEL;
259 tmp = GxICR(irq);
260
261 arch_local_irq_restore(flags);
262 }
263
mn10300_ipi_chip_disable(struct irq_data * d)264 static void mn10300_ipi_chip_disable(struct irq_data *d)
265 {
266 mn10300_ipi_disable(d->irq);
267 }
268
269
270 /**
271 * mn10300_ipi_ack - Acknowledge an IPI interrupt in the PIC
272 * @irq: The IPI to be acknowledged.
273 *
274 * Clear the interrupt detection flag for the IPI on the appropriate interrupt
275 * channel in the PIC.
276 */
mn10300_ipi_ack(struct irq_data * d)277 static void mn10300_ipi_ack(struct irq_data *d)
278 {
279 unsigned int irq = d->irq;
280 unsigned long flags;
281 u16 tmp;
282
283 flags = arch_local_cli_save();
284 GxICR_u8(irq) = GxICR_DETECT;
285 tmp = GxICR(irq);
286 arch_local_irq_restore(flags);
287 }
288
289 /**
290 * mn10300_ipi_nop - Dummy IPI action
291 * @irq: The IPI to be acted upon.
292 */
mn10300_ipi_nop(struct irq_data * d)293 static void mn10300_ipi_nop(struct irq_data *d)
294 {
295 }
296
297 /**
298 * send_IPI_mask - Send IPIs to all CPUs in list
299 * @cpumask: The list of CPUs to target.
300 * @irq: The IPI request to be sent.
301 *
302 * Send the specified IPI to all the CPUs in the list, not waiting for them to
303 * finish before returning. The caller is responsible for synchronisation if
304 * that is needed.
305 */
send_IPI_mask(const cpumask_t * cpumask,int irq)306 static void send_IPI_mask(const cpumask_t *cpumask, int irq)
307 {
308 int i;
309 u16 tmp;
310
311 for (i = 0; i < NR_CPUS; i++) {
312 if (cpu_isset(i, *cpumask)) {
313 /* send IPI */
314 tmp = CROSS_GxICR(irq, i);
315 CROSS_GxICR(irq, i) =
316 tmp | GxICR_REQUEST | GxICR_DETECT;
317 tmp = CROSS_GxICR(irq, i); /* flush write buffer */
318 }
319 }
320 }
321
322 /**
323 * send_IPI_self - Send an IPI to this CPU.
324 * @irq: The IPI request to be sent.
325 *
326 * Send the specified IPI to the current CPU.
327 */
send_IPI_self(int irq)328 void send_IPI_self(int irq)
329 {
330 send_IPI_mask(cpumask_of(smp_processor_id()), irq);
331 }
332
333 /**
334 * send_IPI_allbutself - Send IPIs to all the other CPUs.
335 * @irq: The IPI request to be sent.
336 *
337 * Send the specified IPI to all CPUs in the system barring the current one,
338 * not waiting for them to finish before returning. The caller is responsible
339 * for synchronisation if that is needed.
340 */
send_IPI_allbutself(int irq)341 void send_IPI_allbutself(int irq)
342 {
343 cpumask_t cpumask;
344
345 cpumask = cpu_online_map;
346 cpu_clear(smp_processor_id(), cpumask);
347 send_IPI_mask(&cpumask, irq);
348 }
349
arch_send_call_function_ipi_mask(const struct cpumask * mask)350 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
351 {
352 BUG();
353 /*send_IPI_mask(mask, CALL_FUNCTION_IPI);*/
354 }
355
arch_send_call_function_single_ipi(int cpu)356 void arch_send_call_function_single_ipi(int cpu)
357 {
358 send_IPI_mask(cpumask_of(cpu), CALL_FUNC_SINGLE_IPI);
359 }
360
361 /**
362 * smp_send_reschedule - Send reschedule IPI to a CPU
363 * @cpu: The CPU to target.
364 */
smp_send_reschedule(int cpu)365 void smp_send_reschedule(int cpu)
366 {
367 send_IPI_mask(cpumask_of(cpu), RESCHEDULE_IPI);
368 }
369
370 /**
371 * smp_nmi_call_function - Send a call function NMI IPI to all CPUs
372 * @func: The function to ask to be run.
373 * @info: The context data to pass to that function.
374 * @wait: If true, wait (atomically) until function is run on all CPUs.
375 *
376 * Send a non-maskable request to all CPUs in the system, requesting them to
377 * run the specified function with the given context data, and, potentially, to
378 * wait for completion of that function on all CPUs.
379 *
380 * Returns 0 if successful, -ETIMEDOUT if we were asked to wait, but hit the
381 * timeout.
382 */
smp_nmi_call_function(smp_call_func_t func,void * info,int wait)383 int smp_nmi_call_function(smp_call_func_t func, void *info, int wait)
384 {
385 struct nmi_call_data_struct data;
386 unsigned long flags;
387 unsigned int cnt;
388 int cpus, ret = 0;
389
390 cpus = num_online_cpus() - 1;
391 if (cpus < 1)
392 return 0;
393
394 data.func = func;
395 data.info = info;
396 data.started = cpu_online_map;
397 cpu_clear(smp_processor_id(), data.started);
398 data.wait = wait;
399 if (wait)
400 data.finished = data.started;
401
402 spin_lock_irqsave(&smp_nmi_call_lock, flags);
403 nmi_call_data = &data;
404 smp_mb();
405
406 /* Send a message to all other CPUs and wait for them to respond */
407 send_IPI_allbutself(CALL_FUNCTION_NMI_IPI);
408
409 /* Wait for response */
410 if (CALL_FUNCTION_NMI_IPI_TIMEOUT > 0) {
411 for (cnt = 0;
412 cnt < CALL_FUNCTION_NMI_IPI_TIMEOUT &&
413 !cpus_empty(data.started);
414 cnt++)
415 mdelay(1);
416
417 if (wait && cnt < CALL_FUNCTION_NMI_IPI_TIMEOUT) {
418 for (cnt = 0;
419 cnt < CALL_FUNCTION_NMI_IPI_TIMEOUT &&
420 !cpus_empty(data.finished);
421 cnt++)
422 mdelay(1);
423 }
424
425 if (cnt >= CALL_FUNCTION_NMI_IPI_TIMEOUT)
426 ret = -ETIMEDOUT;
427
428 } else {
429 /* If timeout value is zero, wait until cpumask has been
430 * cleared */
431 while (!cpus_empty(data.started))
432 barrier();
433 if (wait)
434 while (!cpus_empty(data.finished))
435 barrier();
436 }
437
438 spin_unlock_irqrestore(&smp_nmi_call_lock, flags);
439 return ret;
440 }
441
442 /**
443 * smp_jump_to_debugger - Make other CPUs enter the debugger by sending an IPI
444 *
445 * Send a non-maskable request to all other CPUs in the system, instructing
446 * them to jump into the debugger. The caller is responsible for checking that
447 * the other CPUs responded to the instruction.
448 *
449 * The caller should make sure that this CPU's debugger IPI is disabled.
450 */
smp_jump_to_debugger(void)451 void smp_jump_to_debugger(void)
452 {
453 if (num_online_cpus() > 1)
454 /* Send a message to all other CPUs */
455 send_IPI_allbutself(DEBUGGER_NMI_IPI);
456 }
457
458 /**
459 * stop_this_cpu - Callback to stop a CPU.
460 * @unused: Callback context (ignored).
461 */
stop_this_cpu(void * unused)462 void stop_this_cpu(void *unused)
463 {
464 static volatile int stopflag;
465 unsigned long flags;
466
467 #ifdef CONFIG_GDBSTUB
468 /* In case of single stepping smp_send_stop by other CPU,
469 * clear procindebug to avoid deadlock.
470 */
471 atomic_set(&procindebug[smp_processor_id()], 0);
472 #endif /* CONFIG_GDBSTUB */
473
474 flags = arch_local_cli_save();
475 cpu_clear(smp_processor_id(), cpu_online_map);
476
477 while (!stopflag)
478 cpu_relax();
479
480 cpu_set(smp_processor_id(), cpu_online_map);
481 arch_local_irq_restore(flags);
482 }
483
484 /**
485 * smp_send_stop - Send a stop request to all CPUs.
486 */
smp_send_stop(void)487 void smp_send_stop(void)
488 {
489 smp_nmi_call_function(stop_this_cpu, NULL, 0);
490 }
491
492 /**
493 * smp_reschedule_interrupt - Reschedule IPI handler
494 * @irq: The interrupt number.
495 * @dev_id: The device ID.
496 *
497 * We need do nothing here, since the scheduling will be effected on our way
498 * back through entry.S.
499 *
500 * Returns IRQ_HANDLED to indicate we handled the interrupt successfully.
501 */
smp_reschedule_interrupt(int irq,void * dev_id)502 static irqreturn_t smp_reschedule_interrupt(int irq, void *dev_id)
503 {
504 /* do nothing */
505 return IRQ_HANDLED;
506 }
507
508 /**
509 * smp_call_function_interrupt - Call function IPI handler
510 * @irq: The interrupt number.
511 * @dev_id: The device ID.
512 *
513 * Returns IRQ_HANDLED to indicate we handled the interrupt successfully.
514 */
smp_call_function_interrupt(int irq,void * dev_id)515 static irqreturn_t smp_call_function_interrupt(int irq, void *dev_id)
516 {
517 /* generic_smp_call_function_interrupt(); */
518 generic_smp_call_function_single_interrupt();
519 return IRQ_HANDLED;
520 }
521
522 /**
523 * smp_nmi_call_function_interrupt - Non-maskable call function IPI handler
524 */
smp_nmi_call_function_interrupt(void)525 void smp_nmi_call_function_interrupt(void)
526 {
527 smp_call_func_t func = nmi_call_data->func;
528 void *info = nmi_call_data->info;
529 int wait = nmi_call_data->wait;
530
531 /* Notify the initiating CPU that I've grabbed the data and am about to
532 * execute the function
533 */
534 smp_mb();
535 cpu_clear(smp_processor_id(), nmi_call_data->started);
536 (*func)(info);
537
538 if (wait) {
539 smp_mb();
540 cpu_clear(smp_processor_id(), nmi_call_data->finished);
541 }
542 }
543
544 #if !defined(CONFIG_GENERIC_CLOCKEVENTS) || \
545 defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
546 /**
547 * smp_ipi_timer_interrupt - Local timer IPI handler
548 * @irq: The interrupt number.
549 * @dev_id: The device ID.
550 *
551 * Returns IRQ_HANDLED to indicate we handled the interrupt successfully.
552 */
smp_ipi_timer_interrupt(int irq,void * dev_id)553 static irqreturn_t smp_ipi_timer_interrupt(int irq, void *dev_id)
554 {
555 return local_timer_interrupt();
556 }
557 #endif
558
smp_init_cpus(void)559 void __init smp_init_cpus(void)
560 {
561 int i;
562 for (i = 0; i < NR_CPUS; i++) {
563 set_cpu_possible(i, true);
564 set_cpu_present(i, true);
565 }
566 }
567
568 /**
569 * smp_cpu_init - Initialise AP in start_secondary.
570 *
571 * For this Application Processor, set up init_mm, initialise FPU and set
572 * interrupt level 0-6 setting.
573 */
smp_cpu_init(void)574 static void __init smp_cpu_init(void)
575 {
576 unsigned long flags;
577 int cpu_id = smp_processor_id();
578 u16 tmp16;
579
580 if (test_and_set_bit(cpu_id, &cpu_initialized)) {
581 printk(KERN_WARNING "CPU#%d already initialized!\n", cpu_id);
582 for (;;)
583 local_irq_enable();
584 }
585 printk(KERN_INFO "Initializing CPU#%d\n", cpu_id);
586
587 atomic_inc(&init_mm.mm_count);
588 current->active_mm = &init_mm;
589 BUG_ON(current->mm);
590
591 enter_lazy_tlb(&init_mm, current);
592
593 /* Force FPU initialization */
594 clear_using_fpu(current);
595
596 GxICR(CALL_FUNC_SINGLE_IPI) = CALL_FUNCTION_GxICR_LV | GxICR_DETECT;
597 mn10300_ipi_enable(CALL_FUNC_SINGLE_IPI);
598
599 GxICR(LOCAL_TIMER_IPI) = LOCAL_TIMER_GxICR_LV | GxICR_DETECT;
600 mn10300_ipi_enable(LOCAL_TIMER_IPI);
601
602 GxICR(RESCHEDULE_IPI) = RESCHEDULE_GxICR_LV | GxICR_DETECT;
603 mn10300_ipi_enable(RESCHEDULE_IPI);
604
605 #ifdef CONFIG_MN10300_CACHE_ENABLED
606 GxICR(FLUSH_CACHE_IPI) = FLUSH_CACHE_GxICR_LV | GxICR_DETECT;
607 mn10300_ipi_enable(FLUSH_CACHE_IPI);
608 #endif
609
610 mn10300_ipi_shutdown(SMP_BOOT_IRQ);
611
612 /* Set up the non-maskable call function IPI */
613 flags = arch_local_cli_save();
614 GxICR(CALL_FUNCTION_NMI_IPI) = GxICR_NMI | GxICR_ENABLE | GxICR_DETECT;
615 tmp16 = GxICR(CALL_FUNCTION_NMI_IPI);
616 arch_local_irq_restore(flags);
617 }
618
619 /**
620 * smp_prepare_cpu_init - Initialise CPU in startup_secondary
621 *
622 * Set interrupt level 0-6 setting and init ICR of the kernel debugger.
623 */
smp_prepare_cpu_init(void)624 void smp_prepare_cpu_init(void)
625 {
626 int loop;
627
628 /* Set the interrupt vector registers */
629 IVAR0 = EXCEP_IRQ_LEVEL0;
630 IVAR1 = EXCEP_IRQ_LEVEL1;
631 IVAR2 = EXCEP_IRQ_LEVEL2;
632 IVAR3 = EXCEP_IRQ_LEVEL3;
633 IVAR4 = EXCEP_IRQ_LEVEL4;
634 IVAR5 = EXCEP_IRQ_LEVEL5;
635 IVAR6 = EXCEP_IRQ_LEVEL6;
636
637 /* Disable all interrupts and set to priority 6 (lowest) */
638 for (loop = 0; loop < GxICR_NUM_IRQS; loop++)
639 GxICR(loop) = GxICR_LEVEL_6 | GxICR_DETECT;
640
641 #ifdef CONFIG_KERNEL_DEBUGGER
642 /* initialise the kernel debugger interrupt */
643 do {
644 unsigned long flags;
645 u16 tmp16;
646
647 flags = arch_local_cli_save();
648 GxICR(DEBUGGER_NMI_IPI) = GxICR_NMI | GxICR_ENABLE | GxICR_DETECT;
649 tmp16 = GxICR(DEBUGGER_NMI_IPI);
650 arch_local_irq_restore(flags);
651 } while (0);
652 #endif
653 }
654
655 /**
656 * start_secondary - Activate a secondary CPU (AP)
657 * @unused: Thread parameter (ignored).
658 */
start_secondary(void * unused)659 int __init start_secondary(void *unused)
660 {
661 smp_cpu_init();
662 smp_callin();
663 while (!cpu_isset(smp_processor_id(), smp_commenced_mask))
664 cpu_relax();
665
666 local_flush_tlb();
667 preempt_disable();
668 smp_online();
669
670 #ifdef CONFIG_GENERIC_CLOCKEVENTS
671 init_clockevents();
672 #endif
673 cpu_idle();
674 return 0;
675 }
676
677 /**
678 * smp_prepare_cpus - Boot up secondary CPUs (APs)
679 * @max_cpus: Maximum number of CPUs to boot.
680 *
681 * Call do_boot_cpu, and boot up APs.
682 */
smp_prepare_cpus(unsigned int max_cpus)683 void __init smp_prepare_cpus(unsigned int max_cpus)
684 {
685 int phy_id;
686
687 /* Setup boot CPU information */
688 smp_store_cpu_info(0);
689 smp_tune_scheduling();
690
691 init_ipi();
692
693 /* If SMP should be disabled, then finish */
694 if (max_cpus == 0) {
695 printk(KERN_INFO "SMP mode deactivated.\n");
696 goto smp_done;
697 }
698
699 /* Boot secondary CPUs (for which phy_id > 0) */
700 for (phy_id = 0; phy_id < NR_CPUS; phy_id++) {
701 /* Don't boot primary CPU */
702 if (max_cpus <= cpucount + 1)
703 continue;
704 if (phy_id != 0)
705 do_boot_cpu(phy_id);
706 set_cpu_possible(phy_id, true);
707 smp_show_cpu_info(phy_id);
708 }
709
710 smp_done:
711 Dprintk("Boot done.\n");
712 }
713
714 /**
715 * smp_store_cpu_info - Save a CPU's information
716 * @cpu: The CPU to save for.
717 *
718 * Save boot_cpu_data and jiffy for the specified CPU.
719 */
smp_store_cpu_info(int cpu)720 static void __init smp_store_cpu_info(int cpu)
721 {
722 struct mn10300_cpuinfo *ci = &cpu_data[cpu];
723
724 *ci = boot_cpu_data;
725 ci->loops_per_jiffy = loops_per_jiffy;
726 ci->type = CPUREV;
727 }
728
729 /**
730 * smp_tune_scheduling - Set time slice value
731 *
732 * Nothing to do here.
733 */
smp_tune_scheduling(void)734 static void __init smp_tune_scheduling(void)
735 {
736 }
737
738 /**
739 * do_boot_cpu: Boot up one CPU
740 * @phy_id: Physical ID of CPU to boot.
741 *
742 * Send an IPI to a secondary CPU to boot it. Returns 0 on success, 1
743 * otherwise.
744 */
do_boot_cpu(int phy_id)745 static int __init do_boot_cpu(int phy_id)
746 {
747 struct task_struct *idle;
748 unsigned long send_status, callin_status;
749 int timeout, cpu_id;
750
751 send_status = GxICR_REQUEST;
752 callin_status = 0;
753 timeout = 0;
754 cpu_id = phy_id;
755
756 cpucount++;
757
758 /* Create idle thread for this CPU */
759 idle = fork_idle(cpu_id);
760 if (IS_ERR(idle))
761 panic("Failed fork for CPU#%d.", cpu_id);
762
763 idle->thread.pc = (unsigned long)start_secondary;
764
765 printk(KERN_NOTICE "Booting CPU#%d\n", cpu_id);
766 start_stack[cpu_id - 1] = idle->thread.sp;
767
768 task_thread_info(idle)->cpu = cpu_id;
769
770 /* Send boot IPI to AP */
771 send_IPI_mask(cpumask_of(phy_id), SMP_BOOT_IRQ);
772
773 Dprintk("Waiting for send to finish...\n");
774
775 /* Wait for AP's IPI receive in 100[ms] */
776 do {
777 udelay(1000);
778 send_status =
779 CROSS_GxICR(SMP_BOOT_IRQ, phy_id) & GxICR_REQUEST;
780 } while (send_status == GxICR_REQUEST && timeout++ < 100);
781
782 Dprintk("Waiting for cpu_callin_map.\n");
783
784 if (send_status == 0) {
785 /* Allow AP to start initializing */
786 cpu_set(cpu_id, cpu_callout_map);
787
788 /* Wait for setting cpu_callin_map */
789 timeout = 0;
790 do {
791 udelay(1000);
792 callin_status = cpu_isset(cpu_id, cpu_callin_map);
793 } while (callin_status == 0 && timeout++ < 5000);
794
795 if (callin_status == 0)
796 Dprintk("Not responding.\n");
797 } else {
798 printk(KERN_WARNING "IPI not delivered.\n");
799 }
800
801 if (send_status == GxICR_REQUEST || callin_status == 0) {
802 cpu_clear(cpu_id, cpu_callout_map);
803 cpu_clear(cpu_id, cpu_callin_map);
804 cpu_clear(cpu_id, cpu_initialized);
805 cpucount--;
806 return 1;
807 }
808 return 0;
809 }
810
811 /**
812 * smp_show_cpu_info - Show SMP CPU information
813 * @cpu: The CPU of interest.
814 */
smp_show_cpu_info(int cpu)815 static void __init smp_show_cpu_info(int cpu)
816 {
817 struct mn10300_cpuinfo *ci = &cpu_data[cpu];
818
819 printk(KERN_INFO
820 "CPU#%d : ioclk speed: %lu.%02luMHz : bogomips : %lu.%02lu\n",
821 cpu,
822 MN10300_IOCLK / 1000000,
823 (MN10300_IOCLK / 10000) % 100,
824 ci->loops_per_jiffy / (500000 / HZ),
825 (ci->loops_per_jiffy / (5000 / HZ)) % 100);
826 }
827
828 /**
829 * smp_callin - Set cpu_callin_map of the current CPU ID
830 */
smp_callin(void)831 static void __init smp_callin(void)
832 {
833 unsigned long timeout;
834 int cpu;
835
836 cpu = smp_processor_id();
837 timeout = jiffies + (2 * HZ);
838
839 if (cpu_isset(cpu, cpu_callin_map)) {
840 printk(KERN_ERR "CPU#%d already present.\n", cpu);
841 BUG();
842 }
843 Dprintk("CPU#%d waiting for CALLOUT\n", cpu);
844
845 /* Wait for AP startup 2s total */
846 while (time_before(jiffies, timeout)) {
847 if (cpu_isset(cpu, cpu_callout_map))
848 break;
849 cpu_relax();
850 }
851
852 if (!time_before(jiffies, timeout)) {
853 printk(KERN_ERR
854 "BUG: CPU#%d started up but did not get a callout!\n",
855 cpu);
856 BUG();
857 }
858
859 #ifdef CONFIG_CALIBRATE_DELAY
860 calibrate_delay(); /* Get our bogomips */
861 #endif
862
863 /* Save our processor parameters */
864 smp_store_cpu_info(cpu);
865
866 /* Allow the boot processor to continue */
867 cpu_set(cpu, cpu_callin_map);
868 }
869
870 /**
871 * smp_online - Set cpu_online_map
872 */
smp_online(void)873 static void __init smp_online(void)
874 {
875 int cpu;
876
877 cpu = smp_processor_id();
878
879 local_irq_enable();
880
881 cpu_set(cpu, cpu_online_map);
882 smp_wmb();
883 }
884
885 /**
886 * smp_cpus_done -
887 * @max_cpus: Maximum CPU count.
888 *
889 * Do nothing.
890 */
smp_cpus_done(unsigned int max_cpus)891 void __init smp_cpus_done(unsigned int max_cpus)
892 {
893 }
894
895 /*
896 * smp_prepare_boot_cpu - Set up stuff for the boot processor.
897 *
898 * Set up the cpu_online_map, cpu_callout_map and cpu_callin_map of the boot
899 * processor (CPU 0).
900 */
smp_prepare_boot_cpu(void)901 void __devinit smp_prepare_boot_cpu(void)
902 {
903 cpu_set(0, cpu_callout_map);
904 cpu_set(0, cpu_callin_map);
905 current_thread_info()->cpu = 0;
906 }
907
908 /*
909 * initialize_secondary - Initialise a secondary CPU (Application Processor).
910 *
911 * Set SP register and jump to thread's PC address.
912 */
initialize_secondary(void)913 void initialize_secondary(void)
914 {
915 asm volatile (
916 "mov %0,sp \n"
917 "jmp (%1) \n"
918 :
919 : "a"(current->thread.sp), "a"(current->thread.pc));
920 }
921
922 /**
923 * __cpu_up - Set smp_commenced_mask for the nominated CPU
924 * @cpu: The target CPU.
925 */
__cpu_up(unsigned int cpu)926 int __devinit __cpu_up(unsigned int cpu)
927 {
928 int timeout;
929
930 #ifdef CONFIG_HOTPLUG_CPU
931 if (num_online_cpus() == 1)
932 disable_hlt();
933 if (sleep_mode[cpu])
934 run_wakeup_cpu(cpu);
935 #endif /* CONFIG_HOTPLUG_CPU */
936
937 cpu_set(cpu, smp_commenced_mask);
938
939 /* Wait 5s total for a response */
940 for (timeout = 0 ; timeout < 5000 ; timeout++) {
941 if (cpu_isset(cpu, cpu_online_map))
942 break;
943 udelay(1000);
944 }
945
946 BUG_ON(!cpu_isset(cpu, cpu_online_map));
947 return 0;
948 }
949
950 /**
951 * setup_profiling_timer - Set up the profiling timer
952 * @multiplier - The frequency multiplier to use
953 *
954 * The frequency of the profiling timer can be changed by writing a multiplier
955 * value into /proc/profile.
956 */
setup_profiling_timer(unsigned int multiplier)957 int setup_profiling_timer(unsigned int multiplier)
958 {
959 return -EINVAL;
960 }
961
962 /*
963 * CPU hotplug routines
964 */
965 #ifdef CONFIG_HOTPLUG_CPU
966
967 static DEFINE_PER_CPU(struct cpu, cpu_devices);
968
topology_init(void)969 static int __init topology_init(void)
970 {
971 int cpu, ret;
972
973 for_each_cpu(cpu) {
974 ret = register_cpu(&per_cpu(cpu_devices, cpu), cpu, NULL);
975 if (ret)
976 printk(KERN_WARNING
977 "topology_init: register_cpu %d failed (%d)\n",
978 cpu, ret);
979 }
980 return 0;
981 }
982
983 subsys_initcall(topology_init);
984
__cpu_disable(void)985 int __cpu_disable(void)
986 {
987 int cpu = smp_processor_id();
988 if (cpu == 0)
989 return -EBUSY;
990
991 migrate_irqs();
992 cpu_clear(cpu, current->active_mm->cpu_vm_mask);
993 return 0;
994 }
995
__cpu_die(unsigned int cpu)996 void __cpu_die(unsigned int cpu)
997 {
998 run_sleep_cpu(cpu);
999
1000 if (num_online_cpus() == 1)
1001 enable_hlt();
1002 }
1003
1004 #ifdef CONFIG_MN10300_CACHE_ENABLED
hotplug_cpu_disable_cache(void)1005 static inline void hotplug_cpu_disable_cache(void)
1006 {
1007 int tmp;
1008 asm volatile(
1009 " movhu (%1),%0 \n"
1010 " and %2,%0 \n"
1011 " movhu %0,(%1) \n"
1012 "1: movhu (%1),%0 \n"
1013 " btst %3,%0 \n"
1014 " bne 1b \n"
1015 : "=&r"(tmp)
1016 : "a"(&CHCTR),
1017 "i"(~(CHCTR_ICEN | CHCTR_DCEN)),
1018 "i"(CHCTR_ICBUSY | CHCTR_DCBUSY)
1019 : "memory", "cc");
1020 }
1021
hotplug_cpu_enable_cache(void)1022 static inline void hotplug_cpu_enable_cache(void)
1023 {
1024 int tmp;
1025 asm volatile(
1026 "movhu (%1),%0 \n"
1027 "or %2,%0 \n"
1028 "movhu %0,(%1) \n"
1029 : "=&r"(tmp)
1030 : "a"(&CHCTR),
1031 "i"(CHCTR_ICEN | CHCTR_DCEN)
1032 : "memory", "cc");
1033 }
1034
hotplug_cpu_invalidate_cache(void)1035 static inline void hotplug_cpu_invalidate_cache(void)
1036 {
1037 int tmp;
1038 asm volatile (
1039 "movhu (%1),%0 \n"
1040 "or %2,%0 \n"
1041 "movhu %0,(%1) \n"
1042 : "=&r"(tmp)
1043 : "a"(&CHCTR),
1044 "i"(CHCTR_ICINV | CHCTR_DCINV)
1045 : "cc");
1046 }
1047
1048 #else /* CONFIG_MN10300_CACHE_ENABLED */
1049 #define hotplug_cpu_disable_cache() do {} while (0)
1050 #define hotplug_cpu_enable_cache() do {} while (0)
1051 #define hotplug_cpu_invalidate_cache() do {} while (0)
1052 #endif /* CONFIG_MN10300_CACHE_ENABLED */
1053
1054 /**
1055 * hotplug_cpu_nmi_call_function - Call a function on other CPUs for hotplug
1056 * @cpumask: List of target CPUs.
1057 * @func: The function to call on those CPUs.
1058 * @info: The context data for the function to be called.
1059 * @wait: Whether to wait for the calls to complete.
1060 *
1061 * Non-maskably call a function on another CPU for hotplug purposes.
1062 *
1063 * This function must be called with maskable interrupts disabled.
1064 */
hotplug_cpu_nmi_call_function(cpumask_t cpumask,smp_call_func_t func,void * info,int wait)1065 static int hotplug_cpu_nmi_call_function(cpumask_t cpumask,
1066 smp_call_func_t func, void *info,
1067 int wait)
1068 {
1069 /*
1070 * The address and the size of nmi_call_func_mask_data
1071 * need to be aligned on L1_CACHE_BYTES.
1072 */
1073 static struct nmi_call_data_struct nmi_call_func_mask_data
1074 __cacheline_aligned;
1075 unsigned long start, end;
1076
1077 start = (unsigned long)&nmi_call_func_mask_data;
1078 end = start + sizeof(struct nmi_call_data_struct);
1079
1080 nmi_call_func_mask_data.func = func;
1081 nmi_call_func_mask_data.info = info;
1082 nmi_call_func_mask_data.started = cpumask;
1083 nmi_call_func_mask_data.wait = wait;
1084 if (wait)
1085 nmi_call_func_mask_data.finished = cpumask;
1086
1087 spin_lock(&smp_nmi_call_lock);
1088 nmi_call_data = &nmi_call_func_mask_data;
1089 mn10300_local_dcache_flush_range(start, end);
1090 smp_wmb();
1091
1092 send_IPI_mask(cpumask, CALL_FUNCTION_NMI_IPI);
1093
1094 do {
1095 mn10300_local_dcache_inv_range(start, end);
1096 barrier();
1097 } while (!cpus_empty(nmi_call_func_mask_data.started));
1098
1099 if (wait) {
1100 do {
1101 mn10300_local_dcache_inv_range(start, end);
1102 barrier();
1103 } while (!cpus_empty(nmi_call_func_mask_data.finished));
1104 }
1105
1106 spin_unlock(&smp_nmi_call_lock);
1107 return 0;
1108 }
1109
restart_wakeup_cpu(void)1110 static void restart_wakeup_cpu(void)
1111 {
1112 unsigned int cpu = smp_processor_id();
1113
1114 cpu_set(cpu, cpu_callin_map);
1115 local_flush_tlb();
1116 cpu_set(cpu, cpu_online_map);
1117 smp_wmb();
1118 }
1119
prepare_sleep_cpu(void * unused)1120 static void prepare_sleep_cpu(void *unused)
1121 {
1122 sleep_mode[smp_processor_id()] = 1;
1123 smp_mb();
1124 mn10300_local_dcache_flush_inv();
1125 hotplug_cpu_disable_cache();
1126 hotplug_cpu_invalidate_cache();
1127 }
1128
1129 /* when this function called, IE=0, NMID=0. */
sleep_cpu(void * unused)1130 static void sleep_cpu(void *unused)
1131 {
1132 unsigned int cpu_id = smp_processor_id();
1133 /*
1134 * CALL_FUNCTION_NMI_IPI for wakeup_cpu() shall not be requested,
1135 * before this cpu goes in SLEEP mode.
1136 */
1137 do {
1138 smp_mb();
1139 __sleep_cpu();
1140 } while (sleep_mode[cpu_id]);
1141 restart_wakeup_cpu();
1142 }
1143
run_sleep_cpu(unsigned int cpu)1144 static void run_sleep_cpu(unsigned int cpu)
1145 {
1146 unsigned long flags;
1147 cpumask_t cpumask = cpumask_of(cpu);
1148
1149 flags = arch_local_cli_save();
1150 hotplug_cpu_nmi_call_function(cpumask, prepare_sleep_cpu, NULL, 1);
1151 hotplug_cpu_nmi_call_function(cpumask, sleep_cpu, NULL, 0);
1152 udelay(1); /* delay for the cpu to sleep. */
1153 arch_local_irq_restore(flags);
1154 }
1155
wakeup_cpu(void)1156 static void wakeup_cpu(void)
1157 {
1158 hotplug_cpu_invalidate_cache();
1159 hotplug_cpu_enable_cache();
1160 smp_mb();
1161 sleep_mode[smp_processor_id()] = 0;
1162 }
1163
run_wakeup_cpu(unsigned int cpu)1164 static void run_wakeup_cpu(unsigned int cpu)
1165 {
1166 unsigned long flags;
1167
1168 flags = arch_local_cli_save();
1169 #if NR_CPUS == 2
1170 mn10300_local_dcache_flush_inv();
1171 #else
1172 /*
1173 * Before waking up the cpu,
1174 * all online cpus should stop and flush D-Cache for global data.
1175 */
1176 #error not support NR_CPUS > 2, when CONFIG_HOTPLUG_CPU=y.
1177 #endif
1178 hotplug_cpu_nmi_call_function(cpumask_of(cpu), wakeup_cpu, NULL, 1);
1179 arch_local_irq_restore(flags);
1180 }
1181
1182 #endif /* CONFIG_HOTPLUG_CPU */
1183