1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Common boot and setup code for both 32-bit and 64-bit.
4 * Extracted from arch/powerpc/kernel/setup_64.c.
5 *
6 * Copyright (C) 2001 PPC64 Team, IBM Corp
7 */
8
9 #undef DEBUG
10
11 #include <linux/export.h>
12 #include <linux/panic_notifier.h>
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/init.h>
16 #include <linux/kernel.h>
17 #include <linux/reboot.h>
18 #include <linux/delay.h>
19 #include <linux/initrd.h>
20 #include <linux/platform_device.h>
21 #include <linux/printk.h>
22 #include <linux/seq_file.h>
23 #include <linux/ioport.h>
24 #include <linux/console.h>
25 #include <linux/screen_info.h>
26 #include <linux/root_dev.h>
27 #include <linux/cpu.h>
28 #include <linux/unistd.h>
29 #include <linux/seq_buf.h>
30 #include <linux/serial.h>
31 #include <linux/serial_8250.h>
32 #include <linux/percpu.h>
33 #include <linux/memblock.h>
34 #include <linux/of_irq.h>
35 #include <linux/of_fdt.h>
36 #include <linux/of_platform.h>
37 #include <linux/hugetlb.h>
38 #include <linux/pgtable.h>
39 #include <asm/io.h>
40 #include <asm/paca.h>
41 #include <asm/processor.h>
42 #include <asm/vdso_datapage.h>
43 #include <asm/smp.h>
44 #include <asm/elf.h>
45 #include <asm/machdep.h>
46 #include <asm/time.h>
47 #include <asm/cputable.h>
48 #include <asm/sections.h>
49 #include <asm/firmware.h>
50 #include <asm/btext.h>
51 #include <asm/nvram.h>
52 #include <asm/setup.h>
53 #include <asm/rtas.h>
54 #include <asm/iommu.h>
55 #include <asm/serial.h>
56 #include <asm/cache.h>
57 #include <asm/page.h>
58 #include <asm/mmu.h>
59 #include <asm/xmon.h>
60 #include <asm/cputhreads.h>
61 #include <mm/mmu_decl.h>
62 #include <asm/fadump.h>
63 #include <asm/udbg.h>
64 #include <asm/hugetlb.h>
65 #include <asm/livepatch.h>
66 #include <asm/mmu_context.h>
67 #include <asm/cpu_has_feature.h>
68 #include <asm/kasan.h>
69 #include <asm/mce.h>
70
71 #include "setup.h"
72
73 #ifdef DEBUG
74 #define DBG(fmt...) udbg_printf(fmt)
75 #else
76 #define DBG(fmt...)
77 #endif
78
79 /* The main machine-dep calls structure
80 */
81 struct machdep_calls ppc_md;
82 EXPORT_SYMBOL(ppc_md);
83 struct machdep_calls *machine_id;
84 EXPORT_SYMBOL(machine_id);
85
86 int boot_cpuid = -1;
87 EXPORT_SYMBOL_GPL(boot_cpuid);
88
89 /*
90 * These are used in binfmt_elf.c to put aux entries on the stack
91 * for each elf executable being started.
92 */
93 int dcache_bsize;
94 int icache_bsize;
95
96 /*
97 * This still seems to be needed... -- paulus
98 */
99 struct screen_info screen_info = {
100 .orig_x = 0,
101 .orig_y = 25,
102 .orig_video_cols = 80,
103 .orig_video_lines = 25,
104 .orig_video_isVGA = 1,
105 .orig_video_points = 16
106 };
107 #if defined(CONFIG_FB_VGA16_MODULE)
108 EXPORT_SYMBOL(screen_info);
109 #endif
110
111 /* Variables required to store legacy IO irq routing */
112 int of_i8042_kbd_irq;
113 EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
114 int of_i8042_aux_irq;
115 EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
116
117 #ifdef __DO_IRQ_CANON
118 /* XXX should go elsewhere eventually */
119 int ppc_do_canonicalize_irqs;
120 EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
121 #endif
122
123 #ifdef CONFIG_CRASH_CORE
124 /* This keeps a track of which one is the crashing cpu. */
125 int crashing_cpu = -1;
126 #endif
127
128 /* also used by kexec */
machine_shutdown(void)129 void machine_shutdown(void)
130 {
131 /*
132 * if fadump is active, cleanup the fadump registration before we
133 * shutdown.
134 */
135 fadump_cleanup();
136
137 if (ppc_md.machine_shutdown)
138 ppc_md.machine_shutdown();
139 }
140
machine_hang(void)141 static void machine_hang(void)
142 {
143 pr_emerg("System Halted, OK to turn off power\n");
144 local_irq_disable();
145 while (1)
146 ;
147 }
148
machine_restart(char * cmd)149 void machine_restart(char *cmd)
150 {
151 machine_shutdown();
152 if (ppc_md.restart)
153 ppc_md.restart(cmd);
154
155 smp_send_stop();
156
157 do_kernel_restart(cmd);
158 mdelay(1000);
159
160 machine_hang();
161 }
162
machine_power_off(void)163 void machine_power_off(void)
164 {
165 machine_shutdown();
166 do_kernel_power_off();
167 smp_send_stop();
168 machine_hang();
169 }
170 /* Used by the G5 thermal driver */
171 EXPORT_SYMBOL_GPL(machine_power_off);
172
173 void (*pm_power_off)(void);
174 EXPORT_SYMBOL_GPL(pm_power_off);
175
arch_get_random_seed_longs(unsigned long * v,size_t max_longs)176 size_t __must_check arch_get_random_seed_longs(unsigned long *v, size_t max_longs)
177 {
178 if (max_longs && ppc_md.get_random_seed && ppc_md.get_random_seed(v))
179 return 1;
180 return 0;
181 }
182 EXPORT_SYMBOL(arch_get_random_seed_longs);
183
machine_halt(void)184 void machine_halt(void)
185 {
186 machine_shutdown();
187 if (ppc_md.halt)
188 ppc_md.halt();
189
190 smp_send_stop();
191 machine_hang();
192 }
193
194 #ifdef CONFIG_SMP
195 DEFINE_PER_CPU(unsigned int, cpu_pvr);
196 #endif
197
show_cpuinfo_summary(struct seq_file * m)198 static void show_cpuinfo_summary(struct seq_file *m)
199 {
200 struct device_node *root;
201 const char *model = NULL;
202 unsigned long bogosum = 0;
203 int i;
204
205 if (IS_ENABLED(CONFIG_SMP) && IS_ENABLED(CONFIG_PPC32)) {
206 for_each_online_cpu(i)
207 bogosum += loops_per_jiffy;
208 seq_printf(m, "total bogomips\t: %lu.%02lu\n",
209 bogosum / (500000 / HZ), bogosum / (5000 / HZ) % 100);
210 }
211 seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
212 if (ppc_md.name)
213 seq_printf(m, "platform\t: %s\n", ppc_md.name);
214 root = of_find_node_by_path("/");
215 if (root)
216 model = of_get_property(root, "model", NULL);
217 if (model)
218 seq_printf(m, "model\t\t: %s\n", model);
219 of_node_put(root);
220
221 if (ppc_md.show_cpuinfo != NULL)
222 ppc_md.show_cpuinfo(m);
223
224 /* Display the amount of memory */
225 if (IS_ENABLED(CONFIG_PPC32))
226 seq_printf(m, "Memory\t\t: %d MB\n",
227 (unsigned int)(total_memory / (1024 * 1024)));
228 }
229
show_cpuinfo(struct seq_file * m,void * v)230 static int show_cpuinfo(struct seq_file *m, void *v)
231 {
232 unsigned long cpu_id = (unsigned long)v - 1;
233 unsigned int pvr;
234 unsigned long proc_freq;
235 unsigned short maj;
236 unsigned short min;
237
238 #ifdef CONFIG_SMP
239 pvr = per_cpu(cpu_pvr, cpu_id);
240 #else
241 pvr = mfspr(SPRN_PVR);
242 #endif
243 maj = (pvr >> 8) & 0xFF;
244 min = pvr & 0xFF;
245
246 seq_printf(m, "processor\t: %lu\ncpu\t\t: ", cpu_id);
247
248 if (cur_cpu_spec->pvr_mask && cur_cpu_spec->cpu_name)
249 seq_puts(m, cur_cpu_spec->cpu_name);
250 else
251 seq_printf(m, "unknown (%08x)", pvr);
252
253 if (cpu_has_feature(CPU_FTR_ALTIVEC))
254 seq_puts(m, ", altivec supported");
255
256 seq_putc(m, '\n');
257
258 #ifdef CONFIG_TAU
259 if (cpu_has_feature(CPU_FTR_TAU)) {
260 if (IS_ENABLED(CONFIG_TAU_AVERAGE)) {
261 /* more straightforward, but potentially misleading */
262 seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
263 cpu_temp(cpu_id));
264 } else {
265 /* show the actual temp sensor range */
266 u32 temp;
267 temp = cpu_temp_both(cpu_id);
268 seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
269 temp & 0xff, temp >> 16);
270 }
271 }
272 #endif /* CONFIG_TAU */
273
274 /*
275 * Platforms that have variable clock rates, should implement
276 * the method ppc_md.get_proc_freq() that reports the clock
277 * rate of a given cpu. The rest can use ppc_proc_freq to
278 * report the clock rate that is same across all cpus.
279 */
280 if (ppc_md.get_proc_freq)
281 proc_freq = ppc_md.get_proc_freq(cpu_id);
282 else
283 proc_freq = ppc_proc_freq;
284
285 if (proc_freq)
286 seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
287 proc_freq / 1000000, proc_freq % 1000000);
288
289 /* If we are a Freescale core do a simple check so
290 * we don't have to keep adding cases in the future */
291 if (PVR_VER(pvr) & 0x8000) {
292 switch (PVR_VER(pvr)) {
293 case 0x8000: /* 7441/7450/7451, Voyager */
294 case 0x8001: /* 7445/7455, Apollo 6 */
295 case 0x8002: /* 7447/7457, Apollo 7 */
296 case 0x8003: /* 7447A, Apollo 7 PM */
297 case 0x8004: /* 7448, Apollo 8 */
298 case 0x800c: /* 7410, Nitro */
299 maj = ((pvr >> 8) & 0xF);
300 min = PVR_MIN(pvr);
301 break;
302 default: /* e500/book-e */
303 maj = PVR_MAJ(pvr);
304 min = PVR_MIN(pvr);
305 break;
306 }
307 } else {
308 switch (PVR_VER(pvr)) {
309 case 0x1008: /* 740P/750P ?? */
310 maj = ((pvr >> 8) & 0xFF) - 1;
311 min = pvr & 0xFF;
312 break;
313 case 0x004e: /* POWER9 bits 12-15 give chip type */
314 case 0x0080: /* POWER10 bit 12 gives SMT8/4 */
315 maj = (pvr >> 8) & 0x0F;
316 min = pvr & 0xFF;
317 break;
318 default:
319 maj = (pvr >> 8) & 0xFF;
320 min = pvr & 0xFF;
321 break;
322 }
323 }
324
325 seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
326 maj, min, PVR_VER(pvr), PVR_REV(pvr));
327
328 if (IS_ENABLED(CONFIG_PPC32))
329 seq_printf(m, "bogomips\t: %lu.%02lu\n", loops_per_jiffy / (500000 / HZ),
330 (loops_per_jiffy / (5000 / HZ)) % 100);
331
332 seq_putc(m, '\n');
333
334 /* If this is the last cpu, print the summary */
335 if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
336 show_cpuinfo_summary(m);
337
338 return 0;
339 }
340
c_start(struct seq_file * m,loff_t * pos)341 static void *c_start(struct seq_file *m, loff_t *pos)
342 {
343 if (*pos == 0) /* just in case, cpu 0 is not the first */
344 *pos = cpumask_first(cpu_online_mask);
345 else
346 *pos = cpumask_next(*pos - 1, cpu_online_mask);
347 if ((*pos) < nr_cpu_ids)
348 return (void *)(unsigned long)(*pos + 1);
349 return NULL;
350 }
351
c_next(struct seq_file * m,void * v,loff_t * pos)352 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
353 {
354 (*pos)++;
355 return c_start(m, pos);
356 }
357
c_stop(struct seq_file * m,void * v)358 static void c_stop(struct seq_file *m, void *v)
359 {
360 }
361
362 const struct seq_operations cpuinfo_op = {
363 .start = c_start,
364 .next = c_next,
365 .stop = c_stop,
366 .show = show_cpuinfo,
367 };
368
check_for_initrd(void)369 void __init check_for_initrd(void)
370 {
371 #ifdef CONFIG_BLK_DEV_INITRD
372 DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
373 initrd_start, initrd_end);
374
375 /* If we were passed an initrd, set the ROOT_DEV properly if the values
376 * look sensible. If not, clear initrd reference.
377 */
378 if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
379 initrd_end > initrd_start)
380 ROOT_DEV = Root_RAM0;
381 else
382 initrd_start = initrd_end = 0;
383
384 if (initrd_start)
385 pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
386
387 DBG(" <- check_for_initrd()\n");
388 #endif /* CONFIG_BLK_DEV_INITRD */
389 }
390
391 #ifdef CONFIG_SMP
392
393 int threads_per_core, threads_per_subcore, threads_shift __read_mostly;
394 cpumask_t threads_core_mask __read_mostly;
395 EXPORT_SYMBOL_GPL(threads_per_core);
396 EXPORT_SYMBOL_GPL(threads_per_subcore);
397 EXPORT_SYMBOL_GPL(threads_shift);
398 EXPORT_SYMBOL_GPL(threads_core_mask);
399
cpu_init_thread_core_maps(int tpc)400 static void __init cpu_init_thread_core_maps(int tpc)
401 {
402 int i;
403
404 threads_per_core = tpc;
405 threads_per_subcore = tpc;
406 cpumask_clear(&threads_core_mask);
407
408 /* This implementation only supports power of 2 number of threads
409 * for simplicity and performance
410 */
411 threads_shift = ilog2(tpc);
412 BUG_ON(tpc != (1 << threads_shift));
413
414 for (i = 0; i < tpc; i++)
415 cpumask_set_cpu(i, &threads_core_mask);
416
417 printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
418 tpc, tpc > 1 ? "s" : "");
419 printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
420 }
421
422
423 u32 *cpu_to_phys_id = NULL;
424
425 /**
426 * setup_cpu_maps - initialize the following cpu maps:
427 * cpu_possible_mask
428 * cpu_present_mask
429 *
430 * Having the possible map set up early allows us to restrict allocations
431 * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
432 *
433 * We do not initialize the online map here; cpus set their own bits in
434 * cpu_online_mask as they come up.
435 *
436 * This function is valid only for Open Firmware systems. finish_device_tree
437 * must be called before using this.
438 *
439 * While we're here, we may as well set the "physical" cpu ids in the paca.
440 *
441 * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
442 */
smp_setup_cpu_maps(void)443 void __init smp_setup_cpu_maps(void)
444 {
445 struct device_node *dn;
446 int cpu = 0;
447 int nthreads = 1;
448
449 DBG("smp_setup_cpu_maps()\n");
450
451 cpu_to_phys_id = memblock_alloc(nr_cpu_ids * sizeof(u32),
452 __alignof__(u32));
453 if (!cpu_to_phys_id)
454 panic("%s: Failed to allocate %zu bytes align=0x%zx\n",
455 __func__, nr_cpu_ids * sizeof(u32), __alignof__(u32));
456
457 for_each_node_by_type(dn, "cpu") {
458 const __be32 *intserv;
459 __be32 cpu_be;
460 int j, len;
461
462 DBG(" * %pOF...\n", dn);
463
464 intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
465 &len);
466 if (intserv) {
467 DBG(" ibm,ppc-interrupt-server#s -> %lu threads\n",
468 (len / sizeof(int)));
469 } else {
470 DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
471 intserv = of_get_property(dn, "reg", &len);
472 if (!intserv) {
473 cpu_be = cpu_to_be32(cpu);
474 /* XXX: what is this? uninitialized?? */
475 intserv = &cpu_be; /* assume logical == phys */
476 len = 4;
477 }
478 }
479
480 nthreads = len / sizeof(int);
481
482 for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
483 bool avail;
484
485 DBG(" thread %d -> cpu %d (hard id %d)\n",
486 j, cpu, be32_to_cpu(intserv[j]));
487
488 avail = of_device_is_available(dn);
489 if (!avail)
490 avail = !of_property_match_string(dn,
491 "enable-method", "spin-table");
492
493 set_cpu_present(cpu, avail);
494 set_cpu_possible(cpu, true);
495 cpu_to_phys_id[cpu] = be32_to_cpu(intserv[j]);
496 cpu++;
497 }
498
499 if (cpu >= nr_cpu_ids) {
500 of_node_put(dn);
501 break;
502 }
503 }
504
505 /* If no SMT supported, nthreads is forced to 1 */
506 if (!cpu_has_feature(CPU_FTR_SMT)) {
507 DBG(" SMT disabled ! nthreads forced to 1\n");
508 nthreads = 1;
509 }
510
511 #ifdef CONFIG_PPC64
512 /*
513 * On pSeries LPAR, we need to know how many cpus
514 * could possibly be added to this partition.
515 */
516 if (firmware_has_feature(FW_FEATURE_LPAR) &&
517 (dn = of_find_node_by_path("/rtas"))) {
518 int num_addr_cell, num_size_cell, maxcpus;
519 const __be32 *ireg;
520
521 num_addr_cell = of_n_addr_cells(dn);
522 num_size_cell = of_n_size_cells(dn);
523
524 ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
525
526 if (!ireg)
527 goto out;
528
529 maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
530
531 /* Double maxcpus for processors which have SMT capability */
532 if (cpu_has_feature(CPU_FTR_SMT))
533 maxcpus *= nthreads;
534
535 if (maxcpus > nr_cpu_ids) {
536 printk(KERN_WARNING
537 "Partition configured for %d cpus, "
538 "operating system maximum is %u.\n",
539 maxcpus, nr_cpu_ids);
540 maxcpus = nr_cpu_ids;
541 } else
542 printk(KERN_INFO "Partition configured for %d cpus.\n",
543 maxcpus);
544
545 for (cpu = 0; cpu < maxcpus; cpu++)
546 set_cpu_possible(cpu, true);
547 out:
548 of_node_put(dn);
549 }
550 vdso_data->processorCount = num_present_cpus();
551 #endif /* CONFIG_PPC64 */
552
553 /* Initialize CPU <=> thread mapping/
554 *
555 * WARNING: We assume that the number of threads is the same for
556 * every CPU in the system. If that is not the case, then some code
557 * here will have to be reworked
558 */
559 cpu_init_thread_core_maps(nthreads);
560
561 /* Now that possible cpus are set, set nr_cpu_ids for later use */
562 setup_nr_cpu_ids();
563
564 free_unused_pacas();
565 }
566 #endif /* CONFIG_SMP */
567
568 #ifdef CONFIG_PCSPKR_PLATFORM
add_pcspkr(void)569 static __init int add_pcspkr(void)
570 {
571 struct device_node *np;
572 struct platform_device *pd;
573 int ret;
574
575 np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
576 of_node_put(np);
577 if (!np)
578 return -ENODEV;
579
580 pd = platform_device_alloc("pcspkr", -1);
581 if (!pd)
582 return -ENOMEM;
583
584 ret = platform_device_add(pd);
585 if (ret)
586 platform_device_put(pd);
587
588 return ret;
589 }
590 device_initcall(add_pcspkr);
591 #endif /* CONFIG_PCSPKR_PLATFORM */
592
593 static char ppc_hw_desc_buf[128] __initdata;
594
595 struct seq_buf ppc_hw_desc __initdata = {
596 .buffer = ppc_hw_desc_buf,
597 .size = sizeof(ppc_hw_desc_buf),
598 .len = 0,
599 .readpos = 0,
600 };
601
probe_machine(void)602 static __init void probe_machine(void)
603 {
604 extern struct machdep_calls __machine_desc_start;
605 extern struct machdep_calls __machine_desc_end;
606 unsigned int i;
607
608 /*
609 * Iterate all ppc_md structures until we find the proper
610 * one for the current machine type
611 */
612 DBG("Probing machine type ...\n");
613
614 /*
615 * Check ppc_md is empty, if not we have a bug, ie, we setup an
616 * entry before probe_machine() which will be overwritten
617 */
618 for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) {
619 if (((void **)&ppc_md)[i]) {
620 printk(KERN_ERR "Entry %d in ppc_md non empty before"
621 " machine probe !\n", i);
622 }
623 }
624
625 for (machine_id = &__machine_desc_start;
626 machine_id < &__machine_desc_end;
627 machine_id++) {
628 DBG(" %s ...", machine_id->name);
629 memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
630 if (ppc_md.probe()) {
631 DBG(" match !\n");
632 break;
633 }
634 DBG("\n");
635 }
636 /* What can we do if we didn't find ? */
637 if (machine_id >= &__machine_desc_end) {
638 pr_err("No suitable machine description found !\n");
639 for (;;);
640 }
641
642 // Append the machine name to other info we've gathered
643 seq_buf_puts(&ppc_hw_desc, ppc_md.name);
644
645 // Set the generic hardware description shown in oopses
646 dump_stack_set_arch_desc(ppc_hw_desc.buffer);
647
648 pr_info("Hardware name: %s\n", ppc_hw_desc.buffer);
649 }
650
651 /* Match a class of boards, not a specific device configuration. */
check_legacy_ioport(unsigned long base_port)652 int check_legacy_ioport(unsigned long base_port)
653 {
654 struct device_node *parent, *np = NULL;
655 int ret = -ENODEV;
656
657 switch(base_port) {
658 case I8042_DATA_REG:
659 if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
660 np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
661 if (np) {
662 parent = of_get_parent(np);
663
664 of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
665 if (!of_i8042_kbd_irq)
666 of_i8042_kbd_irq = 1;
667
668 of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
669 if (!of_i8042_aux_irq)
670 of_i8042_aux_irq = 12;
671
672 of_node_put(np);
673 np = parent;
674 break;
675 }
676 np = of_find_node_by_type(NULL, "8042");
677 /* Pegasos has no device_type on its 8042 node, look for the
678 * name instead */
679 if (!np)
680 np = of_find_node_by_name(NULL, "8042");
681 if (np) {
682 of_i8042_kbd_irq = 1;
683 of_i8042_aux_irq = 12;
684 }
685 break;
686 case FDC_BASE: /* FDC1 */
687 np = of_find_node_by_type(NULL, "fdc");
688 break;
689 default:
690 /* ipmi is supposed to fail here */
691 break;
692 }
693 if (!np)
694 return ret;
695 parent = of_get_parent(np);
696 if (parent) {
697 if (of_node_is_type(parent, "isa"))
698 ret = 0;
699 of_node_put(parent);
700 }
701 of_node_put(np);
702 return ret;
703 }
704 EXPORT_SYMBOL(check_legacy_ioport);
705
706 /*
707 * Panic notifiers setup
708 *
709 * We have 3 notifiers for powerpc, each one from a different "nature":
710 *
711 * - ppc_panic_fadump_handler() is a hypervisor notifier, which hard-disables
712 * IRQs and deal with the Firmware-Assisted dump, when it is configured;
713 * should run early in the panic path.
714 *
715 * - dump_kernel_offset() is an informative notifier, just showing the KASLR
716 * offset if we have RANDOMIZE_BASE set.
717 *
718 * - ppc_panic_platform_handler() is a low-level handler that's registered
719 * only if the platform wishes to perform final actions in the panic path,
720 * hence it should run late and might not even return. Currently, only
721 * pseries and ps3 platforms register callbacks.
722 */
ppc_panic_fadump_handler(struct notifier_block * this,unsigned long event,void * ptr)723 static int ppc_panic_fadump_handler(struct notifier_block *this,
724 unsigned long event, void *ptr)
725 {
726 /*
727 * panic does a local_irq_disable, but we really
728 * want interrupts to be hard disabled.
729 */
730 hard_irq_disable();
731
732 /*
733 * If firmware-assisted dump has been registered then trigger
734 * its callback and let the firmware handles everything else.
735 */
736 crash_fadump(NULL, ptr);
737
738 return NOTIFY_DONE;
739 }
740
dump_kernel_offset(struct notifier_block * self,unsigned long v,void * p)741 static int dump_kernel_offset(struct notifier_block *self, unsigned long v,
742 void *p)
743 {
744 pr_emerg("Kernel Offset: 0x%lx from 0x%lx\n",
745 kaslr_offset(), KERNELBASE);
746
747 return NOTIFY_DONE;
748 }
749
ppc_panic_platform_handler(struct notifier_block * this,unsigned long event,void * ptr)750 static int ppc_panic_platform_handler(struct notifier_block *this,
751 unsigned long event, void *ptr)
752 {
753 /*
754 * This handler is only registered if we have a panic callback
755 * on ppc_md, hence NULL check is not needed.
756 * Also, it may not return, so it runs really late on panic path.
757 */
758 ppc_md.panic(ptr);
759
760 return NOTIFY_DONE;
761 }
762
763 static struct notifier_block ppc_fadump_block = {
764 .notifier_call = ppc_panic_fadump_handler,
765 .priority = INT_MAX, /* run early, to notify the firmware ASAP */
766 };
767
768 static struct notifier_block kernel_offset_notifier = {
769 .notifier_call = dump_kernel_offset,
770 };
771
772 static struct notifier_block ppc_panic_block = {
773 .notifier_call = ppc_panic_platform_handler,
774 .priority = INT_MIN, /* may not return; must be done last */
775 };
776
setup_panic(void)777 void __init setup_panic(void)
778 {
779 /* Hard-disables IRQs + deal with FW-assisted dump (fadump) */
780 atomic_notifier_chain_register(&panic_notifier_list,
781 &ppc_fadump_block);
782
783 if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && kaslr_offset() > 0)
784 atomic_notifier_chain_register(&panic_notifier_list,
785 &kernel_offset_notifier);
786
787 /* Low-level platform-specific routines that should run on panic */
788 if (ppc_md.panic)
789 atomic_notifier_chain_register(&panic_notifier_list,
790 &ppc_panic_block);
791 }
792
793 #ifdef CONFIG_CHECK_CACHE_COHERENCY
794 /*
795 * For platforms that have configurable cache-coherency. This function
796 * checks that the cache coherency setting of the kernel matches the setting
797 * left by the firmware, as indicated in the device tree. Since a mismatch
798 * will eventually result in DMA failures, we print * and error and call
799 * BUG() in that case.
800 */
801
802 #define KERNEL_COHERENCY (!IS_ENABLED(CONFIG_NOT_COHERENT_CACHE))
803
check_cache_coherency(void)804 static int __init check_cache_coherency(void)
805 {
806 struct device_node *np;
807 const void *prop;
808 bool devtree_coherency;
809
810 np = of_find_node_by_path("/");
811 prop = of_get_property(np, "coherency-off", NULL);
812 of_node_put(np);
813
814 devtree_coherency = prop ? false : true;
815
816 if (devtree_coherency != KERNEL_COHERENCY) {
817 printk(KERN_ERR
818 "kernel coherency:%s != device tree_coherency:%s\n",
819 KERNEL_COHERENCY ? "on" : "off",
820 devtree_coherency ? "on" : "off");
821 BUG();
822 }
823
824 return 0;
825 }
826
827 late_initcall(check_cache_coherency);
828 #endif /* CONFIG_CHECK_CACHE_COHERENCY */
829
ppc_printk_progress(char * s,unsigned short hex)830 void ppc_printk_progress(char *s, unsigned short hex)
831 {
832 pr_info("%s\n", s);
833 }
834
print_system_info(void)835 static __init void print_system_info(void)
836 {
837 pr_info("-----------------------------------------------------\n");
838 pr_info("phys_mem_size = 0x%llx\n",
839 (unsigned long long)memblock_phys_mem_size());
840
841 pr_info("dcache_bsize = 0x%x\n", dcache_bsize);
842 pr_info("icache_bsize = 0x%x\n", icache_bsize);
843
844 pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features);
845 pr_info(" possible = 0x%016lx\n",
846 (unsigned long)CPU_FTRS_POSSIBLE);
847 pr_info(" always = 0x%016lx\n",
848 (unsigned long)CPU_FTRS_ALWAYS);
849 pr_info("cpu_user_features = 0x%08x 0x%08x\n",
850 cur_cpu_spec->cpu_user_features,
851 cur_cpu_spec->cpu_user_features2);
852 pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features);
853 #ifdef CONFIG_PPC64
854 pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
855 #ifdef CONFIG_PPC_BOOK3S
856 pr_info("vmalloc start = 0x%lx\n", KERN_VIRT_START);
857 pr_info("IO start = 0x%lx\n", KERN_IO_START);
858 pr_info("vmemmap start = 0x%lx\n", (unsigned long)vmemmap);
859 #endif
860 #endif
861
862 if (!early_radix_enabled())
863 print_system_hash_info();
864
865 if (PHYSICAL_START > 0)
866 pr_info("physical_start = 0x%llx\n",
867 (unsigned long long)PHYSICAL_START);
868 pr_info("-----------------------------------------------------\n");
869 }
870
871 #ifdef CONFIG_SMP
smp_setup_pacas(void)872 static void __init smp_setup_pacas(void)
873 {
874 int cpu;
875
876 for_each_possible_cpu(cpu) {
877 if (cpu == smp_processor_id())
878 continue;
879 allocate_paca(cpu);
880 set_hard_smp_processor_id(cpu, cpu_to_phys_id[cpu]);
881 }
882
883 memblock_free(cpu_to_phys_id, nr_cpu_ids * sizeof(u32));
884 cpu_to_phys_id = NULL;
885 }
886 #endif
887
888 /*
889 * Called into from start_kernel this initializes memblock, which is used
890 * to manage page allocation until mem_init is called.
891 */
setup_arch(char ** cmdline_p)892 void __init setup_arch(char **cmdline_p)
893 {
894 kasan_init();
895
896 *cmdline_p = boot_command_line;
897
898 /* Set a half-reasonable default so udelay does something sensible */
899 loops_per_jiffy = 500000000 / HZ;
900
901 /* Unflatten the device-tree passed by prom_init or kexec */
902 unflatten_device_tree();
903
904 /*
905 * Initialize cache line/block info from device-tree (on ppc64) or
906 * just cputable (on ppc32).
907 */
908 initialize_cache_info();
909
910 /* Initialize RTAS if available. */
911 rtas_initialize();
912
913 /* Check if we have an initrd provided via the device-tree. */
914 check_for_initrd();
915
916 /* Probe the machine type, establish ppc_md. */
917 probe_machine();
918
919 /* Setup panic notifier if requested by the platform. */
920 setup_panic();
921
922 /*
923 * Configure ppc_md.power_save (ppc32 only, 64-bit machines do
924 * it from their respective probe() function.
925 */
926 setup_power_save();
927
928 /* Discover standard serial ports. */
929 find_legacy_serial_ports();
930
931 /* Register early console with the printk subsystem. */
932 register_early_udbg_console();
933
934 /* Setup the various CPU maps based on the device-tree. */
935 smp_setup_cpu_maps();
936
937 /* Initialize xmon. */
938 xmon_setup();
939
940 /* Check the SMT related command line arguments (ppc64). */
941 check_smt_enabled();
942
943 /* Parse memory topology */
944 mem_topology_setup();
945
946 /*
947 * Release secondary cpus out of their spinloops at 0x60 now that
948 * we can map physical -> logical CPU ids.
949 *
950 * Freescale Book3e parts spin in a loop provided by firmware,
951 * so smp_release_cpus() does nothing for them.
952 */
953 #ifdef CONFIG_SMP
954 smp_setup_pacas();
955
956 /* On BookE, setup per-core TLB data structures. */
957 setup_tlb_core_data();
958 #endif
959
960 /* Print various info about the machine that has been gathered so far. */
961 print_system_info();
962
963 klp_init_thread_info(&init_task);
964
965 setup_initial_init_mm(_stext, _etext, _edata, _end);
966
967 mm_iommu_init(&init_mm);
968 irqstack_early_init();
969 exc_lvl_early_init();
970 emergency_stack_init();
971
972 mce_init();
973 smp_release_cpus();
974
975 initmem_init();
976
977 /*
978 * Reserve large chunks of memory for use by CMA for KVM and hugetlb. These must
979 * be called after initmem_init(), so that pageblock_order is initialised.
980 */
981 kvm_cma_reserve();
982 gigantic_hugetlb_cma_reserve();
983
984 early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
985
986 if (ppc_md.setup_arch)
987 ppc_md.setup_arch();
988
989 setup_barrier_nospec();
990 setup_spectre_v2();
991
992 paging_init();
993
994 /* Initialize the MMU context management stuff. */
995 mmu_context_init();
996
997 /* Interrupt code needs to be 64K-aligned. */
998 if (IS_ENABLED(CONFIG_PPC64) && (unsigned long)_stext & 0xffff)
999 panic("Kernelbase not 64K-aligned (0x%lx)!\n",
1000 (unsigned long)_stext);
1001 }
1002