1 /*
2  * Common time prototypes and such for all ppc machines.
3  *
4  * Written by Cort Dougan (cort@cs.nmt.edu) to merge
5  * Paul Mackerras' version and mine for PReP and Pmac.
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License
9  * as published by the Free Software Foundation; either version
10  * 2 of the License, or (at your option) any later version.
11  */
12 
13 #ifndef __POWERPC_TIME_H
14 #define __POWERPC_TIME_H
15 
16 #ifdef __KERNEL__
17 #include <linux/types.h>
18 #include <linux/percpu.h>
19 
20 #include <asm/processor.h>
21 
22 /* time.c */
23 extern unsigned long tb_ticks_per_jiffy;
24 extern unsigned long tb_ticks_per_usec;
25 extern unsigned long tb_ticks_per_sec;
26 
27 struct rtc_time;
28 extern void to_tm(int tim, struct rtc_time * tm);
29 extern void GregorianDay(struct rtc_time *tm);
30 
31 extern void generic_calibrate_decr(void);
32 
33 extern void set_dec_cpu6(unsigned int val);
34 
35 /* Some sane defaults: 125 MHz timebase, 1GHz processor */
36 extern unsigned long ppc_proc_freq;
37 #define DEFAULT_PROC_FREQ	(DEFAULT_TB_FREQ * 8)
38 extern unsigned long ppc_tb_freq;
39 #define DEFAULT_TB_FREQ		125000000UL
40 
41 struct div_result {
42 	u64 result_high;
43 	u64 result_low;
44 };
45 
46 /* Accessor functions for the timebase (RTC on 601) registers. */
47 /* If one day CONFIG_POWER is added just define __USE_RTC as 1 */
48 #ifdef CONFIG_6xx
49 #define __USE_RTC()	(!cpu_has_feature(CPU_FTR_USE_TB))
50 #else
51 #define __USE_RTC()	0
52 #endif
53 
54 #ifdef CONFIG_PPC64
55 
56 /* For compatibility, get_tbl() is defined as get_tb() on ppc64 */
57 #define get_tbl		get_tb
58 
59 #else
60 
get_tbl(void)61 static inline unsigned long get_tbl(void)
62 {
63 #if defined(CONFIG_403GCX)
64 	unsigned long tbl;
65 	asm volatile("mfspr %0, 0x3dd" : "=r" (tbl));
66 	return tbl;
67 #else
68 	return mftbl();
69 #endif
70 }
71 
get_tbu(void)72 static inline unsigned int get_tbu(void)
73 {
74 #ifdef CONFIG_403GCX
75 	unsigned int tbu;
76 	asm volatile("mfspr %0, 0x3dc" : "=r" (tbu));
77 	return tbu;
78 #else
79 	return mftbu();
80 #endif
81 }
82 #endif /* !CONFIG_PPC64 */
83 
get_rtcl(void)84 static inline unsigned int get_rtcl(void)
85 {
86 	unsigned int rtcl;
87 
88 	asm volatile("mfrtcl %0" : "=r" (rtcl));
89 	return rtcl;
90 }
91 
get_rtc(void)92 static inline u64 get_rtc(void)
93 {
94 	unsigned int hi, lo, hi2;
95 
96 	do {
97 		asm volatile("mfrtcu %0; mfrtcl %1; mfrtcu %2"
98 			     : "=r" (hi), "=r" (lo), "=r" (hi2));
99 	} while (hi2 != hi);
100 	return (u64)hi * 1000000000 + lo;
101 }
102 
103 #ifdef CONFIG_PPC64
get_tb(void)104 static inline u64 get_tb(void)
105 {
106 	return mftb();
107 }
108 #else /* CONFIG_PPC64 */
get_tb(void)109 static inline u64 get_tb(void)
110 {
111 	unsigned int tbhi, tblo, tbhi2;
112 
113 	do {
114 		tbhi = get_tbu();
115 		tblo = get_tbl();
116 		tbhi2 = get_tbu();
117 	} while (tbhi != tbhi2);
118 
119 	return ((u64)tbhi << 32) | tblo;
120 }
121 #endif /* !CONFIG_PPC64 */
122 
get_tb_or_rtc(void)123 static inline u64 get_tb_or_rtc(void)
124 {
125 	return __USE_RTC() ? get_rtc() : get_tb();
126 }
127 
set_tb(unsigned int upper,unsigned int lower)128 static inline void set_tb(unsigned int upper, unsigned int lower)
129 {
130 	mtspr(SPRN_TBWL, 0);
131 	mtspr(SPRN_TBWU, upper);
132 	mtspr(SPRN_TBWL, lower);
133 }
134 
135 /* Accessor functions for the decrementer register.
136  * The 4xx doesn't even have a decrementer.  I tried to use the
137  * generic timer interrupt code, which seems OK, with the 4xx PIT
138  * in auto-reload mode.  The problem is PIT stops counting when it
139  * hits zero.  If it would wrap, we could use it just like a decrementer.
140  */
get_dec(void)141 static inline unsigned int get_dec(void)
142 {
143 #if defined(CONFIG_40x)
144 	return (mfspr(SPRN_PIT));
145 #else
146 	return (mfspr(SPRN_DEC));
147 #endif
148 }
149 
150 /*
151  * Note: Book E and 4xx processors differ from other PowerPC processors
152  * in when the decrementer generates its interrupt: on the 1 to 0
153  * transition for Book E/4xx, but on the 0 to -1 transition for others.
154  */
set_dec(int val)155 static inline void set_dec(int val)
156 {
157 #if defined(CONFIG_40x)
158 	mtspr(SPRN_PIT, val);
159 #elif defined(CONFIG_8xx_CPU6)
160 	set_dec_cpu6(val - 1);
161 #else
162 #ifndef CONFIG_BOOKE
163 	--val;
164 #endif
165 	mtspr(SPRN_DEC, val);
166 #endif /* not 40x or 8xx_CPU6 */
167 }
168 
tb_ticks_since(unsigned long tstamp)169 static inline unsigned long tb_ticks_since(unsigned long tstamp)
170 {
171 	if (__USE_RTC()) {
172 		int delta = get_rtcl() - (unsigned int) tstamp;
173 		return delta < 0 ? delta + 1000000000 : delta;
174 	}
175 	return get_tbl() - tstamp;
176 }
177 
178 #define mulhwu(x,y) \
179 ({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
180 
181 #ifdef CONFIG_PPC64
182 #define mulhdu(x,y) \
183 ({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
184 #else
185 extern u64 mulhdu(u64, u64);
186 #endif
187 
188 extern void div128_by_32(u64 dividend_high, u64 dividend_low,
189 			 unsigned divisor, struct div_result *dr);
190 
191 /* Used to store Processor Utilization register (purr) values */
192 
193 struct cpu_usage {
194         u64 current_tb;  /* Holds the current purr register values */
195 };
196 
197 DECLARE_PER_CPU(struct cpu_usage, cpu_usage_array);
198 
199 #if defined(CONFIG_VIRT_CPU_ACCOUNTING)
200 #define account_process_vtime(tsk)		account_process_tick(tsk, 0)
201 #else
202 #define account_process_vtime(tsk)		do { } while (0)
203 #endif
204 
205 extern void secondary_cpu_time_init(void);
206 
207 DECLARE_PER_CPU(u64, decrementers_next_tb);
208 
209 #endif /* __KERNEL__ */
210 #endif /* __POWERPC_TIME_H */
211