1 /*
2 * linux/arch/arm/mach-sa1100/irq.c
3 *
4 * Copyright (C) 1999-2001 Nicolas Pitre
5 *
6 * Generic IRQ handling for the SA11x0, GPIO 11-27 IRQ demultiplexing.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/sched.h>
15 #include <linux/interrupt.h>
16 #include <linux/ioport.h>
17 #include <linux/ptrace.h>
18 #include <linux/list.h>
19 #include <linux/timer.h>
20
21 #include <asm/hardware.h>
22 #include <asm/irq.h>
23 #include <asm/mach/irq.h>
24 #include <asm/arch/irq.h>
25
26 #include "generic.h"
27
28
29 /*
30 * SA1100 GPIO edge detection for IRQs:
31 * IRQs are generated on Falling-Edge, Rising-Edge, or both.
32 * This must be called *before* the appropriate IRQ is registered.
33 * Use this instead of directly setting GRER/GFER.
34 */
35 static int GPIO_IRQ_rising_edge;
36 static int GPIO_IRQ_falling_edge;
37 static int GPIO_IRQ_mask = (1 << 11) - 1;
38
set_GPIO_IRQ_edge(int gpio_mask,int edge)39 void set_GPIO_IRQ_edge(int gpio_mask, int edge)
40 {
41 long flags;
42 int irq = 0;
43
44 gpio_mask &= 0x0fffffff;
45 local_irq_save(flags);
46 if (edge & GPIO_FALLING_EDGE)
47 GPIO_IRQ_falling_edge |= gpio_mask;
48 else
49 GPIO_IRQ_falling_edge &= ~gpio_mask;
50 if (edge & GPIO_RISING_EDGE)
51 GPIO_IRQ_rising_edge |= gpio_mask;
52 else
53 GPIO_IRQ_rising_edge &= ~gpio_mask;
54 GPDR &= ~gpio_mask;
55 GAFR &= ~gpio_mask;
56 GRER = GPIO_IRQ_rising_edge & GPIO_IRQ_mask;
57 GFER = GPIO_IRQ_falling_edge & GPIO_IRQ_mask;
58 while (gpio_mask) {
59 if (irq == 11)
60 irq = IRQ_GPIO11;
61 if (gpio_mask & 1)
62 irq_desc[irq].valid = 1;
63 irq++;
64 gpio_mask >>= 1;
65 }
66 local_irq_restore(flags);
67 }
68
69 EXPORT_SYMBOL(set_GPIO_IRQ_edge);
70
71
72 /*
73 * We don't need to ACK IRQs on the SA1100 unless they're GPIOs
74 * this is for internal IRQs i.e. from 11 to 31.
75 */
76
sa1100_mask_irq(unsigned int irq)77 static void sa1100_mask_irq(unsigned int irq)
78 {
79 ICMR &= ~(1 << irq);
80 }
81
sa1100_unmask_irq(unsigned int irq)82 static void sa1100_unmask_irq(unsigned int irq)
83 {
84 ICMR |= (1 << irq);
85 }
86
87 /*
88 * GPIO IRQs must be acknoledged. This is for IRQs from 0 to 10.
89 */
90
sa1100_mask_and_ack_GPIO0_10_irq(unsigned int irq)91 static void sa1100_mask_and_ack_GPIO0_10_irq(unsigned int irq)
92 {
93 unsigned int mask = 1 << irq;
94
95 ICMR &= ~mask;
96 GEDR = mask;
97 }
98
sa1100_mask_GPIO0_10_irq(unsigned int irq)99 static void sa1100_mask_GPIO0_10_irq(unsigned int irq)
100 {
101 ICMR &= ~(1 << irq);
102 }
103
sa1100_unmask_GPIO0_10_irq(unsigned int irq)104 static void sa1100_unmask_GPIO0_10_irq(unsigned int irq)
105 {
106 ICMR |= 1 << irq;
107 }
108
109 /*
110 * Install handler for GPIO 11-27 edge detect interrupts
111 */
112
113 static int GPIO_11_27_spurious; /* GPIOs that triggered when masked */
114
sa1100_GPIO11_27_demux(int irq,void * dev_id,struct pt_regs * regs)115 static void sa1100_GPIO11_27_demux(int irq, void *dev_id,
116 struct pt_regs *regs)
117 {
118 int i, spurious;
119
120 while ((irq = (GEDR & 0xfffff800))) {
121 /*
122 * We don't want to clear GRER/GFER when the corresponding
123 * IRQ is masked because we could miss a level transition
124 * i.e. an IRQ which need servicing as soon as it is
125 * unmasked. However, such situation should happen only
126 * during the loop below. Thus all IRQs which aren't
127 * enabled at this point are considered spurious. Those
128 * are cleared but only de-activated if they happen twice.
129 */
130 spurious = irq & ~GPIO_IRQ_mask;
131 if (spurious) {
132 GEDR = spurious;
133 GRER &= ~(spurious & GPIO_11_27_spurious);
134 GFER &= ~(spurious & GPIO_11_27_spurious);
135 GPIO_11_27_spurious |= spurious;
136 irq ^= spurious;
137 if (!irq) continue;
138 }
139
140 for (i = 11; i <= 27; ++i) {
141 if (irq & (1<<i)) {
142 do_IRQ(IRQ_GPIO11 + i - 11, regs);
143 }
144 }
145 }
146 }
147
148 static struct irqaction GPIO11_27_irq = {
149 .name = "GPIO 11-27",
150 .handler = sa1100_GPIO11_27_demux,
151 .flags = SA_INTERRUPT
152 };
153
sa1100_mask_and_ack_GPIO11_27_irq(unsigned int irq)154 static void sa1100_mask_and_ack_GPIO11_27_irq(unsigned int irq)
155 {
156 unsigned int mask = (1 << GPIO_11_27_IRQ(irq));
157 GPIO_11_27_spurious &= ~mask;
158 GPIO_IRQ_mask &= ~mask;
159 GEDR = mask;
160 }
161
sa1100_mask_GPIO11_27_irq(unsigned int irq)162 static void sa1100_mask_GPIO11_27_irq(unsigned int irq)
163 {
164 unsigned int mask = (1 << GPIO_11_27_IRQ(irq));
165 GPIO_11_27_spurious &= ~mask;
166 GPIO_IRQ_mask &= ~mask;
167 }
168
sa1100_unmask_GPIO11_27_irq(unsigned int irq)169 static void sa1100_unmask_GPIO11_27_irq(unsigned int irq)
170 {
171 unsigned int mask = (1 << GPIO_11_27_IRQ(irq));
172 if (GPIO_11_27_spurious & mask) {
173 /*
174 * We don't want to miss an interrupt that would have occurred
175 * while it was masked. Simulate it if it is the case.
176 */
177 int state = GPLR;
178 if (((state & GPIO_IRQ_rising_edge) |
179 (~state & GPIO_IRQ_falling_edge)) & mask)
180 {
181 /* just in case it gets referenced: */
182 struct pt_regs dummy;
183
184 memzero(&dummy, sizeof(dummy));
185 do_IRQ(irq, &dummy);
186
187 /* we are being called recursively from do_IRQ() */
188 return;
189 }
190 }
191
192 GPIO_IRQ_mask |= mask;
193
194 GRER = GPIO_IRQ_rising_edge & GPIO_IRQ_mask;
195 GFER = GPIO_IRQ_falling_edge & GPIO_IRQ_mask;
196 }
197
198 static struct resource irq_resource = {
199 .name = "irqs",
200 .start = 0x90050000,
201 .end = 0x9005ffff,
202 };
203
sa1100_init_irq(void)204 void __init sa1100_init_irq(void)
205 {
206 int irq;
207
208 request_resource(&iomem_resource, &irq_resource);
209
210 /* disable all IRQs */
211 ICMR = 0;
212
213 /* all IRQs are IRQ, not FIQ */
214 ICLR = 0;
215
216 /* clear all GPIO edge detects */
217 GFER = 0;
218 GRER = 0;
219 GEDR = -1;
220
221 /*
222 * Whatever the doc says, this has to be set for the wait-on-irq
223 * instruction to work... on a SA1100 rev 9 at least.
224 */
225 ICCR = 1;
226
227 /*
228 * Note: GPIO IRQs are initially invalid until at least one call
229 * to set_GPIO_IRQ_edge() is performed.
230 */
231
232 for (irq = 0; irq <= 10; irq++) {
233 irq_desc[irq].valid = 0;
234 irq_desc[irq].probe_ok = 1;
235 irq_desc[irq].mask_ack = sa1100_mask_and_ack_GPIO0_10_irq;
236 irq_desc[irq].mask = sa1100_mask_GPIO0_10_irq;
237 irq_desc[irq].unmask = sa1100_unmask_GPIO0_10_irq;
238 }
239
240 for (irq = 11; irq <= 31; irq++) {
241 irq_desc[irq].valid = 1;
242 irq_desc[irq].probe_ok = 0;
243 irq_desc[irq].mask_ack = sa1100_mask_irq;
244 irq_desc[irq].mask = sa1100_mask_irq;
245 irq_desc[irq].unmask = sa1100_unmask_irq;
246 }
247
248 for (irq = 32; irq <= 48; irq++) {
249 irq_desc[irq].valid = 0;
250 irq_desc[irq].probe_ok = 1;
251 irq_desc[irq].mask_ack = sa1100_mask_and_ack_GPIO11_27_irq;
252 irq_desc[irq].mask = sa1100_mask_GPIO11_27_irq;
253 irq_desc[irq].unmask = sa1100_unmask_GPIO11_27_irq;
254 }
255 setup_arm_irq( IRQ_GPIO11_27, &GPIO11_27_irq );
256 }
257