1 /* 2 * omap_hwmod macros, structures 3 * 4 * Copyright (C) 2009-2011 Nokia Corporation 5 * Copyright (C) 2011 Texas Instruments, Inc. 6 * Paul Walmsley 7 * 8 * Created in collaboration with (alphabetical order): Benoît Cousson, 9 * Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari 10 * Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License version 2 as 14 * published by the Free Software Foundation. 15 * 16 * These headers and macros are used to define OMAP on-chip module 17 * data and their integration with other OMAP modules and Linux. 18 * Copious documentation and references can also be found in the 19 * omap_hwmod code, in arch/arm/mach-omap2/omap_hwmod.c (as of this 20 * writing). 21 * 22 * To do: 23 * - add interconnect error log structures 24 * - add pinmuxing 25 * - init_conn_id_bit (CONNID_BIT_VECTOR) 26 * - implement default hwmod SMS/SDRC flags? 27 * - move Linux-specific data ("non-ROM data") out 28 * 29 */ 30 #ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H 31 #define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H 32 33 #include <linux/kernel.h> 34 #include <linux/init.h> 35 #include <linux/list.h> 36 #include <linux/ioport.h> 37 #include <linux/spinlock.h> 38 #include <plat/cpu.h> 39 40 struct omap_device; 41 42 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type1; 43 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2; 44 45 /* 46 * OCP SYSCONFIG bit shifts/masks TYPE1. These are for IPs compliant 47 * with the original PRCM protocol defined for OMAP2420 48 */ 49 #define SYSC_TYPE1_MIDLEMODE_SHIFT 12 50 #define SYSC_TYPE1_MIDLEMODE_MASK (0x3 << SYSC_TYPE1_MIDLEMODE_SHIFT) 51 #define SYSC_TYPE1_CLOCKACTIVITY_SHIFT 8 52 #define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3 << SYSC_TYPE1_CLOCKACTIVITY_SHIFT) 53 #define SYSC_TYPE1_SIDLEMODE_SHIFT 3 54 #define SYSC_TYPE1_SIDLEMODE_MASK (0x3 << SYSC_TYPE1_SIDLEMODE_SHIFT) 55 #define SYSC_TYPE1_ENAWAKEUP_SHIFT 2 56 #define SYSC_TYPE1_ENAWAKEUP_MASK (1 << SYSC_TYPE1_ENAWAKEUP_SHIFT) 57 #define SYSC_TYPE1_SOFTRESET_SHIFT 1 58 #define SYSC_TYPE1_SOFTRESET_MASK (1 << SYSC_TYPE1_SOFTRESET_SHIFT) 59 #define SYSC_TYPE1_AUTOIDLE_SHIFT 0 60 #define SYSC_TYPE1_AUTOIDLE_MASK (1 << SYSC_TYPE1_AUTOIDLE_SHIFT) 61 62 /* 63 * OCP SYSCONFIG bit shifts/masks TYPE2. These are for IPs compliant 64 * with the new PRCM protocol defined for new OMAP4 IPs. 65 */ 66 #define SYSC_TYPE2_SOFTRESET_SHIFT 0 67 #define SYSC_TYPE2_SOFTRESET_MASK (1 << SYSC_TYPE2_SOFTRESET_SHIFT) 68 #define SYSC_TYPE2_SIDLEMODE_SHIFT 2 69 #define SYSC_TYPE2_SIDLEMODE_MASK (0x3 << SYSC_TYPE2_SIDLEMODE_SHIFT) 70 #define SYSC_TYPE2_MIDLEMODE_SHIFT 4 71 #define SYSC_TYPE2_MIDLEMODE_MASK (0x3 << SYSC_TYPE2_MIDLEMODE_SHIFT) 72 73 /* OCP SYSSTATUS bit shifts/masks */ 74 #define SYSS_RESETDONE_SHIFT 0 75 #define SYSS_RESETDONE_MASK (1 << SYSS_RESETDONE_SHIFT) 76 77 /* Master standby/slave idle mode flags */ 78 #define HWMOD_IDLEMODE_FORCE (1 << 0) 79 #define HWMOD_IDLEMODE_NO (1 << 1) 80 #define HWMOD_IDLEMODE_SMART (1 << 2) 81 #define HWMOD_IDLEMODE_SMART_WKUP (1 << 3) 82 83 /* modulemode control type (SW or HW) */ 84 #define MODULEMODE_HWCTRL 1 85 #define MODULEMODE_SWCTRL 2 86 87 88 /** 89 * struct omap_hwmod_mux_info - hwmod specific mux configuration 90 * @pads: array of omap_device_pad entries 91 * @nr_pads: number of omap_device_pad entries 92 * 93 * Note that this is currently built during init as needed. 94 */ 95 struct omap_hwmod_mux_info { 96 int nr_pads; 97 struct omap_device_pad *pads; 98 int nr_pads_dynamic; 99 struct omap_device_pad **pads_dynamic; 100 int *irqs; 101 bool enabled; 102 }; 103 104 /** 105 * struct omap_hwmod_irq_info - MPU IRQs used by the hwmod 106 * @name: name of the IRQ channel (module local name) 107 * @irq: IRQ channel ID (should be non-negative except -1 = terminator) 108 * 109 * @name should be something short, e.g., "tx" or "rx". It is for use 110 * by platform_get_resource_byname(). It is defined locally to the 111 * hwmod. 112 */ 113 struct omap_hwmod_irq_info { 114 const char *name; 115 s16 irq; 116 }; 117 118 /** 119 * struct omap_hwmod_dma_info - DMA channels used by the hwmod 120 * @name: name of the DMA channel (module local name) 121 * @dma_req: DMA request ID (should be non-negative except -1 = terminator) 122 * 123 * @name should be something short, e.g., "tx" or "rx". It is for use 124 * by platform_get_resource_byname(). It is defined locally to the 125 * hwmod. 126 */ 127 struct omap_hwmod_dma_info { 128 const char *name; 129 s16 dma_req; 130 }; 131 132 /** 133 * struct omap_hwmod_rst_info - IPs reset lines use by hwmod 134 * @name: name of the reset line (module local name) 135 * @rst_shift: Offset of the reset bit 136 * @st_shift: Offset of the reset status bit (OMAP2/3 only) 137 * 138 * @name should be something short, e.g., "cpu0" or "rst". It is defined 139 * locally to the hwmod. 140 */ 141 struct omap_hwmod_rst_info { 142 const char *name; 143 u8 rst_shift; 144 u8 st_shift; 145 }; 146 147 /** 148 * struct omap_hwmod_opt_clk - optional clocks used by this hwmod 149 * @role: "sys", "32k", "tv", etc -- for use in clk_get() 150 * @clk: opt clock: OMAP clock name 151 * @_clk: pointer to the struct clk (filled in at runtime) 152 * 153 * The module's interface clock and main functional clock should not 154 * be added as optional clocks. 155 */ 156 struct omap_hwmod_opt_clk { 157 const char *role; 158 const char *clk; 159 struct clk *_clk; 160 }; 161 162 163 /* omap_hwmod_omap2_firewall.flags bits */ 164 #define OMAP_FIREWALL_L3 (1 << 0) 165 #define OMAP_FIREWALL_L4 (1 << 1) 166 167 /** 168 * struct omap_hwmod_omap2_firewall - OMAP2/3 device firewall data 169 * @l3_perm_bit: bit shift for L3_PM_*_PERMISSION_* 170 * @l4_fw_region: L4 firewall region ID 171 * @l4_prot_group: L4 protection group ID 172 * @flags: (see omap_hwmod_omap2_firewall.flags macros above) 173 */ 174 struct omap_hwmod_omap2_firewall { 175 u8 l3_perm_bit; 176 u8 l4_fw_region; 177 u8 l4_prot_group; 178 u8 flags; 179 }; 180 181 182 /* 183 * omap_hwmod_addr_space.flags bits 184 * 185 * ADDR_MAP_ON_INIT: Map this address space during omap_hwmod init. 186 * ADDR_TYPE_RT: Address space contains module register target data. 187 */ 188 #define ADDR_MAP_ON_INIT (1 << 0) /* XXX does not belong */ 189 #define ADDR_TYPE_RT (1 << 1) 190 191 /** 192 * struct omap_hwmod_addr_space - address space handled by the hwmod 193 * @name: name of the address space 194 * @pa_start: starting physical address 195 * @pa_end: ending physical address 196 * @flags: (see omap_hwmod_addr_space.flags macros above) 197 * 198 * Address space doesn't necessarily follow physical interconnect 199 * structure. GPMC is one example. 200 */ 201 struct omap_hwmod_addr_space { 202 const char *name; 203 u32 pa_start; 204 u32 pa_end; 205 u8 flags; 206 }; 207 208 209 /* 210 * omap_hwmod_ocp_if.user bits: these indicate the initiators that use this 211 * interface to interact with the hwmod. Used to add sleep dependencies 212 * when the module is enabled or disabled. 213 */ 214 #define OCP_USER_MPU (1 << 0) 215 #define OCP_USER_SDMA (1 << 1) 216 217 /* omap_hwmod_ocp_if.flags bits */ 218 #define OCPIF_SWSUP_IDLE (1 << 0) 219 #define OCPIF_CAN_BURST (1 << 1) 220 221 /** 222 * struct omap_hwmod_ocp_if - OCP interface data 223 * @master: struct omap_hwmod that initiates OCP transactions on this link 224 * @slave: struct omap_hwmod that responds to OCP transactions on this link 225 * @addr: address space associated with this link 226 * @clk: interface clock: OMAP clock name 227 * @_clk: pointer to the interface struct clk (filled in at runtime) 228 * @fw: interface firewall data 229 * @width: OCP data width 230 * @user: initiators using this interface (see OCP_USER_* macros above) 231 * @flags: OCP interface flags (see OCPIF_* macros above) 232 * 233 * It may also be useful to add a tag_cnt field for OCP2.x devices. 234 * 235 * Parameter names beginning with an underscore are managed internally by 236 * the omap_hwmod code and should not be set during initialization. 237 */ 238 struct omap_hwmod_ocp_if { 239 struct omap_hwmod *master; 240 struct omap_hwmod *slave; 241 struct omap_hwmod_addr_space *addr; 242 const char *clk; 243 struct clk *_clk; 244 union { 245 struct omap_hwmod_omap2_firewall omap2; 246 } fw; 247 u8 width; 248 u8 user; 249 u8 flags; 250 }; 251 252 253 /* Macros for use in struct omap_hwmod_sysconfig */ 254 255 /* Flags for use in omap_hwmod_sysconfig.idlemodes */ 256 #define MASTER_STANDBY_SHIFT 4 257 #define SLAVE_IDLE_SHIFT 0 258 #define SIDLE_FORCE (HWMOD_IDLEMODE_FORCE << SLAVE_IDLE_SHIFT) 259 #define SIDLE_NO (HWMOD_IDLEMODE_NO << SLAVE_IDLE_SHIFT) 260 #define SIDLE_SMART (HWMOD_IDLEMODE_SMART << SLAVE_IDLE_SHIFT) 261 #define SIDLE_SMART_WKUP (HWMOD_IDLEMODE_SMART_WKUP << SLAVE_IDLE_SHIFT) 262 #define MSTANDBY_FORCE (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT) 263 #define MSTANDBY_NO (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT) 264 #define MSTANDBY_SMART (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT) 265 #define MSTANDBY_SMART_WKUP (HWMOD_IDLEMODE_SMART_WKUP << MASTER_STANDBY_SHIFT) 266 267 /* omap_hwmod_sysconfig.sysc_flags capability flags */ 268 #define SYSC_HAS_AUTOIDLE (1 << 0) 269 #define SYSC_HAS_SOFTRESET (1 << 1) 270 #define SYSC_HAS_ENAWAKEUP (1 << 2) 271 #define SYSC_HAS_EMUFREE (1 << 3) 272 #define SYSC_HAS_CLOCKACTIVITY (1 << 4) 273 #define SYSC_HAS_SIDLEMODE (1 << 5) 274 #define SYSC_HAS_MIDLEMODE (1 << 6) 275 #define SYSS_HAS_RESET_STATUS (1 << 7) 276 #define SYSC_NO_CACHE (1 << 8) /* XXX SW flag, belongs elsewhere */ 277 #define SYSC_HAS_RESET_STATUS (1 << 9) 278 279 /* omap_hwmod_sysconfig.clockact flags */ 280 #define CLOCKACT_TEST_BOTH 0x0 281 #define CLOCKACT_TEST_MAIN 0x1 282 #define CLOCKACT_TEST_ICLK 0x2 283 #define CLOCKACT_TEST_NONE 0x3 284 285 /** 286 * struct omap_hwmod_sysc_fields - hwmod OCP_SYSCONFIG register field offsets. 287 * @midle_shift: Offset of the midle bit 288 * @clkact_shift: Offset of the clockactivity bit 289 * @sidle_shift: Offset of the sidle bit 290 * @enwkup_shift: Offset of the enawakeup bit 291 * @srst_shift: Offset of the softreset bit 292 * @autoidle_shift: Offset of the autoidle bit 293 */ 294 struct omap_hwmod_sysc_fields { 295 u8 midle_shift; 296 u8 clkact_shift; 297 u8 sidle_shift; 298 u8 enwkup_shift; 299 u8 srst_shift; 300 u8 autoidle_shift; 301 }; 302 303 /** 304 * struct omap_hwmod_class_sysconfig - hwmod class OCP_SYS* data 305 * @rev_offs: IP block revision register offset (from module base addr) 306 * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr) 307 * @syss_offs: OCP_SYSSTATUS register offset (from module base addr) 308 * @srst_udelay: Delay needed after doing a softreset in usecs 309 * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART} 310 * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported 311 * @clockact: the default value of the module CLOCKACTIVITY bits 312 * 313 * @clockact describes to the module which clocks are likely to be 314 * disabled when the PRCM issues its idle request to the module. Some 315 * modules have separate clockdomains for the interface clock and main 316 * functional clock, and can check whether they should acknowledge the 317 * idle request based on the internal module functionality that has 318 * been associated with the clocks marked in @clockact. This field is 319 * only used if HWMOD_SET_DEFAULT_CLOCKACT is set (see below) 320 * 321 * @sysc_fields: structure containing the offset positions of various bits in 322 * SYSCONFIG register. This can be populated using omap_hwmod_sysc_type1 or 323 * omap_hwmod_sysc_type2 defined in omap_hwmod_common_data.c depending on 324 * whether the device ip is compliant with the original PRCM protocol 325 * defined for OMAP2420 or the new PRCM protocol for new OMAP4 IPs. 326 * If the device follows a different scheme for the sysconfig register , 327 * then this field has to be populated with the correct offset structure. 328 */ 329 struct omap_hwmod_class_sysconfig { 330 u16 rev_offs; 331 u16 sysc_offs; 332 u16 syss_offs; 333 u16 sysc_flags; 334 struct omap_hwmod_sysc_fields *sysc_fields; 335 u8 srst_udelay; 336 u8 idlemodes; 337 u8 clockact; 338 }; 339 340 /** 341 * struct omap_hwmod_omap2_prcm - OMAP2/3-specific PRCM data 342 * @module_offs: PRCM submodule offset from the start of the PRM/CM 343 * @prcm_reg_id: PRCM register ID (e.g., 3 for CM_AUTOIDLE3) 344 * @module_bit: register bit shift for AUTOIDLE, WKST, WKEN, GRPSEL regs 345 * @idlest_reg_id: IDLEST register ID (e.g., 3 for CM_IDLEST3) 346 * @idlest_idle_bit: register bit shift for CM_IDLEST slave idle bit 347 * @idlest_stdby_bit: register bit shift for CM_IDLEST master standby bit 348 * 349 * @prcm_reg_id and @module_bit are specific to the AUTOIDLE, WKST, 350 * WKEN, GRPSEL registers. In an ideal world, no extra information 351 * would be needed for IDLEST information, but alas, there are some 352 * exceptions, so @idlest_reg_id, @idlest_idle_bit, @idlest_stdby_bit 353 * are needed for the IDLEST registers (c.f. 2430 I2CHS, 3430 USBHOST) 354 */ 355 struct omap_hwmod_omap2_prcm { 356 s16 module_offs; 357 u8 prcm_reg_id; 358 u8 module_bit; 359 u8 idlest_reg_id; 360 u8 idlest_idle_bit; 361 u8 idlest_stdby_bit; 362 }; 363 364 365 /** 366 * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data 367 * @clkctrl_reg: PRCM address of the clock control register 368 * @rstctrl_reg: address of the XXX_RSTCTRL register located in the PRM 369 * @submodule_wkdep_bit: bit shift of the WKDEP range 370 */ 371 struct omap_hwmod_omap4_prcm { 372 u16 clkctrl_offs; 373 u16 rstctrl_offs; 374 u16 context_offs; 375 u8 submodule_wkdep_bit; 376 u8 modulemode; 377 }; 378 379 380 /* 381 * omap_hwmod.flags definitions 382 * 383 * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out 384 * of idle, rather than relying on module smart-idle 385 * HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out 386 * of standby, rather than relying on module smart-standby 387 * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for 388 * SDRAM controller, etc. XXX probably belongs outside the main hwmod file 389 * XXX Should be HWMOD_SETUP_NO_RESET 390 * HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM 391 * controller, etc. XXX probably belongs outside the main hwmod file 392 * XXX Should be HWMOD_SETUP_NO_IDLE 393 * HWMOD_NO_OCP_AUTOIDLE: disable module autoidle (OCP_SYSCONFIG.AUTOIDLE) 394 * when module is enabled, rather than the default, which is to 395 * enable autoidle 396 * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup 397 * HWMOD_NO_IDLEST: this module does not have idle status - this is the case 398 * only for few initiator modules on OMAP2 & 3. 399 * HWMOD_CONTROL_OPT_CLKS_IN_RESET: Enable all optional clocks during reset. 400 * This is needed for devices like DSS that require optional clocks enabled 401 * in order to complete the reset. Optional clocks will be disabled 402 * again after the reset. 403 * HWMOD_16BIT_REG: Module has 16bit registers 404 */ 405 #define HWMOD_SWSUP_SIDLE (1 << 0) 406 #define HWMOD_SWSUP_MSTANDBY (1 << 1) 407 #define HWMOD_INIT_NO_RESET (1 << 2) 408 #define HWMOD_INIT_NO_IDLE (1 << 3) 409 #define HWMOD_NO_OCP_AUTOIDLE (1 << 4) 410 #define HWMOD_SET_DEFAULT_CLOCKACT (1 << 5) 411 #define HWMOD_NO_IDLEST (1 << 6) 412 #define HWMOD_CONTROL_OPT_CLKS_IN_RESET (1 << 7) 413 #define HWMOD_16BIT_REG (1 << 8) 414 415 /* 416 * omap_hwmod._int_flags definitions 417 * These are for internal use only and are managed by the omap_hwmod code. 418 * 419 * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module 420 * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP 421 * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached 422 * _HWMOD_SKIP_ENABLE: set if hwmod enabled during init (HWMOD_INIT_NO_IDLE) - 423 * causes the first call to _enable() to only update the pinmux 424 */ 425 #define _HWMOD_NO_MPU_PORT (1 << 0) 426 #define _HWMOD_WAKEUP_ENABLED (1 << 1) 427 #define _HWMOD_SYSCONFIG_LOADED (1 << 2) 428 #define _HWMOD_SKIP_ENABLE (1 << 3) 429 430 /* 431 * omap_hwmod._state definitions 432 * 433 * INITIALIZED: reset (optionally), initialized, enabled, disabled 434 * (optionally) 435 * 436 * 437 */ 438 #define _HWMOD_STATE_UNKNOWN 0 439 #define _HWMOD_STATE_REGISTERED 1 440 #define _HWMOD_STATE_CLKS_INITED 2 441 #define _HWMOD_STATE_INITIALIZED 3 442 #define _HWMOD_STATE_ENABLED 4 443 #define _HWMOD_STATE_IDLE 5 444 #define _HWMOD_STATE_DISABLED 6 445 446 /** 447 * struct omap_hwmod_class - the type of an IP block 448 * @name: name of the hwmod_class 449 * @sysc: device SYSCONFIG/SYSSTATUS register data 450 * @rev: revision of the IP class 451 * @pre_shutdown: ptr to fn to be executed immediately prior to device shutdown 452 * @reset: ptr to fn to be executed in place of the standard hwmod reset fn 453 * 454 * Represent the class of a OMAP hardware "modules" (e.g. timer, 455 * smartreflex, gpio, uart...) 456 * 457 * @pre_shutdown is a function that will be run immediately before 458 * hwmod clocks are disabled, etc. It is intended for use for hwmods 459 * like the MPU watchdog, which cannot be disabled with the standard 460 * omap_hwmod_shutdown(). The function should return 0 upon success, 461 * or some negative error upon failure. Returning an error will cause 462 * omap_hwmod_shutdown() to abort the device shutdown and return an 463 * error. 464 * 465 * If @reset is defined, then the function it points to will be 466 * executed in place of the standard hwmod _reset() code in 467 * mach-omap2/omap_hwmod.c. This is needed for IP blocks which have 468 * unusual reset sequences - usually processor IP blocks like the IVA. 469 */ 470 struct omap_hwmod_class { 471 const char *name; 472 struct omap_hwmod_class_sysconfig *sysc; 473 u32 rev; 474 int (*pre_shutdown)(struct omap_hwmod *oh); 475 int (*reset)(struct omap_hwmod *oh); 476 }; 477 478 /** 479 * struct omap_hwmod - integration data for OMAP hardware "modules" (IP blocks) 480 * @name: name of the hwmod 481 * @class: struct omap_hwmod_class * to the class of this hwmod 482 * @od: struct omap_device currently associated with this hwmod (internal use) 483 * @mpu_irqs: ptr to an array of MPU IRQs 484 * @sdma_reqs: ptr to an array of System DMA request IDs 485 * @prcm: PRCM data pertaining to this hwmod 486 * @main_clk: main clock: OMAP clock name 487 * @_clk: pointer to the main struct clk (filled in at runtime) 488 * @opt_clks: other device clocks that drivers can request (0..*) 489 * @voltdm: pointer to voltage domain (filled in at runtime) 490 * @masters: ptr to array of OCP ifs that this hwmod can initiate on 491 * @slaves: ptr to array of OCP ifs that this hwmod can respond on 492 * @dev_attr: arbitrary device attributes that can be passed to the driver 493 * @_sysc_cache: internal-use hwmod flags 494 * @_mpu_rt_va: cached register target start address (internal use) 495 * @_mpu_port_index: cached MPU register target slave ID (internal use) 496 * @opt_clks_cnt: number of @opt_clks 497 * @master_cnt: number of @master entries 498 * @slaves_cnt: number of @slave entries 499 * @response_lat: device OCP response latency (in interface clock cycles) 500 * @_int_flags: internal-use hwmod flags 501 * @_state: internal-use hwmod state 502 * @_postsetup_state: internal-use state to leave the hwmod in after _setup() 503 * @flags: hwmod flags (documented below) 504 * @_lock: spinlock serializing operations on this hwmod 505 * @node: list node for hwmod list (internal use) 506 * 507 * @main_clk refers to this module's "main clock," which for our 508 * purposes is defined as "the functional clock needed for register 509 * accesses to complete." Modules may not have a main clock if the 510 * interface clock also serves as a main clock. 511 * 512 * Parameter names beginning with an underscore are managed internally by 513 * the omap_hwmod code and should not be set during initialization. 514 */ 515 struct omap_hwmod { 516 const char *name; 517 struct omap_hwmod_class *class; 518 struct omap_device *od; 519 struct omap_hwmod_mux_info *mux; 520 struct omap_hwmod_irq_info *mpu_irqs; 521 struct omap_hwmod_dma_info *sdma_reqs; 522 struct omap_hwmod_rst_info *rst_lines; 523 union { 524 struct omap_hwmod_omap2_prcm omap2; 525 struct omap_hwmod_omap4_prcm omap4; 526 } prcm; 527 const char *main_clk; 528 struct clk *_clk; 529 struct omap_hwmod_opt_clk *opt_clks; 530 char *clkdm_name; 531 struct clockdomain *clkdm; 532 struct omap_hwmod_ocp_if **masters; /* connect to *_IA */ 533 struct omap_hwmod_ocp_if **slaves; /* connect to *_TA */ 534 void *dev_attr; 535 u32 _sysc_cache; 536 void __iomem *_mpu_rt_va; 537 spinlock_t _lock; 538 struct list_head node; 539 u16 flags; 540 u8 _mpu_port_index; 541 u8 response_lat; 542 u8 rst_lines_cnt; 543 u8 opt_clks_cnt; 544 u8 masters_cnt; 545 u8 slaves_cnt; 546 u8 hwmods_cnt; 547 u8 _int_flags; 548 u8 _state; 549 u8 _postsetup_state; 550 }; 551 552 int omap_hwmod_register(struct omap_hwmod **ohs); 553 struct omap_hwmod *omap_hwmod_lookup(const char *name); 554 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data), 555 void *data); 556 557 int __init omap_hwmod_setup_one(const char *name); 558 559 int omap_hwmod_enable(struct omap_hwmod *oh); 560 int _omap_hwmod_enable(struct omap_hwmod *oh); 561 int omap_hwmod_idle(struct omap_hwmod *oh); 562 int _omap_hwmod_idle(struct omap_hwmod *oh); 563 int omap_hwmod_shutdown(struct omap_hwmod *oh); 564 565 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name); 566 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name); 567 int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name); 568 569 int omap_hwmod_enable_clocks(struct omap_hwmod *oh); 570 int omap_hwmod_disable_clocks(struct omap_hwmod *oh); 571 572 int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode); 573 int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle); 574 575 int omap_hwmod_reset(struct omap_hwmod *oh); 576 void omap_hwmod_ocp_barrier(struct omap_hwmod *oh); 577 578 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs); 579 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs); 580 int omap_hwmod_softreset(struct omap_hwmod *oh); 581 582 int omap_hwmod_count_resources(struct omap_hwmod *oh); 583 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res); 584 585 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh); 586 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh); 587 588 int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh, 589 struct omap_hwmod *init_oh); 590 int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh, 591 struct omap_hwmod *init_oh); 592 593 int omap_hwmod_set_clockact_both(struct omap_hwmod *oh); 594 int omap_hwmod_set_clockact_main(struct omap_hwmod *oh); 595 int omap_hwmod_set_clockact_iclk(struct omap_hwmod *oh); 596 int omap_hwmod_set_clockact_none(struct omap_hwmod *oh); 597 598 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh); 599 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh); 600 601 int omap_hwmod_for_each_by_class(const char *classname, 602 int (*fn)(struct omap_hwmod *oh, 603 void *user), 604 void *user); 605 606 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state); 607 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh); 608 609 int omap_hwmod_no_setup_reset(struct omap_hwmod *oh); 610 611 int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx); 612 613 /* 614 * Chip variant-specific hwmod init routines - XXX should be converted 615 * to use initcalls once the initial boot ordering is straightened out 616 */ 617 extern int omap2420_hwmod_init(void); 618 extern int omap2430_hwmod_init(void); 619 extern int omap3xxx_hwmod_init(void); 620 extern int omap44xx_hwmod_init(void); 621 622 #endif 623