1 /*
2 * linux/drivers/ide/setup-pci.c Version 1.10 2002/08/19
3 *
4 * Copyright (c) 1998-2000 Andre Hedrick <andre@linux-ide.org>
5 *
6 * Copyright (c) 1995-1998 Mark Lord
7 * May be copied or modified under the terms of the GNU General Public License
8 *
9 * Recent Changes
10 * Split the set up function into multiple functions
11 * Use pci_set_master
12 * Fix misreporting of I/O v MMIO problems
13 * Initial fixups for simplex devices
14 */
15
16 /*
17 * This module provides support for automatic detection and
18 * configuration of all PCI IDE interfaces present in a system.
19 */
20
21 #include <linux/config.h>
22 #include <linux/module.h>
23 #include <linux/types.h>
24 #include <linux/kernel.h>
25 #include <linux/pci.h>
26 #include <linux/init.h>
27 #include <linux/timer.h>
28 #include <linux/mm.h>
29 #include <linux/interrupt.h>
30 #include <linux/ide.h>
31
32 #include <asm/io.h>
33 #include <asm/irq.h>
34
35
36 /**
37 * ide_match_hwif - match a PCI IDE against an ide_hwif
38 * @io_base: I/O base of device
39 * @bootable: set if its bootable
40 * @name: name of device
41 *
42 * Match a PCI IDE port against an entry in ide_hwifs[],
43 * based on io_base port if possible. Return the matching hwif,
44 * or a new hwif. If we find an error (clashing, out of devices, etc)
45 * return NULL
46 *
47 * FIXME: we need to handle mmio matches here too
48 */
49
ide_match_hwif(unsigned long io_base,u8 bootable,const char * name)50 static ide_hwif_t *ide_match_hwif(unsigned long io_base, u8 bootable, const char *name)
51 {
52 int h;
53 ide_hwif_t *hwif;
54
55 /*
56 * Look for a hwif with matching io_base specified using
57 * parameters to ide_setup().
58 */
59 for (h = 0; h < MAX_HWIFS; ++h) {
60 hwif = &ide_hwifs[h];
61 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) {
62 if (hwif->chipset == ide_generic)
63 return hwif; /* a perfect match */
64 }
65 }
66 /*
67 * Look for a hwif with matching io_base default value.
68 * If chipset is "ide_unknown", then claim that hwif slot.
69 * Otherwise, some other chipset has already claimed it.. :(
70 */
71 for (h = 0; h < MAX_HWIFS; ++h) {
72 hwif = &ide_hwifs[h];
73 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) {
74 if (hwif->chipset == ide_unknown)
75 return hwif; /* match */
76 printk(KERN_ERR "%s: port 0x%04lx already claimed by %s\n",
77 name, io_base, hwif->name);
78 return NULL; /* already claimed */
79 }
80 }
81 /*
82 * Okay, there is no hwif matching our io_base,
83 * so we'll just claim an unassigned slot.
84 * Give preference to claiming other slots before claiming ide0/ide1,
85 * just in case there's another interface yet-to-be-scanned
86 * which uses ports 1f0/170 (the ide0/ide1 defaults).
87 *
88 * Unless there is a bootable card that does not use the standard
89 * ports 1f0/170 (the ide0/ide1 defaults). The (bootable) flag.
90 */
91 if (bootable) {
92 for (h = 0; h < MAX_HWIFS; ++h) {
93 hwif = &ide_hwifs[h];
94 if (hwif->chipset == ide_unknown)
95 return hwif; /* pick an unused entry */
96 }
97 } else {
98 for (h = 2; h < MAX_HWIFS; ++h) {
99 hwif = ide_hwifs + h;
100 if (hwif->chipset == ide_unknown)
101 return hwif; /* pick an unused entry */
102 }
103 }
104 for (h = 0; h < 2; ++h) {
105 hwif = ide_hwifs + h;
106 if (hwif->chipset == ide_unknown)
107 return hwif; /* pick an unused entry */
108 }
109 printk(KERN_ERR "%s: too many IDE interfaces, no room in table\n", name);
110 return NULL;
111 }
112
113 /**
114 * ide_setup_pci_baseregs - place a PCI IDE controller native
115 * @dev: PCI device of interface to switch native
116 * @name: Name of interface
117 *
118 * We attempt to place the PCI interface into PCI native mode. If
119 * we succeed the BARs are ok and the controller is in PCI mode.
120 * Returns 0 on success or an errno code.
121 *
122 * FIXME: if we program the interface and then fail to set the BARS
123 * we don't switch it back to legacy mode. Do we actually care ??
124 */
125
ide_setup_pci_baseregs(struct pci_dev * dev,const char * name)126 static int ide_setup_pci_baseregs (struct pci_dev *dev, const char *name)
127 {
128 u8 progif = 0;
129
130 /*
131 * Place both IDE interfaces into PCI "native" mode:
132 */
133 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
134 (progif & 5) != 5) {
135 if ((progif & 0xa) != 0xa) {
136 printk(KERN_INFO "%s: device not capable of full "
137 "native PCI mode\n", name);
138 return -EOPNOTSUPP;
139 }
140 printk(KERN_INFO "%s: placing both ports into native PCI mode\n", name);
141 (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5);
142 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
143 (progif & 5) != 5) {
144 printk(KERN_ERR "%s: rewrite of PROGIF failed, wanted "
145 "0x%04x, got 0x%04x\n",
146 name, progif|5, progif);
147 return -EOPNOTSUPP;
148 }
149 }
150 return 0;
151 }
152
153 #ifdef CONFIG_BLK_DEV_IDEDMA_FORCED
154 /*
155 * Long lost data from 2.0.34 that is now in 2.0.39
156 *
157 * This was used in ./drivers/block/triton.c to do DMA Base address setup
158 * when PnP failed. Oh the things we forget. I believe this was part
159 * of SFF-8038i that has been withdrawn from public access... :-((
160 */
161 #define DEFAULT_BMIBA 0xe800 /* in case BIOS did not init it */
162 #define DEFAULT_BMCRBA 0xcc00 /* VIA's default value */
163 #define DEFAULT_BMALIBA 0xd400 /* ALI's default value */
164 #endif /* CONFIG_BLK_DEV_IDEDMA_FORCED */
165
166 /**
167 * ide_get_or_set_dma_base - setup BMIBA
168 * @hwif: Interface
169 *
170 * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space:
171 * If need be we set up the DMA base. Where a device has a partner that
172 * is already in DMA mode we check and enforce IDE simplex rules.
173 */
174
ide_get_or_set_dma_base(ide_hwif_t * hwif)175 static unsigned long ide_get_or_set_dma_base (ide_hwif_t *hwif)
176 {
177 unsigned long dma_base = 0;
178 struct pci_dev *dev = hwif->pci_dev;
179
180 #ifdef CONFIG_BLK_DEV_IDEDMA_FORCED
181 int second_chance = 0;
182
183 second_chance_to_dma:
184 #endif /* CONFIG_BLK_DEV_IDEDMA_FORCED */
185
186 if (hwif->mmio && hwif->dma_base)
187 return hwif->dma_base;
188 else if (hwif->mate && hwif->mate->dma_base) {
189 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8);
190 } else {
191 dma_base = (hwif->mmio) ?
192 ((unsigned long) hwif->hwif_data) :
193 (pci_resource_start(dev, 4));
194 if (!dma_base) {
195 printk(KERN_ERR "%s: dma_base is invalid (0x%04lx)\n",
196 hwif->cds->name, dma_base);
197 dma_base = 0;
198 }
199 }
200
201 #ifdef CONFIG_BLK_DEV_IDEDMA_FORCED
202 /* FIXME - should use pci_assign_resource surely */
203 if ((!dma_base) && (!second_chance)) {
204 unsigned long set_bmiba = 0;
205 second_chance++;
206 switch(dev->vendor) {
207 case PCI_VENDOR_ID_AL:
208 set_bmiba = DEFAULT_BMALIBA; break;
209 case PCI_VENDOR_ID_VIA:
210 set_bmiba = DEFAULT_BMCRBA; break;
211 case PCI_VENDOR_ID_INTEL:
212 set_bmiba = DEFAULT_BMIBA; break;
213 default:
214 return dma_base;
215 }
216 pci_write_config_dword(dev, 0x20, set_bmiba|1);
217 goto second_chance_to_dma;
218 }
219 #endif /* CONFIG_BLK_DEV_IDEDMA_FORCED */
220
221 if (dma_base) {
222 u8 simplex_stat = 0;
223 dma_base += hwif->channel ? 8 : 0;
224
225 switch(dev->device) {
226 case PCI_DEVICE_ID_AL_M5219:
227 case PCI_DEVICE_ID_AL_M5229:
228 case PCI_DEVICE_ID_AMD_VIPER_7409:
229 case PCI_DEVICE_ID_CMD_643:
230 case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
231 simplex_stat = hwif->INB(dma_base + 2);
232 hwif->OUTB((simplex_stat&0x60),(dma_base + 2));
233 simplex_stat = hwif->INB(dma_base + 2);
234 if (simplex_stat & 0x80) {
235 printk(KERN_INFO "%s: simplex device: "
236 "DMA forced\n",
237 hwif->cds->name);
238 }
239 break;
240 default:
241 /*
242 * If the device claims "simplex" DMA,
243 * this means only one of the two interfaces
244 * can be trusted with DMA at any point in time.
245 * So we should enable DMA only on one of the
246 * two interfaces.
247 */
248 simplex_stat = hwif->INB(dma_base + 2);
249 if (simplex_stat & 0x80) {
250 /* simplex device? */
251 #if 0
252 /*
253 * At this point we haven't probed the drives so we can't make the
254 * appropriate decision. Really we should defer this problem
255 * until we tune the drive then try to grab DMA ownership if we want
256 * to be the DMA end. This has to be become dynamic to handle hot
257 * plug.
258 */
259 /* Don't enable DMA on a simplex channel with no drives */
260 if (!hwif->drives[0].present && !hwif->drives[1].present)
261 {
262 printk(KERN_INFO "%s: simplex device with no drives: DMA disabled\n",
263 hwif->cds->name);
264 dma_base = 0;
265 }
266 /* If our other channel has DMA then we cannot */
267 else
268 #endif
269 if(hwif->mate && hwif->mate->dma_base)
270 {
271 printk(KERN_INFO "%s: simplex device: "
272 "DMA disabled\n",
273 hwif->cds->name);
274 dma_base = 0;
275 }
276 }
277 }
278 }
279 return dma_base;
280 }
281
ide_setup_pci_noise(struct pci_dev * dev,ide_pci_device_t * d)282 static void ide_setup_pci_noise (struct pci_dev *dev, ide_pci_device_t *d)
283 {
284 if ((d->vendor != dev->vendor) && (d->device != dev->device)) {
285 printk(KERN_INFO "%s: unknown IDE controller at PCI slot "
286 "%s, VID=%04x, DID=%04x\n",
287 d->name, dev->slot_name, dev->vendor, dev->device);
288 } else {
289 printk(KERN_INFO "%s: IDE controller at PCI slot %s\n",
290 d->name, dev->slot_name);
291 }
292 }
293
294 /**
295 * ide_pci_enable - do PCI enables
296 * @dev: PCI device
297 * @d: IDE pci device data
298 *
299 * Enable the IDE PCI device. We attempt to enable the device in full
300 * but if that fails then we only need BAR4 so we will enable that.
301 *
302 * Returns zero on success or an error code
303 */
304
ide_pci_enable(struct pci_dev * dev,ide_pci_device_t * d)305 static int ide_pci_enable(struct pci_dev *dev, ide_pci_device_t *d)
306 {
307
308 if (pci_enable_device(dev)) {
309 if (pci_enable_device_bars(dev, 1 << 4)) {
310 printk(KERN_WARNING "%s: (ide_setup_pci_device:) "
311 "Could not enable device.\n", d->name);
312 return -EBUSY;
313 } else
314 printk(KERN_WARNING "%s: Not fully BIOS configured!\n", d->name);
315 }
316
317 /*
318 * assume all devices can do 32-bit dma for now. we can add a
319 * dma mask field to the ide_pci_device_t if we need it (or let
320 * lower level driver set the dma mask)
321 */
322 if (pci_set_dma_mask(dev, 0xffffffff)) {
323 printk(KERN_ERR "%s: can't set dma mask\n", d->name);
324 return -EBUSY;
325 }
326
327 /* FIXME: Temporary - until we put in the hotplug interface logic
328 Check that the bits we want are not in use by someone else */
329 if (pci_request_region(dev, 4, "ide_tmp"))
330 return -EBUSY;
331 pci_release_region(dev, 4);
332
333 return 0;
334 }
335
336 /**
337 * ide_pci_configure - configure an unconfigured device
338 * @dev: PCI device
339 * @d: IDE pci device data
340 *
341 * Enable and configure the PCI device we have been passed.
342 * Returns zero on success or an error code.
343 */
344
ide_pci_configure(struct pci_dev * dev,ide_pci_device_t * d)345 static int ide_pci_configure(struct pci_dev *dev, ide_pci_device_t *d)
346 {
347 u16 pcicmd = 0;
348 /*
349 * PnP BIOS was *supposed* to have setup this device, but we
350 * can do it ourselves, so long as the BIOS has assigned an IRQ
351 * (or possibly the device is using a "legacy header" for IRQs).
352 * Maybe the user deliberately *disabled* the device,
353 * but we'll eventually ignore it again if no drives respond.
354 */
355 if (ide_setup_pci_baseregs(dev, d->name) || pci_write_config_word(dev, PCI_COMMAND, pcicmd|PCI_COMMAND_IO))
356 {
357 printk(KERN_INFO "%s: device disabled (BIOS)\n", d->name);
358 return -ENODEV;
359 }
360 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) {
361 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
362 return -EIO;
363 }
364 if (!(pcicmd & PCI_COMMAND_IO)) {
365 printk(KERN_ERR "%s: unable to enable IDE controller\n", d->name);
366 return -ENXIO;
367 }
368 return 0;
369 }
370
371 /**
372 * ide_pci_check_iomem - check a register is I/O
373 * @dev: pci device
374 * @d: ide_pci_device
375 * @bar: bar number
376 *
377 * Checks if a BAR is configured and points to MMIO space. If so
378 * print an error and return an error code. Otherwise return 0
379 */
380
ide_pci_check_iomem(struct pci_dev * dev,ide_pci_device_t * d,int bar)381 static int ide_pci_check_iomem(struct pci_dev *dev, ide_pci_device_t *d, int bar)
382 {
383 ulong flags = pci_resource_flags(dev, bar);
384
385 /* Unconfigured ? */
386 if (!flags || pci_resource_len(dev, bar) == 0)
387 return 0;
388
389 /* I/O space */
390 if(flags & PCI_BASE_ADDRESS_IO_MASK)
391 return 0;
392
393 /* Bad */
394 printk(KERN_ERR "%s: IO baseregs (BIOS) are reported "
395 "as MEM, report to "
396 "<andre@linux-ide.org>.\n", d->name);
397 return -EINVAL;
398 }
399
400
401 /**
402 * ide_hwif_configure - configure an IDE interface
403 * @dev: PCI device holding interface
404 * @d: IDE pci data
405 * @mate: Paired interface if any
406 *
407 * Perform the initial set up for the hardware interface structure. This
408 * is done per interface port rather than per PCI device. There may be
409 * more than one port per device.
410 *
411 * Returns the new hardware interface structure, or NULL on a failure
412 */
413
ide_hwif_configure(struct pci_dev * dev,ide_pci_device_t * d,ide_hwif_t * mate,int port,int irq)414 static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *mate, int port, int irq)
415 {
416 unsigned long ctl = 0, base = 0;
417 ide_hwif_t *hwif;
418
419 /* Possibly we should fail if these checks report true */
420 ide_pci_check_iomem(dev, d, 2*port);
421 ide_pci_check_iomem(dev, d, 2*port+1);
422
423 ctl = pci_resource_start(dev, 2*port+1);
424 base = pci_resource_start(dev, 2*port);
425 if ((ctl && !base) || (base && !ctl)) {
426 printk(KERN_ERR "%s: inconsistent baseregs (BIOS) "
427 "for port %d, skipping\n", d->name, port);
428 return NULL;
429 }
430 if (!ctl)
431 {
432 /* Use default values */
433 ctl = port ? 0x374 : 0x3f4;
434 base = port ? 0x170 : 0x1f0;
435 }
436 if ((hwif = ide_match_hwif(base, d->bootable, d->name)) == NULL)
437 return NULL; /* no room in ide_hwifs[] */
438 if (hwif->io_ports[IDE_DATA_OFFSET] != base) {
439 fixup_address:
440 ide_init_hwif_ports(&hwif->hw, base, (ctl | 2), NULL);
441 memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->io_ports));
442 hwif->noprobe = !hwif->io_ports[IDE_DATA_OFFSET];
443 } else if (hwif->io_ports[IDE_CONTROL_OFFSET] != (ctl | 2)) {
444 goto fixup_address;
445 }
446 hwif->chipset = ide_pci;
447 hwif->pci_dev = dev;
448 hwif->cds = (struct ide_pci_device_s *) d;
449 hwif->channel = port;
450
451 if (!hwif->irq)
452 hwif->irq = irq;
453 if (mate) {
454 hwif->mate = mate;
455 mate->mate = hwif;
456 }
457 return hwif;
458 }
459
460 /**
461 * ide_hwif_setup_dma - configure DMA interface
462 * @dev: PCI device
463 * @d: IDE pci data
464 * @hwif: Hardware interface we are configuring
465 *
466 * Set up the DMA base for the interface. Enable the master bits as
467 * neccessary and attempt to bring the device DMA into a ready to use
468 * state
469 */
470
ide_hwif_setup_dma(struct pci_dev * dev,ide_pci_device_t * d,ide_hwif_t * hwif)471 static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *hwif)
472 {
473 u16 pcicmd;
474 pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
475
476 if ((d->autodma == AUTODMA) ||
477 ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE &&
478 (dev->class & 0x80))) {
479 unsigned long dma_base = ide_get_or_set_dma_base(hwif);
480 if (dma_base && !(pcicmd & PCI_COMMAND_MASTER)) {
481 /*
482 * Set up BM-DMA capability
483 * (PnP BIOS should have done this)
484 */
485 if (!((d->device == PCI_DEVICE_ID_CYRIX_5530_IDE && d->vendor == PCI_VENDOR_ID_CYRIX)
486 ||(d->device == PCI_DEVICE_ID_NS_SCx200_IDE && d->vendor == PCI_VENDOR_ID_NS)))
487 {
488 /*
489 * default DMA off if we had to
490 * configure it here
491 */
492 hwif->autodma = 0;
493 }
494 pci_set_master(dev);
495 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) || !(pcicmd & PCI_COMMAND_MASTER)) {
496 printk(KERN_ERR "%s: %s error updating PCICMD\n",
497 hwif->name, d->name);
498 dma_base = 0;
499 }
500 }
501 if (dma_base) {
502 if (d->init_dma) {
503 d->init_dma(hwif, dma_base);
504 } else {
505 ide_setup_dma(hwif, dma_base, 8);
506 }
507 } else {
508 printk(KERN_INFO "%s: %s Bus-Master DMA disabled "
509 "(BIOS)\n", hwif->name, d->name);
510 ide_setup_no_dma(hwif);
511 }
512 }
513 }
514
515 /**
516 * ide_setup_pci_controller - set up IDE PCI
517 * @dev: PCI device
518 * @d: IDE PCI data
519 * @noisy: verbose flag
520 * @config: returned as 1 if we configured the hardware
521 *
522 * Set up the PCI and controller side of the IDE interface. This brings
523 * up the PCI side of the device, checks that the device is enabled
524 * and enables it if need be
525 */
526
ide_setup_pci_controller(struct pci_dev * dev,ide_pci_device_t * d,int noisy,int * config)527 static int ide_setup_pci_controller(struct pci_dev *dev, ide_pci_device_t *d, int noisy, int *config)
528 {
529 int ret = 0;
530 u32 class_rev;
531 u16 pcicmd;
532
533 if (!noautodma)
534 ret = 1;
535
536 if (noisy)
537 ide_setup_pci_noise(dev, d);
538
539 if (ide_pci_enable(dev, d))
540 return -EBUSY;
541
542 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) {
543 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
544 return -EIO;
545 }
546 if (!(pcicmd & PCI_COMMAND_IO)) { /* is device disabled? */
547 if (ide_pci_configure(dev, d))
548 return -ENODEV;
549 /* default DMA off if we had to configure it here */
550 ret = 0;
551 *config = 1;
552 printk(KERN_INFO "%s: device enabled (Linux)\n", d->name);
553 }
554
555 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
556 class_rev &= 0xff;
557 if (noisy)
558 printk(KERN_INFO "%s: chipset revision %d\n", d->name, class_rev);
559 return ret;
560 }
561
562 /*
563 * ide_setup_pci_device() looks at the primary/secondary interfaces
564 * on a PCI IDE device and, if they are enabled, prepares the IDE driver
565 * for use with them. This generic code works for most PCI chipsets.
566 *
567 * One thing that is not standardized is the location of the
568 * primary/secondary interface "enable/disable" bits. For chipsets that
569 * we "know" about, this information is in the ide_pci_device_t struct;
570 * for all other chipsets, we just assume both interfaces are enabled.
571 */
do_ide_setup_pci_device(struct pci_dev * dev,ide_pci_device_t * d,u8 noisy)572 static ata_index_t do_ide_setup_pci_device (struct pci_dev *dev, ide_pci_device_t *d, u8 noisy)
573 {
574 u32 port, at_least_one_hwif_enabled = 0, autodma = 0;
575 unsigned int pciirq = 0;
576 int tried_config = 0;
577 int drive0_tune, drive1_tune;
578 ata_index_t index;
579 u8 tmp = 0;
580 ide_hwif_t *hwif, *mate = NULL;
581 static int secondpdc = 0;
582
583 index.all = 0xf0f0;
584
585 if((autodma = ide_setup_pci_controller(dev, d, noisy, &tried_config)) < 0)
586 return index;
587
588 /*
589 * Can we trust the reported IRQ?
590 */
591 pciirq = dev->irq;
592
593 if ((dev->class & ~(0xfa)) != ((PCI_CLASS_STORAGE_IDE << 8) | 5)) {
594 if (noisy)
595 printk(KERN_INFO "%s: not 100%% native mode: "
596 "will probe irqs later\n", d->name);
597 /*
598 * This allows offboard ide-pci cards the enable a BIOS,
599 * verify interrupt settings of split-mirror pci-config
600 * space, place chipset into init-mode, and/or preserve
601 * an interrupt if the card is not native ide support.
602 */
603 pciirq = (d->init_chipset) ? d->init_chipset(dev, d->name) : 0;
604 } else if (tried_config) {
605 if (noisy)
606 printk(KERN_INFO "%s: will probe irqs later\n", d->name);
607 pciirq = 0;
608 } else if (!pciirq) {
609 if (noisy)
610 printk(KERN_WARNING "%s: bad irq (%d): will probe later\n",
611 d->name, pciirq);
612 pciirq = 0;
613 } else {
614 if (d->init_chipset)
615 d->init_chipset(dev, d->name);
616
617 if (noisy)
618 #ifdef __sparc__
619 printk(KERN_INFO "%s: 100%% native mode on irq %s\n",
620 d->name, __irq_itoa(pciirq));
621 #else
622 printk(KERN_INFO "%s: 100%% native mode on irq %d\n",
623 d->name, pciirq);
624 #endif
625 }
626
627 /*
628 * Set up the IDE ports
629 */
630
631 for (port = 0; port <= 1; ++port) {
632 ide_pci_enablebit_t *e = &(d->enablebits[port]);
633
634 /*
635 * If this is a Promise FakeRaid controller,
636 * the 2nd controller will be marked as
637 * disabled while it is actually there and enabled
638 * by the bios for raid purposes.
639 * Skip the normal "is it enabled" test for those.
640 */
641 if (((d->vendor == PCI_VENDOR_ID_PROMISE) &&
642 ((d->device == PCI_DEVICE_ID_PROMISE_20262) ||
643 (d->device == PCI_DEVICE_ID_PROMISE_20265))) &&
644 (secondpdc++==1) && (port==1))
645 goto controller_ok;
646
647 if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) ||
648 (tmp & e->mask) != e->val))
649 continue; /* port not enabled */
650 controller_ok:
651
652 if (d->channels <= port)
653 return index;
654
655 if ((hwif = ide_hwif_configure(dev, d, mate, port, pciirq)) == NULL)
656 continue;
657
658 /* setup proper ancestral information */
659 // 2.5 only hwif->gendev.parent = &dev->dev;
660
661 if (hwif->channel) {
662 index.b.high = hwif->index;
663 } else {
664 index.b.low = hwif->index;
665 }
666
667
668 if (d->init_iops)
669 d->init_iops(hwif);
670
671 if (d->autodma == NODMA)
672 goto bypass_legacy_dma;
673 if (d->autodma == NOAUTODMA)
674 autodma = 0;
675 if (autodma)
676 hwif->autodma = 1;
677 ide_hwif_setup_dma(dev, d, hwif);
678 bypass_legacy_dma:
679
680 drive0_tune = hwif->drives[0].autotune;
681 drive1_tune = hwif->drives[1].autotune;
682
683 if (d->init_hwif)
684 /* Call chipset-specific routine
685 * for each enabled hwif
686 */
687 d->init_hwif(hwif);
688
689 mate = hwif;
690 at_least_one_hwif_enabled = 1;
691 }
692 if (!at_least_one_hwif_enabled)
693 printk(KERN_INFO "%s: neither IDE port enabled (BIOS)\n", d->name);
694 return index;
695 }
696
ide_setup_pci_device(struct pci_dev * dev,ide_pci_device_t * d)697 void ide_setup_pci_device (struct pci_dev *dev, ide_pci_device_t *d)
698 {
699 do_ide_setup_pci_device(dev, d, 1);
700 }
701
702 EXPORT_SYMBOL_GPL(ide_setup_pci_device);
703
ide_setup_pci_devices(struct pci_dev * dev,struct pci_dev * dev2,ide_pci_device_t * d)704 void ide_setup_pci_devices (struct pci_dev *dev, struct pci_dev *dev2, ide_pci_device_t *d)
705 {
706 do_ide_setup_pci_device(dev, d, 1);
707 do_ide_setup_pci_device(dev2, d, 0);
708 }
709
710 EXPORT_SYMBOL_GPL(ide_setup_pci_devices);
711
712 /*
713 * Module interfaces
714 */
715
716 static int pre_init = 1; /* Before first ordered IDE scan */
717 static LIST_HEAD(ide_pci_drivers);
718
719 /*
720 * ide_register_pci_driver - attach IDE driver
721 * @driver: pci driver
722 *
723 * Registers a driver with the IDE layer. The IDE layer arranges that
724 * boot time setup is done in the expected device order and then
725 * hands the controllers off to the core PCI code to do the rest of
726 * the work.
727 *
728 * The driver_data of the driver table must point to an ide_pci_device_t
729 * describing the interface.
730 *
731 * Returns are the same as for pci_register_driver
732 */
733
ide_pci_register_driver(struct pci_driver * driver)734 int ide_pci_register_driver(struct pci_driver *driver)
735 {
736 if(!pre_init)
737 return pci_module_init(driver);
738 list_add_tail(&driver->node, &ide_pci_drivers);
739 return 0;
740 }
741
742 EXPORT_SYMBOL_GPL(ide_pci_register_driver);
743
744 /**
745 * ide_unregister_pci_driver - unregister an IDE driver
746 * @driver: driver to remove
747 *
748 * Unregister a currently installed IDE driver. Returns are the same
749 * as for pci_unregister_driver
750 */
751
ide_pci_unregister_driver(struct pci_driver * driver)752 void ide_pci_unregister_driver(struct pci_driver *driver)
753 {
754 if(!pre_init)
755 pci_unregister_driver(driver);
756 else
757 list_del(&driver->node);
758 }
759
760 EXPORT_SYMBOL_GPL(ide_pci_unregister_driver);
761
762 /**
763 * ide_scan_pcidev - find an IDE driver for a device
764 * @dev: PCI device to check
765 *
766 * Look for an IDE driver to handle the device we are considering.
767 * This is only used during boot up to get the ordering correct. After
768 * boot up the pci layer takes over the job.
769 */
770
ide_scan_pcidev(struct pci_dev * dev)771 static int __init ide_scan_pcidev(struct pci_dev *dev)
772 {
773 struct list_head *l;
774 struct pci_driver *d;
775
776 list_for_each(l, &ide_pci_drivers)
777 {
778 d = list_entry(l, struct pci_driver, node);
779 if(d->id_table)
780 {
781 const struct pci_device_id *id = pci_match_device(d->id_table, dev);
782 if(id != NULL)
783 {
784 if(d->probe(dev, id) >= 0)
785 {
786 dev->driver = d;
787 return 1;
788 }
789 }
790 }
791 }
792 return 0;
793 }
794
795 /**
796 * ide_scan_pcibus - perform the initial IDE driver scan
797 * @scan_direction: set for reverse order scanning
798 *
799 * Perform the initial bus rather than driver ordered scan of the
800 * PCI drivers. After this all IDE pci handling becomes standard
801 * module ordering not traditionally ordered.
802 */
803
ide_scan_pcibus(int scan_direction)804 void __init ide_scan_pcibus (int scan_direction)
805 {
806 struct pci_dev *dev;
807 struct pci_driver *d;
808 struct list_head *l, *n;
809
810 pre_init = 0;
811 if (!scan_direction) {
812 pci_for_each_dev(dev) {
813 ide_scan_pcidev(dev);
814 }
815 } else {
816 pci_for_each_dev_reverse(dev) {
817 ide_scan_pcidev(dev);
818 }
819 }
820
821 /*
822 * Hand the drivers over to the PCI layer now we
823 * are post init.
824 */
825
826 list_for_each_safe(l, n, &ide_pci_drivers)
827 {
828 list_del(l);
829 d = list_entry(l, struct pci_driver, node);
830 pci_register_driver(d);
831 }
832 }
833