1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2020 Realtek Corporation
3 */
4
5 #include "debug.h"
6 #include "sar.h"
7
rtw89_sar_get_subband(struct rtw89_dev * rtwdev,u32 center_freq)8 static enum rtw89_sar_subband rtw89_sar_get_subband(struct rtw89_dev *rtwdev,
9 u32 center_freq)
10 {
11 switch (center_freq) {
12 default:
13 rtw89_debug(rtwdev, RTW89_DBG_SAR,
14 "center freq: %u to SAR subband is unhandled\n",
15 center_freq);
16 fallthrough;
17 case 2412 ... 2484:
18 return RTW89_SAR_2GHZ_SUBBAND;
19 case 5180 ... 5320:
20 return RTW89_SAR_5GHZ_SUBBAND_1_2;
21 case 5500 ... 5720:
22 return RTW89_SAR_5GHZ_SUBBAND_2_E;
23 case 5745 ... 5825:
24 return RTW89_SAR_5GHZ_SUBBAND_3;
25 case 5955 ... 6155:
26 return RTW89_SAR_6GHZ_SUBBAND_5_L;
27 case 6175 ... 6415:
28 return RTW89_SAR_6GHZ_SUBBAND_5_H;
29 case 6435 ... 6515:
30 return RTW89_SAR_6GHZ_SUBBAND_6;
31 case 6535 ... 6695:
32 return RTW89_SAR_6GHZ_SUBBAND_7_L;
33 case 6715 ... 6855:
34 return RTW89_SAR_6GHZ_SUBBAND_7_H;
35
36 /* freq 6875 (ch 185, 20MHz) spans RTW89_SAR_6GHZ_SUBBAND_7_H
37 * and RTW89_SAR_6GHZ_SUBBAND_8, so directly describe it with
38 * struct rtw89_sar_span in the following.
39 */
40
41 case 6895 ... 7115:
42 return RTW89_SAR_6GHZ_SUBBAND_8;
43 }
44 }
45
46 struct rtw89_sar_span {
47 enum rtw89_sar_subband subband_low;
48 enum rtw89_sar_subband subband_high;
49 };
50
51 #define RTW89_SAR_SPAN_VALID(span) ((span)->subband_high)
52
53 #define RTW89_SAR_6GHZ_SPAN_HEAD 6145
54 #define RTW89_SAR_6GHZ_SPAN_IDX(center_freq) \
55 ((((int)(center_freq) - RTW89_SAR_6GHZ_SPAN_HEAD) / 5) / 2)
56
57 #define RTW89_DECL_SAR_6GHZ_SPAN(center_freq, subband_l, subband_h) \
58 [RTW89_SAR_6GHZ_SPAN_IDX(center_freq)] = { \
59 .subband_low = RTW89_SAR_6GHZ_ ## subband_l, \
60 .subband_high = RTW89_SAR_6GHZ_ ## subband_h, \
61 }
62
63 /* Since 6GHz SAR subbands are not edge aligned, some cases span two SAR
64 * subbands. In the following, we describe each of them with rtw89_sar_span.
65 */
66 static const struct rtw89_sar_span rtw89_sar_overlapping_6ghz[] = {
67 RTW89_DECL_SAR_6GHZ_SPAN(6145, SUBBAND_5_L, SUBBAND_5_H),
68 RTW89_DECL_SAR_6GHZ_SPAN(6165, SUBBAND_5_L, SUBBAND_5_H),
69 RTW89_DECL_SAR_6GHZ_SPAN(6185, SUBBAND_5_L, SUBBAND_5_H),
70 RTW89_DECL_SAR_6GHZ_SPAN(6505, SUBBAND_6, SUBBAND_7_L),
71 RTW89_DECL_SAR_6GHZ_SPAN(6525, SUBBAND_6, SUBBAND_7_L),
72 RTW89_DECL_SAR_6GHZ_SPAN(6545, SUBBAND_6, SUBBAND_7_L),
73 RTW89_DECL_SAR_6GHZ_SPAN(6665, SUBBAND_7_L, SUBBAND_7_H),
74 RTW89_DECL_SAR_6GHZ_SPAN(6705, SUBBAND_7_L, SUBBAND_7_H),
75 RTW89_DECL_SAR_6GHZ_SPAN(6825, SUBBAND_7_H, SUBBAND_8),
76 RTW89_DECL_SAR_6GHZ_SPAN(6865, SUBBAND_7_H, SUBBAND_8),
77 RTW89_DECL_SAR_6GHZ_SPAN(6875, SUBBAND_7_H, SUBBAND_8),
78 RTW89_DECL_SAR_6GHZ_SPAN(6885, SUBBAND_7_H, SUBBAND_8),
79 };
80
rtw89_query_sar_config_common(struct rtw89_dev * rtwdev,s32 * cfg)81 static int rtw89_query_sar_config_common(struct rtw89_dev *rtwdev, s32 *cfg)
82 {
83 struct rtw89_sar_cfg_common *rtwsar = &rtwdev->sar.cfg_common;
84 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
85 enum rtw89_band band = chan->band_type;
86 u32 center_freq = chan->freq;
87 const struct rtw89_sar_span *span = NULL;
88 enum rtw89_sar_subband subband_l, subband_h;
89 int idx;
90
91 if (band == RTW89_BAND_6G) {
92 idx = RTW89_SAR_6GHZ_SPAN_IDX(center_freq);
93 /* To decrease size of rtw89_sar_overlapping_6ghz[],
94 * RTW89_SAR_6GHZ_SPAN_IDX() truncates the leading NULLs
95 * to make first span as index 0 of the table. So, if center
96 * frequency is less than the first one, it will get netative.
97 */
98 if (idx >= 0 && idx < ARRAY_SIZE(rtw89_sar_overlapping_6ghz))
99 span = &rtw89_sar_overlapping_6ghz[idx];
100 }
101
102 if (span && RTW89_SAR_SPAN_VALID(span)) {
103 subband_l = span->subband_low;
104 subband_h = span->subband_high;
105 } else {
106 subband_l = rtw89_sar_get_subband(rtwdev, center_freq);
107 subband_h = subband_l;
108 }
109
110 rtw89_debug(rtwdev, RTW89_DBG_SAR,
111 "for {band %u, center_freq %u}, SAR subband: {%u, %u}\n",
112 band, center_freq, subband_l, subband_h);
113
114 if (!rtwsar->set[subband_l] && !rtwsar->set[subband_h])
115 return -ENODATA;
116
117 if (!rtwsar->set[subband_l])
118 *cfg = rtwsar->cfg[subband_h];
119 else if (!rtwsar->set[subband_h])
120 *cfg = rtwsar->cfg[subband_l];
121 else
122 *cfg = min(rtwsar->cfg[subband_l], rtwsar->cfg[subband_h]);
123
124 return 0;
125 }
126
127 static const
128 struct rtw89_sar_handler rtw89_sar_handlers[RTW89_SAR_SOURCE_NR] = {
129 [RTW89_SAR_SOURCE_COMMON] = {
130 .descr_sar_source = "RTW89_SAR_SOURCE_COMMON",
131 .txpwr_factor_sar = 2,
132 .query_sar_config = rtw89_query_sar_config_common,
133 },
134 };
135
136 #define rtw89_sar_set_src(_dev, _src, _cfg_name, _cfg_data) \
137 do { \
138 typeof(_src) _s = (_src); \
139 typeof(_dev) _d = (_dev); \
140 BUILD_BUG_ON(!rtw89_sar_handlers[_s].descr_sar_source); \
141 BUILD_BUG_ON(!rtw89_sar_handlers[_s].query_sar_config); \
142 lockdep_assert_held(&_d->mutex); \
143 _d->sar._cfg_name = *(_cfg_data); \
144 _d->sar.src = _s; \
145 } while (0)
146
rtw89_txpwr_sar_to_mac(struct rtw89_dev * rtwdev,u8 fct,s32 cfg)147 static s8 rtw89_txpwr_sar_to_mac(struct rtw89_dev *rtwdev, u8 fct, s32 cfg)
148 {
149 const u8 fct_mac = rtwdev->chip->txpwr_factor_mac;
150 s32 cfg_mac;
151
152 cfg_mac = fct > fct_mac ?
153 cfg >> (fct - fct_mac) : cfg << (fct_mac - fct);
154
155 return (s8)clamp_t(s32, cfg_mac,
156 RTW89_SAR_TXPWR_MAC_MIN,
157 RTW89_SAR_TXPWR_MAC_MAX);
158 }
159
rtw89_query_sar(struct rtw89_dev * rtwdev)160 s8 rtw89_query_sar(struct rtw89_dev *rtwdev)
161 {
162 const enum rtw89_sar_sources src = rtwdev->sar.src;
163 /* its members are protected by rtw89_sar_set_src() */
164 const struct rtw89_sar_handler *sar_hdl = &rtw89_sar_handlers[src];
165 int ret;
166 s32 cfg;
167 u8 fct;
168
169 lockdep_assert_held(&rtwdev->mutex);
170
171 if (src == RTW89_SAR_SOURCE_NONE)
172 return RTW89_SAR_TXPWR_MAC_MAX;
173
174 ret = sar_hdl->query_sar_config(rtwdev, &cfg);
175 if (ret)
176 return RTW89_SAR_TXPWR_MAC_MAX;
177
178 fct = sar_hdl->txpwr_factor_sar;
179
180 return rtw89_txpwr_sar_to_mac(rtwdev, fct, cfg);
181 }
182
rtw89_print_sar(struct seq_file * m,struct rtw89_dev * rtwdev)183 void rtw89_print_sar(struct seq_file *m, struct rtw89_dev *rtwdev)
184 {
185 const enum rtw89_sar_sources src = rtwdev->sar.src;
186 /* its members are protected by rtw89_sar_set_src() */
187 const struct rtw89_sar_handler *sar_hdl = &rtw89_sar_handlers[src];
188 const u8 fct_mac = rtwdev->chip->txpwr_factor_mac;
189 int ret;
190 s32 cfg;
191 u8 fct;
192
193 lockdep_assert_held(&rtwdev->mutex);
194
195 if (src == RTW89_SAR_SOURCE_NONE) {
196 seq_puts(m, "no SAR is applied\n");
197 return;
198 }
199
200 seq_printf(m, "source: %d (%s)\n", src, sar_hdl->descr_sar_source);
201
202 ret = sar_hdl->query_sar_config(rtwdev, &cfg);
203 if (ret) {
204 seq_printf(m, "config: return code: %d\n", ret);
205 seq_printf(m, "assign: max setting: %d (unit: 1/%lu dBm)\n",
206 RTW89_SAR_TXPWR_MAC_MAX, BIT(fct_mac));
207 return;
208 }
209
210 fct = sar_hdl->txpwr_factor_sar;
211
212 seq_printf(m, "config: %d (unit: 1/%lu dBm)\n", cfg, BIT(fct));
213 }
214
rtw89_apply_sar_common(struct rtw89_dev * rtwdev,const struct rtw89_sar_cfg_common * sar)215 static int rtw89_apply_sar_common(struct rtw89_dev *rtwdev,
216 const struct rtw89_sar_cfg_common *sar)
217 {
218 enum rtw89_sar_sources src;
219 int ret = 0;
220
221 mutex_lock(&rtwdev->mutex);
222
223 src = rtwdev->sar.src;
224 if (src != RTW89_SAR_SOURCE_NONE && src != RTW89_SAR_SOURCE_COMMON) {
225 rtw89_warn(rtwdev, "SAR source: %d is in use", src);
226 ret = -EBUSY;
227 goto exit;
228 }
229
230 rtw89_sar_set_src(rtwdev, RTW89_SAR_SOURCE_COMMON, cfg_common, sar);
231 rtw89_core_set_chip_txpwr(rtwdev);
232
233 exit:
234 mutex_unlock(&rtwdev->mutex);
235 return ret;
236 }
237
238 static const struct cfg80211_sar_freq_ranges rtw89_common_sar_freq_ranges[] = {
239 { .start_freq = 2412, .end_freq = 2484, },
240 { .start_freq = 5180, .end_freq = 5320, },
241 { .start_freq = 5500, .end_freq = 5720, },
242 { .start_freq = 5745, .end_freq = 5825, },
243 { .start_freq = 5955, .end_freq = 6155, },
244 { .start_freq = 6175, .end_freq = 6415, },
245 { .start_freq = 6435, .end_freq = 6515, },
246 { .start_freq = 6535, .end_freq = 6695, },
247 { .start_freq = 6715, .end_freq = 6875, },
248 { .start_freq = 6875, .end_freq = 7115, },
249 };
250
251 static_assert(RTW89_SAR_SUBBAND_NR ==
252 ARRAY_SIZE(rtw89_common_sar_freq_ranges));
253
254 const struct cfg80211_sar_capa rtw89_sar_capa = {
255 .type = NL80211_SAR_TYPE_POWER,
256 .num_freq_ranges = ARRAY_SIZE(rtw89_common_sar_freq_ranges),
257 .freq_ranges = rtw89_common_sar_freq_ranges,
258 };
259
rtw89_ops_set_sar_specs(struct ieee80211_hw * hw,const struct cfg80211_sar_specs * sar)260 int rtw89_ops_set_sar_specs(struct ieee80211_hw *hw,
261 const struct cfg80211_sar_specs *sar)
262 {
263 struct rtw89_dev *rtwdev = hw->priv;
264 struct rtw89_sar_cfg_common sar_common = {0};
265 u8 fct;
266 u32 freq_start;
267 u32 freq_end;
268 s32 power;
269 u32 i, idx;
270
271 if (sar->type != NL80211_SAR_TYPE_POWER)
272 return -EINVAL;
273
274 fct = rtw89_sar_handlers[RTW89_SAR_SOURCE_COMMON].txpwr_factor_sar;
275
276 for (i = 0; i < sar->num_sub_specs; i++) {
277 idx = sar->sub_specs[i].freq_range_index;
278 if (idx >= ARRAY_SIZE(rtw89_common_sar_freq_ranges))
279 return -EINVAL;
280
281 freq_start = rtw89_common_sar_freq_ranges[idx].start_freq;
282 freq_end = rtw89_common_sar_freq_ranges[idx].end_freq;
283 power = sar->sub_specs[i].power;
284
285 rtw89_debug(rtwdev, RTW89_DBG_SAR,
286 "On freq %u to %u, set SAR limit %d (unit: 1/%lu dBm)\n",
287 freq_start, freq_end, power, BIT(fct));
288
289 sar_common.set[idx] = true;
290 sar_common.cfg[idx] = power;
291 }
292
293 return rtw89_apply_sar_common(rtwdev, &sar_common);
294 }
295