1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2011 Realtek Corporation. */
3
4 #define _HCI_HAL_INIT_C_
5
6 #include "../include/osdep_service.h"
7 #include "../include/drv_types.h"
8 #include "../include/rtw_efuse.h"
9 #include "../include/rtw_fw.h"
10 #include "../include/rtl8188e_hal.h"
11 #include "../include/rtw_iol.h"
12 #include "../include/usb_ops.h"
13 #include "../include/usb_osintf.h"
14 #include "../include/Hal8188EPwrSeq.h"
15
_ConfigNormalChipOutEP_8188E(struct adapter * adapt,u8 NumOutPipe)16 static void _ConfigNormalChipOutEP_8188E(struct adapter *adapt, u8 NumOutPipe)
17 {
18 struct hal_data_8188e *haldata = &adapt->haldata;
19
20 switch (NumOutPipe) {
21 case 3:
22 haldata->OutEpQueueSel = TX_SELE_HQ | TX_SELE_LQ | TX_SELE_NQ;
23 haldata->OutEpNumber = 3;
24 break;
25 case 2:
26 haldata->OutEpQueueSel = TX_SELE_HQ | TX_SELE_NQ;
27 haldata->OutEpNumber = 2;
28 break;
29 case 1:
30 haldata->OutEpQueueSel = TX_SELE_HQ;
31 haldata->OutEpNumber = 1;
32 break;
33 default:
34 break;
35 }
36 }
37
HalUsbSetQueuePipeMapping8188EUsb(struct adapter * adapt,u8 NumOutPipe)38 static bool HalUsbSetQueuePipeMapping8188EUsb(struct adapter *adapt, u8 NumOutPipe)
39 {
40
41 _ConfigNormalChipOutEP_8188E(adapt, NumOutPipe);
42 return Hal_MappingOutPipe(adapt, NumOutPipe);
43 }
44
rtl8188eu_interface_configure(struct adapter * adapt)45 void rtl8188eu_interface_configure(struct adapter *adapt)
46 {
47 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(adapt);
48
49 HalUsbSetQueuePipeMapping8188EUsb(adapt, pdvobjpriv->RtNumOutPipes);
50 }
51
rtl8188eu_InitPowerOn(struct adapter * adapt)52 u32 rtl8188eu_InitPowerOn(struct adapter *adapt)
53 {
54 u16 value16;
55 int res;
56
57 /* HW Power on sequence */
58 struct hal_data_8188e *haldata = &adapt->haldata;
59 if (haldata->bMacPwrCtrlOn)
60 return _SUCCESS;
61
62 if (!HalPwrSeqCmdParsing(adapt, Rtl8188E_NIC_PWR_ON_FLOW))
63 return _FAIL;
64
65 /* Enable MAC DMA/WMAC/SCHEDULE/SEC block */
66 /* Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */
67 rtw_write16(adapt, REG_CR, 0x00); /* suggseted by zhouzhou, by page, 20111230 */
68
69 /* Enable MAC DMA/WMAC/SCHEDULE/SEC block */
70 res = rtw_read16(adapt, REG_CR, &value16);
71 if (res)
72 return _FAIL;
73
74 value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN
75 | PROTOCOL_EN | SCHEDULE_EN | ENSEC | CALTMR_EN);
76 /* for SDIO - Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */
77
78 rtw_write16(adapt, REG_CR, value16);
79 haldata->bMacPwrCtrlOn = true;
80
81 return _SUCCESS;
82 }
83
84 /* Shall USB interface init this? */
_InitInterrupt(struct adapter * Adapter)85 static void _InitInterrupt(struct adapter *Adapter)
86 {
87 u32 imr, imr_ex;
88 u8 usb_opt;
89 int res;
90
91 /* HISR write one to clear */
92 rtw_write32(Adapter, REG_HISR_88E, 0xFFFFFFFF);
93 /* HIMR - */
94 imr = IMR_PSTIMEOUT_88E | IMR_TBDER_88E | IMR_CPWM_88E | IMR_CPWM2_88E;
95 rtw_write32(Adapter, REG_HIMR_88E, imr);
96
97 imr_ex = IMR_TXERR_88E | IMR_RXERR_88E | IMR_TXFOVW_88E | IMR_RXFOVW_88E;
98 rtw_write32(Adapter, REG_HIMRE_88E, imr_ex);
99
100 /* REG_USB_SPECIAL_OPTION - BIT(4) */
101 /* 0; Use interrupt endpoint to upload interrupt pkt */
102 /* 1; Use bulk endpoint to upload interrupt pkt, */
103 res = rtw_read8(Adapter, REG_USB_SPECIAL_OPTION, &usb_opt);
104 if (res)
105 return;
106
107 if (adapter_to_dvobj(Adapter)->pusbdev->speed == USB_SPEED_HIGH)
108 usb_opt = usb_opt | (INT_BULK_SEL);
109 else
110 usb_opt = usb_opt & (~INT_BULK_SEL);
111
112 rtw_write8(Adapter, REG_USB_SPECIAL_OPTION, usb_opt);
113 }
114
_InitQueueReservedPage(struct adapter * Adapter)115 static void _InitQueueReservedPage(struct adapter *Adapter)
116 {
117 struct hal_data_8188e *haldata = &Adapter->haldata;
118 struct registry_priv *pregistrypriv = &Adapter->registrypriv;
119 u32 numHQ = 0;
120 u32 numLQ = 0;
121 u32 numNQ = 0;
122 u32 numPubQ;
123 u32 value32;
124 u8 value8;
125 bool bWiFiConfig = pregistrypriv->wifi_spec;
126
127 if (bWiFiConfig) {
128 if (haldata->OutEpQueueSel & TX_SELE_HQ)
129 numHQ = 0x29;
130
131 if (haldata->OutEpQueueSel & TX_SELE_LQ)
132 numLQ = 0x1C;
133
134 /* NOTE: This step shall be proceed before writing REG_RQPN. */
135 if (haldata->OutEpQueueSel & TX_SELE_NQ)
136 numNQ = 0x1C;
137 value8 = (u8)_NPQ(numNQ);
138 rtw_write8(Adapter, REG_RQPN_NPQ, value8);
139
140 numPubQ = 0xA8 - numHQ - numLQ - numNQ;
141
142 /* TX DMA */
143 value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN;
144 rtw_write32(Adapter, REG_RQPN, value32);
145 } else {
146 rtw_write16(Adapter, REG_RQPN_NPQ, 0x0000);/* Just follow MP Team,??? Georgia 03/28 */
147 rtw_write16(Adapter, REG_RQPN_NPQ, 0x0d);
148 rtw_write32(Adapter, REG_RQPN, 0x808E000d);/* reserve 7 page for LPS */
149 }
150 }
151
_InitTxBufferBoundary(struct adapter * Adapter,u8 txpktbuf_bndy)152 static void _InitTxBufferBoundary(struct adapter *Adapter, u8 txpktbuf_bndy)
153 {
154 rtw_write8(Adapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy);
155 rtw_write8(Adapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy);
156 rtw_write8(Adapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy);
157 rtw_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy);
158 rtw_write8(Adapter, REG_TDECTRL + 1, txpktbuf_bndy);
159 }
160
_InitPageBoundary(struct adapter * Adapter)161 static void _InitPageBoundary(struct adapter *Adapter)
162 {
163 /* RX Page Boundary */
164 /* */
165 u16 rxff_bndy = MAX_RX_DMA_BUFFER_SIZE_88E - 1;
166
167 rtw_write16(Adapter, (REG_TRXFF_BNDY + 2), rxff_bndy);
168 }
169
_InitNormalChipRegPriority(struct adapter * Adapter,u16 beQ,u16 bkQ,u16 viQ,u16 voQ,u16 mgtQ,u16 hiQ)170 static void _InitNormalChipRegPriority(struct adapter *Adapter, u16 beQ,
171 u16 bkQ, u16 viQ, u16 voQ, u16 mgtQ,
172 u16 hiQ)
173 {
174 u16 value16;
175 int res;
176
177 res = rtw_read16(Adapter, REG_TRXDMA_CTRL, &value16);
178 if (res)
179 return;
180
181 value16 &= 0x7;
182
183 value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) |
184 _TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) |
185 _TXDMA_MGQ_MAP(mgtQ) | _TXDMA_HIQ_MAP(hiQ);
186
187 rtw_write16(Adapter, REG_TRXDMA_CTRL, value16);
188 }
189
_InitNormalChipOneOutEpPriority(struct adapter * Adapter)190 static void _InitNormalChipOneOutEpPriority(struct adapter *Adapter)
191 {
192 struct hal_data_8188e *haldata = &Adapter->haldata;
193
194 u16 value = 0;
195 switch (haldata->OutEpQueueSel) {
196 case TX_SELE_HQ:
197 value = QUEUE_HIGH;
198 break;
199 case TX_SELE_LQ:
200 value = QUEUE_LOW;
201 break;
202 case TX_SELE_NQ:
203 value = QUEUE_NORMAL;
204 break;
205 default:
206 break;
207 }
208 _InitNormalChipRegPriority(Adapter, value, value, value, value,
209 value, value);
210 }
211
_InitNormalChipTwoOutEpPriority(struct adapter * Adapter)212 static void _InitNormalChipTwoOutEpPriority(struct adapter *Adapter)
213 {
214 struct hal_data_8188e *haldata = &Adapter->haldata;
215 struct registry_priv *pregistrypriv = &Adapter->registrypriv;
216 u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
217 u16 valueHi = 0;
218 u16 valueLow = 0;
219
220 switch (haldata->OutEpQueueSel) {
221 case (TX_SELE_HQ | TX_SELE_LQ):
222 valueHi = QUEUE_HIGH;
223 valueLow = QUEUE_LOW;
224 break;
225 case (TX_SELE_NQ | TX_SELE_LQ):
226 valueHi = QUEUE_NORMAL;
227 valueLow = QUEUE_LOW;
228 break;
229 case (TX_SELE_HQ | TX_SELE_NQ):
230 valueHi = QUEUE_HIGH;
231 valueLow = QUEUE_NORMAL;
232 break;
233 default:
234 break;
235 }
236
237 if (!pregistrypriv->wifi_spec) {
238 beQ = valueLow;
239 bkQ = valueLow;
240 viQ = valueHi;
241 voQ = valueHi;
242 mgtQ = valueHi;
243 hiQ = valueHi;
244 } else {/* for WMM ,CONFIG_OUT_EP_WIFI_MODE */
245 beQ = valueLow;
246 bkQ = valueHi;
247 viQ = valueHi;
248 voQ = valueLow;
249 mgtQ = valueHi;
250 hiQ = valueHi;
251 }
252 _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
253 }
254
_InitNormalChipThreeOutEpPriority(struct adapter * Adapter)255 static void _InitNormalChipThreeOutEpPriority(struct adapter *Adapter)
256 {
257 struct registry_priv *pregistrypriv = &Adapter->registrypriv;
258 u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
259
260 if (!pregistrypriv->wifi_spec) {/* typical setting */
261 beQ = QUEUE_LOW;
262 bkQ = QUEUE_LOW;
263 viQ = QUEUE_NORMAL;
264 voQ = QUEUE_HIGH;
265 mgtQ = QUEUE_HIGH;
266 hiQ = QUEUE_HIGH;
267 } else {/* for WMM */
268 beQ = QUEUE_LOW;
269 bkQ = QUEUE_NORMAL;
270 viQ = QUEUE_NORMAL;
271 voQ = QUEUE_HIGH;
272 mgtQ = QUEUE_HIGH;
273 hiQ = QUEUE_HIGH;
274 }
275 _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
276 }
277
_InitQueuePriority(struct adapter * Adapter)278 static void _InitQueuePriority(struct adapter *Adapter)
279 {
280 struct hal_data_8188e *haldata = &Adapter->haldata;
281
282 switch (haldata->OutEpNumber) {
283 case 1:
284 _InitNormalChipOneOutEpPriority(Adapter);
285 break;
286 case 2:
287 _InitNormalChipTwoOutEpPriority(Adapter);
288 break;
289 case 3:
290 _InitNormalChipThreeOutEpPriority(Adapter);
291 break;
292 default:
293 break;
294 }
295 }
296
_InitNetworkType(struct adapter * Adapter)297 static void _InitNetworkType(struct adapter *Adapter)
298 {
299 u32 value32;
300 int res;
301
302 res = rtw_read32(Adapter, REG_CR, &value32);
303 if (res)
304 return;
305
306 /* TODO: use the other function to set network type */
307 value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP);
308
309 rtw_write32(Adapter, REG_CR, value32);
310 }
311
_InitTransferPageSize(struct adapter * Adapter)312 static void _InitTransferPageSize(struct adapter *Adapter)
313 {
314 /* Tx page size is always 128. */
315
316 u8 value8;
317 value8 = _PSRX(PBP_128) | _PSTX(PBP_128);
318 rtw_write8(Adapter, REG_PBP, value8);
319 }
320
_InitDriverInfoSize(struct adapter * Adapter,u8 drvInfoSize)321 static void _InitDriverInfoSize(struct adapter *Adapter, u8 drvInfoSize)
322 {
323 rtw_write8(Adapter, REG_RX_DRVINFO_SZ, drvInfoSize);
324 }
325
_InitWMACSetting(struct adapter * Adapter)326 static void _InitWMACSetting(struct adapter *Adapter)
327 {
328 u32 receive_config = RCR_AAP | RCR_APM | RCR_AM | RCR_AB |
329 RCR_CBSSID_DATA | RCR_CBSSID_BCN |
330 RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL |
331 RCR_APP_MIC | RCR_APP_PHYSTS;
332
333 /* some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile() */
334 rtw_write32(Adapter, REG_RCR, receive_config);
335
336 /* Accept all multicast address */
337 rtw_write32(Adapter, REG_MAR, 0xFFFFFFFF);
338 rtw_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF);
339 }
340
_InitAdaptiveCtrl(struct adapter * Adapter)341 static void _InitAdaptiveCtrl(struct adapter *Adapter)
342 {
343 u16 value16;
344 u32 value32;
345 int res;
346
347 /* Response Rate Set */
348 res = rtw_read32(Adapter, REG_RRSR, &value32);
349 if (res)
350 return;
351
352 value32 &= ~RATE_BITMAP_ALL;
353 value32 |= RATE_RRSR_CCK_ONLY_1M;
354 rtw_write32(Adapter, REG_RRSR, value32);
355
356 /* CF-END Threshold */
357
358 /* SIFS (used in NAV) */
359 value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
360 rtw_write16(Adapter, REG_SPEC_SIFS, value16);
361
362 /* Retry Limit */
363 value16 = _LRL(0x30) | _SRL(0x30);
364 rtw_write16(Adapter, REG_RL, value16);
365 }
366
_InitEDCA(struct adapter * Adapter)367 static void _InitEDCA(struct adapter *Adapter)
368 {
369 /* Set Spec SIFS (used in NAV) */
370 rtw_write16(Adapter, REG_SPEC_SIFS, 0x100a);
371 rtw_write16(Adapter, REG_MAC_SPEC_SIFS, 0x100a);
372
373 /* Set SIFS for CCK */
374 rtw_write16(Adapter, REG_SIFS_CTX, 0x100a);
375
376 /* Set SIFS for OFDM */
377 rtw_write16(Adapter, REG_SIFS_TRX, 0x100a);
378
379 /* TXOP */
380 rtw_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B);
381 rtw_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F);
382 rtw_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324);
383 rtw_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226);
384 }
385
_InitRetryFunction(struct adapter * Adapter)386 static void _InitRetryFunction(struct adapter *Adapter)
387 {
388 u8 value8;
389 int res;
390
391 res = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL, &value8);
392 if (res)
393 return;
394
395 value8 |= EN_AMPDU_RTY_NEW;
396 rtw_write8(Adapter, REG_FWHW_TXQ_CTRL, value8);
397
398 /* Set ACK timeout */
399 rtw_write8(Adapter, REG_ACKTO, 0x40);
400 }
401
402 /*-----------------------------------------------------------------------------
403 * Function: usb_AggSettingTxUpdate()
404 *
405 * Overview: Separate TX/RX parameters update independent for TP detection and
406 * dynamic TX/RX aggreagtion parameters update.
407 *
408 * Input: struct adapter *
409 *
410 * Output/Return: NONE
411 *
412 * Revised History:
413 * When Who Remark
414 * 12/10/2010 MHC Separate to smaller function.
415 *
416 *---------------------------------------------------------------------------*/
usb_AggSettingTxUpdate(struct adapter * Adapter)417 static void usb_AggSettingTxUpdate(struct adapter *Adapter)
418 {
419 u32 value32;
420 int res;
421
422 if (Adapter->registrypriv.wifi_spec)
423 return;
424
425 res = rtw_read32(Adapter, REG_TDECTRL, &value32);
426 if (res)
427 return;
428
429 value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT);
430 value32 |= ((USB_TXAGG_DESC_NUM & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT);
431
432 rtw_write32(Adapter, REG_TDECTRL, value32);
433 }
434
435 /*-----------------------------------------------------------------------------
436 * Function: usb_AggSettingRxUpdate()
437 *
438 * Overview: Separate TX/RX parameters update independent for TP detection and
439 * dynamic TX/RX aggreagtion parameters update.
440 *
441 * Input: struct adapter *
442 *
443 * Output/Return: NONE
444 *
445 * Revised History:
446 * When Who Remark
447 * 12/10/2010 MHC Separate to smaller function.
448 *
449 *---------------------------------------------------------------------------*/
450 static void
usb_AggSettingRxUpdate(struct adapter * Adapter)451 usb_AggSettingRxUpdate(
452 struct adapter *Adapter
453 )
454 {
455 u8 valueDMA;
456 u8 valueUSB;
457 int res;
458
459 res = rtw_read8(Adapter, REG_TRXDMA_CTRL, &valueDMA);
460 if (res)
461 return;
462
463 res = rtw_read8(Adapter, REG_USB_SPECIAL_OPTION, &valueUSB);
464 if (res)
465 return;
466
467 valueDMA |= RXDMA_AGG_EN;
468 valueUSB &= ~USB_AGG_EN;
469
470 rtw_write8(Adapter, REG_TRXDMA_CTRL, valueDMA);
471 rtw_write8(Adapter, REG_USB_SPECIAL_OPTION, valueUSB);
472
473 rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, USB_RXAGG_PAGE_COUNT);
474 rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH + 1, USB_RXAGG_PAGE_TIMEOUT);
475 }
476
InitUsbAggregationSetting(struct adapter * Adapter)477 static void InitUsbAggregationSetting(struct adapter *Adapter)
478 {
479 /* Tx aggregation setting */
480 usb_AggSettingTxUpdate(Adapter);
481
482 /* Rx aggregation setting */
483 usb_AggSettingRxUpdate(Adapter);
484 }
485
486 /* FIXME: add error handling in callers */
_InitBeaconParameters(struct adapter * Adapter)487 static int _InitBeaconParameters(struct adapter *Adapter)
488 {
489 struct hal_data_8188e *haldata = &Adapter->haldata;
490 int res;
491
492 rtw_write16(Adapter, REG_BCN_CTRL, 0x1010);
493
494 /* TODO: Remove these magic number */
495 rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0x6404);/* ms */
496 rtw_write8(Adapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);/* 5ms */
497 rtw_write8(Adapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME); /* 2ms */
498
499 /* Suggested by designer timchen. Change beacon AIFS to the largest number */
500 /* beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 */
501 rtw_write16(Adapter, REG_BCNTCFG, 0x660F);
502
503 res = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL + 2, &haldata->RegFwHwTxQCtrl);
504 if (res)
505 return res;
506
507 res = rtw_read8(Adapter, REG_TBTT_PROHIBIT + 2, &haldata->RegReg542);
508 if (res)
509 return res;
510
511 res = rtw_read8(Adapter, REG_CR + 1, &haldata->RegCR_1);
512 if (res)
513 return res;
514
515 return 0;
516 }
517
_BeaconFunctionEnable(struct adapter * Adapter,bool Enable,bool Linked)518 static void _BeaconFunctionEnable(struct adapter *Adapter,
519 bool Enable, bool Linked)
520 {
521 rtw_write8(Adapter, REG_BCN_CTRL, (BIT(4) | BIT(3) | BIT(1)));
522
523 rtw_write8(Adapter, REG_RD_CTRL + 1, 0x6F);
524 }
525
526 /* Set CCK and OFDM Block "ON" */
_BBTurnOnBlock(struct adapter * Adapter)527 static void _BBTurnOnBlock(struct adapter *Adapter)
528 {
529 rtl8188e_PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1);
530 rtl8188e_PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1);
531 }
532
_InitAntenna_Selection(struct adapter * Adapter)533 static void _InitAntenna_Selection(struct adapter *Adapter)
534 {
535 struct hal_data_8188e *haldata = &Adapter->haldata;
536 int res;
537 u32 reg;
538
539 if (haldata->AntDivCfg == 0)
540 return;
541
542 res = rtw_read32(Adapter, REG_LEDCFG0, ®);
543 if (res)
544 return;
545
546 rtw_write32(Adapter, REG_LEDCFG0, reg | BIT(23));
547 rtl8188e_PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT(13), 0x01);
548
549 if (rtl8188e_PHY_QueryBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A)
550 haldata->CurAntenna = Antenna_A;
551 else
552 haldata->CurAntenna = Antenna_B;
553 }
554
hw_var_set_macaddr(struct adapter * Adapter,u8 * val)555 static void hw_var_set_macaddr(struct adapter *Adapter, u8 *val)
556 {
557 u8 idx = 0;
558 u32 reg_macid;
559
560 reg_macid = REG_MACID;
561
562 for (idx = 0; idx < 6; idx++)
563 rtw_write8(Adapter, (reg_macid + idx), val[idx]);
564 }
565
rtl8188eu_hal_init(struct adapter * Adapter)566 u32 rtl8188eu_hal_init(struct adapter *Adapter)
567 {
568 u8 value8 = 0;
569 u16 value16;
570 u8 txpktbuf_bndy;
571 u32 status = _SUCCESS;
572 int res;
573 struct hal_data_8188e *haldata = &Adapter->haldata;
574 struct pwrctrl_priv *pwrctrlpriv = &Adapter->pwrctrlpriv;
575 struct registry_priv *pregistrypriv = &Adapter->registrypriv;
576 u32 reg;
577
578 if (Adapter->pwrctrlpriv.bkeepfwalive) {
579 if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) {
580 PHY_IQCalibrate_8188E(Adapter, true);
581 } else {
582 PHY_IQCalibrate_8188E(Adapter, false);
583 haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true;
584 }
585
586 ODM_TXPowerTrackingCheck(&haldata->odmpriv);
587 PHY_LCCalibrate_8188E(Adapter);
588
589 goto exit;
590 }
591
592 status = rtl8188eu_InitPowerOn(Adapter);
593 if (status == _FAIL)
594 goto exit;
595
596 /* Save target channel */
597 haldata->CurrentChannel = 6;/* default set to 6 */
598
599 /* 2010/08/09 MH We need to check if we need to turnon or off RF after detecting */
600 /* HW GPIO pin. Before PHY_RFConfig8192C. */
601 /* 2010/08/26 MH If Efuse does not support sective suspend then disable the function. */
602
603 if (!pregistrypriv->wifi_spec) {
604 txpktbuf_bndy = TX_PAGE_BOUNDARY_88E;
605 } else {
606 /* for WMM */
607 txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_88E;
608 }
609
610 _InitQueueReservedPage(Adapter);
611 _InitQueuePriority(Adapter);
612 _InitPageBoundary(Adapter);
613 _InitTransferPageSize(Adapter);
614
615 _InitTxBufferBoundary(Adapter, 0);
616
617 status = rtl8188e_firmware_download(Adapter);
618
619 if (status != _SUCCESS) {
620 Adapter->bFWReady = false;
621 haldata->fw_ractrl = false;
622 return status;
623 } else {
624 Adapter->bFWReady = true;
625 haldata->fw_ractrl = false;
626 }
627 /* Initialize firmware vars */
628 Adapter->pwrctrlpriv.bFwCurrentInPSMode = false;
629 haldata->LastHMEBoxNum = 0;
630
631 status = PHY_MACConfig8188E(Adapter);
632 if (status == _FAIL)
633 goto exit;
634
635 /* */
636 /* d. Initialize BB related configurations. */
637 /* */
638 status = PHY_BBConfig8188E(Adapter);
639 if (status == _FAIL)
640 goto exit;
641
642 status = PHY_RFConfig8188E(Adapter);
643 if (status == _FAIL)
644 goto exit;
645
646 status = rtl8188e_iol_efuse_patch(Adapter);
647 if (status == _FAIL)
648 goto exit;
649
650 _InitTxBufferBoundary(Adapter, txpktbuf_bndy);
651
652 status = InitLLTTable(Adapter, txpktbuf_bndy);
653 if (status == _FAIL)
654 goto exit;
655
656 /* Get Rx PHY status in order to report RSSI and others. */
657 _InitDriverInfoSize(Adapter, DRVINFO_SZ);
658
659 _InitInterrupt(Adapter);
660 hw_var_set_macaddr(Adapter, Adapter->eeprompriv.mac_addr);
661 _InitNetworkType(Adapter);/* set msr */
662 _InitWMACSetting(Adapter);
663 _InitAdaptiveCtrl(Adapter);
664 _InitEDCA(Adapter);
665 _InitRetryFunction(Adapter);
666 InitUsbAggregationSetting(Adapter);
667 _InitBeaconParameters(Adapter);
668
669 /* */
670 /* Init CR MACTXEN, MACRXEN after setting RxFF boundary REG_TRXFF_BNDY to patch */
671 /* Hw bug which Hw initials RxFF boundary size to a value which is larger than the real Rx buffer size in 88E. */
672 /* */
673 /* Enable MACTXEN/MACRXEN block */
674 res = rtw_read16(Adapter, REG_CR, &value16);
675 if (res)
676 return _FAIL;
677
678 value16 |= (MACTXEN | MACRXEN);
679 rtw_write8(Adapter, REG_CR, value16);
680
681 /* Enable TX Report */
682 /* Enable Tx Report Timer */
683 res = rtw_read8(Adapter, REG_TX_RPT_CTRL, &value8);
684 if (res)
685 return _FAIL;
686
687 rtw_write8(Adapter, REG_TX_RPT_CTRL, (value8 | BIT(1) | BIT(0)));
688 /* Set MAX RPT MACID */
689 rtw_write8(Adapter, REG_TX_RPT_CTRL + 1, 2);/* FOR sta mode ,0: bc/mc ,1:AP */
690 /* Tx RPT Timer. Unit: 32us */
691 rtw_write16(Adapter, REG_TX_RPT_TIME, 0xCdf0);
692
693 rtw_write8(Adapter, REG_EARLY_MODE_CONTROL, 0);
694
695 rtw_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400); /* unit: 256us. 256ms */
696 rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400); /* unit: 256us. 256ms */
697
698 /* Keep RfRegChnlVal for later use. */
699 haldata->RfRegChnlVal = rtl8188e_PHY_QueryRFReg(Adapter, RF_CHNLBW, bRFRegOffsetMask);
700
701 _BBTurnOnBlock(Adapter);
702
703 invalidate_cam_all(Adapter);
704
705 /* 2010/12/17 MH We need to set TX power according to EFUSE content at first. */
706 PHY_SetTxPowerLevel8188E(Adapter, haldata->CurrentChannel);
707
708 /* Move by Neo for USB SS to below setp */
709 /* _RfPowerSave(Adapter); */
710
711 _InitAntenna_Selection(Adapter);
712
713 /* */
714 /* Disable BAR, suggested by Scott */
715 /* 2010.04.09 add by hpfan */
716 /* */
717 rtw_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff);
718
719 /* HW SEQ CTRL */
720 /* set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. */
721 rtw_write8(Adapter, REG_HWSEQ_CTRL, 0xFF);
722
723 if (pregistrypriv->wifi_spec)
724 rtw_write16(Adapter, REG_FAST_EDCA_CTRL, 0);
725
726 /* Nav limit , suggest by scott */
727 rtw_write8(Adapter, 0x652, 0x0);
728
729 rtl8188e_InitHalDm(Adapter);
730
731 /* 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status */
732 /* and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not */
733 /* call initstruct adapter. May cause some problem?? */
734 /* Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed */
735 /* in MgntActSet_RF_State() after wake up, because the value of haldata->eRFPowerState */
736 /* is the same as eRfOff, we should change it to eRfOn after we config RF parameters. */
737 /* Added by tynli. 2010.03.30. */
738 pwrctrlpriv->rf_pwrstate = rf_on;
739
740 /* enable Tx report. */
741 rtw_write8(Adapter, REG_FWHW_TXQ_CTRL + 1, 0x0F);
742
743 /* Suggested by SD1 pisa. Added by tynli. 2011.10.21. */
744 rtw_write8(Adapter, REG_EARLY_MODE_CONTROL + 3, 0x01);/* Pretx_en, for WEP/TKIP SEC */
745
746 /* tynli_test_tx_report. */
747 rtw_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0);
748
749 /* enable tx DMA to drop the redundate data of packet */
750 res = rtw_read16(Adapter, REG_TXDMA_OFFSET_CHK, &value16);
751 if (res)
752 return _FAIL;
753
754 rtw_write16(Adapter, REG_TXDMA_OFFSET_CHK, (value16 | DROP_DATA_EN));
755
756 /* 2010/08/26 MH Merge from 8192CE. */
757 if (pwrctrlpriv->rf_pwrstate == rf_on) {
758 if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) {
759 PHY_IQCalibrate_8188E(Adapter, true);
760 } else {
761 PHY_IQCalibrate_8188E(Adapter, false);
762 haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true;
763 }
764
765 ODM_TXPowerTrackingCheck(&haldata->odmpriv);
766
767 PHY_LCCalibrate_8188E(Adapter);
768 }
769
770 /* _InitPABias(Adapter); */
771 rtw_write8(Adapter, REG_USB_HRPWM, 0);
772
773 /* ack for xmit mgmt frames. */
774 res = rtw_read32(Adapter, REG_FWHW_TXQ_CTRL, ®);
775 if (res)
776 return _FAIL;
777
778 rtw_write32(Adapter, REG_FWHW_TXQ_CTRL, reg | BIT(12));
779
780 exit:
781 return status;
782 }
783
CardDisableRTL8188EU(struct adapter * Adapter)784 static void CardDisableRTL8188EU(struct adapter *Adapter)
785 {
786 u8 val8;
787 struct hal_data_8188e *haldata = &Adapter->haldata;
788 int res;
789
790 /* Stop Tx Report Timer. 0x4EC[Bit1]=b'0 */
791 res = rtw_read8(Adapter, REG_TX_RPT_CTRL, &val8);
792 if (res)
793 return;
794
795 rtw_write8(Adapter, REG_TX_RPT_CTRL, val8 & (~BIT(1)));
796
797 /* stop rx */
798 rtw_write8(Adapter, REG_CR, 0x0);
799
800 /* Run LPS WL RFOFF flow */
801 HalPwrSeqCmdParsing(Adapter, Rtl8188E_NIC_LPS_ENTER_FLOW);
802
803 /* 2. 0x1F[7:0] = 0 turn off RF */
804
805 res = rtw_read8(Adapter, REG_MCUFWDL, &val8);
806 if (res)
807 return;
808
809 if ((val8 & RAM_DL_SEL) && Adapter->bFWReady) { /* 8051 RAM code */
810 /* Reset MCU 0x2[10]=0. */
811 res = rtw_read8(Adapter, REG_SYS_FUNC_EN + 1, &val8);
812 if (res)
813 return;
814
815 val8 &= ~BIT(2); /* 0x2[10], FEN_CPUEN */
816 rtw_write8(Adapter, REG_SYS_FUNC_EN + 1, val8);
817 }
818
819 /* reset MCU ready status */
820 rtw_write8(Adapter, REG_MCUFWDL, 0);
821
822 /* YJ,add,111212 */
823 /* Disable 32k */
824 res = rtw_read8(Adapter, REG_32K_CTRL, &val8);
825 if (res)
826 return;
827
828 rtw_write8(Adapter, REG_32K_CTRL, val8 & (~BIT(0)));
829
830 /* Card disable power action flow */
831 HalPwrSeqCmdParsing(Adapter, Rtl8188E_NIC_DISABLE_FLOW);
832
833 /* Reset MCU IO Wrapper */
834 res = rtw_read8(Adapter, REG_RSV_CTRL + 1, &val8);
835 if (res)
836 return;
837
838 rtw_write8(Adapter, REG_RSV_CTRL + 1, (val8 & (~BIT(3))));
839
840 res = rtw_read8(Adapter, REG_RSV_CTRL + 1, &val8);
841 if (res)
842 return;
843
844 rtw_write8(Adapter, REG_RSV_CTRL + 1, val8 | BIT(3));
845
846 /* YJ,test add, 111207. For Power Consumption. */
847 res = rtw_read8(Adapter, GPIO_IN, &val8);
848 if (res)
849 return;
850
851 rtw_write8(Adapter, GPIO_OUT, val8);
852 rtw_write8(Adapter, GPIO_IO_SEL, 0xFF);/* Reg0x46 */
853
854 res = rtw_read8(Adapter, REG_GPIO_IO_SEL, &val8);
855 if (res)
856 return;
857
858 rtw_write8(Adapter, REG_GPIO_IO_SEL, (val8 << 4));
859 res = rtw_read8(Adapter, REG_GPIO_IO_SEL + 1, &val8);
860 if (res)
861 return;
862
863 rtw_write8(Adapter, REG_GPIO_IO_SEL + 1, val8 | 0x0F);/* Reg0x43 */
864 rtw_write32(Adapter, REG_BB_PAD_CTRL, 0x00080808);/* set LNA ,TRSW,EX_PA Pin to output mode */
865 haldata->bMacPwrCtrlOn = false;
866 Adapter->bFWReady = false;
867 }
868
rtl8188eu_hal_deinit(struct adapter * Adapter)869 u32 rtl8188eu_hal_deinit(struct adapter *Adapter)
870 {
871 rtw_write32(Adapter, REG_HIMR_88E, IMR_DISABLED_88E);
872 rtw_write32(Adapter, REG_HIMRE_88E, IMR_DISABLED_88E);
873
874 if (!Adapter->pwrctrlpriv.bkeepfwalive) {
875 if (Adapter->hw_init_completed) {
876 CardDisableRTL8188EU(Adapter);
877 }
878 }
879 return _SUCCESS;
880 }
881
rtl8188eu_inirp_init(struct adapter * Adapter)882 unsigned int rtl8188eu_inirp_init(struct adapter *Adapter)
883 {
884 u8 i;
885 struct recv_buf *precvbuf;
886 uint status;
887 struct recv_priv *precvpriv = &Adapter->recvpriv;
888
889 status = _SUCCESS;
890
891 /* issue Rx irp to receive data */
892 precvbuf = (struct recv_buf *)precvpriv->precv_buf;
893 for (i = 0; i < NR_RECVBUFF; i++) {
894 if (!rtw_read_port(Adapter, (unsigned char *)precvbuf)) {
895 status = _FAIL;
896 goto exit;
897 }
898
899 precvbuf++;
900 precvpriv->free_recv_buf_queue_cnt--;
901 }
902
903 exit:
904 return status;
905 }
906
907 /* */
908 /* */
909 /* EEPROM/EFUSE Content Parsing */
910 /* */
911 /* */
912
Hal_EfuseParseMACAddr_8188EU(struct adapter * adapt,u8 * hwinfo,bool AutoLoadFail)913 static void Hal_EfuseParseMACAddr_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail)
914 {
915 u16 i;
916 u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x88, 0x02};
917 struct eeprom_priv *eeprom = &adapt->eeprompriv;
918
919 if (AutoLoadFail) {
920 for (i = 0; i < 6; i++)
921 eeprom->mac_addr[i] = sMacAddr[i];
922 } else {
923 /* Read Permanent MAC address */
924 memcpy(eeprom->mac_addr, &hwinfo[EEPROM_MAC_ADDR_88EU], ETH_ALEN);
925 }
926 }
927
ReadAdapterInfo8188EU(struct adapter * Adapter)928 void ReadAdapterInfo8188EU(struct adapter *Adapter)
929 {
930 struct eeprom_priv *eeprom = &Adapter->eeprompriv;
931 struct led_priv *ledpriv = &Adapter->ledpriv;
932 u8 eeValue;
933 int res;
934
935 /* check system boot selection */
936 res = rtw_read8(Adapter, REG_9346CR, &eeValue);
937 if (res)
938 return;
939
940 eeprom->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM);
941 eeprom->bautoload_fail_flag = !(eeValue & EEPROM_EN);
942
943 if (!is_boot_from_eeprom(Adapter))
944 EFUSE_ShadowMapUpdate(Adapter);
945
946 /* parse the eeprom/efuse content */
947 Hal_EfuseParseIDCode88E(Adapter, eeprom->efuse_eeprom_data);
948 Hal_EfuseParseMACAddr_8188EU(Adapter, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
949
950 Hal_ReadPowerSavingMode88E(Adapter, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
951 Hal_ReadTxPowerInfo88E(Adapter, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
952 rtl8188e_EfuseParseChnlPlan(Adapter, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
953 Hal_EfuseParseXtal_8188E(Adapter, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
954 Hal_ReadAntennaDiversity88E(Adapter, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
955 Hal_ReadThermalMeter_88E(Adapter, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
956
957 ledpriv->bRegUseLed = true;
958 }
959
ResumeTxBeacon(struct adapter * adapt)960 static void ResumeTxBeacon(struct adapter *adapt)
961 {
962 struct hal_data_8188e *haldata = &adapt->haldata;
963
964 /* 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
965 /* which should be read from register to a global variable. */
966
967 rtw_write8(adapt, REG_FWHW_TXQ_CTRL + 2, (haldata->RegFwHwTxQCtrl) | BIT(6));
968 haldata->RegFwHwTxQCtrl |= BIT(6);
969 rtw_write8(adapt, REG_TBTT_PROHIBIT + 1, 0xff);
970 haldata->RegReg542 |= BIT(0);
971 rtw_write8(adapt, REG_TBTT_PROHIBIT + 2, haldata->RegReg542);
972 }
973
StopTxBeacon(struct adapter * adapt)974 static void StopTxBeacon(struct adapter *adapt)
975 {
976 struct hal_data_8188e *haldata = &adapt->haldata;
977
978 /* 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
979 /* which should be read from register to a global variable. */
980
981 rtw_write8(adapt, REG_FWHW_TXQ_CTRL + 2, (haldata->RegFwHwTxQCtrl) & (~BIT(6)));
982 haldata->RegFwHwTxQCtrl &= (~BIT(6));
983 rtw_write8(adapt, REG_TBTT_PROHIBIT + 1, 0x64);
984 haldata->RegReg542 &= ~(BIT(0));
985 rtw_write8(adapt, REG_TBTT_PROHIBIT + 2, haldata->RegReg542);
986
987 /* todo: CheckFwRsvdPageContent(Adapter); 2010.06.23. Added by tynli. */
988 }
989
hw_var_set_opmode(struct adapter * Adapter,u8 * val)990 static void hw_var_set_opmode(struct adapter *Adapter, u8 *val)
991 {
992 u8 val8;
993 u8 mode = *((u8 *)val);
994 int res;
995
996 /* disable Port0 TSF update */
997 res = rtw_read8(Adapter, REG_BCN_CTRL, &val8);
998 if (res)
999 return;
1000
1001 rtw_write8(Adapter, REG_BCN_CTRL, val8 | BIT(4));
1002
1003 /* set net_type */
1004 res = rtw_read8(Adapter, MSR, &val8);
1005 if (res)
1006 return;
1007
1008 val8 &= 0x0c;
1009 val8 |= mode;
1010 rtw_write8(Adapter, MSR, val8);
1011
1012 if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) {
1013 StopTxBeacon(Adapter);
1014
1015 rtw_write8(Adapter, REG_BCN_CTRL, 0x19);/* disable atim wnd */
1016 } else if (mode == _HW_STATE_ADHOC_) {
1017 ResumeTxBeacon(Adapter);
1018 rtw_write8(Adapter, REG_BCN_CTRL, 0x1a);
1019 } else if (mode == _HW_STATE_AP_) {
1020 ResumeTxBeacon(Adapter);
1021
1022 rtw_write8(Adapter, REG_BCN_CTRL, 0x12);
1023
1024 /* Set RCR */
1025 rtw_write32(Adapter, REG_RCR, 0x7000208e);/* CBSSID_DATA must set to 0,reject ICV_ERR packet */
1026 /* enable to rx data frame */
1027 rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1028 /* enable to rx ps-poll */
1029 rtw_write16(Adapter, REG_RXFLTMAP1, 0x0400);
1030
1031 /* Beacon Control related register for first time */
1032 rtw_write8(Adapter, REG_BCNDMATIM, 0x02); /* 2ms */
1033
1034 rtw_write8(Adapter, REG_ATIMWND, 0x0a); /* 10ms */
1035 rtw_write16(Adapter, REG_BCNTCFG, 0x00);
1036 rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04);
1037 rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/* +32767 (~32ms) */
1038
1039 /* reset TSF */
1040 rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0));
1041
1042 /* BIT(3) - If set 0, hw will clr bcnq when tx becon ok/fail or port 0 */
1043 res = rtw_read8(Adapter, REG_MBID_NUM, &val8);
1044 if (res)
1045 return;
1046
1047 rtw_write8(Adapter, REG_MBID_NUM, val8 | BIT(3) | BIT(4));
1048
1049 /* enable BCN0 Function for if1 */
1050 /* don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received) */
1051 rtw_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP | EN_BCN_FUNCTION | BIT(1)));
1052
1053 /* dis BCN1 ATIM WND if if2 is station */
1054 res = rtw_read8(Adapter, REG_BCN_CTRL_1, &val8);
1055 if (res)
1056 return;
1057
1058 rtw_write8(Adapter, REG_BCN_CTRL_1, val8 | BIT(0));
1059 }
1060 }
1061
SetHwReg8188EU(struct adapter * Adapter,u8 variable,u8 * val)1062 void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
1063 {
1064 struct hal_data_8188e *haldata = &Adapter->haldata;
1065 struct dm_priv *pdmpriv = &haldata->dmpriv;
1066 struct odm_dm_struct *podmpriv = &haldata->odmpriv;
1067 u8 reg;
1068 int res;
1069
1070 switch (variable) {
1071 case HW_VAR_SET_OPMODE:
1072 hw_var_set_opmode(Adapter, val);
1073 break;
1074 case HW_VAR_BASIC_RATE:
1075 {
1076 u16 BrateCfg = 0;
1077 u8 RateIndex = 0;
1078
1079 /* 2007.01.16, by Emily */
1080 /* Select RRSR (in Legacy-OFDM and CCK) */
1081 /* For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate. */
1082 /* We do not use other rates. */
1083 HalSetBrateCfg(Adapter, val, &BrateCfg);
1084
1085 /* 2011.03.30 add by Luke Lee */
1086 /* CCK 2M ACK should be disabled for some BCM and Atheros AP IOT */
1087 /* because CCK 2M has poor TXEVM */
1088 /* CCK 5.5M & 11M ACK should be enabled for better performance */
1089
1090 BrateCfg = (BrateCfg | 0xd) & 0x15d;
1091
1092 BrateCfg |= 0x01; /* default enable 1M ACK rate */
1093 /* Set RRSR rate table. */
1094 rtw_write8(Adapter, REG_RRSR, BrateCfg & 0xff);
1095 rtw_write8(Adapter, REG_RRSR + 1, (BrateCfg >> 8) & 0xff);
1096 res = rtw_read8(Adapter, REG_RRSR + 2, ®);
1097 if (res)
1098 return;
1099
1100 rtw_write8(Adapter, REG_RRSR + 2, reg & 0xf0);
1101
1102 /* Set RTS initial rate */
1103 while (BrateCfg > 0x1) {
1104 BrateCfg = (BrateCfg >> 1);
1105 RateIndex++;
1106 }
1107 /* Ziv - Check */
1108 rtw_write8(Adapter, REG_INIRTS_RATE_SEL, RateIndex);
1109 }
1110 break;
1111 case HW_VAR_CORRECT_TSF:
1112 {
1113 u64 tsf;
1114 struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
1115 struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
1116
1117 tsf = pmlmeext->TSFValue - do_div(pmlmeext->TSFValue,
1118 pmlmeinfo->bcn_interval * 1024) - 1024; /* us */
1119
1120 if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE))
1121 StopTxBeacon(Adapter);
1122
1123 /* disable related TSF function */
1124 res = rtw_read8(Adapter, REG_BCN_CTRL, ®);
1125 if (res)
1126 return;
1127
1128 rtw_write8(Adapter, REG_BCN_CTRL, reg & (~BIT(3)));
1129
1130 rtw_write32(Adapter, REG_TSFTR, tsf);
1131 rtw_write32(Adapter, REG_TSFTR + 4, tsf >> 32);
1132
1133 /* enable related TSF function */
1134 res = rtw_read8(Adapter, REG_BCN_CTRL, ®);
1135 if (res)
1136 return;
1137
1138 rtw_write8(Adapter, REG_BCN_CTRL, reg | BIT(3));
1139
1140 if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE))
1141 ResumeTxBeacon(Adapter);
1142 }
1143 break;
1144 case HW_VAR_MLME_SITESURVEY:
1145 if (*((u8 *)val)) { /* under sitesurvey */
1146 /* config RCR to receive different BSSID & not to receive data frame */
1147 u32 v;
1148
1149 res = rtw_read32(Adapter, REG_RCR, &v);
1150 if (res)
1151 return;
1152
1153 v &= ~(RCR_CBSSID_BCN);
1154 rtw_write32(Adapter, REG_RCR, v);
1155 /* reject all data frame */
1156 rtw_write16(Adapter, REG_RXFLTMAP2, 0x00);
1157
1158 /* disable update TSF */
1159 res = rtw_read8(Adapter, REG_BCN_CTRL, ®);
1160 if (res)
1161 return;
1162
1163 rtw_write8(Adapter, REG_BCN_CTRL, reg | BIT(4));
1164 } else { /* sitesurvey done */
1165 struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
1166 struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
1167 u32 reg32;
1168
1169 if ((is_client_associated_to_ap(Adapter)) ||
1170 ((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE)) {
1171 /* enable to rx data frame */
1172 rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1173
1174 /* enable update TSF */
1175 res = rtw_read8(Adapter, REG_BCN_CTRL, ®);
1176 if (res)
1177 return;
1178
1179 rtw_write8(Adapter, REG_BCN_CTRL, reg & (~BIT(4)));
1180 } else if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) {
1181 rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1182 /* enable update TSF */
1183 res = rtw_read8(Adapter, REG_BCN_CTRL, ®);
1184 if (res)
1185 return;
1186
1187 rtw_write8(Adapter, REG_BCN_CTRL, reg & (~BIT(4)));
1188 }
1189
1190 res = rtw_read32(Adapter, REG_RCR, ®32);
1191 if (res)
1192 return;
1193
1194 rtw_write32(Adapter, REG_RCR, reg32 | RCR_CBSSID_BCN);
1195 }
1196 break;
1197 case HW_VAR_SLOT_TIME:
1198 {
1199 u8 u1bAIFS, aSifsTime;
1200 struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
1201 struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
1202
1203 rtw_write8(Adapter, REG_SLOT, val[0]);
1204
1205 if (pmlmeinfo->WMM_enable == 0) {
1206 if (pmlmeext->cur_wireless_mode == WIRELESS_11B)
1207 aSifsTime = 10;
1208 else
1209 aSifsTime = 16;
1210
1211 u1bAIFS = aSifsTime + (2 * pmlmeinfo->slotTime);
1212
1213 /* <Roger_EXP> Temporary removed, 2008.06.20. */
1214 rtw_write8(Adapter, REG_EDCA_VO_PARAM, u1bAIFS);
1215 rtw_write8(Adapter, REG_EDCA_VI_PARAM, u1bAIFS);
1216 rtw_write8(Adapter, REG_EDCA_BE_PARAM, u1bAIFS);
1217 rtw_write8(Adapter, REG_EDCA_BK_PARAM, u1bAIFS);
1218 }
1219 }
1220 break;
1221 case HW_VAR_DM_FLAG:
1222 podmpriv->SupportAbility = *((u8 *)val);
1223 break;
1224 case HW_VAR_DM_FUNC_OP:
1225 if (val[0])
1226 podmpriv->BK_SupportAbility = podmpriv->SupportAbility;
1227 else
1228 podmpriv->SupportAbility = podmpriv->BK_SupportAbility;
1229 break;
1230 case HW_VAR_DM_FUNC_RESET:
1231 podmpriv->SupportAbility = pdmpriv->InitODMFlag;
1232 break;
1233 case HW_VAR_DM_FUNC_CLR:
1234 podmpriv->SupportAbility = 0;
1235 break;
1236 case HW_VAR_AMPDU_FACTOR:
1237 {
1238 u8 RegToSet_Normal[4] = {0x41, 0xa8, 0x72, 0xb9};
1239 u8 FactorToSet;
1240 u8 *pRegToSet;
1241 u8 index = 0;
1242
1243 pRegToSet = RegToSet_Normal; /* 0xb972a841; */
1244 FactorToSet = *((u8 *)val);
1245 if (FactorToSet <= 3) {
1246 FactorToSet = (1 << (FactorToSet + 2));
1247 if (FactorToSet > 0xf)
1248 FactorToSet = 0xf;
1249
1250 for (index = 0; index < 4; index++) {
1251 if ((pRegToSet[index] & 0xf0) > (FactorToSet << 4))
1252 pRegToSet[index] = (pRegToSet[index] & 0x0f) | (FactorToSet << 4);
1253
1254 if ((pRegToSet[index] & 0x0f) > FactorToSet)
1255 pRegToSet[index] = (pRegToSet[index] & 0xf0) | (FactorToSet);
1256
1257 rtw_write8(Adapter, (REG_AGGLEN_LMT + index), pRegToSet[index]);
1258 }
1259 }
1260 }
1261 break;
1262 case HW_VAR_H2C_MEDIA_STATUS_RPT:
1263 rtl8188e_set_FwMediaStatus_cmd(Adapter, (*(__le16 *)val));
1264 break;
1265 default:
1266 break;
1267 }
1268
1269 }
1270
UpdateHalRAMask8188EUsb(struct adapter * adapt,u32 mac_id,u8 rssi_level)1271 void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level)
1272 {
1273 u8 init_rate = 0;
1274 u8 networkType, raid;
1275 u32 mask, rate_bitmap;
1276 u8 shortGIrate = false;
1277 int supportRateNum = 0;
1278 struct sta_info *psta;
1279 struct hal_data_8188e *haldata = &adapt->haldata;
1280 struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
1281 struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
1282 struct wlan_bssid_ex *cur_network = &pmlmeinfo->network;
1283
1284 if (mac_id >= NUM_STA) /* CAM_SIZE */
1285 return;
1286 psta = pmlmeinfo->FW_sta_info[mac_id].psta;
1287 if (!psta)
1288 return;
1289 switch (mac_id) {
1290 case 0:/* for infra mode */
1291 supportRateNum = rtw_get_rateset_len(cur_network->SupportedRates);
1292 networkType = judge_network_type(adapt, cur_network->SupportedRates, supportRateNum) & 0xf;
1293 raid = networktype_to_raid(networkType);
1294 mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
1295 mask |= (pmlmeinfo->HT_enable) ? update_MSC_rate(&pmlmeinfo->HT_caps) : 0;
1296 if (support_short_GI(adapt, &pmlmeinfo->HT_caps))
1297 shortGIrate = true;
1298 break;
1299 case 1:/* for broadcast/multicast */
1300 supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
1301 if (pmlmeext->cur_wireless_mode & WIRELESS_11B)
1302 networkType = WIRELESS_11B;
1303 else
1304 networkType = WIRELESS_11G;
1305 raid = networktype_to_raid(networkType);
1306 mask = update_basic_rate(cur_network->SupportedRates, supportRateNum);
1307 break;
1308 default: /* for each sta in IBSS */
1309 supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
1310 networkType = judge_network_type(adapt, pmlmeinfo->FW_sta_info[mac_id].SupportedRates, supportRateNum) & 0xf;
1311 raid = networktype_to_raid(networkType);
1312 mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
1313
1314 /* todo: support HT in IBSS */
1315 break;
1316 }
1317
1318 rate_bitmap = 0x0fffffff;
1319 rate_bitmap = ODM_Get_Rate_Bitmap(&haldata->odmpriv, mac_id, mask, rssi_level);
1320
1321 mask &= rate_bitmap;
1322
1323 init_rate = get_highest_rate_idx(mask) & 0x3f;
1324
1325 if (haldata->fw_ractrl) {
1326 mask |= ((raid << 28) & 0xf0000000);
1327 psta->ra_mask = mask;
1328 mask |= ((raid << 28) & 0xf0000000);
1329
1330 /* to do ,for 8188E-SMIC */
1331 rtl8188e_set_raid_cmd(adapt, mask);
1332 } else {
1333 ODM_RA_UpdateRateInfo_8188E(&haldata->odmpriv,
1334 mac_id,
1335 raid,
1336 mask,
1337 shortGIrate
1338 );
1339 }
1340 /* set ra_id */
1341 psta->raid = raid;
1342 psta->init_rate = init_rate;
1343 }
1344
SetBeaconRelatedRegisters8188EUsb(struct adapter * adapt)1345 void SetBeaconRelatedRegisters8188EUsb(struct adapter *adapt)
1346 {
1347 u32 value32;
1348 struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
1349 struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
1350 u32 bcn_ctrl_reg = REG_BCN_CTRL;
1351 int res;
1352 u8 reg;
1353 /* reset TSF, enable update TSF, correcting TSF On Beacon */
1354
1355 /* BCN interval */
1356 rtw_write16(adapt, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval);
1357 rtw_write8(adapt, REG_ATIMWND, 0x02);/* 2ms */
1358
1359 _InitBeaconParameters(adapt);
1360
1361 rtw_write8(adapt, REG_SLOT, 0x09);
1362
1363 res = rtw_read32(adapt, REG_TCR, &value32);
1364 if (res)
1365 return;
1366
1367 value32 &= ~TSFRST;
1368 rtw_write32(adapt, REG_TCR, value32);
1369
1370 value32 |= TSFRST;
1371 rtw_write32(adapt, REG_TCR, value32);
1372
1373 /* NOTE: Fix test chip's bug (about contention windows's randomness) */
1374 rtw_write8(adapt, REG_RXTSF_OFFSET_CCK, 0x50);
1375 rtw_write8(adapt, REG_RXTSF_OFFSET_OFDM, 0x50);
1376
1377 _BeaconFunctionEnable(adapt, true, true);
1378
1379 ResumeTxBeacon(adapt);
1380
1381 res = rtw_read8(adapt, bcn_ctrl_reg, ®);
1382 if (res)
1383 return;
1384
1385 rtw_write8(adapt, bcn_ctrl_reg, reg | BIT(1));
1386 }
1387
rtl8188eu_init_default_value(struct adapter * adapt)1388 void rtl8188eu_init_default_value(struct adapter *adapt)
1389 {
1390 struct hal_data_8188e *haldata = &adapt->haldata;
1391 struct pwrctrl_priv *pwrctrlpriv;
1392 u8 i;
1393
1394 pwrctrlpriv = &adapt->pwrctrlpriv;
1395
1396 /* init default value */
1397 haldata->fw_ractrl = false;
1398 if (!pwrctrlpriv->bkeepfwalive)
1399 haldata->LastHMEBoxNum = 0;
1400
1401 /* init dm default value */
1402 haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = false;
1403 haldata->odmpriv.RFCalibrateInfo.TM_Trigger = 0;/* for IQK */
1404 haldata->pwrGroupCnt = 0;
1405 haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP_index = 0;
1406 for (i = 0; i < HP_THERMAL_NUM; i++)
1407 haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP[i] = 0;
1408 }
1409