1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */
3
4 #ifndef _IONIC_LIF_H_
5 #define _IONIC_LIF_H_
6
7 #include <linux/ptp_clock_kernel.h>
8 #include <linux/timecounter.h>
9 #include <uapi/linux/net_tstamp.h>
10 #include <linux/dim.h>
11 #include <linux/pci.h>
12 #include "ionic_rx_filter.h"
13
14 #define IONIC_ADMINQ_LENGTH 16 /* must be a power of two */
15 #define IONIC_NOTIFYQ_LENGTH 64 /* must be a power of two */
16
17 #define ADD_ADDR true
18 #define DEL_ADDR false
19 #define CAN_SLEEP true
20 #define CAN_NOT_SLEEP false
21
22 #define IONIC_RX_COPYBREAK_DEFAULT 256
23 #define IONIC_TX_BUDGET_DEFAULT 256
24
25 struct ionic_tx_stats {
26 u64 pkts;
27 u64 bytes;
28 u64 csum_none;
29 u64 csum;
30 u64 tso;
31 u64 tso_bytes;
32 u64 frags;
33 u64 vlan_inserted;
34 u64 clean;
35 u64 linearize;
36 u64 crc32_csum;
37 u64 dma_map_err;
38 u64 hwstamp_valid;
39 u64 hwstamp_invalid;
40 };
41
42 struct ionic_rx_stats {
43 u64 pkts;
44 u64 bytes;
45 u64 csum_none;
46 u64 csum_complete;
47 u64 dropped;
48 u64 vlan_stripped;
49 u64 csum_error;
50 u64 dma_map_err;
51 u64 alloc_err;
52 u64 hwstamp_valid;
53 u64 hwstamp_invalid;
54 };
55
56 #define IONIC_QCQ_F_INITED BIT(0)
57 #define IONIC_QCQ_F_SG BIT(1)
58 #define IONIC_QCQ_F_INTR BIT(2)
59 #define IONIC_QCQ_F_TX_STATS BIT(3)
60 #define IONIC_QCQ_F_RX_STATS BIT(4)
61 #define IONIC_QCQ_F_NOTIFYQ BIT(5)
62 #define IONIC_QCQ_F_CMB_RINGS BIT(6)
63
64 struct ionic_qcq {
65 void *q_base;
66 dma_addr_t q_base_pa;
67 u32 q_size;
68 void *cq_base;
69 dma_addr_t cq_base_pa;
70 u32 cq_size;
71 void *sg_base;
72 dma_addr_t sg_base_pa;
73 u32 sg_size;
74 void __iomem *cmb_q_base;
75 phys_addr_t cmb_q_base_pa;
76 u32 cmb_q_size;
77 u32 cmb_pgid;
78 u32 cmb_order;
79 struct dim dim;
80 struct ionic_queue q;
81 struct ionic_cq cq;
82 struct ionic_intr_info intr;
83 struct timer_list napi_deadline;
84 struct napi_struct napi;
85 unsigned int flags;
86 struct ionic_qcq *napi_qcq;
87 struct dentry *dentry;
88 };
89
90 #define q_to_qcq(q) container_of(q, struct ionic_qcq, q)
91 #define q_to_tx_stats(q) (&(q)->lif->txqstats[(q)->index])
92 #define q_to_rx_stats(q) (&(q)->lif->rxqstats[(q)->index])
93 #define napi_to_qcq(napi) container_of(napi, struct ionic_qcq, napi)
94 #define napi_to_cq(napi) (&napi_to_qcq(napi)->cq)
95
96 enum ionic_deferred_work_type {
97 IONIC_DW_TYPE_RX_MODE,
98 IONIC_DW_TYPE_LINK_STATUS,
99 IONIC_DW_TYPE_LIF_RESET,
100 };
101
102 struct ionic_deferred_work {
103 struct list_head list;
104 enum ionic_deferred_work_type type;
105 union {
106 u8 addr[ETH_ALEN];
107 u8 fw_status;
108 };
109 };
110
111 struct ionic_deferred {
112 spinlock_t lock; /* lock for deferred work list */
113 struct list_head list;
114 struct work_struct work;
115 };
116
117 struct ionic_lif_sw_stats {
118 u64 tx_packets;
119 u64 tx_bytes;
120 u64 rx_packets;
121 u64 rx_bytes;
122 u64 tx_tso;
123 u64 tx_tso_bytes;
124 u64 tx_csum_none;
125 u64 tx_csum;
126 u64 rx_csum_none;
127 u64 rx_csum_complete;
128 u64 rx_csum_error;
129 u64 tx_hwstamp_valid;
130 u64 tx_hwstamp_invalid;
131 u64 rx_hwstamp_valid;
132 u64 rx_hwstamp_invalid;
133 u64 hw_tx_dropped;
134 u64 hw_rx_dropped;
135 u64 hw_rx_over_errors;
136 u64 hw_rx_missed_errors;
137 u64 hw_tx_aborted_errors;
138 };
139
140 enum ionic_lif_state_flags {
141 IONIC_LIF_F_INITED,
142 IONIC_LIF_F_UP,
143 IONIC_LIF_F_LINK_CHECK_REQUESTED,
144 IONIC_LIF_F_FILTER_SYNC_NEEDED,
145 IONIC_LIF_F_FW_RESET,
146 IONIC_LIF_F_FW_STOPPING,
147 IONIC_LIF_F_SPLIT_INTR,
148 IONIC_LIF_F_BROKEN,
149 IONIC_LIF_F_TX_DIM_INTR,
150 IONIC_LIF_F_RX_DIM_INTR,
151 IONIC_LIF_F_CMB_TX_RINGS,
152 IONIC_LIF_F_CMB_RX_RINGS,
153
154 /* leave this as last */
155 IONIC_LIF_F_STATE_SIZE
156 };
157
158 struct ionic_qtype_info {
159 u8 version;
160 u8 supported;
161 u64 features;
162 u16 desc_sz;
163 u16 comp_sz;
164 u16 sg_desc_sz;
165 u16 max_sg_elems;
166 u16 sg_desc_stride;
167 };
168
169 struct ionic_phc;
170
171 #define IONIC_LIF_NAME_MAX_SZ 32
172 struct ionic_lif {
173 struct net_device *netdev;
174 DECLARE_BITMAP(state, IONIC_LIF_F_STATE_SIZE);
175 struct ionic *ionic;
176 unsigned int index;
177 unsigned int hw_index;
178 struct mutex queue_lock; /* lock for queue structures */
179 struct mutex config_lock; /* lock for config actions */
180 spinlock_t adminq_lock; /* lock for AdminQ operations */
181 struct ionic_qcq *adminqcq;
182 struct ionic_qcq *notifyqcq;
183 struct ionic_qcq **txqcqs;
184 struct ionic_qcq *hwstamp_txq;
185 struct ionic_tx_stats *txqstats;
186 struct ionic_qcq **rxqcqs;
187 struct ionic_qcq *hwstamp_rxq;
188 struct ionic_rx_stats *rxqstats;
189 struct ionic_deferred deferred;
190 struct work_struct tx_timeout_work;
191 u64 last_eid;
192 unsigned int kern_pid;
193 u64 __iomem *kern_dbpage;
194 unsigned int neqs;
195 unsigned int nxqs;
196 unsigned int ntxq_descs;
197 unsigned int nrxq_descs;
198 u32 rx_copybreak;
199 u64 rxq_features;
200 u16 rx_mode;
201 u64 hw_features;
202 bool registered;
203 u16 lif_type;
204 unsigned int link_down_count;
205 unsigned int nmcast;
206 unsigned int nucast;
207 unsigned int nvlans;
208 unsigned int max_vlans;
209 char name[IONIC_LIF_NAME_MAX_SZ];
210
211 union ionic_lif_identity *identity;
212 struct ionic_lif_info *info;
213 dma_addr_t info_pa;
214 u32 info_sz;
215 struct ionic_qtype_info qtype_info[IONIC_QTYPE_MAX];
216
217 u16 rss_types;
218 u8 rss_hash_key[IONIC_RSS_HASH_KEY_SIZE];
219 u8 *rss_ind_tbl;
220 dma_addr_t rss_ind_tbl_pa;
221 u32 rss_ind_tbl_sz;
222
223 struct ionic_rx_filters rx_filters;
224 u32 rx_coalesce_usecs; /* what the user asked for */
225 u32 rx_coalesce_hw; /* what the hw is using */
226 u32 tx_coalesce_usecs; /* what the user asked for */
227 u32 tx_coalesce_hw; /* what the hw is using */
228 unsigned int dbid_count;
229
230 struct ionic_phc *phc;
231
232 struct dentry *dentry;
233 };
234
235 struct ionic_phc {
236 spinlock_t lock; /* lock for cc and tc */
237 struct cyclecounter cc;
238 struct timecounter tc;
239
240 struct mutex config_lock; /* lock for ts_config */
241 struct hwtstamp_config ts_config;
242 u64 ts_config_rx_filt;
243 u32 ts_config_tx_mode;
244
245 u32 init_cc_mult;
246 long aux_work_delay;
247
248 struct ptp_clock_info ptp_info;
249 struct ptp_clock *ptp;
250 struct ionic_lif *lif;
251 };
252
253 struct ionic_queue_params {
254 unsigned int nxqs;
255 unsigned int ntxq_descs;
256 unsigned int nrxq_descs;
257 u64 rxq_features;
258 bool intr_split;
259 bool cmb_tx;
260 bool cmb_rx;
261 };
262
ionic_init_queue_params(struct ionic_lif * lif,struct ionic_queue_params * qparam)263 static inline void ionic_init_queue_params(struct ionic_lif *lif,
264 struct ionic_queue_params *qparam)
265 {
266 qparam->nxqs = lif->nxqs;
267 qparam->ntxq_descs = lif->ntxq_descs;
268 qparam->nrxq_descs = lif->nrxq_descs;
269 qparam->rxq_features = lif->rxq_features;
270 qparam->intr_split = test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state);
271 qparam->cmb_tx = test_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state);
272 qparam->cmb_rx = test_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state);
273 }
274
ionic_set_queue_params(struct ionic_lif * lif,struct ionic_queue_params * qparam)275 static inline void ionic_set_queue_params(struct ionic_lif *lif,
276 struct ionic_queue_params *qparam)
277 {
278 lif->nxqs = qparam->nxqs;
279 lif->ntxq_descs = qparam->ntxq_descs;
280 lif->nrxq_descs = qparam->nrxq_descs;
281 lif->rxq_features = qparam->rxq_features;
282
283 if (qparam->intr_split)
284 set_bit(IONIC_LIF_F_SPLIT_INTR, lif->state);
285 else
286 clear_bit(IONIC_LIF_F_SPLIT_INTR, lif->state);
287
288 if (qparam->cmb_tx)
289 set_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state);
290 else
291 clear_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state);
292
293 if (qparam->cmb_rx)
294 set_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state);
295 else
296 clear_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state);
297 }
298
ionic_coal_usec_to_hw(struct ionic * ionic,u32 usecs)299 static inline u32 ionic_coal_usec_to_hw(struct ionic *ionic, u32 usecs)
300 {
301 u32 mult = le32_to_cpu(ionic->ident.dev.intr_coal_mult);
302 u32 div = le32_to_cpu(ionic->ident.dev.intr_coal_div);
303
304 /* Div-by-zero should never be an issue, but check anyway */
305 if (!div || !mult)
306 return 0;
307
308 /* Round up in case usecs is close to the next hw unit */
309 usecs += (div / mult) >> 1;
310
311 /* Convert from usecs to device units */
312 return (usecs * mult) / div;
313 }
314
315 void ionic_link_status_check_request(struct ionic_lif *lif, bool can_sleep);
316 void ionic_get_stats64(struct net_device *netdev,
317 struct rtnl_link_stats64 *ns);
318 void ionic_lif_deferred_enqueue(struct ionic_deferred *def,
319 struct ionic_deferred_work *work);
320 int ionic_lif_alloc(struct ionic *ionic);
321 int ionic_lif_init(struct ionic_lif *lif);
322 void ionic_lif_free(struct ionic_lif *lif);
323 void ionic_lif_deinit(struct ionic_lif *lif);
324
325 int ionic_lif_addr_add(struct ionic_lif *lif, const u8 *addr);
326 int ionic_lif_addr_del(struct ionic_lif *lif, const u8 *addr);
327
328 void ionic_stop_queues_reconfig(struct ionic_lif *lif);
329 void ionic_txrx_free(struct ionic_lif *lif);
330 void ionic_qcqs_free(struct ionic_lif *lif);
331 int ionic_restart_lif(struct ionic_lif *lif);
332
333 int ionic_lif_register(struct ionic_lif *lif);
334 void ionic_lif_unregister(struct ionic_lif *lif);
335 int ionic_lif_identify(struct ionic *ionic, u8 lif_type,
336 union ionic_lif_identity *lif_ident);
337 int ionic_lif_size(struct ionic *ionic);
338
339 #if IS_ENABLED(CONFIG_PTP_1588_CLOCK)
340 void ionic_lif_hwstamp_replay(struct ionic_lif *lif);
341 void ionic_lif_hwstamp_recreate_queues(struct ionic_lif *lif);
342 int ionic_lif_hwstamp_set(struct ionic_lif *lif, struct ifreq *ifr);
343 int ionic_lif_hwstamp_get(struct ionic_lif *lif, struct ifreq *ifr);
344 ktime_t ionic_lif_phc_ktime(struct ionic_lif *lif, u64 counter);
345 void ionic_lif_register_phc(struct ionic_lif *lif);
346 void ionic_lif_unregister_phc(struct ionic_lif *lif);
347 void ionic_lif_alloc_phc(struct ionic_lif *lif);
348 void ionic_lif_free_phc(struct ionic_lif *lif);
349 #else
ionic_lif_hwstamp_replay(struct ionic_lif * lif)350 static inline void ionic_lif_hwstamp_replay(struct ionic_lif *lif) {}
ionic_lif_hwstamp_recreate_queues(struct ionic_lif * lif)351 static inline void ionic_lif_hwstamp_recreate_queues(struct ionic_lif *lif) {}
352
ionic_lif_hwstamp_set(struct ionic_lif * lif,struct ifreq * ifr)353 static inline int ionic_lif_hwstamp_set(struct ionic_lif *lif, struct ifreq *ifr)
354 {
355 return -EOPNOTSUPP;
356 }
357
ionic_lif_hwstamp_get(struct ionic_lif * lif,struct ifreq * ifr)358 static inline int ionic_lif_hwstamp_get(struct ionic_lif *lif, struct ifreq *ifr)
359 {
360 return -EOPNOTSUPP;
361 }
362
ionic_lif_phc_ktime(struct ionic_lif * lif,u64 counter)363 static inline ktime_t ionic_lif_phc_ktime(struct ionic_lif *lif, u64 counter)
364 {
365 return ns_to_ktime(0);
366 }
367
ionic_lif_register_phc(struct ionic_lif * lif)368 static inline void ionic_lif_register_phc(struct ionic_lif *lif) {}
ionic_lif_unregister_phc(struct ionic_lif * lif)369 static inline void ionic_lif_unregister_phc(struct ionic_lif *lif) {}
ionic_lif_alloc_phc(struct ionic_lif * lif)370 static inline void ionic_lif_alloc_phc(struct ionic_lif *lif) {}
ionic_lif_free_phc(struct ionic_lif * lif)371 static inline void ionic_lif_free_phc(struct ionic_lif *lif) {}
372 #endif
373
374 int ionic_lif_create_hwstamp_txq(struct ionic_lif *lif);
375 int ionic_lif_create_hwstamp_rxq(struct ionic_lif *lif);
376 int ionic_lif_config_hwstamp_rxq_all(struct ionic_lif *lif, bool rx_all);
377 int ionic_lif_set_hwstamp_txmode(struct ionic_lif *lif, u16 txstamp_mode);
378 int ionic_lif_set_hwstamp_rxfilt(struct ionic_lif *lif, u64 pkt_class);
379
380 int ionic_lif_rss_config(struct ionic_lif *lif, u16 types,
381 const u8 *key, const u32 *indir);
382 void ionic_lif_rx_mode(struct ionic_lif *lif);
383 int ionic_reconfigure_queues(struct ionic_lif *lif,
384 struct ionic_queue_params *qparam);
385 #endif /* _IONIC_LIF_H_ */
386