1/* $Id: head.S,v 1.47 2003/07/08 09:53:35 starvik Exp $
2 *
3 * Head of the kernel - alter with care
4 *
5 * Copyright (C) 2000, 2001 Axis Communications AB
6 *
7 * Authors:	Bjorn Wesen (bjornw@axis.com)
8 *
9 * $Log: head.S,v $
10 * Revision 1.47  2003/07/08 09:53:35  starvik
11 * Corrected last CVS log entry
12 *
13 * Revision 1.46  2003/05/15 08:07:51  gunnard
14 * Removed serial port DMA when using AGDB.
15 *
16 * Revision 1.45  2003/04/28 05:31:05  starvik
17 * Added section attributes
18 *
19 * Revision 1.44  2002/02/05 15:39:57  bjornw
20 * Oops.. non-CRAMFS_MAGIC should jump over the copying, not into it...
21 *
22 * Revision 1.43  2001/11/08 15:09:43  starvik
23 * Only start MII clock if Ethernet is configured
24 *
25 * Revision 1.42  2001/11/08 14:37:34  starvik
26 * Start MII clock early to make sure that it is running at tranceiver reset
27 *
28 * Revision 1.41  2001/10/29 14:55:58  pkj
29 * Corrected pa$r0 to par0.
30 *
31 * Revision 1.40  2001/10/03 14:59:57  pkj
32 * Added support for resetting the Bluetooth hardware.
33 *
34 * Revision 1.39  2001/10/01 14:45:03  bjornw
35 * Removed underscores and added register prefixes
36 *
37 * Revision 1.38  2001/09/21 07:14:11  jonashg
38 * Made root filesystem (cramfs) use mtdblock driver when booting from flash.
39 *
40 * Revision 1.37  2001/09/11 13:44:29  orjanf
41 * Decouple usage of serial ports for debug and kgdb.
42 *
43 * Revision 1.36  2001/06/29 12:39:31  pkj
44 * Added support for mirroring the first flash to just below the
45 * second one, to make them look consecutive to cramfs.
46 *
47 * Revision 1.35  2001/06/25 14:07:00  hp
48 * 	Fix review comment.
49 * 	* head.S: Use IO_STATE, IO_FIELD and IO_MASK constructs instead of
50 * 	magic numbers.  Add comment that -traditional must not be used.
51 * 	* entry.S (SYMBOL_NAME): Change redefinition to use ## concatenation.
52 * 	Correct and update comment.
53 * 	* Makefile (.S.o): Don't use -traditional.  Add comment why the
54 * 	toplevel rule can't be used (now that there's a reason).
55 *
56 * Revision 1.34  2001/05/15 07:08:14  hp
57 * Tweak "notice" to reflect that both r8 r9 are used
58 *
59 * Revision 1.33  2001/05/15 06:40:05  hp
60 * Put bulk of code in .text.init, data in .data.init
61 *
62 * Revision 1.32  2001/05/15 06:18:56  hp
63 * Execute review comment: s/bcc/bhs/g; s/bcs/blo/g
64 *
65 * Revision 1.31  2001/05/15 06:08:40  hp
66 * Add sentence about autodetecting the bit31-MMU-bug
67 *
68 * Revision 1.30  2001/05/15 06:00:05  hp
69 * Update comment: LOW_MAP is not forced on xsim anymore.
70 *
71 * Revision 1.29  2001/04/18 12:51:59  orjanf
72 * * Reverted review change regarding the use of bcs/bcc.
73 * * Removed non-working LED-clearing code.
74 *
75 * Revision 1.28  2001/04/17 13:58:39  orjanf
76 * * Renamed CONFIG_KGDB to CONFIG_ETRAX_KGDB.
77 *
78 * Revision 1.27  2001/04/17 11:42:35  orjanf
79 * Changed according to review:
80 * * Added comment explaining memory map bug.
81 * * Changed bcs and bcc to blo and bhs, respectively.
82 * * Removed mentioning of Stallone and Olga boards.
83 *
84 * Revision 1.26  2001/04/06 12:31:07  jonashg
85 * Check for cramfs in flash before RAM instead of RAM before flash.
86 *
87 * Revision 1.25  2001/04/04 06:23:53  starvik
88 * Initialize DRAM if not already initialized
89 *
90 * Revision 1.24  2001/04/03 11:12:00  starvik
91 * Removed dram init (done by rescue or etrax100boot
92 * Corrected include
93 *
94 * Revision 1.23  2001/04/03 09:53:03  starvik
95 * Include hw_settings.S
96 *
97 * Revision 1.22  2001/03/26 14:23:26  bjornw
98 * Namechange of some config options
99 *
100 * Revision 1.21  2001/03/08 12:14:41  bjornw
101 * * Config name for ETRAX IDE was renamed
102 * * Removed G27 auto-setting when JULIETTE is chosen (need to make this
103 *   a new config option later)
104 *
105 * Revision 1.20  2001/02/23 12:47:56  bjornw
106 * MMU regs during LOW_MAP updated to reflect a newer reality
107 *
108 * Revision 1.19  2001/02/19 11:12:07  bjornw
109 * Changed comment header format
110 *
111 * Revision 1.18  2001/02/15 07:25:38  starvik
112 * Added support for synchronous serial ports
113 *
114 * Revision 1.17  2001/02/08 15:53:13  starvik
115 * Last commit removed some important ifdefs
116 *
117 * Revision 1.16  2001/02/08 15:20:38  starvik
118 * Include dram_init.S as inline
119 *
120 * Revision 1.15  2001/01/29 18:12:01  bjornw
121 * Corrected some comments
122 *
123 * Revision 1.14  2001/01/29 13:11:29  starvik
124 * Include dram_init.S (with DRAM/SDRAM initialization)
125 *
126 * Revision 1.13  2001/01/23 14:54:57  markusl
127 * Updated for USB
128 * i.e. added r_gen_config settings
129 *
130 * Revision 1.12  2001/01/19 16:16:29  perf
131 * Added temporary mapping of 0x0c->0x0c to avoid flash loading confusion.
132 * Renamed serial options from ETRAX100 to ETRAX.
133 *
134 * Revision 1.11  2001/01/16 16:31:38  bjornw
135 * * Changed name and semantics of running_from_flash to romfs_in_flash,
136 *   set by head.S to indicate to setup.c whether there is a cramfs image
137 *   after the kernels BSS or not. Should work for all three boot-cases
138 *   (DRAM with cramfs in DRAM, DRAM with cramfs in flash (compressed boot),
139 *    and flash with cramfs in flash)
140 *
141 * Revision 1.10  2001/01/16 14:12:21  bjornw
142 * * Check for cramfs start passed in r9 from the decompressor, if all other
143 *   cramfs options fail (if we boot from DRAM but don't find a cramfs image
144 *   after the kernel in DRAM, it is probably still in the flash)
145 * * Check magic in cramfs detection when booting from flash directly
146 *
147 * Revision 1.9  2001/01/15 17:17:02  bjornw
148 * * Corrected the code that detects the cramfs lengths
149 * * Added a comment saying that the above does not work due to other
150 *   reasons..
151 *
152 * Revision 1.8  2001/01/15 16:27:51  jonashg
153 * Made boot after flashing work.
154 * * end destination is __vmlinux_end in RAM.
155 * * _romfs_start moved because of virtual memory.
156 *
157 * Revision 1.7  2000/11/21 13:55:29  bjornw
158 * Use CONFIG_CRIS_LOW_MAP for the low VM map instead of explicit CPU type
159 *
160 * Revision 1.6  2000/10/06 12:36:55  bjornw
161 * Forgot swapper_pg_dir when changing memory map..
162 *
163 * Revision 1.5  2000/10/04 16:49:30  bjornw
164 * * Fixed memory mapping in LX
165 * * Check for cramfs instead of romfs
166 *
167 */
168
169#include <linux/config.h>
170#define ASSEMBLER_MACROS_ONLY
171/* The IO_* macros use the ## token concatenation operator, so
172   -traditional must not be used when assembling this file.  */
173#include <asm/sv_addr_ag.h>
174
175#define CRAMFS_MAGIC 0x28cd3d45
176#define RAM_INIT_MAGIC 0x56902387
177
178#define START_ETHERNET_CLOCK IO_STATE(R_NETWORK_GEN_CONFIG, enable, on) |\
179                             IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk)
180
181	;; exported symbols
182
183	.globl	etrax_irv
184	.globl	romfs_start
185	.globl	romfs_length
186	.globl	romfs_in_flash
187	.globl  swapper_pg_dir
188
189	.text
190
191	;; This is the entry point of the kernel. We are in supervisor mode.
192	;; 0x00000000 if Flash, 0x40004000 if DRAM
193	;; since etrax actually starts at address 2 when booting from flash, we
194	;; put a nop (2 bytes) here first so we dont accidentally skip the di
195	;;
196	;; NOTICE! The registers r8 and r9 are used as parameters carrying
197	;; information from the decompressor (if the kernel was compressed).
198	;; They should not be used in the code below until read.
199
200	nop
201	di
202
203	;; First setup the kseg_c mapping from where the kernel is linked
204	;; to 0x40000000 (where the actual DRAM resides) otherwise
205	;; we cannot do very much! See arch/cris/README.mm
206	;;
207	;; Notice that since we're potentially running at 0x00 or 0x40 right now,
208	;; we will get a fault as soon as we enable the MMU if we dont
209	;; temporarily map those segments linearily.
210	;;
211	;; Due to a bug in Etrax-100 LX version 1 we need to map the memory
212	;; slightly different.  The bug is that you can't remap bit 31 of
213	;; an address.  Though we can check the version register for
214	;; whether the bug is present, some constants would then have to
215	;; be variables, so we don't.  The drawback is that you can "only" map
216	;; 1G per process with CONFIG_CRIS_LOW_MAP.
217
218#ifdef CONFIG_CRIS_LOW_MAP
219	; kseg mappings, temporary map of 0xc0->0x40
220 	move.d	  IO_FIELD (R_MMU_KBASE_HI, base_c, 4)		\
221		| IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb)	\
222		| IO_FIELD (R_MMU_KBASE_HI, base_9, 9)		\
223		| IO_FIELD (R_MMU_KBASE_HI, base_8, 8), $r0
224	move.d	$r0, [R_MMU_KBASE_HI]
225
226	; temporary map of 0x40->0x40 and 0x60->0x40
227 	move.d	  IO_FIELD (R_MMU_KBASE_LO, base_6, 4)		\
228		| IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0
229	move.d	$r0, [R_MMU_KBASE_LO]
230
231	; mmu enable, segs e,c,b,a,6,5,4,0 segment mapped
232 	move.d	  IO_STATE (R_MMU_CONFIG, mmu_enable, enable)	\
233		| IO_STATE (R_MMU_CONFIG, inv_excp, enable)	\
234		| IO_STATE (R_MMU_CONFIG, acc_excp, enable)	\
235		| IO_STATE (R_MMU_CONFIG, we_excp, enable)	\
236		| IO_STATE (R_MMU_CONFIG, seg_f, page)		\
237		| IO_STATE (R_MMU_CONFIG, seg_e, seg)		\
238		| IO_STATE (R_MMU_CONFIG, seg_d, page)		\
239		| IO_STATE (R_MMU_CONFIG, seg_c, seg)		\
240		| IO_STATE (R_MMU_CONFIG, seg_b, seg)		\
241		| IO_STATE (R_MMU_CONFIG, seg_a, seg)		\
242		| IO_STATE (R_MMU_CONFIG, seg_9, page)		\
243		| IO_STATE (R_MMU_CONFIG, seg_8, page)		\
244		| IO_STATE (R_MMU_CONFIG, seg_7, page)		\
245		| IO_STATE (R_MMU_CONFIG, seg_6, seg)		\
246		| IO_STATE (R_MMU_CONFIG, seg_5, seg)		\
247		| IO_STATE (R_MMU_CONFIG, seg_4, seg)		\
248		| IO_STATE (R_MMU_CONFIG, seg_3, page)		\
249		| IO_STATE (R_MMU_CONFIG, seg_2, page)		\
250		| IO_STATE (R_MMU_CONFIG, seg_1, page)		\
251		| IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0
252	move.d	$r0, [R_MMU_CONFIG]
253#else
254	; kseg mappings
255 	move.d	  IO_FIELD (R_MMU_KBASE_HI, base_e, 8)		\
256		| IO_FIELD (R_MMU_KBASE_HI, base_c, 4)		\
257		| IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb), $r0
258	move.d	$r0, [R_MMU_KBASE_HI]
259
260	; temporary map of 0x40->0x40 and 0x00->0x00
261	move.d	  IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0
262	move.d	$r0, [R_MMU_KBASE_LO]
263
264	; mmu enable, segs f,e,c,b,4,0 segment mapped
265 	move.d	  IO_STATE (R_MMU_CONFIG, mmu_enable, enable)	\
266		| IO_STATE (R_MMU_CONFIG, inv_excp, enable)	\
267		| IO_STATE (R_MMU_CONFIG, acc_excp, enable)	\
268		| IO_STATE (R_MMU_CONFIG, we_excp, enable)	\
269		| IO_STATE (R_MMU_CONFIG, seg_f, seg)		\
270		| IO_STATE (R_MMU_CONFIG, seg_e, seg)		\
271		| IO_STATE (R_MMU_CONFIG, seg_d, page)		\
272		| IO_STATE (R_MMU_CONFIG, seg_c, seg)		\
273		| IO_STATE (R_MMU_CONFIG, seg_b, seg)		\
274		| IO_STATE (R_MMU_CONFIG, seg_a, page)		\
275		| IO_STATE (R_MMU_CONFIG, seg_9, page)		\
276		| IO_STATE (R_MMU_CONFIG, seg_8, page)		\
277		| IO_STATE (R_MMU_CONFIG, seg_7, page)		\
278		| IO_STATE (R_MMU_CONFIG, seg_6, page)		\
279		| IO_STATE (R_MMU_CONFIG, seg_5, page)		\
280		| IO_STATE (R_MMU_CONFIG, seg_4, seg)		\
281		| IO_STATE (R_MMU_CONFIG, seg_3, page)		\
282		| IO_STATE (R_MMU_CONFIG, seg_2, page)		\
283		| IO_STATE (R_MMU_CONFIG, seg_1, page)		\
284		| IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0
285	move.d	$r0, [R_MMU_CONFIG]
286#endif
287
288	;; Now we need to sort out the segments and their locations in RAM or
289	;; Flash. The image in the Flash (or in DRAM) consists of 3 pieces:
290	;; 1) kernel text, 2) kernel data, 3) ROM filesystem image
291	;; But the linker has linked the kernel to expect this layout in
292	;; DRAM memory:
293	;; 1) kernel text, 2) kernel data, 3) kernel BSS
294	;; (the location of the ROM filesystem is determined by the krom driver)
295	;; If we boot this from Flash, we want to keep the ROM filesystem in
296	;; the flash, we want to copy the text and need to copy the data to DRAM.
297	;; But if we boot from DRAM, we need to move the ROMFS image
298	;; from its position after kernel data, to after kernel BSS, BEFORE the
299	;; kernel starts using the BSS area (since its "overlayed" with the ROMFS)
300	;;
301	;; In both cases, we start in un-cached mode, and need to jump into a
302	;; cached PC after we're done fiddling around with the segments.
303	;;
304	;; arch/etrax100/etrax100.ld sets some symbols that define the start
305	;; and end of each segment.
306
307	;; Check if we start from DRAM or FLASH by testing PC
308
309	move.d	$pc,$r0
310	and.d	0x7fffffff,$r0	; get rid of the non-cache bit
311	cmp.d	0x10000,$r0	; arbitrary... just something above this code
312	blo	_inflash0
313	nop
314
315	jump	_inram		; enter cached ram
316
317	;; Jumpgate for branches.
318_inflash0:
319	jump	_inflash
320
321	;; Put this in a suitable section where we can reclaim storage
322	;; after init.
323	.section ".text.init", "ax"
324_inflash:
325#ifdef CONFIG_ETRAX_ETHERNET
326	;; Start MII clock to make sure it is running when tranceiver is reset
327	move.d START_ETHERNET_CLOCK, $r0
328	move.d $r0, [R_NETWORK_GEN_CONFIG]
329#endif
330
331	;; We need to initialze DRAM registers before we start using the DRAM
332
333	cmp.d	RAM_INIT_MAGIC, $r8	; Already initialized?
334	beq	_dram_init_finished
335	nop
336
337#include "../lib/dram_init.S"
338
339_dram_init_finished:
340	;; Copy text+data to DRAM
341	;; This is fragile - the calculation of r4 as the image size depends
342	;; on that the labels below actually are the first and last positions
343	;; in the linker-script.
344	;;
345	;; Then the locating of the cramfs image depends on the aforementioned
346	;; image being located in the flash at 0. This is most often not true,
347	;; thus the following does not work (normally there is a rescue-block
348	;; between the physical start of the flash and the flash-image start,
349	;; and when run with compression, the kernel is actually unpacked to
350	;; DRAM and we never get here in the first place :))
351
352	moveq	0, $r0			; source
353	move.d	text_start, $r1		; destination
354	move.d	__vmlinux_end, $r2	; end destination
355	move.d	$r2, $r4
356	sub.d	$r1, $r4		; r4=__vmlinux_end in flash, used below
3571:	move.w	[$r0+], $r3
358	move.w	$r3, [$r1+]
359	cmp.d	$r2, $r1
360	blo	1b
361	nop
362
363	;; We keep the cramfs in the flash.
364	;; There might be none, but that does not matter because
365	;; we don't do anything than read some bytes here.
366
367	moveq	0, $r0
368	move.d	$r0, [romfs_length] ; default if there is no cramfs
369
370	move.d  [$r4], $r0	; cramfs_super.magic
371	cmp.d	CRAMFS_MAGIC, $r0
372	bne	1f
373	nop
374	move.d	[$r4 + 4], $r0	; cramfs_super.size
375	move.d	$r0, [romfs_length]
376#ifdef CONFIG_CRIS_LOW_MAP
377	add.d   0x50000000, $r4	; add flash start in virtual memory (cached)
378#else
379	add.d   0xf0000000, $r4	; add flash start in virtual memory (cached)
380#endif
381	move.d	$r4, [romfs_start]
3821:
383	moveq	1, $r0
384	move.d	$r0, [romfs_in_flash]
385
386	jump	_start_it	; enter code, cached this time
387
388_inram:
389	;; Move the ROM fs to after BSS end. This assumes that the cramfs
390	;; second longword contains the length of the cramfs
391
392	moveq	0, $r0
393	move.d	$r0, [romfs_length] ; default if there is no cramfs
394
395	;; The kernel could have been unpacked to DRAM by the loader, but
396	;; the cramfs image could still be in the Flash directly after the
397	;; compressed kernel image. The loader passes the address of the
398	;; byte succeeding the last compressed byte in the flash in the
399	;; register r9 when starting the kernel. Check if r9 points to a
400	;; decent cramfs image!
401	;; (Notice that if this is not booted from the loader, r9 will be
402	;;  garbage but we do sanity checks on it, the chance that it points
403	;;  to a cramfs magic is small.. )
404
405	cmp.d	0x0ffffff8, $r9
406	bhs	_no_romfs_in_flash	; r9 points outside the flash area
407	nop
408	move.d	[$r9], $r0	; cramfs_super.magic
409	cmp.d	CRAMFS_MAGIC, $r0
410	bne	_no_romfs_in_flash
411	nop
412	move.d	[$r9+4], $r0	; cramfs_super.length
413	move.d	$r0, [romfs_length]
414#ifdef CONFIG_CRIS_LOW_MAP
415	add.d   0x50000000, $r9	; add flash start in virtual memory (cached)
416#else
417	add.d   0xf0000000, $r9	; add flash start in virtual memory (cached)
418#endif
419	move.d	$r9, [romfs_start]
420
421	moveq	1, $r0
422	move.d	$r0, [romfs_in_flash]
423
424	jump	_start_it	; enter code, cached this time
425
426_no_romfs_in_flash:
427	;; Check if there is a cramfs (magic value).
428	;; Notice that we check for cramfs magic value - which is
429	;; the "rom fs" we'll possibly use in 2.4 if not JFFS (which does
430	;; not need this mechanism anyway)
431
432	move.d	__vmlinux_end, $r0; the image will be after the vmlinux end address
433	move.d	[$r0], $r1	; cramfs assumes same endian on host/target
434	cmp.d	CRAMFS_MAGIC, $r1; magic value in cramfs superblock
435	bne	2f
436	nop
437
438	;; Ok. What is its size ?
439
440	move.d	[$r0 + 4], $r2	; cramfs_super.size (again, no need to swapwb)
441
442	;; We want to copy it to the end of the BSS
443
444	move.d	_end, $r1
445
446	;; Remember values so cramfs and setup can find this info
447
448	move.d	$r1, [romfs_start]	; new romfs location
449	move.d	$r2, [romfs_length]
450
451	;; We need to copy it backwards, since they can be overlapping
452
453	add.d	$r2, $r0
454	add.d	$r2, $r1
455
456	;; Go ahead. Make my loop.
457
458	lsrq	1, $r2		; size is in bytes, we copy words
459
4601:	move.w	[$r0=$r0-2],$r3
461	move.w	$r3,[$r1=$r1-2]
462	subq	1, $r2
463	bne	1b
464	nop
465
4662:
467	;; Dont worry that the BSS is tainted. It will be cleared later.
468
469	moveq	0, $r0
470	move.d	$r0, [romfs_in_flash]
471
472	jump	_start_it	; better skip the additional cramfs check below
473
474_start_it:
475	;; the kernel stack is overlayed with the task structure for each
476	;; task. thus the initial kernel stack is in the same page as the
477	;; init_task (but starts in the top of the page, size 8192)
478	move.d	init_task_union + 8192, $sp
479	move.d	ibr_start,$r0	; this symbol is set by the linker script
480	move	$r0,$ibr
481	move.d	$r0,[etrax_irv]	; set the interrupt base register and pointer
482
483	;; Clear BSS region, from _bss_start to _end
484
485	move.d	__bss_start, $r0
486	move.d	_end, $r1
4871:	clear.d	[$r0+]
488	cmp.d	$r1, $r0
489	blo	1b
490	nop
491
492#ifdef CONFIG_BLK_DEV_ETRAXIDE
493	;; disable ATA before enabling it in genconfig below
494	moveq	0,$r0
495	move.d	$r0,[R_ATA_CTRL_DATA]
496	move.d	$r0,[R_ATA_TRANSFER_CNT]
497	move.d	$r0,[R_ATA_CONFIG]
498#if 0
499	move.d	R_PORT_G_DATA, $r1
500	move.d	$r0, [$r1]; assert ATA bus-reset
501	nop
502	nop
503	nop
504	nop
505	nop
506	nop
507	move.d	0x08000000,$r0
508	move.d	$r0,[$r1]
509#endif
510#endif
511
512#ifdef CONFIG_JULIETTE
513	;; configure external DMA channel 0 before enabling it in genconfig
514
515	moveq	0,$r0
516	move.d	$r0,[R_EXT_DMA_0_ADDR]
517	; cnt enable, word size, output, stop, size 0
518	move.d	  IO_STATE (R_EXT_DMA_0_CMD, cnt, enable)	\
519		| IO_STATE (R_EXT_DMA_0_CMD, rqpol, ahigh)	\
520		| IO_STATE (R_EXT_DMA_0_CMD, apol, ahigh)	\
521		| IO_STATE (R_EXT_DMA_0_CMD, rq_ack, burst)	\
522		| IO_STATE (R_EXT_DMA_0_CMD, wid, word)		\
523		| IO_STATE (R_EXT_DMA_0_CMD, dir, output)	\
524		| IO_STATE (R_EXT_DMA_0_CMD, run, stop)		\
525		| IO_FIELD (R_EXT_DMA_0_CMD, trf_count, 0),$r0
526	move.d	$r0,[R_EXT_DMA_0_CMD]
527
528	;; reset dma4 and wait for completion
529
530	moveq	IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0
531	move.b	$r0,[R_DMA_CH4_CMD]
5321:	move.b	[R_DMA_CH4_CMD],$r0
533	and.b	IO_MASK (R_DMA_CH4_CMD, cmd),$r0
534	cmp.b	IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0
535	beq	1b
536	nop
537
538	;; reset dma5 and wait for completion
539
540	moveq	IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0
541	move.b	$r0,[R_DMA_CH5_CMD]
5421:	move.b	[R_DMA_CH5_CMD],$r0
543	and.b	IO_MASK (R_DMA_CH5_CMD, cmd),$r0
544	cmp.b	IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0
545	beq	1b
546	nop
547#endif
548
549	;; Etrax product HW genconfig setup
550
551	moveq	0,$r0
552#if (!defined(CONFIG_ETRAX_KGDB) || !defined(CONFIG_ETRAX_DEBUG_PORT0)) \
553	&& !defined(CONFIG_DMA_MEMCPY)
554	; DMA channels 6 and 7 to ser0, kgdb doesnt want DMA
555#if (defined(CONFIG_ETRAX_AGDB))
556	; agdb only wants DMA out, no dma in
557	or.d	  IO_STATE (R_GEN_CONFIG, dma6, serial0),$r0
558#else
559	or.d	  IO_STATE (R_GEN_CONFIG, dma7, serial0)	\
560		| IO_STATE (R_GEN_CONFIG, dma6, serial0),$r0
561#endif
562#endif
563#if !defined(CONFIG_ETRAX_KGDB) || !defined(CONFIG_ETRAX_DEBUG_PORT1)
564	; DMA channels 8 and 9 to ser1, kgdb doesnt want DMA
565#if (defined(CONFIG_ETRAX_AGDB))
566	  ; agdb only wants DMA out, no dma in
567	or.d	  IO_STATE (R_GEN_CONFIG, dma8, serial1),$r0
568#else
569	or.d	  IO_STATE (R_GEN_CONFIG, dma9, serial1)	\
570		| IO_STATE (R_GEN_CONFIG, dma8, serial1),$r0
571#endif
572#endif
573#ifdef CONFIG_DMA_MEMCPY
574	; 6/7 memory-memory DMA
575	or.d	  IO_STATE (R_GEN_CONFIG, dma7, intdma6)	\
576		| IO_STATE (R_GEN_CONFIG, dma6, intdma7),$r0
577#endif
578#ifdef CONFIG_ETRAX_SERIAL_PORT2
579	; Enable serial port 2
580	or.w	IO_STATE (R_GEN_CONFIG, ser2, select),$r0
581#if !defined(CONFIG_ETRAX_KGDB) || !defined(CONFIG_ETRAX_DEBUG_PORT2)
582	; DMA channels 2 and 3 to ser2, kgdb doesnt want DMA
583#if (defined(CONFIG_ETRAX_AGDB))
584	; agdb only wants DMA out, no dma in
585	or.d	  IO_STATE (R_GEN_CONFIG, dma2, serial2),$r0
586#else
587	or.d	  IO_STATE (R_GEN_CONFIG, dma3, serial2)	\
588		| IO_STATE (R_GEN_CONFIG, dma2, serial2),$r0
589#endif
590#endif
591#endif
592#if defined(CONFIG_ETRAX_SERIAL_PORT3) || defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT1)
593	; Enable serial port 3
594	or.w	IO_STATE (R_GEN_CONFIG, ser3, select),$r0
595#if !defined(CONFIG_ETRAX_KGDB) || !defined(CONFIG_ETRAX_DEBUG_PORT3)
596	; DMA channels 4 and 5 to ser3, kgdb doesnt want DMA
597#if (defined(CONFIG_ETRAX_AGDB))
598	; agdb only wants DMA out, no dma in
599	or.d	  IO_STATE (R_GEN_CONFIG, dma4, serial3),$r0
600#else
601	or.d	  IO_STATE (R_GEN_CONFIG, dma5, serial3)	\
602		| IO_STATE (R_GEN_CONFIG, dma4, serial3),$r0
603#endif
604#endif
605#endif
606#if defined(CONFIG_ETRAX_PARALLEL_PORT0) || defined(CONFIG_ETRAX_ETHERNET_LPSLAVE)
607	; parport 0 enabled using DMA 2/3
608	or.w	IO_STATE (R_GEN_CONFIG, par0, select),$r0
609#endif
610#if defined(CONFIG_ETRAX_PARALLEL_PORT1) || defined(CONFIG_ETRAX_ETHERNET_LPSLAVE)
611	; parport 1 enabled using DMA 4/5
612	or.w	IO_STATE (R_GEN_CONFIG, par1, select),$r0
613#endif
614#ifdef CONFIG_ETRAX_IDE
615	; DMA channels 2 and 3 to ATA, ATA enabled
616	or.d	  IO_STATE (R_GEN_CONFIG, dma3, ata)	\
617		| IO_STATE (R_GEN_CONFIG, dma2, ata)	\
618		| IO_STATE (R_GEN_CONFIG, ata, select),$r0
619#endif
620
621#ifdef CONFIG_ETRAX_USB_HOST_PORT1
622	; Set the USB port 1 enable bit
623	or.d	IO_STATE (R_GEN_CONFIG, usb1, select),$r0
624#endif
625#ifdef CONFIG_ETRAX_USB_HOST_PORT2
626	; Set the USB port 2 enable bit
627	or.d	IO_STATE (R_GEN_CONFIG, usb2, select),$r0
628#endif
629#ifdef CONFIG_ETRAX_USB_HOST
630	; Connect DMA channels 8 and 9 to USB
631	and.d	(~(IO_MASK (R_GEN_CONFIG, dma9)		\
632		   | IO_MASK (R_GEN_CONFIG, dma8)))	\
633		| IO_STATE (R_GEN_CONFIG, dma9, usb)	\
634		| IO_STATE (R_GEN_CONFIG, dma8, usb),$r0
635#endif
636
637#ifdef CONFIG_JULIETTE
638	; DMA channels 4 and 5 to EXTDMA0, for Juliette
639	or.d	  IO_STATE (R_GEN_CONFIG, dma5, extdma0)	\
640		| IO_STATE (R_GEN_CONFIG, dma4, extdma0),$r0
641#endif
642
643#if defined(CONFIG_BLUETOOTH) && (defined(CONFIG_BLUETOOTH_RESET_G10) || defined(CONFIG_BLUETOOTH_RESET_G11))
644	or.d	  IO_STATE (R_GEN_CONFIG, g8_15dir, out),$r0
645#endif
646
647	move.d	$r0,[genconfig_shadow] ; init a shadow register of R_GEN_CONFIG
648
649#ifndef CONFIG_SVINTO_SIM
650	move.d	$r0,[R_GEN_CONFIG]
651
652#if 0
653	moveq	4,$r0
654	move.b	$r0,[R_DMA_CH6_CMD]	; reset (ser0 dma out)
655	move.b	$r0,[R_DMA_CH7_CMD]	; reset (ser0 dma in)
6561:	move.b	[R_DMA_CH6_CMD],$r0	; wait for reset cycle to finish
657	and.b	7,$r0
658	cmp.b	4,$r0
659	beq	1b
660	nop
6611:	move.b	[R_DMA_CH7_CMD],$r0	; wait for reset cycle to finish
662	and.b	7,$r0
663	cmp.b	4,$r0
664	beq	1b
665	nop
666#endif
667
668	moveq	IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0
669	move.b	$r0,[R_DMA_CH8_CMD]	; reset (ser1 dma out)
670	move.b	$r0,[R_DMA_CH9_CMD]	; reset (ser1 dma in)
6711:	move.b	[R_DMA_CH8_CMD],$r0	; wait for reset cycle to finish
672	andq	IO_MASK (R_DMA_CH8_CMD, cmd),$r0
673	cmpq	IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0
674	beq	1b
675	nop
6761:	move.b	[R_DMA_CH9_CMD],$r0	; wait for reset cycle to finish
677	andq	IO_MASK (R_DMA_CH9_CMD, cmd),$r0
678	cmpq	IO_STATE (R_DMA_CH9_CMD, cmd, reset),$r0
679	beq	1b
680	nop
681
682	;; setup port PA and PB default initial directions and data
683	;; including their shadow registers
684
685	move.b	CONFIG_ETRAX_DEF_R_PORT_PA_DIR,$r0
686#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PA7)
687	or.b	IO_STATE (R_PORT_PA_DIR, dir7, output),$r0
688#endif
689	move.b	$r0,[port_pa_dir_shadow]
690	move.b	$r0,[R_PORT_PA_DIR]
691	move.b	CONFIG_ETRAX_DEF_R_PORT_PA_DATA,$r0
692#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PA7)
693#if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH)
694	and.b	~(1 << 7),$r0
695#else
696	or.b	(1 << 7),$r0
697#endif
698#endif
699	move.b	$r0,[port_pa_data_shadow]
700	move.b	$r0,[R_PORT_PA_DATA]
701
702	move.b	CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG,$r0
703	move.b	$r0,[port_pb_config_shadow]
704	move.b	$r0,[R_PORT_PB_CONFIG]
705	move.b	CONFIG_ETRAX_DEF_R_PORT_PB_DIR,$r0
706#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PB5)
707	or.b	IO_STATE (R_PORT_PB_DIR, dir5, output),$r0
708#endif
709	move.b	$r0,[port_pb_dir_shadow]
710	move.b	$r0,[R_PORT_PB_DIR]
711	move.b	CONFIG_ETRAX_DEF_R_PORT_PB_DATA,$r0
712#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PB5)
713#if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH)
714	and.b	~(1 << 5),$r0
715#else
716	or.b	(1 << 5),$r0
717#endif
718#endif
719	move.b	$r0,[port_pb_data_shadow]
720	move.b	$r0,[R_PORT_PB_DATA]
721
722	moveq   0, $r0
723	move.d  $r0,[port_pb_i2c_shadow]
724	move.d  $r0, [R_PORT_PB_I2C]
725
726	moveq	0,$r0
727#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_G10)
728#if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH)
729	and.d	~(1 << 10),$r0
730#else
731	or.d	(1 << 10),$r0
732#endif
733#endif
734#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_G11)
735#if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH)
736	and.d	~(1 << 11),$r0
737#else
738	or.d	(1 << 11),$r0
739#endif
740#endif
741	move.d	$r0,[port_g_data_shadow]
742	move.d	$r0,[R_PORT_G_DATA]
743
744	;; setup the serial port 0 at 115200 baud for debug purposes
745
746	moveq	  IO_STATE (R_SERIAL0_XOFF, tx_stop, enable)		\
747		| IO_STATE (R_SERIAL0_XOFF, auto_xoff, disable)		\
748		| IO_FIELD (R_SERIAL0_XOFF, xoff_char, 0),$r0
749	move.d	$r0,[R_SERIAL0_XOFF]
750
751	; 115.2kbaud for both transmit and receive
752	move.b	  IO_STATE (R_SERIAL0_BAUD, tr_baud, c115k2Hz)		\
753		| IO_STATE (R_SERIAL0_BAUD, rec_baud, c115k2Hz),$r0
754	move.b	$r0,[R_SERIAL0_BAUD]
755
756	; Set up and enable the serial0 receiver.
757	move.b	  IO_STATE (R_SERIAL0_REC_CTRL, dma_err, stop)		\
758		| IO_STATE (R_SERIAL0_REC_CTRL, rec_enable, enable)	\
759		| IO_STATE (R_SERIAL0_REC_CTRL, rts_, active)		\
760		| IO_STATE (R_SERIAL0_REC_CTRL, sampling, middle)	\
761		| IO_STATE (R_SERIAL0_REC_CTRL, rec_stick_par, normal)	\
762		| IO_STATE (R_SERIAL0_REC_CTRL, rec_par, even)		\
763		| IO_STATE (R_SERIAL0_REC_CTRL, rec_par_en, disable)	\
764		| IO_STATE (R_SERIAL0_REC_CTRL, rec_bitnr, rec_8bit),$r0
765	move.b	$r0,[R_SERIAL0_REC_CTRL]
766
767	; Set up and enable the serial0 transmitter.
768	move.b	  IO_FIELD (R_SERIAL0_TR_CTRL, txd, 0)			\
769		| IO_STATE (R_SERIAL0_TR_CTRL, tr_enable, enable)	\
770		| IO_STATE (R_SERIAL0_TR_CTRL, auto_cts, disabled)	\
771		| IO_STATE (R_SERIAL0_TR_CTRL, stop_bits, one_bit)	\
772		| IO_STATE (R_SERIAL0_TR_CTRL, tr_stick_par, normal)	\
773		| IO_STATE (R_SERIAL0_TR_CTRL, tr_par, even)		\
774		| IO_STATE (R_SERIAL0_TR_CTRL, tr_par_en, disable)	\
775		| IO_STATE (R_SERIAL0_TR_CTRL, tr_bitnr, tr_8bit),$r0
776	move.b	$r0,[R_SERIAL0_TR_CTRL]
777
778	;; setup the serial port 1 at 115200 baud for debug purposes
779
780	moveq	  IO_STATE (R_SERIAL1_XOFF, tx_stop, enable)		\
781		| IO_STATE (R_SERIAL1_XOFF, auto_xoff, disable)		\
782		| IO_FIELD (R_SERIAL1_XOFF, xoff_char, 0),$r0
783	move.d	$r0,[R_SERIAL1_XOFF]
784
785	; 115.2kbaud for both transmit and receive
786	move.b	  IO_STATE (R_SERIAL1_BAUD, tr_baud, c115k2Hz)		\
787		| IO_STATE (R_SERIAL1_BAUD, rec_baud, c115k2Hz),$r0
788	move.b	$r0,[R_SERIAL1_BAUD]
789
790	; Set up and enable the serial1 receiver.
791	move.b	  IO_STATE (R_SERIAL1_REC_CTRL, dma_err, stop)		\
792		| IO_STATE (R_SERIAL1_REC_CTRL, rec_enable, enable)	\
793		| IO_STATE (R_SERIAL1_REC_CTRL, rts_, active)		\
794		| IO_STATE (R_SERIAL1_REC_CTRL, sampling, middle)	\
795		| IO_STATE (R_SERIAL1_REC_CTRL, rec_stick_par, normal)	\
796		| IO_STATE (R_SERIAL1_REC_CTRL, rec_par, even)		\
797		| IO_STATE (R_SERIAL1_REC_CTRL, rec_par_en, disable)	\
798		| IO_STATE (R_SERIAL1_REC_CTRL, rec_bitnr, rec_8bit),$r0
799	move.b	$r0,[R_SERIAL1_REC_CTRL]
800
801	; Set up and enable the serial1 transmitter.
802	move.b	  IO_FIELD (R_SERIAL1_TR_CTRL, txd, 0)			\
803		| IO_STATE (R_SERIAL1_TR_CTRL, tr_enable, enable)	\
804		| IO_STATE (R_SERIAL1_TR_CTRL, auto_cts, disabled)	\
805		| IO_STATE (R_SERIAL1_TR_CTRL, stop_bits, one_bit)	\
806		| IO_STATE (R_SERIAL1_TR_CTRL, tr_stick_par, normal)	\
807		| IO_STATE (R_SERIAL1_TR_CTRL, tr_par, even)		\
808		| IO_STATE (R_SERIAL1_TR_CTRL, tr_par_en, disable)	\
809		| IO_STATE (R_SERIAL1_TR_CTRL, tr_bitnr, tr_8bit),$r0
810	move.b	$r0,[R_SERIAL1_TR_CTRL]
811
812
813#ifdef CONFIG_ETRAX_SERIAL_PORT3
814	;; setup the serial port 3 at 115200 baud for debug purposes
815
816	moveq	  IO_STATE (R_SERIAL3_XOFF, tx_stop, enable)		\
817		| IO_STATE (R_SERIAL3_XOFF, auto_xoff, disable)		\
818		| IO_FIELD (R_SERIAL3_XOFF, xoff_char, 0),$r0
819	move.d	$r0,[R_SERIAL3_XOFF]
820
821	; 115.2kbaud for both transmit and receive
822	move.b	  IO_STATE (R_SERIAL3_BAUD, tr_baud, c115k2Hz)		\
823		| IO_STATE (R_SERIAL3_BAUD, rec_baud, c115k2Hz),$r0
824	move.b	$r0,[R_SERIAL3_BAUD]
825
826	; Set up and enable the serial3 receiver.
827	move.b	  IO_STATE (R_SERIAL3_REC_CTRL, dma_err, stop)		\
828		| IO_STATE (R_SERIAL3_REC_CTRL, rec_enable, enable)	\
829		| IO_STATE (R_SERIAL3_REC_CTRL, rts_, active)		\
830		| IO_STATE (R_SERIAL3_REC_CTRL, sampling, middle)	\
831		| IO_STATE (R_SERIAL3_REC_CTRL, rec_stick_par, normal)	\
832		| IO_STATE (R_SERIAL3_REC_CTRL, rec_par, even)		\
833		| IO_STATE (R_SERIAL3_REC_CTRL, rec_par_en, disable)	\
834		| IO_STATE (R_SERIAL3_REC_CTRL, rec_bitnr, rec_8bit),$r0
835	move.b	$r0,[R_SERIAL3_REC_CTRL]
836
837	; Set up and enable the serial3 transmitter.
838	move.b	  IO_FIELD (R_SERIAL3_TR_CTRL, txd, 0)			\
839		| IO_STATE (R_SERIAL3_TR_CTRL, tr_enable, enable)	\
840		| IO_STATE (R_SERIAL3_TR_CTRL, auto_cts, disabled)	\
841		| IO_STATE (R_SERIAL3_TR_CTRL, stop_bits, one_bit)	\
842		| IO_STATE (R_SERIAL3_TR_CTRL, tr_stick_par, normal)	\
843		| IO_STATE (R_SERIAL3_TR_CTRL, tr_par, even)		\
844		| IO_STATE (R_SERIAL3_TR_CTRL, tr_par_en, disable)	\
845		| IO_STATE (R_SERIAL3_TR_CTRL, tr_bitnr, tr_8bit),$r0
846	move.b	$r0,[R_SERIAL3_TR_CTRL]
847#endif
848
849#endif /* CONFIG_SVINTO_SIM */
850
851	jump	start_kernel	; jump into the C-function start_kernel in init/main.c
852
853	.data
854etrax_irv:
855	.dword	0
856romfs_start:
857	.dword	0
858romfs_length:
859	.dword	0
860romfs_in_flash:
861	.dword	0
862
863	;; put some special pages at the beginning of the kernel aligned
864	;; to page boundaries - the kernel cannot start until after this
865
866#ifdef CONFIG_CRIS_LOW_MAP
867swapper_pg_dir = 0x60002000
868#else
869swapper_pg_dir = 0xc0002000
870#endif
871
872	.section ".data.init", "aw"
873#include "../lib/hw_settings.S"
874