1 /*
2 * linux/drivers/video/riva/fbdev.c
3 *
4 * nVidia RIVA 128/TNT/TNT2/GeForce2/3 fb driver
5 *
6 * Maintained by Ani Joshi <ajoshi@kernel.crashing.org>
7 *
8 * Copyright 1999-2000 Jeff Garzik
9 * Copyright 2000-2003 Ani Joshi
10 *
11 * Contributors:
12 *
13 * Ani Joshi: Lots of debugging and cleanup work, really helped
14 * get the driver going
15 *
16 * Ferenc Bakonyi: Bug fixes, cleanup, modularization
17 *
18 * Jindrich Makovicka: Accel code help, hw cursor, mtrr
19 *
20 * Initial template from skeletonfb.c, created 28 Dec 1997 by Geert Uytterhoeven
21 * Includes riva_hw.c from nVidia, see copyright below.
22 * KGI code provided the basis for state storage, init, and mode switching.
23 *
24 * This file is subject to the terms and conditions of the GNU General Public
25 * License. See the file COPYING in the main directory of this archive
26 * for more details.
27 *
28 * Known bugs and issues:
29 * restoring text mode fails
30 * doublescan modes are broken
31 * option 'noaccel' has no effect
32 */
33
34 #include <linux/config.h>
35 #include <linux/module.h>
36 #include <linux/kernel.h>
37 #include <linux/errno.h>
38 #include <linux/string.h>
39 #include <linux/mm.h>
40 #include <linux/selection.h>
41 #include <linux/tty.h>
42 #include <linux/slab.h>
43 #include <linux/delay.h>
44 #include <linux/fb.h>
45 #include <linux/init.h>
46 #include <linux/pci.h>
47 #include <linux/console.h>
48 #ifdef CONFIG_MTRR
49 #include <asm/mtrr.h>
50 #endif
51 #include "rivafb.h"
52 #include "nvreg.h"
53
54 #ifndef CONFIG_PCI /* sanity check */
55 #error This driver requires PCI support.
56 #endif
57
58
59
60 /* version number of this driver */
61 #define RIVAFB_VERSION "0.9.4"
62
63
64
65 /* ------------------------------------------------------------------------- *
66 *
67 * various helpful macros and constants
68 *
69 * ------------------------------------------------------------------------- */
70
71 #undef RIVAFBDEBUG
72 #ifdef RIVAFBDEBUG
73 #define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args)
74 #else
75 #define DPRINTK(fmt, args...)
76 #endif
77
78 #ifndef RIVA_NDEBUG
79 #define assert(expr) \
80 if(!(expr)) { \
81 printk( "Assertion failed! %s,%s,%s,line=%d\n",\
82 #expr,__FILE__,__FUNCTION__,__LINE__); \
83 BUG(); \
84 }
85 #else
86 #define assert(expr)
87 #endif
88
89 #define PFX "rivafb: "
90
91 /* macro that allows you to set overflow bits */
92 #define SetBitField(value,from,to) SetBF(to,GetBF(value,from))
93 #define SetBit(n) (1<<(n))
94 #define Set8Bits(value) ((value)&0xff)
95
96 /* HW cursor parameters */
97 #define DEFAULT_CURSOR_BLINK_RATE (40)
98 #define CURSOR_HIDE_DELAY (20)
99 #define CURSOR_SHOW_DELAY (3)
100
101 #ifdef __BIG_ENDIAN
102 #define CURSOR_COLOR 0xff7f
103 #else
104 #define CURSOR_COLOR 0x7fff
105 #endif
106 #define TRANSPARENT_COLOR 0x0000
107 #define MAX_CURS 32
108
109
110
111 /* ------------------------------------------------------------------------- *
112 *
113 * prototypes
114 *
115 * ------------------------------------------------------------------------- */
116
117 static void rivafb_blank(int blank, struct fb_info *info);
118
119 extern void riva_setup_accel(struct rivafb_info *rinfo);
120 extern void wait_for_idle(struct rivafb_info *rinfo);
121
122
123
124 /* ------------------------------------------------------------------------- *
125 *
126 * card identification
127 *
128 * ------------------------------------------------------------------------- */
129
130 enum riva_chips {
131 CH_RIVA_128 = 0,
132 CH_RIVA_TNT,
133 CH_RIVA_TNT2,
134 CH_RIVA_UTNT2, /* UTNT2 */
135 CH_RIVA_VTNT2, /* VTNT2 */
136 CH_RIVA_UVTNT2, /* VTNT2 */
137 CH_RIVA_ITNT2, /* ITNT2 */
138 CH_GEFORCE_SDR,
139 CH_GEFORCE_DDR,
140 CH_QUADRO,
141 CH_GEFORCE2_MX,
142 CH_QUADRO2_MXR,
143 CH_GEFORCE2_GTS,
144 CH_GEFORCE2_ULTRA,
145 CH_QUADRO2_PRO,
146 CH_GEFORCE2_GO,
147 CH_GEFORCE3,
148 CH_GEFORCE3_1,
149 CH_GEFORCE3_2,
150 CH_QUADRO_DDC
151 };
152
153 /* directly indexed by riva_chips enum, above */
154 static struct riva_chip_info {
155 const char *name;
156 unsigned arch_rev;
157 } riva_chip_info[] __devinitdata = {
158 { "RIVA-128", NV_ARCH_03 },
159 { "RIVA-TNT", NV_ARCH_04 },
160 { "RIVA-TNT2", NV_ARCH_04 },
161 { "RIVA-UTNT2", NV_ARCH_04 },
162 { "RIVA-VTNT2", NV_ARCH_04 },
163 { "RIVA-UVTNT2", NV_ARCH_04 },
164 { "RIVA-ITNT2", NV_ARCH_04 },
165 { "GeForce-SDR", NV_ARCH_10},
166 { "GeForce-DDR", NV_ARCH_10},
167 { "Quadro", NV_ARCH_10},
168 { "GeForce2-MX", NV_ARCH_10},
169 { "Quadro2-MXR", NV_ARCH_10},
170 { "GeForce2-GTS", NV_ARCH_10},
171 { "GeForce2-ULTRA", NV_ARCH_10},
172 { "Quadro2-PRO", NV_ARCH_10},
173 { "GeForce2-Go", NV_ARCH_10},
174 { "GeForce3", NV_ARCH_20},
175 { "GeForce3 Ti 200", NV_ARCH_20},
176 { "GeForce3 Ti 500", NV_ARCH_20},
177 { "Quadro DDC", NV_ARCH_20}
178 };
179
180 static struct pci_device_id rivafb_pci_tbl[] __devinitdata = {
181 { PCI_VENDOR_ID_NVIDIA_SGS, PCI_DEVICE_ID_NVIDIA_SGS_RIVA128,
182 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_RIVA_128 },
183 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_TNT,
184 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_RIVA_TNT },
185 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_TNT2,
186 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_RIVA_TNT2 },
187 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_UTNT2,
188 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_RIVA_UTNT2 },
189 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_VTNT2,
190 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_RIVA_VTNT2 },
191 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_UVTNT2,
192 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_RIVA_VTNT2 },
193 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_ITNT2,
194 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_RIVA_ITNT2 },
195 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_GEFORCE_SDR,
196 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_GEFORCE_SDR },
197 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_GEFORCE_DDR,
198 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_GEFORCE_DDR },
199 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_QUADRO,
200 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_QUADRO },
201 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_GEFORCE2_MX,
202 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_GEFORCE2_MX },
203 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_GEFORCE2_MX2,
204 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_GEFORCE2_MX },
205 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_QUADRO2_MXR,
206 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_QUADRO2_MXR },
207 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_GEFORCE2_GTS,
208 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_GEFORCE2_GTS },
209 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_GEFORCE2_GTS2,
210 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_GEFORCE2_GTS },
211 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_GEFORCE2_ULTRA,
212 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_GEFORCE2_ULTRA },
213 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_QUADRO2_PRO,
214 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_QUADRO2_PRO },
215 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_GEFORCE2_GO,
216 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_GEFORCE2_GO },
217 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_GEFORCE3,
218 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_GEFORCE3 },
219 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_GEFORCE3_1,
220 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_GEFORCE3_1 },
221 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_GEFORCE3_2,
222 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_GEFORCE3_2 },
223 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_QUADRO_DDC,
224 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_QUADRO_DDC },
225 { 0, } /* terminate list */
226 };
227 MODULE_DEVICE_TABLE(pci, rivafb_pci_tbl);
228
229
230
231 /* ------------------------------------------------------------------------- *
232 *
233 * framebuffer related structures
234 *
235 * ------------------------------------------------------------------------- */
236
237 #ifdef FBCON_HAS_CFB8
238 extern struct display_switch fbcon_riva8;
239 #endif
240 #ifdef FBCON_HAS_CFB16
241 extern struct display_switch fbcon_riva16;
242 #endif
243 #ifdef FBCON_HAS_CFB32
244 extern struct display_switch fbcon_riva32;
245 #endif
246
247 #if 0
248 /* describes the state of a Riva board */
249 struct rivafb_par {
250 struct riva_regs state; /* state of hw board */
251 __u32 visual; /* FB_VISUAL_xxx */
252 unsigned depth; /* bpp of current mode */
253 };
254 #endif
255
256 struct riva_cursor {
257 int enable;
258 int on;
259 int vbl_cnt;
260 int last_move_delay;
261 int blink_rate;
262 struct {
263 u16 x, y;
264 } pos, size;
265 unsigned short image[MAX_CURS*MAX_CURS];
266 struct timer_list *timer;
267 };
268
269
270
271 /* ------------------------------------------------------------------------- *
272 *
273 * global variables
274 *
275 * ------------------------------------------------------------------------- */
276
277 struct rivafb_info *riva_boards = NULL;
278
279 /* command line data, set in rivafb_setup() */
280 static char fontname[40] __initdata = { 0 };
281 static char noaccel __initdata = 0;
282 static char nomove = 0;
283 static char nohwcursor __initdata = 0;
284 static char noblink = 0;
285 #ifdef CONFIG_MTRR
286 static char nomtrr __initdata = 0;
287 #endif
288
289 #ifndef MODULE
290 static char *mode_option __initdata = NULL;
291 #else
292 static char *font = NULL;
293 #endif
294
295 static struct fb_var_screeninfo rivafb_default_var = {
296 xres: 640,
297 yres: 480,
298 xres_virtual: 640,
299 yres_virtual: 480,
300 xoffset: 0,
301 yoffset: 0,
302 bits_per_pixel: 8,
303 grayscale: 0,
304 red: {0, 6, 0},
305 green: {0, 6, 0},
306 blue: {0, 6, 0},
307 transp: {0, 0, 0},
308 nonstd: 0,
309 activate: 0,
310 height: -1,
311 width: -1,
312 accel_flags: 0,
313 pixclock: 39721,
314 left_margin: 40,
315 right_margin: 24,
316 upper_margin: 32,
317 lower_margin: 11,
318 hsync_len: 96,
319 vsync_len: 2,
320 sync: 0,
321 vmode: FB_VMODE_NONINTERLACED
322 };
323
324 /* from GGI */
325 static const struct riva_regs reg_template = {
326 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, /* ATTR */
327 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
328 0x41, 0x01, 0x0F, 0x00, 0x00},
329 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* CRT */
330 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
331 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE3, /* 0x10 */
332 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
333 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0x20 */
334 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
335 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0x30 */
336 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
337 0x00, /* 0x40 */
338 },
339 {0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, /* GRA */
340 0xFF},
341 {0x03, 0x01, 0x0F, 0x00, 0x0E}, /* SEQ */
342 0xEB /* MISC */
343 };
344
345
346
347 /* ------------------------------------------------------------------------- *
348 *
349 * MMIO access macros
350 *
351 * ------------------------------------------------------------------------- */
352
CRTCout(struct rivafb_info * rinfo,unsigned char index,unsigned char val)353 static inline void CRTCout(struct rivafb_info *rinfo, unsigned char index,
354 unsigned char val)
355 {
356 VGA_WR08(rinfo->riva.PCIO, 0x3d4, index);
357 VGA_WR08(rinfo->riva.PCIO, 0x3d5, val);
358 }
359
CRTCin(struct rivafb_info * rinfo,unsigned char index)360 static inline unsigned char CRTCin(struct rivafb_info *rinfo,
361 unsigned char index)
362 {
363 VGA_WR08(rinfo->riva.PCIO, 0x3d4, index);
364 return (VGA_RD08(rinfo->riva.PCIO, 0x3d5));
365 }
366
GRAout(struct rivafb_info * rinfo,unsigned char index,unsigned char val)367 static inline void GRAout(struct rivafb_info *rinfo, unsigned char index,
368 unsigned char val)
369 {
370 VGA_WR08(rinfo->riva.PVIO, 0x3ce, index);
371 VGA_WR08(rinfo->riva.PVIO, 0x3cf, val);
372 }
373
GRAin(struct rivafb_info * rinfo,unsigned char index)374 static inline unsigned char GRAin(struct rivafb_info *rinfo,
375 unsigned char index)
376 {
377 VGA_WR08(rinfo->riva.PVIO, 0x3ce, index);
378 return (VGA_RD08(rinfo->riva.PVIO, 0x3cf));
379 }
380
SEQout(struct rivafb_info * rinfo,unsigned char index,unsigned char val)381 static inline void SEQout(struct rivafb_info *rinfo, unsigned char index,
382 unsigned char val)
383 {
384 VGA_WR08(rinfo->riva.PVIO, 0x3c4, index);
385 VGA_WR08(rinfo->riva.PVIO, 0x3c5, val);
386 }
387
SEQin(struct rivafb_info * rinfo,unsigned char index)388 static inline unsigned char SEQin(struct rivafb_info *rinfo,
389 unsigned char index)
390 {
391 VGA_WR08(rinfo->riva.PVIO, 0x3c4, index);
392 return (VGA_RD08(rinfo->riva.PVIO, 0x3c5));
393 }
394
ATTRout(struct rivafb_info * rinfo,unsigned char index,unsigned char val)395 static inline void ATTRout(struct rivafb_info *rinfo, unsigned char index,
396 unsigned char val)
397 {
398 VGA_WR08(rinfo->riva.PCIO, 0x3c0, index);
399 VGA_WR08(rinfo->riva.PCIO, 0x3c0, val);
400 }
401
ATTRin(struct rivafb_info * rinfo,unsigned char index)402 static inline unsigned char ATTRin(struct rivafb_info *rinfo,
403 unsigned char index)
404 {
405 VGA_WR08(rinfo->riva.PCIO, 0x3c0, index);
406 return (VGA_RD08(rinfo->riva.PCIO, 0x3c1));
407 }
408
MISCout(struct rivafb_info * rinfo,unsigned char val)409 static inline void MISCout(struct rivafb_info *rinfo, unsigned char val)
410 {
411 VGA_WR08(rinfo->riva.PVIO, 0x3c2, val);
412 }
413
MISCin(struct rivafb_info * rinfo)414 static inline unsigned char MISCin(struct rivafb_info *rinfo)
415 {
416 return (VGA_RD08(rinfo->riva.PVIO, 0x3cc));
417 }
418
419
420
421 /* ------------------------------------------------------------------------- *
422 *
423 * cursor stuff
424 *
425 * ------------------------------------------------------------------------- */
426
427 /**
428 * riva_cursor_timer_handler - blink timer
429 * @dev_addr: pointer to rivafb_info object containing info for current riva board
430 *
431 * DESCRIPTION:
432 * Cursor blink timer.
433 */
riva_cursor_timer_handler(unsigned long dev_addr)434 static void riva_cursor_timer_handler(unsigned long dev_addr)
435 {
436 struct rivafb_info *rinfo = (struct rivafb_info *)dev_addr;
437
438 if (!rinfo->cursor) return;
439
440 if (!rinfo->cursor->enable) goto out;
441
442 if (rinfo->cursor->last_move_delay < 1000)
443 rinfo->cursor->last_move_delay++;
444
445 if (rinfo->cursor->vbl_cnt && --rinfo->cursor->vbl_cnt == 0) {
446 rinfo->cursor->on ^= 1;
447 if (rinfo->cursor->on)
448 *(rinfo->riva.CURSORPOS) = (rinfo->cursor->pos.x & 0xFFFF)
449 | (rinfo->cursor->pos.y << 16);
450 rinfo->riva.ShowHideCursor(&rinfo->riva, rinfo->cursor->on);
451 if (!noblink)
452 rinfo->cursor->vbl_cnt = rinfo->cursor->blink_rate;
453 }
454 out:
455 rinfo->cursor->timer->expires = jiffies + (HZ / 100);
456 add_timer(rinfo->cursor->timer);
457 }
458
459 /**
460 * rivafb_init_cursor - allocates cursor structure and starts blink timer
461 * @rinfo: pointer to rivafb_info object containing info for current riva board
462 *
463 * DESCRIPTION:
464 * Allocates cursor structure and starts blink timer.
465 *
466 * RETURNS:
467 * Pointer to allocated cursor structure.
468 *
469 * CALLED FROM:
470 * rivafb_init_one()
471 */
rivafb_init_cursor(struct rivafb_info * rinfo)472 static struct riva_cursor * __init rivafb_init_cursor(struct rivafb_info *rinfo)
473 {
474 struct riva_cursor *cursor;
475
476 cursor = kmalloc(sizeof(struct riva_cursor), GFP_KERNEL);
477 if (!cursor) return 0;
478 memset(cursor, 0, sizeof(*cursor));
479
480 cursor->timer = kmalloc(sizeof(*cursor->timer), GFP_KERNEL);
481 if (!cursor->timer) {
482 kfree(cursor);
483 return 0;
484 }
485 memset(cursor->timer, 0, sizeof(*cursor->timer));
486
487 cursor->blink_rate = DEFAULT_CURSOR_BLINK_RATE;
488
489 init_timer(cursor->timer);
490 cursor->timer->expires = jiffies + (HZ / 100);
491 cursor->timer->data = (unsigned long)rinfo;
492 cursor->timer->function = riva_cursor_timer_handler;
493 add_timer(cursor->timer);
494
495 return cursor;
496 }
497
498 /**
499 * rivafb_exit_cursor - stops blink timer and releases cursor structure
500 * @rinfo: pointer to rivafb_info object containing info for current riva board
501 *
502 * DESCRIPTION:
503 * Stops blink timer and releases cursor structure.
504 *
505 * CALLED FROM:
506 * rivafb_init_one()
507 * rivafb_remove_one()
508 */
rivafb_exit_cursor(struct rivafb_info * rinfo)509 static void rivafb_exit_cursor(struct rivafb_info *rinfo)
510 {
511 struct riva_cursor *cursor = rinfo->cursor;
512
513 if (cursor) {
514 if (cursor->timer) {
515 del_timer_sync(cursor->timer);
516 kfree(cursor->timer);
517 }
518 kfree(cursor);
519 rinfo->cursor = 0;
520 }
521 }
522
523 /**
524 * rivafb_download_cursor - writes cursor shape into card registers
525 * @rinfo: pointer to rivafb_info object containing info for current riva board
526 *
527 * DESCRIPTION:
528 * Writes cursor shape into card registers.
529 *
530 * CALLED FROM:
531 * riva_load_video_mode()
532 */
rivafb_download_cursor(struct rivafb_info * rinfo)533 static void rivafb_download_cursor(struct rivafb_info *rinfo)
534 {
535 int i, save;
536 int *image;
537
538 if (!rinfo->cursor) return;
539
540 image = (int *)rinfo->cursor->image;
541 save = rinfo->riva.ShowHideCursor(&rinfo->riva, 0);
542 for (i = 0; i < (MAX_CURS*MAX_CURS*2)/sizeof(int); i++)
543 writel(image[i], rinfo->riva.CURSOR + i);
544
545 rinfo->riva.ShowHideCursor(&rinfo->riva, save);
546 }
547
548 /**
549 * rivafb_create_cursor - sets rectangular cursor
550 * @rinfo: pointer to rivafb_info object containing info for current riva board
551 * @width: cursor width in pixels
552 * @height: cursor height in pixels
553 *
554 * DESCRIPTION:
555 * Sets rectangular cursor.
556 *
557 * CALLED FROM:
558 * rivafb_set_font()
559 * rivafb_set_var()
560 */
rivafb_create_cursor(struct rivafb_info * rinfo,int width,int height)561 static void rivafb_create_cursor(struct rivafb_info *rinfo, int width, int height)
562 {
563 struct riva_cursor *c = rinfo->cursor;
564 int i, j, idx;
565
566 if (c) {
567 if (width <= 0 || height <= 0) {
568 width = 8;
569 height = 16;
570 }
571 if (width > MAX_CURS) width = MAX_CURS;
572 if (height > MAX_CURS) height = MAX_CURS;
573
574 c->size.x = width;
575 c->size.y = height;
576
577 idx = 0;
578
579 for (i = 0; i < height; i++) {
580 for (j = 0; j < width; j++,idx++)
581 c->image[idx] = CURSOR_COLOR;
582 for (j = width; j < MAX_CURS; j++,idx++)
583 c->image[idx] = TRANSPARENT_COLOR;
584 }
585 for (i = height; i < MAX_CURS; i++)
586 for (j = 0; j < MAX_CURS; j++,idx++)
587 c->image[idx] = TRANSPARENT_COLOR;
588 }
589 }
590
591 /**
592 * rivafb_set_font - change font size
593 * @p: pointer to display object
594 * @width: font width in pixels
595 * @height: font height in pixels
596 *
597 * DESCRIPTION:
598 * Callback function called if font settings changed.
599 *
600 * RETURNS:
601 * 1 (Always succeeds.)
602 */
rivafb_set_font(struct display * p,int width,int height)603 static int rivafb_set_font(struct display *p, int width, int height)
604 {
605 struct rivafb_info *fb = (struct rivafb_info *)(p->fb_info);
606
607 rivafb_create_cursor(fb, width, height);
608 return 1;
609 }
610
611 /**
612 * rivafb_cursor - cursor handler
613 * @p: pointer to display object
614 * @mode: cursor mode (see CM_*)
615 * @x: cursor x coordinate in characters
616 * @y: cursor y coordinate in characters
617 *
618 * DESCRIPTION:
619 * Cursor handler.
620 */
rivafb_cursor(struct display * p,int mode,int x,int y)621 static void rivafb_cursor(struct display *p, int mode, int x, int y)
622 {
623 struct rivafb_info *rinfo = (struct rivafb_info *)(p->fb_info);
624 struct riva_cursor *c = rinfo->cursor;
625
626 if (!c) return;
627
628 x = x * fontwidth(p) - p->var.xoffset;
629 y = y * fontheight(p) - p->var.yoffset;
630
631 if (c->pos.x == x && c->pos.y == y && (mode == CM_ERASE) == !c->enable)
632 return;
633
634 c->enable = 0;
635 if (c->on) rinfo->riva.ShowHideCursor(&rinfo->riva, 0);
636
637 c->pos.x = x;
638 c->pos.y = y;
639
640 switch (mode) {
641 case CM_ERASE:
642 c->on = 0;
643 break;
644 case CM_DRAW:
645 case CM_MOVE:
646 if (c->last_move_delay <= 1) { /* rapid cursor movement */
647 c->vbl_cnt = CURSOR_SHOW_DELAY;
648 } else {
649 *(rinfo->riva.CURSORPOS) = (x & 0xFFFF) | (y << 16);
650 rinfo->riva.ShowHideCursor(&rinfo->riva, 1);
651 if (!noblink) c->vbl_cnt = CURSOR_HIDE_DELAY;
652 c->on = 1;
653 }
654 c->last_move_delay = 0;
655 c->enable = 1;
656 break;
657 }
658 }
659
660
661
662 /* ------------------------------------------------------------------------- *
663 *
664 * general utility functions
665 *
666 * ------------------------------------------------------------------------- */
667
668 /**
669 * riva_set_dispsw - sets dispsw
670 * @rinfo: pointer to internal driver struct for a given Riva card
671 * @disp: pointer to display object
672 *
673 * DESCRIPTION:
674 * Sets up console low level operations depending on the current? color depth
675 * of the display.
676 *
677 * CALLED FROM:
678 * rivafb_set_var()
679 * rivafb_switch()
680 * riva_init_disp()
681 */
riva_set_dispsw(struct rivafb_info * rinfo,struct display * disp)682 static void riva_set_dispsw(struct rivafb_info *rinfo, struct display *disp)
683 {
684 int accel = disp->var.accel_flags & FB_ACCELF_TEXT;
685
686 DPRINTK("ENTER\n");
687
688 assert(rinfo != NULL);
689
690 disp->dispsw_data = NULL;
691
692 disp->screen_base = rinfo->fb_base;
693 disp->type = FB_TYPE_PACKED_PIXELS;
694 disp->type_aux = 0;
695 disp->ypanstep = 1;
696 disp->ywrapstep = 0;
697 disp->can_soft_blank = 1;
698 disp->inverse = 0;
699
700 switch (disp->var.bits_per_pixel) {
701 #ifdef FBCON_HAS_CFB8
702 case 8:
703 rinfo->dispsw = accel ? fbcon_riva8 : fbcon_cfb8;
704 disp->dispsw = &rinfo->dispsw;
705 disp->line_length = disp->var.xres_virtual;
706 disp->visual = FB_VISUAL_PSEUDOCOLOR;
707 break;
708 #endif
709 #ifdef FBCON_HAS_CFB16
710 case 16:
711 rinfo->dispsw = accel ? fbcon_riva16 : fbcon_cfb16;
712 disp->dispsw_data = &rinfo->con_cmap.cfb16;
713 disp->dispsw = &rinfo->dispsw;
714 disp->line_length = disp->var.xres_virtual * 2;
715 disp->visual = FB_VISUAL_DIRECTCOLOR;
716 break;
717 #endif
718 #ifdef FBCON_HAS_CFB32
719 case 32:
720 rinfo->dispsw = accel ? fbcon_riva32 : fbcon_cfb32;
721 disp->dispsw_data = rinfo->con_cmap.cfb32;
722 disp->dispsw = &rinfo->dispsw;
723 disp->line_length = disp->var.xres_virtual * 4;
724 disp->visual = FB_VISUAL_DIRECTCOLOR;
725 break;
726 #endif
727 default:
728 DPRINTK("Setting fbcon_dummy renderer\n");
729 rinfo->dispsw = fbcon_dummy;
730 disp->dispsw = &rinfo->dispsw;
731 }
732
733 /* FIXME: verify that the above code sets dsp->* fields correctly */
734
735 if (rinfo->cursor) {
736 rinfo->dispsw.cursor = rivafb_cursor;
737 rinfo->dispsw.set_font = rivafb_set_font;
738 }
739
740 DPRINTK("EXIT\n");
741 }
742
743 /**
744 * riva_wclut - set CLUT entry
745 * @chip: pointer to RIVA_HW_INST object
746 * @regnum: register number
747 * @red: red component
748 * @green: green component
749 * @blue: blue component
750 *
751 * DESCRIPTION:
752 * Sets color register @regnum.
753 *
754 * CALLED FROM:
755 * riva_setcolreg()
756 */
riva_wclut(RIVA_HW_INST * chip,unsigned char regnum,unsigned char red,unsigned char green,unsigned char blue)757 static void riva_wclut(RIVA_HW_INST *chip,
758 unsigned char regnum, unsigned char red,
759 unsigned char green, unsigned char blue)
760 {
761 VGA_WR08(chip->PDIO, 0x3c8, regnum);
762 VGA_WR08(chip->PDIO, 0x3c9, red);
763 VGA_WR08(chip->PDIO, 0x3c9, green);
764 VGA_WR08(chip->PDIO, 0x3c9, blue);
765 }
766
767 /**
768 * riva_save_state - saves current chip state
769 * @rinfo: pointer to rivafb_info object containing info for current riva board
770 * @regs: pointer to riva_regs object
771 *
772 * DESCRIPTION:
773 * Saves current chip state to @regs.
774 *
775 * CALLED FROM:
776 * rivafb_init_one()
777 */
778 /* from GGI */
riva_save_state(struct rivafb_info * rinfo,struct riva_regs * regs)779 static void riva_save_state(struct rivafb_info *rinfo, struct riva_regs *regs)
780 {
781 int i;
782
783 rinfo->riva.LockUnlock(&rinfo->riva, 0);
784
785 rinfo->riva.UnloadStateExt(&rinfo->riva, ®s->ext);
786
787 regs->misc_output = MISCin(rinfo);
788
789 for (i = 0; i < NUM_CRT_REGS; i++) {
790 regs->crtc[i] = CRTCin(rinfo, i);
791 }
792
793 for (i = 0; i < NUM_ATC_REGS; i++) {
794 regs->attr[i] = ATTRin(rinfo, i);
795 }
796
797 for (i = 0; i < NUM_GRC_REGS; i++) {
798 regs->gra[i] = GRAin(rinfo, i);
799 }
800
801 for (i = 0; i < NUM_SEQ_REGS; i++) {
802 regs->seq[i] = SEQin(rinfo, i);
803 }
804 }
805
806 /**
807 * riva_load_state - loads current chip state
808 * @rinfo: pointer to rivafb_info object containing info for current riva board
809 * @regs: pointer to riva_regs object
810 *
811 * DESCRIPTION:
812 * Loads chip state from @regs.
813 *
814 * CALLED FROM:
815 * riva_load_video_mode()
816 * rivafb_init_one()
817 * rivafb_remove_one()
818 */
819 /* from GGI */
riva_load_state(struct rivafb_info * rinfo,struct riva_regs * regs)820 static void riva_load_state(struct rivafb_info *rinfo, struct riva_regs *regs)
821 {
822 int i;
823 RIVA_HW_STATE *state = ®s->ext;
824
825 CRTCout(rinfo, 0x11, 0x00);
826
827 rinfo->riva.LockUnlock(&rinfo->riva, 0);
828
829 rinfo->riva.LoadStateExt(&rinfo->riva, state);
830
831 MISCout(rinfo, regs->misc_output);
832
833 for (i = 0; i < NUM_CRT_REGS; i++) {
834 switch (i) {
835 case 0x19:
836 case 0x20 ... 0x40:
837 break;
838 default:
839 CRTCout(rinfo, i, regs->crtc[i]);
840 }
841 }
842
843 for (i = 0; i < NUM_ATC_REGS; i++) {
844 ATTRout(rinfo, i, regs->attr[i]);
845 }
846
847 for (i = 0; i < NUM_GRC_REGS; i++) {
848 GRAout(rinfo, i, regs->gra[i]);
849 }
850
851 for (i = 0; i < NUM_SEQ_REGS; i++) {
852 SEQout(rinfo, i, regs->seq[i]);
853 }
854 }
855
856 /**
857 * riva_load_video_mode - calculate timings
858 * @rinfo: pointer to rivafb_info object containing info for current riva board
859 * @video_mode: video mode to set
860 *
861 * DESCRIPTION:
862 * Calculate some timings and then send em off to riva_load_state().
863 *
864 * CALLED FROM:
865 * rivafb_set_var()
866 */
riva_load_video_mode(struct rivafb_info * rinfo,struct fb_var_screeninfo * video_mode)867 static void riva_load_video_mode(struct rivafb_info *rinfo,
868 struct fb_var_screeninfo *video_mode)
869 {
870 struct riva_regs newmode;
871 int bpp, width, hDisplaySize, hDisplay, hStart,
872 hEnd, hTotal, height, vDisplay, vStart, vEnd, vTotal, dotClock;
873 int hBlankStart, hBlankEnd, vBlankStart, vBlankEnd;
874
875 /* time to calculate */
876
877 rivafb_blank(1, (struct fb_info *)rinfo);
878
879 bpp = video_mode->bits_per_pixel;
880 if (bpp == 16 && video_mode->green.length == 5)
881 bpp = 15;
882 width = video_mode->xres_virtual;
883 hDisplaySize = video_mode->xres;
884 hDisplay = (hDisplaySize / 8) - 1;
885 hStart = (hDisplaySize + video_mode->right_margin) / 8 + 2;
886 hEnd = (hDisplaySize + video_mode->right_margin +
887 video_mode->hsync_len) / 8 - 1;
888 hTotal = (hDisplaySize + video_mode->right_margin +
889 video_mode->hsync_len + video_mode->left_margin) / 8 - 1;
890 hBlankStart = hDisplay;
891 hBlankEnd = hTotal;
892 height = video_mode->yres_virtual;
893 vDisplay = video_mode->yres - 1;
894 vStart = video_mode->yres + video_mode->lower_margin - 1;
895 vEnd = video_mode->yres + video_mode->lower_margin +
896 video_mode->vsync_len - 1;
897 vTotal = video_mode->yres + video_mode->lower_margin +
898 video_mode->vsync_len + video_mode->upper_margin + 2;
899 vBlankStart = vDisplay;
900 vBlankEnd = vTotal;
901 dotClock = 1000000000 / video_mode->pixclock;
902
903 memcpy(&newmode, ®_template, sizeof(struct riva_regs));
904
905 newmode.ext.screen = SetBitField(hBlankEnd,6:6,4:4)
906 | SetBitField(vBlankStart,10:10,3:3)
907 | SetBitField(vStart,10:10,2:2)
908 | SetBitField(vDisplay,10:10,1:1)
909 | SetBitField(vTotal,10:10,0:0);
910
911 newmode.ext.horiz = SetBitField(hTotal,8:8,0:0)
912 | SetBitField(hDisplay,8:8,1:1)
913 | SetBitField(hBlankStart,8:8,2:2)
914 | SetBitField(hStart,8:8,3:3);
915
916 newmode.ext.extra = SetBitField(vTotal,11:11,0:0)
917 | SetBitField(vDisplay,11:11,2:2)
918 | SetBitField(vStart,11:11,4:4)
919 | SetBitField(vBlankStart,11:11,6:6);
920
921 if (rinfo->riva.flatPanel) {
922 vStart = vTotal - 3;
923 vEnd = vTotal - 2;
924 vBlankStart = vStart;
925 hStart = hTotal - 3;
926 hEnd = hTotal - 2;
927 hBlankEnd = hTotal + 4;
928 }
929
930 newmode.crtc[0x0] = Set8Bits (hTotal - 4);
931 newmode.crtc[0x1] = Set8Bits (hDisplay);
932 newmode.crtc[0x2] = Set8Bits (hBlankStart);
933 newmode.crtc[0x3] = SetBitField(hBlankEnd,4:0,4:0)
934 | SetBit(7);
935 newmode.crtc[0x4] = Set8Bits (hStart);
936 newmode.crtc[0x5] = SetBitField (hBlankEnd, 5: 5, 7:7)
937 | SetBitField (hEnd, 4: 0, 4:0);
938 newmode.crtc[0x6] = SetBitField (vTotal, 7: 0, 7:0);
939 newmode.crtc[0x7] = SetBitField (vTotal, 8: 8, 0:0)
940 | SetBitField (vDisplay, 8: 8, 1:1)
941 | SetBitField (vStart, 8: 8, 2:2)
942 | SetBitField (vBlankStart, 8: 8, 3:3)
943 | SetBit (4)
944 | SetBitField (vTotal, 9: 9, 5:5)
945 | SetBitField (vDisplay, 9: 9, 6:6)
946 | SetBitField (vStart, 9: 9, 7:7);
947 newmode.crtc[0x9] = SetBitField (vBlankStart, 9: 9, 5:5)
948 | SetBit (6);
949 newmode.crtc[0x10] = Set8Bits (vStart);
950 newmode.crtc[0x11] = SetBitField (vEnd, 3: 0, 3:0)
951 | SetBit (5);
952 newmode.crtc[0x12] = Set8Bits (vDisplay);
953 newmode.crtc[0x13] = ((width / 8) * ((bpp + 1) / 8)) & 0xFF;
954 newmode.crtc[0x15] = Set8Bits (vBlankStart);
955 newmode.crtc[0x16] = Set8Bits (vBlankEnd + 1);
956
957 newmode.ext.bpp = bpp;
958 newmode.ext.width = width;
959 newmode.ext.height = height;
960
961 rinfo->riva.CalcStateExt(&rinfo->riva, &newmode.ext, bpp, width,
962 hDisplaySize, hDisplay, hStart, hEnd,
963 hTotal, height, vDisplay, vStart, vEnd,
964 vTotal, dotClock);
965
966 newmode.ext.scale = rinfo->riva.PRAMDAC[0x00000848/4] & 0xfff000ff;
967
968 if (rinfo->riva.flatPanel) {
969 newmode.ext.pixel |= (1 << 7);
970 newmode.ext.scale |= (1 << 8);
971 }
972
973 newmode.ext.vpll2 = rinfo->riva.PRAMDAC[0x00000520/4];
974
975 #if defined(__powerpc__)
976 /*
977 * XXX only Mac cards use second DAC for flat panel
978 */
979 if (rinfo->riva.flatPanel) {
980 newmode.ext.pllsel |= 0x20000800;
981 newmode.ext.vpll2 = newmode.ext.vpll;
982 }
983 #endif
984 rinfo->current_state = newmode;
985 riva_load_state(rinfo, &rinfo->current_state);
986
987 rinfo->riva.LockUnlock(&rinfo->riva, 0); /* important for HW cursor */
988 rivafb_download_cursor(rinfo);
989
990 rivafb_blank(0, (struct fb_info *)rinfo);
991 }
992
993 /**
994 * riva_board_list_add - maintains board list
995 * @board_list: root node of list of boards
996 * @new_node: new node to be added
997 *
998 * DESCRIPTION:
999 * Adds @new_node to the list referenced by @board_list.
1000 *
1001 * RETURNS:
1002 * New root node
1003 *
1004 * CALLED FROM:
1005 * rivafb_init_one()
1006 */
riva_board_list_add(struct rivafb_info * board_list,struct rivafb_info * new_node)1007 static struct rivafb_info *riva_board_list_add(struct rivafb_info *board_list,
1008 struct rivafb_info *new_node)
1009 {
1010 struct rivafb_info *i_p = board_list;
1011
1012 new_node->next = NULL;
1013
1014 if (board_list == NULL)
1015 return new_node;
1016
1017 while (i_p->next != NULL)
1018 i_p = i_p->next;
1019 i_p->next = new_node;
1020
1021 return board_list;
1022 }
1023
1024 /**
1025 * riva_board_list_del - maintains board list
1026 * @board_list: root node of list of boards
1027 * @del_node: node to be removed
1028 *
1029 * DESCRIPTION:
1030 * Removes @del_node from the list referenced by @board_list.
1031 *
1032 * RETURNS:
1033 * New root node
1034 *
1035 * CALLED FROM:
1036 * rivafb_remove_one()
1037 */
riva_board_list_del(struct rivafb_info * board_list,struct rivafb_info * del_node)1038 static struct rivafb_info *riva_board_list_del(struct rivafb_info *board_list,
1039 struct rivafb_info *del_node)
1040 {
1041 struct rivafb_info *i_p = board_list;
1042
1043 if (board_list == del_node)
1044 return del_node->next;
1045
1046 while (i_p->next != del_node)
1047 i_p = i_p->next;
1048 i_p->next = del_node->next;
1049
1050 return board_list;
1051 }
1052
1053 /**
1054 * rivafb_do_maximize -
1055 * @rinfo: pointer to rivafb_info object containing info for current riva board
1056 * @var:
1057 * @v:
1058 * @nom:
1059 * @den:
1060 *
1061 * DESCRIPTION:
1062 * .
1063 *
1064 * RETURNS:
1065 * -EINVAL on failure, 0 on success
1066 *
1067 *
1068 * CALLED FROM:
1069 * rivafb_set_var()
1070 */
rivafb_do_maximize(struct rivafb_info * rinfo,struct fb_var_screeninfo * var,struct fb_var_screeninfo * v,int nom,int den)1071 static int rivafb_do_maximize(struct rivafb_info *rinfo,
1072 struct fb_var_screeninfo *var,
1073 struct fb_var_screeninfo *v,
1074 int nom, int den)
1075 {
1076 static struct {
1077 int xres, yres;
1078 } modes[] = {
1079 {1600, 1280},
1080 {1280, 1024},
1081 {1024, 768},
1082 {800, 600},
1083 {640, 480},
1084 {-1, -1}
1085 };
1086 int i;
1087
1088 /* use highest possible virtual resolution */
1089 if (v->xres_virtual == -1 && v->yres_virtual == -1) {
1090 printk(KERN_WARNING PFX
1091 "using maximum available virtual resolution\n");
1092 for (i = 0; modes[i].xres != -1; i++) {
1093 if (modes[i].xres * nom / den * modes[i].yres <
1094 rinfo->ram_amount / 2)
1095 break;
1096 }
1097 if (modes[i].xres == -1) {
1098 printk(KERN_ERR PFX
1099 "could not find a virtual resolution that fits into video memory!!\n");
1100 DPRINTK("EXIT - EINVAL error\n");
1101 return -EINVAL;
1102 }
1103 v->xres_virtual = modes[i].xres;
1104 v->yres_virtual = modes[i].yres;
1105
1106 printk(KERN_INFO PFX
1107 "virtual resolution set to maximum of %dx%d\n",
1108 v->xres_virtual, v->yres_virtual);
1109 } else if (v->xres_virtual == -1) {
1110 v->xres_virtual = (rinfo->ram_amount * den /
1111 (nom * v->yres_virtual * 2)) & ~15;
1112 printk(KERN_WARNING PFX
1113 "setting virtual X resolution to %d\n", v->xres_virtual);
1114 } else if (v->yres_virtual == -1) {
1115 v->xres_virtual = (v->xres_virtual + 15) & ~15;
1116 v->yres_virtual = rinfo->ram_amount * den /
1117 (nom * v->xres_virtual * 2);
1118 printk(KERN_WARNING PFX
1119 "setting virtual Y resolution to %d\n", v->yres_virtual);
1120 } else {
1121 v->xres_virtual = (v->xres_virtual + 15) & ~15;
1122 if (v->xres_virtual * nom / den * v->yres_virtual > rinfo->ram_amount) {
1123 printk(KERN_ERR PFX
1124 "mode %dx%dx%d rejected...resolution too high to fit into video memory!\n",
1125 var->xres, var->yres, var->bits_per_pixel);
1126 DPRINTK("EXIT - EINVAL error\n");
1127 return -EINVAL;
1128 }
1129 }
1130
1131 if (v->xres_virtual * nom / den >= 8192) {
1132 printk(KERN_WARNING PFX
1133 "virtual X resolution (%d) is too high, lowering to %d\n",
1134 v->xres_virtual, 8192 * den / nom - 16);
1135 v->xres_virtual = 8192 * den / nom - 16;
1136 }
1137
1138 if (v->xres_virtual < v->xres) {
1139 printk(KERN_ERR PFX
1140 "virtual X resolution (%d) is smaller than real\n", v->xres_virtual);
1141 return -EINVAL;
1142 }
1143
1144 if (v->yres_virtual < v->yres) {
1145 printk(KERN_ERR PFX
1146 "virtual Y resolution (%d) is smaller than real\n", v->yres_virtual);
1147 return -EINVAL;
1148 }
1149
1150 return 0;
1151 }
1152
1153
1154
1155 /* ------------------------------------------------------------------------- *
1156 *
1157 * internal fb_ops helper functions
1158 *
1159 * ------------------------------------------------------------------------- */
1160
1161 /**
1162 * riva_get_cmap_len - query current color map length
1163 * @var: standard kernel fb changeable data
1164 *
1165 * DESCRIPTION:
1166 * Get current color map length.
1167 *
1168 * RETURNS:
1169 * Length of color map
1170 *
1171 * CALLED FROM:
1172 * riva_getcolreg()
1173 * riva_setcolreg()
1174 * rivafb_get_cmap()
1175 * rivafb_set_cmap()
1176 */
riva_get_cmap_len(const struct fb_var_screeninfo * var)1177 static int riva_get_cmap_len(const struct fb_var_screeninfo *var)
1178 {
1179 int rc = 16; /* reasonable default */
1180
1181 assert(var != NULL);
1182
1183 switch (var->bits_per_pixel) {
1184 #ifdef FBCON_HAS_CFB8
1185 case 8:
1186 rc = 256; /* pseudocolor... 256 entries HW palette */
1187 break;
1188 #endif
1189 #ifdef FBCON_HAS_CFB16
1190 case 15:
1191 rc = 15; /* fix for 15 bpp depths on Riva 128 based cards */
1192 break;
1193 case 16:
1194 rc = 16; /* directcolor... 16 entries SW palette */
1195 break; /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
1196 #endif
1197 #ifdef FBCON_HAS_CFB32
1198 case 32:
1199 rc = 16; /* directcolor... 16 entries SW palette */
1200 break; /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
1201 #endif
1202 default:
1203 /* should not occur */
1204 break;
1205 }
1206
1207 return rc;
1208 }
1209
1210 /**
1211 * riva_getcolreg
1212 * @regno: register index
1213 * @red: red component
1214 * @green: green component
1215 * @blue: blue component
1216 * @transp: transparency
1217 * @info: pointer to rivafb_info object containing info for current riva board
1218 *
1219 * DESCRIPTION:
1220 * Read a single color register and split it into colors/transparent.
1221 * The return values must have a 16 bit magnitude.
1222 *
1223 * RETURNS:
1224 * Return != 0 for invalid regno.
1225 *
1226 * CALLED FROM:
1227 * rivafb_get_cmap()
1228 * rivafb_switch()
1229 * fbcmap.c:fb_get_cmap()
1230 * fbgen.c:fbgen_get_cmap()
1231 * fbgen.c:fbgen_switch()
1232 */
riva_getcolreg(unsigned regno,unsigned * red,unsigned * green,unsigned * blue,unsigned * transp,struct fb_info * info)1233 static int riva_getcolreg(unsigned regno, unsigned *red, unsigned *green,
1234 unsigned *blue, unsigned *transp,
1235 struct fb_info *info)
1236 {
1237 struct rivafb_info *rivainfo = (struct rivafb_info *)info;
1238
1239 if (regno >= riva_get_cmap_len(&rivainfo->currcon_display->var))
1240 return 1;
1241
1242 *red = rivainfo->palette[regno].red;
1243 *green = rivainfo->palette[regno].green;
1244 *blue = rivainfo->palette[regno].blue;
1245 *transp = 0;
1246
1247 return 0;
1248 }
1249
1250 /**
1251 * riva_setcolreg
1252 * @regno: register index
1253 * @red: red component
1254 * @green: green component
1255 * @blue: blue component
1256 * @transp: transparency
1257 * @info: pointer to rivafb_info object containing info for current riva board
1258 *
1259 * DESCRIPTION:
1260 * Set a single color register. The values supplied have a 16 bit
1261 * magnitude.
1262 *
1263 * RETURNS:
1264 * Return != 0 for invalid regno.
1265 *
1266 * CALLED FROM:
1267 * rivafb_set_cmap()
1268 * fbcmap.c:fb_set_cmap()
1269 * fbgen.c:fbgen_get_cmap()
1270 * fbgen.c:fbgen_install_cmap()
1271 * fbgen.c:fbgen_set_var()
1272 * fbgen.c:fbgen_switch()
1273 * fbgen.c:fbgen_blank()
1274 * fbgen.c:fbgen_blank()
1275 */
riva_setcolreg(unsigned regno,unsigned red,unsigned green,unsigned blue,unsigned transp,struct fb_info * info)1276 static int riva_setcolreg(unsigned regno, unsigned red, unsigned green,
1277 unsigned blue, unsigned transp,
1278 struct fb_info *info)
1279 {
1280 struct rivafb_info *rivainfo = (struct rivafb_info *)info;
1281 RIVA_HW_INST *chip = &rivainfo->riva;
1282 struct display *p;
1283
1284 DPRINTK("ENTER\n");
1285
1286 assert(rivainfo != NULL);
1287 assert(rivainfo->currcon_display != NULL);
1288
1289 p = rivainfo->currcon_display;
1290
1291 if (regno >= riva_get_cmap_len(&p->var))
1292 return -EINVAL;
1293
1294 rivainfo->palette[regno].red = red;
1295 rivainfo->palette[regno].green = green;
1296 rivainfo->palette[regno].blue = blue;
1297
1298 if (p->var.grayscale) {
1299 /* gray = 0.30*R + 0.59*G + 0.11*B */
1300 red = green = blue =
1301 (red * 77 + green * 151 + blue * 28) >> 8;
1302 }
1303
1304 switch (p->var.bits_per_pixel) {
1305 #ifdef FBCON_HAS_CFB8
1306 case 8:
1307 /* "transparent" stuff is completely ignored. */
1308 riva_wclut(chip, regno, red >> 8, green >> 8, blue >> 8);
1309 break;
1310 #endif /* FBCON_HAS_CFB8 */
1311 #ifdef FBCON_HAS_CFB16
1312 case 16:
1313 assert(regno < 16);
1314 if (p->var.green.length == 5) {
1315 /* 0rrrrrgg gggbbbbb */
1316 rivainfo->con_cmap.cfb16[regno] =
1317 ((red & 0xf800) >> 1) |
1318 ((green & 0xf800) >> 6) | ((blue & 0xf800) >> 11);
1319 } else {
1320 /* rrrrrggg gggbbbbb */
1321 rivainfo->con_cmap.cfb16[regno] =
1322 ((red & 0xf800) >> 0) |
1323 ((green & 0xf800) >> 5) | ((blue & 0xf800) >> 11);
1324 }
1325 break;
1326 #endif /* FBCON_HAS_CFB16 */
1327 #ifdef FBCON_HAS_CFB32
1328 case 32:
1329 assert(regno < 16);
1330 rivainfo->con_cmap.cfb32[regno] =
1331 ((red & 0xff00) << 8) |
1332 ((green & 0xff00)) | ((blue & 0xff00) >> 8);
1333 break;
1334 #endif /* FBCON_HAS_CFB32 */
1335 default:
1336 /* do nothing */
1337 break;
1338 }
1339
1340 return 0;
1341 }
1342
1343
1344
1345 /* ------------------------------------------------------------------------- *
1346 *
1347 * framebuffer operations
1348 *
1349 * ------------------------------------------------------------------------- */
1350
rivafb_get_fix(struct fb_fix_screeninfo * fix,int con,struct fb_info * info)1351 static int rivafb_get_fix(struct fb_fix_screeninfo *fix, int con,
1352 struct fb_info *info)
1353 {
1354 struct rivafb_info *rivainfo = (struct rivafb_info *)info;
1355 struct display *p;
1356
1357 DPRINTK("ENTER\n");
1358
1359 assert(fix != NULL);
1360 assert(info != NULL);
1361 assert(rivainfo->drvr_name && rivainfo->drvr_name[0]);
1362 assert(rivainfo->fb_base_phys > 0);
1363 assert(rivainfo->ram_amount > 0);
1364
1365 p = (con < 0) ? rivainfo->info.disp : &fb_display[con];
1366
1367 memset(fix, 0, sizeof(struct fb_fix_screeninfo));
1368 sprintf(fix->id, "nVidia %s", rivainfo->drvr_name);
1369
1370 fix->type = p->type;
1371 fix->type_aux = p->type_aux;
1372 fix->visual = p->visual;
1373
1374 fix->xpanstep = 1;
1375 fix->ypanstep = 1;
1376 fix->ywrapstep = 0; /* FIXME: no ywrap for now */
1377
1378 fix->line_length = p->line_length;
1379
1380 fix->mmio_start = rivainfo->ctrl_base_phys;
1381 fix->mmio_len = rivainfo->base0_region_size;
1382 fix->smem_start = rivainfo->fb_base_phys;
1383 fix->smem_len = rivainfo->ram_amount;
1384
1385 switch (rivainfo->riva.Architecture) {
1386 case NV_ARCH_03:
1387 fix->accel = FB_ACCEL_NV3;
1388 break;
1389 case NV_ARCH_04: /* riva_hw.c now doesn't distinguish between TNT & TNT2 */
1390 fix->accel = FB_ACCEL_NV4;
1391 break;
1392 case NV_ARCH_10: /* FIXME: ID for GeForce */
1393 case NV_ARCH_20:
1394 fix->accel = FB_ACCEL_NV4;
1395 break;
1396
1397 }
1398
1399 DPRINTK("EXIT, returning 0\n");
1400
1401 return 0;
1402 }
1403
rivafb_get_var(struct fb_var_screeninfo * var,int con,struct fb_info * info)1404 static int rivafb_get_var(struct fb_var_screeninfo *var, int con,
1405 struct fb_info *info)
1406 {
1407 struct rivafb_info *rivainfo = (struct rivafb_info *)info;
1408
1409 DPRINTK("ENTER\n");
1410
1411 assert(info != NULL);
1412 assert(var != NULL);
1413
1414 *var = (con < 0) ? rivainfo->disp.var : fb_display[con].var;
1415
1416 DPRINTK("EXIT, returning 0\n");
1417
1418 return 0;
1419 }
1420
rivafb_set_var(struct fb_var_screeninfo * var,int con,struct fb_info * info)1421 static int rivafb_set_var(struct fb_var_screeninfo *var, int con,
1422 struct fb_info *info)
1423 {
1424 struct rivafb_info *rivainfo = (struct rivafb_info *)info;
1425 struct display *dsp;
1426 struct fb_var_screeninfo v;
1427 int nom, den; /* translating from pixels->bytes */
1428 int accel;
1429 unsigned chgvar = 0;
1430
1431 DPRINTK("ENTER\n");
1432
1433 assert(info != NULL);
1434 assert(var != NULL);
1435
1436 DPRINTK("Requested: %dx%dx%d\n", var->xres, var->yres,
1437 var->bits_per_pixel);
1438 DPRINTK(" virtual: %dx%d\n", var->xres_virtual,
1439 var->yres_virtual);
1440 DPRINTK(" offset: (%d,%d)\n", var->xoffset, var->yoffset);
1441 DPRINTK("grayscale: %d\n", var->grayscale);
1442
1443 dsp = (con < 0) ? rivainfo->info.disp : &fb_display[con];
1444 assert(dsp != NULL);
1445
1446 /* if var has changed, we should call changevar() later */
1447 if (con >= 0) {
1448 chgvar = ((dsp->var.xres != var->xres) ||
1449 (dsp->var.yres != var->yres) ||
1450 (dsp->var.xres_virtual != var->xres_virtual) ||
1451 (dsp->var.yres_virtual != var->yres_virtual) ||
1452 (dsp->var.accel_flags != var->accel_flags) ||
1453 (dsp->var.bits_per_pixel != var->bits_per_pixel)
1454 || memcmp(&dsp->var.red, &var->red,
1455 sizeof(var->red))
1456 || memcmp(&dsp->var.green, &var->green,
1457 sizeof(var->green))
1458 || memcmp(&dsp->var.blue, &var->blue,
1459 sizeof(var->blue)));
1460 }
1461
1462 memcpy(&v, var, sizeof(v));
1463
1464 accel = v.accel_flags & FB_ACCELF_TEXT;
1465
1466 switch (v.bits_per_pixel) {
1467 #ifdef FBCON_HAS_CFB8
1468 case 1 ... 8:
1469 v.bits_per_pixel = 8;
1470 nom = 1;
1471 den = 1;
1472 v.red.offset = 0;
1473 v.red.length = 8;
1474 v.green.offset = 0;
1475 v.green.length = 8;
1476 v.blue.offset = 0;
1477 v.blue.length = 8;
1478 break;
1479 #endif
1480 #ifdef FBCON_HAS_CFB16
1481 case 9 ... 15:
1482 v.green.length = 5;
1483 /* fall through */
1484 case 16:
1485 v.bits_per_pixel = 16;
1486 nom = 2;
1487 den = 1;
1488 if (v.green.length == 5) {
1489 /* 0rrrrrgg gggbbbbb */
1490 v.red.offset = 10;
1491 v.green.offset = 5;
1492 v.blue.offset = 0;
1493 v.red.length = 5;
1494 v.green.length = 5;
1495 v.blue.length = 5;
1496 } else {
1497 /* rrrrrggg gggbbbbb */
1498 v.red.offset = 11;
1499 v.green.offset = 5;
1500 v.blue.offset = 0;
1501 v.red.length = 5;
1502 v.green.length = 6;
1503 v.blue.length = 5;
1504 }
1505 break;
1506 #endif
1507 #ifdef FBCON_HAS_CFB32
1508 case 17 ... 32:
1509 v.bits_per_pixel = 32;
1510 nom = 4;
1511 den = 1;
1512 v.red.offset = 16;
1513 v.green.offset = 8;
1514 v.blue.offset = 0;
1515 v.red.length = 8;
1516 v.green.length = 8;
1517 v.blue.length = 8;
1518 break;
1519 #endif
1520 default:
1521 printk(KERN_ERR PFX
1522 "mode %dx%dx%d rejected...color depth not supported.\n",
1523 var->xres, var->yres, var->bits_per_pixel);
1524 DPRINTK("EXIT, returning -EINVAL\n");
1525 return -EINVAL;
1526 }
1527
1528 if (rivafb_do_maximize(rivainfo, var, &v, nom, den) < 0)
1529 return -EINVAL;
1530
1531 if (v.xoffset < 0)
1532 v.xoffset = 0;
1533 if (v.yoffset < 0)
1534 v.yoffset = 0;
1535
1536 /* truncate xoffset and yoffset to maximum if too high */
1537 if (v.xoffset > v.xres_virtual - v.xres)
1538 v.xoffset = v.xres_virtual - v.xres - 1;
1539
1540 if (v.yoffset > v.yres_virtual - v.yres)
1541 v.yoffset = v.yres_virtual - v.yres - 1;
1542
1543 v.red.msb_right =
1544 v.green.msb_right =
1545 v.blue.msb_right =
1546 v.transp.offset = v.transp.length = v.transp.msb_right = 0;
1547
1548 switch (v.activate & FB_ACTIVATE_MASK) {
1549 case FB_ACTIVATE_TEST:
1550 DPRINTK("EXIT - FB_ACTIVATE_TEST\n");
1551 return 0;
1552 case FB_ACTIVATE_NXTOPEN: /* ?? */
1553 case FB_ACTIVATE_NOW:
1554 break; /* continue */
1555 default:
1556 DPRINTK("EXIT - unknown activation type\n");
1557 return -EINVAL; /* unknown */
1558 }
1559
1560 memcpy(&dsp->var, &v, sizeof(v));
1561 if (chgvar) {
1562 riva_set_dispsw(rivainfo, dsp);
1563
1564 if (accel) {
1565 if (nomove)
1566 dsp->scrollmode = SCROLL_YNOMOVE;
1567 else
1568 dsp->scrollmode = 0;
1569 } else
1570 dsp->scrollmode = SCROLL_YREDRAW;
1571
1572 if (info && info->changevar)
1573 info->changevar(con);
1574 }
1575
1576 rivafb_create_cursor(rivainfo, fontwidth(dsp), fontheight(dsp));
1577 riva_load_video_mode(rivainfo, &v);
1578 if (accel) riva_setup_accel(rivainfo);
1579
1580 DPRINTK("EXIT, returning 0\n");
1581 return 0;
1582 }
1583
rivafb_get_cmap(struct fb_cmap * cmap,int kspc,int con,struct fb_info * info)1584 static int rivafb_get_cmap(struct fb_cmap *cmap, int kspc, int con,
1585 struct fb_info *info)
1586 {
1587 struct rivafb_info *rivainfo = (struct rivafb_info *)info;
1588 struct display *dsp;
1589
1590 DPRINTK("ENTER\n");
1591
1592 assert(rivainfo != NULL);
1593 assert(cmap != NULL);
1594
1595 dsp = (con < 0) ? rivainfo->info.disp : &fb_display[con];
1596
1597 if (con == rivainfo->currcon) { /* current console? */
1598 int rc = fb_get_cmap(cmap, kspc, riva_getcolreg, info);
1599 DPRINTK("EXIT - returning %d\n", rc);
1600 return rc;
1601 } else if (dsp->cmap.len) /* non default colormap? */
1602 fb_copy_cmap(&dsp->cmap, cmap, kspc ? 0 : 2);
1603 else
1604 fb_copy_cmap(fb_default_cmap
1605 (riva_get_cmap_len(&dsp->var)), cmap,
1606 kspc ? 0 : 2);
1607
1608 DPRINTK("EXIT, returning 0\n");
1609
1610 return 0;
1611 }
1612
rivafb_set_cmap(struct fb_cmap * cmap,int kspc,int con,struct fb_info * info)1613 static int rivafb_set_cmap(struct fb_cmap *cmap, int kspc, int con,
1614 struct fb_info *info)
1615 {
1616 struct rivafb_info *rivainfo = (struct rivafb_info *)info;
1617 struct display *dsp;
1618 unsigned int cmap_len;
1619
1620 DPRINTK("ENTER\n");
1621
1622 assert(rivainfo != NULL);
1623 assert(cmap != NULL);
1624
1625 dsp = (con < 0) ? rivainfo->info.disp : &fb_display[con];
1626
1627 cmap_len = riva_get_cmap_len(&dsp->var);
1628 if (dsp->cmap.len != cmap_len) {
1629 int err = fb_alloc_cmap(&dsp->cmap, cmap_len, 0);
1630 if (err) {
1631 DPRINTK("EXIT - returning %d\n", err);
1632 return err;
1633 }
1634 }
1635 if (con == rivainfo->currcon) { /* current console? */
1636 int rc = fb_set_cmap(cmap, kspc, riva_setcolreg, info);
1637 DPRINTK("EXIT - returning %d\n", rc);
1638 return rc;
1639 } else
1640 fb_copy_cmap(cmap, &dsp->cmap, kspc ? 0 : 1);
1641
1642 DPRINTK("EXIT, returning 0\n");
1643
1644 return 0;
1645 }
1646
1647 /**
1648 * rivafb_pan_display
1649 * @var: standard kernel fb changeable data
1650 * @con: TODO
1651 * @info: pointer to rivafb_info object containing info for current riva board
1652 *
1653 * DESCRIPTION:
1654 * Pan (or wrap, depending on the `vmode' field) the display using the
1655 * `xoffset' and `yoffset' fields of the `var' structure.
1656 * If the values don't fit, return -EINVAL.
1657 *
1658 * This call looks only at xoffset, yoffset and the FB_VMODE_YWRAP flag
1659 */
rivafb_pan_display(struct fb_var_screeninfo * var,int con,struct fb_info * info)1660 static int rivafb_pan_display(struct fb_var_screeninfo *var, int con,
1661 struct fb_info *info)
1662 {
1663 unsigned int base;
1664 struct display *dsp;
1665 struct rivafb_info *rivainfo = (struct rivafb_info *)info;
1666
1667 DPRINTK("ENTER\n");
1668
1669 assert(rivainfo != NULL);
1670
1671 if (var->xoffset > (var->xres_virtual - var->xres))
1672 return -EINVAL;
1673 if (var->yoffset > (var->yres_virtual - var->yres))
1674 return -EINVAL;
1675
1676 dsp = (con < 0) ? rivainfo->info.disp : &fb_display[con];
1677
1678 if (var->vmode & FB_VMODE_YWRAP) {
1679 if (var->yoffset < 0
1680 || var->yoffset >= dsp->var.yres_virtual
1681 || var->xoffset) return -EINVAL;
1682 } else {
1683 if (var->xoffset + dsp->var.xres > dsp->var.xres_virtual ||
1684 var->yoffset + dsp->var.yres > dsp->var.yres_virtual)
1685 return -EINVAL;
1686 }
1687
1688 base = var->yoffset * dsp->line_length + var->xoffset;
1689
1690 if (con == rivainfo->currcon) {
1691 rivainfo->riva.SetStartAddress(&rivainfo->riva, base);
1692 }
1693
1694 dsp->var.xoffset = var->xoffset;
1695 dsp->var.yoffset = var->yoffset;
1696
1697 if (var->vmode & FB_VMODE_YWRAP)
1698 dsp->var.vmode |= FB_VMODE_YWRAP;
1699 else
1700 dsp->var.vmode &= ~FB_VMODE_YWRAP;
1701
1702 DPRINTK("EXIT, returning 0\n");
1703
1704 return 0;
1705 }
1706
rivafb_ioctl(struct inode * inode,struct file * file,unsigned int cmd,unsigned long arg,int con,struct fb_info * info)1707 static int rivafb_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
1708 unsigned long arg, int con, struct fb_info *info)
1709 {
1710 struct rivafb_info *rivainfo = (struct rivafb_info *)info;
1711
1712 DPRINTK("ENTER\n");
1713
1714 assert(rivainfo != NULL);
1715
1716 /* no rivafb-specific ioctls */
1717
1718 DPRINTK("EXIT, returning -EINVAL\n");
1719
1720 return -EINVAL;
1721 }
1722
rivafb_rasterimg(struct fb_info * info,int start)1723 static int rivafb_rasterimg(struct fb_info *info, int start)
1724 {
1725 struct rivafb_info *rinfo = (struct rivafb_info *)info;
1726
1727 wait_for_idle(rinfo);
1728
1729 return 0;
1730 }
1731
rivafb_switch(int con,struct fb_info * info)1732 static int rivafb_switch(int con, struct fb_info *info)
1733 {
1734 struct rivafb_info *rivainfo = (struct rivafb_info *)info;
1735 struct fb_cmap *cmap;
1736 struct display *dsp;
1737
1738 DPRINTK("ENTER\n");
1739
1740 assert(rivainfo != NULL);
1741
1742 dsp = (con < 0) ? rivainfo->info.disp : &fb_display[con];
1743
1744 if (rivainfo->currcon >= 0) {
1745 /* Do we have to save the colormap? */
1746 cmap = &(rivainfo->currcon_display->cmap);
1747 DPRINTK("switch1: con = %d, cmap.len = %d\n",
1748 rivainfo->currcon, cmap->len);
1749
1750 if (cmap->len) {
1751 DPRINTK("switch1a: %p %p %p %p\n", cmap->red,
1752 cmap->green, cmap->blue, cmap->transp);
1753 fb_get_cmap(cmap, 1, riva_getcolreg, info);
1754 }
1755 }
1756 rivainfo->currcon = con;
1757 rivainfo->currcon_display = dsp;
1758
1759 rivafb_set_var(&dsp->var, con, info);
1760 riva_set_dispsw(rivainfo, dsp);
1761
1762 DPRINTK("EXIT, returning 0\n");
1763 return 0;
1764 }
1765
rivafb_updatevar(int con,struct fb_info * info)1766 static int rivafb_updatevar(int con, struct fb_info *info)
1767 {
1768 int rc;
1769
1770 DPRINTK("ENTER\n");
1771
1772 rc = (con < 0) ? -EINVAL : rivafb_pan_display(&fb_display[con].var,
1773 con, info);
1774 DPRINTK("EXIT, returning %d\n", rc);
1775 return rc;
1776 }
1777
rivafb_blank(int blank,struct fb_info * info)1778 static void rivafb_blank(int blank, struct fb_info *info)
1779 {
1780 unsigned char tmp, vesa;
1781 struct rivafb_info *rinfo = (struct rivafb_info *)info;
1782
1783 DPRINTK("ENTER\n");
1784
1785 assert(rinfo != NULL);
1786
1787 tmp = SEQin(rinfo, 0x01) & ~0x20; /* screen on/off */
1788 vesa = CRTCin(rinfo, 0x1a) & ~0xc0; /* sync on/off */
1789
1790 if (blank) {
1791 tmp |= 0x20;
1792 switch (blank - 1) {
1793 case VESA_NO_BLANKING:
1794 break;
1795 case VESA_VSYNC_SUSPEND:
1796 vesa |= 0x80;
1797 break;
1798 case VESA_HSYNC_SUSPEND:
1799 vesa |= 0x40;
1800 break;
1801 case VESA_POWERDOWN:
1802 vesa |= 0xc0;
1803 break;
1804 }
1805 }
1806
1807 SEQout(rinfo, 0x01, tmp);
1808 CRTCout(rinfo, 0x1a, vesa);
1809
1810 DPRINTK("EXIT\n");
1811 }
1812
1813
1814
1815 /* ------------------------------------------------------------------------- *
1816 *
1817 * initialization helper functions
1818 *
1819 * ------------------------------------------------------------------------- */
1820
1821 /* kernel interface */
1822 static struct fb_ops riva_fb_ops = {
1823 owner: THIS_MODULE,
1824 fb_get_fix: rivafb_get_fix,
1825 fb_get_var: rivafb_get_var,
1826 fb_set_var: rivafb_set_var,
1827 fb_get_cmap: rivafb_get_cmap,
1828 fb_set_cmap: rivafb_set_cmap,
1829 fb_pan_display: rivafb_pan_display,
1830 fb_ioctl: rivafb_ioctl,
1831 fb_rasterimg: rivafb_rasterimg,
1832 };
1833
riva_init_disp_var(struct rivafb_info * rinfo)1834 static int __devinit riva_init_disp_var(struct rivafb_info *rinfo)
1835 {
1836 #ifndef MODULE
1837 if (mode_option)
1838 fb_find_mode(&rinfo->disp.var, &rinfo->info, mode_option,
1839 NULL, 0, NULL, 8);
1840 #endif
1841 if (rinfo->use_default_var)
1842 /* We will use the modified default var */
1843 rinfo->disp.var = rivafb_default_var;
1844
1845 return 0;
1846 }
1847
riva_init_disp(struct rivafb_info * rinfo)1848 static int __devinit riva_init_disp(struct rivafb_info *rinfo)
1849 {
1850 struct fb_info *info;
1851 struct display *disp;
1852
1853 DPRINTK("ENTER\n");
1854
1855 assert(rinfo != NULL);
1856
1857 info = &rinfo->info;
1858 disp = &rinfo->disp;
1859
1860 disp->var = rivafb_default_var;
1861
1862 if (noaccel)
1863 disp->var.accel_flags &= ~FB_ACCELF_TEXT;
1864 else
1865 disp->var.accel_flags |= FB_ACCELF_TEXT;
1866
1867 info->disp = disp;
1868
1869 /* FIXME: assure that disp->cmap is completely filled out */
1870
1871 rinfo->currcon_display = disp;
1872
1873 if ((riva_init_disp_var(rinfo)) < 0) {
1874 DPRINTK("EXIT, returning -1\n");
1875 return -1;
1876 }
1877
1878 riva_set_dispsw(rinfo, disp);
1879
1880 DPRINTK("EXIT, returning 0\n");
1881 return 0;
1882
1883 }
1884
riva_set_fbinfo(struct rivafb_info * rinfo)1885 static int __devinit riva_set_fbinfo(struct rivafb_info *rinfo)
1886 {
1887 struct fb_info *info;
1888
1889 assert(rinfo != NULL);
1890
1891 info = &rinfo->info;
1892
1893 strcpy(info->modename, rinfo->drvr_name);
1894 info->node = -1;
1895 info->flags = FBINFO_FLAG_DEFAULT;
1896 info->fbops = &riva_fb_ops;
1897
1898 /* FIXME: set monspecs to what??? */
1899
1900 info->display_fg = NULL;
1901 strncpy(info->fontname, fontname, sizeof(info->fontname));
1902 info->fontname[sizeof(info->fontname) - 1] = 0;
1903
1904 info->changevar = NULL;
1905 info->switch_con = rivafb_switch;
1906 info->updatevar = rivafb_updatevar;
1907 info->blank = rivafb_blank;
1908
1909 if (riva_init_disp(rinfo) < 0) /* must be done last */
1910 return -1;
1911
1912 return 0;
1913 }
1914
1915 #ifdef CONFIG_ALL_PPC
riva_get_EDID_OF(struct rivafb_info * rinfo)1916 static int riva_get_EDID_OF(struct rivafb_info *rinfo)
1917 {
1918 struct device_node *dp;
1919 unsigned char *pedid = NULL;
1920
1921 dp = pci_device_to_OF_node(rinfo->pd);
1922 pedid = (unsigned char *)get_property(dp, "EDID,B", 0);
1923
1924 if (pedid) {
1925 rinfo->EDID = pedid;
1926 return 1;
1927 } else
1928 return 0;
1929 }
1930 #endif /* CONFIG_ALL_PPC */
1931
riva_dfp_parse_EDID(struct rivafb_info * rinfo)1932 static int riva_dfp_parse_EDID(struct rivafb_info *rinfo)
1933 {
1934 unsigned char *block = rinfo->EDID;
1935
1936 if (!block)
1937 return 0;
1938
1939 /* jump to detailed timing block section */
1940 block += 54;
1941
1942 rinfo->clock = (block[0] + (block[1] << 8));
1943 rinfo->panel_xres = (block[2] + ((block[4] & 0xf0) << 4));
1944 rinfo->hblank = (block[3] + ((block[4] & 0x0f) << 8));
1945 rinfo->panel_yres = (block[5] + ((block[7] & 0xf0) << 4));
1946 rinfo->vblank = (block[6] + ((block[7] & 0x0f) << 8));
1947 rinfo->hOver_plus = (block[8] + ((block[11] & 0xc0) << 2));
1948 rinfo->hSync_width = (block[9] + ((block[11] & 0x30) << 4));
1949 rinfo->vOver_plus = ((block[10] >> 4) + ((block[11] & 0x0c) << 2));
1950 rinfo->vSync_width = ((block[10] & 0x0f) + ((block[11] & 0x03) << 4));
1951 rinfo->interlaced = ((block[17] & 0x80) >> 7);
1952 rinfo->synct = ((block[17] & 0x18) >> 3);
1953 rinfo->misc = ((block[17] & 0x06) >> 1);
1954 rinfo->hAct_high = rinfo->vAct_high = 0;
1955 if (rinfo->synct == 3) {
1956 if (rinfo->misc & 2)
1957 rinfo->hAct_high = 1;
1958 if (rinfo->misc & 1)
1959 rinfo->vAct_high = 1;
1960 }
1961
1962 printk("rivafb: detected DFP panel size from EDID: %dx%d\n",
1963 rinfo->panel_xres, rinfo->panel_yres);
1964
1965 rinfo->got_dfpinfo = 1;
1966
1967 return 1;
1968 }
1969
riva_update_default_var(struct rivafb_info * rinfo)1970 static void riva_update_default_var(struct rivafb_info *rinfo)
1971 {
1972 struct fb_var_screeninfo *var = &rivafb_default_var;
1973
1974 var->xres = rinfo->panel_xres;
1975 var->yres = rinfo->panel_yres;
1976 var->xres_virtual = rinfo->panel_xres;
1977 var->yres_virtual = rinfo->panel_yres;
1978 var->xoffset = var->yoffset = 0;
1979 var->bits_per_pixel = 8;
1980 var->pixclock = 100000000 / rinfo->clock;
1981 var->left_margin = (rinfo->hblank - rinfo->hOver_plus - rinfo->hSync_width);
1982 var->right_margin = rinfo->hOver_plus;
1983 var->upper_margin = (rinfo->vblank - rinfo->vOver_plus - rinfo->vSync_width);
1984 var->lower_margin = rinfo->vOver_plus;
1985 var->hsync_len = rinfo->hSync_width;
1986 var->vsync_len = rinfo->vSync_width;
1987 var->sync = 0;
1988
1989 if (rinfo->synct == 3) {
1990 if (rinfo->hAct_high)
1991 var->sync |= FB_SYNC_HOR_HIGH_ACT;
1992 if (rinfo->vAct_high)
1993 var->sync |= FB_SYNC_VERT_HIGH_ACT;
1994 }
1995
1996 var->vmode = 0;
1997 if (rinfo->interlaced)
1998 var->vmode |= FB_VMODE_INTERLACED;
1999
2000 if (!noaccel)
2001 var->accel_flags |= FB_ACCELF_TEXT;
2002
2003 rinfo->use_default_var = 1;
2004 }
2005
2006
riva_get_EDID(struct rivafb_info * rinfo)2007 static void riva_get_EDID(struct rivafb_info *rinfo)
2008 {
2009 #ifdef CONFIG_ALL_PPC
2010 if (!riva_get_EDID_OF(rinfo))
2011 printk("rivafb: could not retrieve EDID from OF\n");
2012 #else
2013 /* XXX use other methods later */
2014 #endif
2015 }
2016
2017
riva_get_dfpinfo(struct rivafb_info * rinfo)2018 static void riva_get_dfpinfo(struct rivafb_info *rinfo)
2019 {
2020 if (riva_dfp_parse_EDID(rinfo))
2021 riva_update_default_var(rinfo);
2022
2023 rinfo->riva.flatPanel = rinfo->got_dfpinfo;
2024 }
2025
2026
2027
2028 /* ------------------------------------------------------------------------- *
2029 *
2030 * PCI bus
2031 *
2032 * ------------------------------------------------------------------------- */
2033
rivafb_init_one(struct pci_dev * pd,const struct pci_device_id * ent)2034 static int __devinit rivafb_init_one(struct pci_dev *pd,
2035 const struct pci_device_id *ent)
2036 {
2037 struct rivafb_info *rinfo;
2038 struct riva_chip_info *rci = &riva_chip_info[ent->driver_data];
2039
2040 assert(pd != NULL);
2041 assert(rci != NULL);
2042
2043 rinfo = kmalloc(sizeof(struct rivafb_info), GFP_KERNEL);
2044 if (!rinfo)
2045 goto err_out;
2046
2047 memset(rinfo, 0, sizeof(struct rivafb_info));
2048
2049 rinfo->drvr_name = rci->name;
2050 rinfo->riva.Architecture = rci->arch_rev;
2051
2052 rinfo->pd = pd;
2053 rinfo->base0_region_size = pci_resource_len(pd, 0);
2054 rinfo->base1_region_size = pci_resource_len(pd, 1);
2055
2056 {
2057 /* enable IO and mem if not already done */
2058 unsigned short cmd;
2059
2060 pci_read_config_word(pd, PCI_COMMAND, &cmd);
2061 cmd |= (PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
2062 pci_write_config_word(pd, PCI_COMMAND, cmd);
2063 }
2064
2065 rinfo->ctrl_base_phys = pci_resource_start(rinfo->pd, 0);
2066 rinfo->fb_base_phys = pci_resource_start(rinfo->pd, 1);
2067
2068 rinfo->ctrl_base = ioremap(rinfo->ctrl_base_phys,
2069 rinfo->base0_region_size);
2070 if (!rinfo->ctrl_base) {
2071 printk(KERN_ERR PFX "cannot ioremap MMIO base\n");
2072 goto err_out_free_base1;
2073 }
2074
2075 riva_get_EDID(rinfo);
2076
2077 riva_get_dfpinfo(rinfo);
2078
2079 rinfo->riva.EnableIRQ = 0;
2080 rinfo->riva.PRAMDAC = (unsigned *)(rinfo->ctrl_base + 0x00680000);
2081 rinfo->riva.PFB = (unsigned *)(rinfo->ctrl_base + 0x00100000);
2082 rinfo->riva.PFIFO = (unsigned *)(rinfo->ctrl_base + 0x00002000);
2083 rinfo->riva.PGRAPH = (unsigned *)(rinfo->ctrl_base + 0x00400000);
2084 rinfo->riva.PEXTDEV = (unsigned *)(rinfo->ctrl_base + 0x00101000);
2085 rinfo->riva.PTIMER = (unsigned *)(rinfo->ctrl_base + 0x00009000);
2086 rinfo->riva.PMC = (unsigned *)(rinfo->ctrl_base + 0x00000000);
2087 rinfo->riva.FIFO = (unsigned *)(rinfo->ctrl_base + 0x00800000);
2088
2089 rinfo->riva.PCIO = (U008 *)(rinfo->ctrl_base + 0x00601000);
2090 rinfo->riva.PDIO = (U008 *)(rinfo->ctrl_base + 0x00681000);
2091 rinfo->riva.PVIO = (U008 *)(rinfo->ctrl_base + 0x000C0000);
2092
2093 rinfo->riva.IO = (MISCin(rinfo) & 0x01) ? 0x3D0 : 0x3B0;
2094
2095 if (rinfo->riva.Architecture == NV_ARCH_03) {
2096 /*
2097 * We have to map the full BASE_1 aperture for Riva128's
2098 * because they use the PRAMIN set in "framebuffer" space
2099 */
2100 if (!request_mem_region(rinfo->fb_base_phys,
2101 rinfo->base1_region_size, "rivafb")) {
2102 printk(KERN_ERR PFX "cannot reserve FB region\n");
2103 goto err_out_free_base0;
2104 }
2105
2106 rinfo->fb_base = ioremap(rinfo->fb_base_phys,
2107 rinfo->base1_region_size);
2108 if (!rinfo->fb_base) {
2109 printk(KERN_ERR PFX "cannot ioremap FB base\n");
2110 goto err_out_iounmap_ctrl;
2111 }
2112 }
2113
2114
2115 switch (rinfo->riva.Architecture) {
2116 case NV_ARCH_03:
2117 rinfo->riva.PRAMIN = (unsigned *)(rinfo->fb_base + 0x00C00000);
2118 break;
2119 case NV_ARCH_04:
2120 case NV_ARCH_10:
2121 case NV_ARCH_20:
2122 rinfo->riva.PCRTC = (unsigned *)(rinfo->ctrl_base + 0x00600000);
2123 rinfo->riva.PRAMIN = (unsigned *)(rinfo->ctrl_base + 0x00710000);
2124 break;
2125 }
2126
2127 #if defined(__powerpc__)
2128 /*
2129 * XXX Mac cards use the second DAC for the panel
2130 */
2131 if (rinfo->riva.flatPanel) {
2132 printk("rivafb: using second CRTC\n");
2133 rinfo->riva.PCIO = rinfo->riva.PCIO + 0x2000;
2134 rinfo->riva.PCRTC = rinfo->riva.PCRTC + 0x800;
2135 rinfo->riva.PRAMDAC = rinfo->riva.PRAMDAC + 0x800;
2136 rinfo->riva.PDIO = rinfo->riva.PDIO + 0x2000;
2137 }
2138 #endif
2139
2140 RivaGetConfig(&rinfo->riva);
2141
2142 rinfo->ram_amount = rinfo->riva.RamAmountKBytes * 1024;
2143 rinfo->dclk_max = rinfo->riva.MaxVClockFreqKHz * 1000;
2144
2145 if (rinfo->riva.Architecture != NV_ARCH_03) {
2146 /*
2147 * Now the _normal_ chipsets can just map the amount of
2148 * real physical ram instead of the whole aperture
2149 */
2150 if (!request_mem_region(rinfo->fb_base_phys,
2151 rinfo->ram_amount, "rivafb")) {
2152 printk(KERN_ERR PFX "cannot reserve FB region\n");
2153 goto err_out_free_base0;
2154 }
2155
2156 rinfo->fb_base = ioremap(rinfo->fb_base_phys,
2157 rinfo->ram_amount);
2158 if (!rinfo->fb_base) {
2159 printk(KERN_ERR PFX "cannot ioremap FB base\n");
2160 goto err_out_iounmap_ctrl;
2161 }
2162 }
2163
2164 #ifdef CONFIG_MTRR
2165 if (!nomtrr) {
2166 rinfo->mtrr.vram = mtrr_add(rinfo->fb_base_phys,
2167 rinfo->ram_amount,
2168 MTRR_TYPE_WRCOMB, 1);
2169 if (rinfo->mtrr.vram < 0) {
2170 printk(KERN_ERR PFX "unable to setup MTRR\n");
2171 } else {
2172 rinfo->mtrr.vram_valid = 1;
2173 /* let there be speed */
2174 printk(KERN_INFO PFX "RIVA MTRR set to ON\n");
2175 }
2176 }
2177 #endif /* CONFIG_MTRR */
2178
2179 /* unlock io */
2180 CRTCout(rinfo, 0x11, 0xFF); /* vgaHWunlock() + riva unlock (0x7F) */
2181 rinfo->riva.LockUnlock(&rinfo->riva, 0);
2182
2183 riva_save_state(rinfo, &rinfo->initial_state);
2184
2185 if (!nohwcursor) rinfo->cursor = rivafb_init_cursor(rinfo);
2186
2187 if (riva_set_fbinfo(rinfo) < 0) {
2188 printk(KERN_ERR PFX "error setting initial video mode\n");
2189 goto err_out_cursor;
2190 }
2191
2192 if (register_framebuffer((struct fb_info *)rinfo) < 0) {
2193 printk(KERN_ERR PFX
2194 "error registering riva framebuffer\n");
2195 goto err_out_load_state;
2196 }
2197
2198 riva_boards = riva_board_list_add(riva_boards, rinfo);
2199
2200 pci_set_drvdata(pd, rinfo);
2201
2202 printk(KERN_INFO PFX
2203 "PCI nVidia NV%x framebuffer ver %s (%s, %dMB @ 0x%lX)\n",
2204 rinfo->riva.Architecture,
2205 RIVAFB_VERSION,
2206 rinfo->drvr_name,
2207 rinfo->ram_amount / (1024 * 1024),
2208 rinfo->fb_base_phys);
2209
2210 return 0;
2211
2212 err_out_load_state:
2213 riva_load_state(rinfo, &rinfo->initial_state);
2214 err_out_cursor:
2215 rivafb_exit_cursor(rinfo);
2216 /* err_out_iounmap_fb: */
2217 iounmap(rinfo->fb_base);
2218 err_out_iounmap_ctrl:
2219 iounmap(rinfo->ctrl_base);
2220 err_out_free_base1:
2221 release_mem_region(rinfo->fb_base_phys, rinfo->base1_region_size);
2222 err_out_free_base0:
2223 release_mem_region(rinfo->ctrl_base_phys, rinfo->base0_region_size);
2224 kfree(rinfo);
2225 err_out:
2226 return -ENODEV;
2227 }
2228
rivafb_remove_one(struct pci_dev * pd)2229 static void __devexit rivafb_remove_one(struct pci_dev *pd)
2230 {
2231 struct rivafb_info *board = pci_get_drvdata(pd);
2232
2233 if (!board)
2234 return;
2235
2236 riva_boards = riva_board_list_del(riva_boards, board);
2237
2238 riva_load_state(board, &board->initial_state);
2239
2240 unregister_framebuffer((struct fb_info *)board);
2241
2242 rivafb_exit_cursor(board);
2243
2244 #ifdef CONFIG_MTRR
2245 if (board->mtrr.vram_valid)
2246 mtrr_del(board->mtrr.vram, board->fb_base_phys,
2247 board->ram_amount);
2248 #endif /* CONFIG_MTRR */
2249
2250 iounmap(board->ctrl_base);
2251 iounmap(board->fb_base);
2252
2253 release_mem_region(board->ctrl_base_phys,
2254 board->base0_region_size);
2255 release_mem_region(board->fb_base_phys,
2256 board->ram_amount);
2257
2258 kfree(board);
2259
2260 pci_set_drvdata(pd, NULL);
2261 }
2262
2263
2264
2265 /* ------------------------------------------------------------------------- *
2266 *
2267 * initialization
2268 *
2269 * ------------------------------------------------------------------------- */
2270
2271 #ifndef MODULE
rivafb_setup(char * options)2272 int __init rivafb_setup(char *options)
2273 {
2274 char *this_opt;
2275
2276 if (!options || !*options)
2277 return 0;
2278
2279 while ((this_opt = strsep(&options, ",")) != NULL) {
2280 if (!*this_opt)
2281 continue;
2282 if (!strncmp(this_opt, "font:", 5)) {
2283 char *p;
2284 int i;
2285
2286 p = this_opt + 5;
2287 for (i = 0; i < sizeof(fontname) - 1; i++)
2288 if (!*p || *p == ' ' || *p == ',')
2289 break;
2290 memcpy(fontname, this_opt + 5, i);
2291 fontname[i] = 0;
2292
2293 } else if (!strncmp(this_opt, "noblink", 7)) {
2294 noblink = 1;
2295 } else if (!strncmp(this_opt, "noaccel", 7)) {
2296 noaccel = 1;
2297 } else if (!strncmp(this_opt, "nomove", 6)) {
2298 nomove = 1;
2299 #ifdef CONFIG_MTRR
2300 } else if (!strncmp(this_opt, "nomtrr", 6)) {
2301 nomtrr = 1;
2302 #endif
2303 } else if (!strncmp(this_opt, "nohwcursor", 10)) {
2304 nohwcursor = 1;
2305 } else
2306 mode_option = this_opt;
2307 }
2308 return 0;
2309 }
2310 #endif /* !MODULE */
2311
2312 static struct pci_driver rivafb_driver = {
2313 name: "rivafb",
2314 id_table: rivafb_pci_tbl,
2315 probe: rivafb_init_one,
2316 remove: __devexit_p(rivafb_remove_one),
2317 };
2318
2319
2320
2321 /* ------------------------------------------------------------------------- *
2322 *
2323 * modularization
2324 *
2325 * ------------------------------------------------------------------------- */
2326
rivafb_init(void)2327 int __init rivafb_init(void)
2328 {
2329 int err;
2330 #ifdef MODULE
2331 if (font) strncpy(fontname, font, sizeof(fontname)-1);
2332 #endif
2333 err = pci_module_init(&rivafb_driver);
2334 if (err)
2335 return err;
2336 return 0;
2337 }
2338
2339
2340 #ifdef MODULE
rivafb_exit(void)2341 static void __exit rivafb_exit(void)
2342 {
2343 pci_unregister_driver(&rivafb_driver);
2344 }
2345
2346 module_init(rivafb_init);
2347 module_exit(rivafb_exit);
2348
2349 MODULE_PARM(font, "s");
2350 MODULE_PARM_DESC(font, "Specifies one of the compiled-in fonts (default=none)");
2351 MODULE_PARM(noaccel, "i");
2352 MODULE_PARM_DESC(noaccel, "Disables hardware acceleration (0 or 1=disabled) (default=0)");
2353 MODULE_PARM(nomove, "i");
2354 MODULE_PARM_DESC(nomove, "Enables YSCROLL_NOMOVE (0 or 1=enabled) (default=0)");
2355 MODULE_PARM(nohwcursor, "i");
2356 MODULE_PARM_DESC(nohwcursor, "Disables hardware cursor (0 or 1=disabled) (default=0)");
2357 MODULE_PARM(noblink, "i");
2358 MODULE_PARM_DESC(noblink, "Disables hardware cursor blinking (0 or 1=disabled) (default=0)");
2359 #ifdef CONFIG_MTRR
2360 MODULE_PARM(nomtrr, "i");
2361 MODULE_PARM_DESC(nomtrr, "Disables MTRR support (0 or 1=disabled) (default=0)");
2362 #endif
2363 #endif /* MODULE */
2364
2365 MODULE_AUTHOR("Ani Joshi, maintainer");
2366 MODULE_DESCRIPTION("Framebuffer driver for nVidia Riva 128, TNT, TNT2");
2367 MODULE_LICENSE("GPL");
2368