1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2012 Regents of the University of California
4  * Copyright (C) 2017 SiFive
5  * Copyright (C) 2018 Christoph Hellwig
6  */
7 
8 #include <linux/interrupt.h>
9 #include <linux/irqchip.h>
10 #include <linux/irqdomain.h>
11 #include <linux/module.h>
12 #include <linux/seq_file.h>
13 #include <asm/sbi.h>
14 #include <asm/smp.h>
15 #include <asm/softirq_stack.h>
16 #include <asm/stacktrace.h>
17 
18 static struct fwnode_handle *(*__get_intc_node)(void);
19 
riscv_set_intc_hwnode_fn(struct fwnode_handle * (* fn)(void))20 void riscv_set_intc_hwnode_fn(struct fwnode_handle *(*fn)(void))
21 {
22 	__get_intc_node = fn;
23 }
24 
riscv_get_intc_hwnode(void)25 struct fwnode_handle *riscv_get_intc_hwnode(void)
26 {
27 	if (__get_intc_node)
28 		return __get_intc_node();
29 
30 	return NULL;
31 }
32 EXPORT_SYMBOL_GPL(riscv_get_intc_hwnode);
33 
34 #ifdef CONFIG_IRQ_STACKS
35 #include <asm/irq_stack.h>
36 
37 DEFINE_PER_CPU(ulong *, irq_stack_ptr);
38 
39 #ifdef CONFIG_VMAP_STACK
init_irq_stacks(void)40 static void init_irq_stacks(void)
41 {
42 	int cpu;
43 	ulong *p;
44 
45 	for_each_possible_cpu(cpu) {
46 		p = arch_alloc_vmap_stack(IRQ_STACK_SIZE, cpu_to_node(cpu));
47 		per_cpu(irq_stack_ptr, cpu) = p;
48 	}
49 }
50 #else
51 /* irq stack only needs to be 16 byte aligned - not IRQ_STACK_SIZE aligned. */
52 DEFINE_PER_CPU_ALIGNED(ulong [IRQ_STACK_SIZE/sizeof(ulong)], irq_stack);
53 
init_irq_stacks(void)54 static void init_irq_stacks(void)
55 {
56 	int cpu;
57 
58 	for_each_possible_cpu(cpu)
59 		per_cpu(irq_stack_ptr, cpu) = per_cpu(irq_stack, cpu);
60 }
61 #endif /* CONFIG_VMAP_STACK */
62 
63 #ifdef CONFIG_SOFTIRQ_ON_OWN_STACK
do_softirq_own_stack(void)64 void do_softirq_own_stack(void)
65 {
66 #ifdef CONFIG_IRQ_STACKS
67 	if (on_thread_stack()) {
68 		ulong *sp = per_cpu(irq_stack_ptr, smp_processor_id())
69 					+ IRQ_STACK_SIZE/sizeof(ulong);
70 		__asm__ __volatile(
71 		"addi	sp, sp, -"RISCV_SZPTR  "\n"
72 		REG_S"  ra, (sp)		\n"
73 		"addi	sp, sp, -"RISCV_SZPTR  "\n"
74 		REG_S"  s0, (sp)		\n"
75 		"addi	s0, sp, 2*"RISCV_SZPTR "\n"
76 		"move	sp, %[sp]		\n"
77 		"call	__do_softirq		\n"
78 		"addi	sp, s0, -2*"RISCV_SZPTR"\n"
79 		REG_L"  s0, (sp)		\n"
80 		"addi	sp, sp, "RISCV_SZPTR   "\n"
81 		REG_L"  ra, (sp)		\n"
82 		"addi	sp, sp, "RISCV_SZPTR   "\n"
83 		:
84 		: [sp] "r" (sp)
85 		: "a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7",
86 		  "t0", "t1", "t2", "t3", "t4", "t5", "t6",
87 #ifndef CONFIG_FRAME_POINTER
88 		  "s0",
89 #endif
90 		  "memory");
91 	} else
92 #endif
93 		__do_softirq();
94 }
95 #endif /* CONFIG_SOFTIRQ_ON_OWN_STACK */
96 
97 #else
init_irq_stacks(void)98 static void init_irq_stacks(void) {}
99 #endif /* CONFIG_IRQ_STACKS */
100 
arch_show_interrupts(struct seq_file * p,int prec)101 int arch_show_interrupts(struct seq_file *p, int prec)
102 {
103 	show_ipi_stats(p, prec);
104 	return 0;
105 }
106 
init_IRQ(void)107 void __init init_IRQ(void)
108 {
109 	init_irq_stacks();
110 	irqchip_init();
111 	if (!handle_arch_irq)
112 		panic("No interrupt controller found.");
113 	sbi_ipi_init();
114 }
115