1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*******************************************************************************
3   Copyright (C) 2007-2009  STMicroelectronics Ltd
4 
5 
6   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
7 *******************************************************************************/
8 
9 #ifndef __STMMAC_H__
10 #define __STMMAC_H__
11 
12 #define STMMAC_RESOURCE_NAME   "stmmaceth"
13 
14 #include <linux/clk.h>
15 #include <linux/hrtimer.h>
16 #include <linux/if_vlan.h>
17 #include <linux/stmmac.h>
18 #include <linux/phylink.h>
19 #include <linux/pci.h>
20 #include "common.h"
21 #include <linux/ptp_clock_kernel.h>
22 #include <linux/net_tstamp.h>
23 #include <linux/reset.h>
24 #include <net/page_pool.h>
25 #include <uapi/linux/bpf.h>
26 
27 struct stmmac_resources {
28 	void __iomem *addr;
29 	u8 mac[ETH_ALEN];
30 	int wol_irq;
31 	int lpi_irq;
32 	int irq;
33 	int sfty_ce_irq;
34 	int sfty_ue_irq;
35 	int rx_irq[MTL_MAX_RX_QUEUES];
36 	int tx_irq[MTL_MAX_TX_QUEUES];
37 };
38 
39 enum stmmac_txbuf_type {
40 	STMMAC_TXBUF_T_SKB,
41 	STMMAC_TXBUF_T_XDP_TX,
42 	STMMAC_TXBUF_T_XDP_NDO,
43 	STMMAC_TXBUF_T_XSK_TX,
44 };
45 
46 struct stmmac_tx_info {
47 	dma_addr_t buf;
48 	bool map_as_page;
49 	unsigned len;
50 	bool last_segment;
51 	bool is_jumbo;
52 	enum stmmac_txbuf_type buf_type;
53 };
54 
55 #define STMMAC_TBS_AVAIL	BIT(0)
56 #define STMMAC_TBS_EN		BIT(1)
57 
58 /* Frequently used values are kept adjacent for cache effect */
59 struct stmmac_tx_queue {
60 	u32 tx_count_frames;
61 	int tbs;
62 	struct hrtimer txtimer;
63 	u32 queue_index;
64 	struct stmmac_priv *priv_data;
65 	struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp;
66 	struct dma_edesc *dma_entx;
67 	struct dma_desc *dma_tx;
68 	union {
69 		struct sk_buff **tx_skbuff;
70 		struct xdp_frame **xdpf;
71 	};
72 	struct stmmac_tx_info *tx_skbuff_dma;
73 	struct xsk_buff_pool *xsk_pool;
74 	u32 xsk_frames_done;
75 	unsigned int cur_tx;
76 	unsigned int dirty_tx;
77 	dma_addr_t dma_tx_phy;
78 	dma_addr_t tx_tail_addr;
79 	u32 mss;
80 };
81 
82 struct stmmac_rx_buffer {
83 	union {
84 		struct {
85 			struct page *page;
86 			dma_addr_t addr;
87 			__u32 page_offset;
88 		};
89 		struct xdp_buff *xdp;
90 	};
91 	struct page *sec_page;
92 	dma_addr_t sec_addr;
93 };
94 
95 struct stmmac_rx_queue {
96 	u32 rx_count_frames;
97 	u32 queue_index;
98 	struct xdp_rxq_info xdp_rxq;
99 	struct xsk_buff_pool *xsk_pool;
100 	struct page_pool *page_pool;
101 	struct stmmac_rx_buffer *buf_pool;
102 	struct stmmac_priv *priv_data;
103 	struct dma_extended_desc *dma_erx;
104 	struct dma_desc *dma_rx ____cacheline_aligned_in_smp;
105 	unsigned int cur_rx;
106 	unsigned int dirty_rx;
107 	unsigned int buf_alloc_num;
108 	u32 rx_zeroc_thresh;
109 	dma_addr_t dma_rx_phy;
110 	u32 rx_tail_addr;
111 	unsigned int state_saved;
112 	struct {
113 		struct sk_buff *skb;
114 		unsigned int len;
115 		unsigned int error;
116 	} state;
117 };
118 
119 struct stmmac_channel {
120 	struct napi_struct rx_napi ____cacheline_aligned_in_smp;
121 	struct napi_struct tx_napi ____cacheline_aligned_in_smp;
122 	struct napi_struct rxtx_napi ____cacheline_aligned_in_smp;
123 	struct stmmac_priv *priv_data;
124 	spinlock_t lock;
125 	u32 index;
126 };
127 
128 struct stmmac_tc_entry {
129 	bool in_use;
130 	bool in_hw;
131 	bool is_last;
132 	bool is_frag;
133 	void *frag_ptr;
134 	unsigned int table_pos;
135 	u32 handle;
136 	u32 prio;
137 	struct {
138 		u32 match_data;
139 		u32 match_en;
140 		u8 af:1;
141 		u8 rf:1;
142 		u8 im:1;
143 		u8 nc:1;
144 		u8 res1:4;
145 		u8 frame_offset;
146 		u8 ok_index;
147 		u8 dma_ch_no;
148 		u32 res2;
149 	} __packed val;
150 };
151 
152 #define STMMAC_PPS_MAX		4
153 struct stmmac_pps_cfg {
154 	bool available;
155 	struct timespec64 start;
156 	struct timespec64 period;
157 };
158 
159 struct stmmac_rss {
160 	int enable;
161 	u8 key[STMMAC_RSS_HASH_KEY_SIZE];
162 	u32 table[STMMAC_RSS_MAX_TABLE_SIZE];
163 };
164 
165 #define STMMAC_FLOW_ACTION_DROP		BIT(0)
166 struct stmmac_flow_entry {
167 	unsigned long cookie;
168 	unsigned long action;
169 	u8 ip_proto;
170 	int in_use;
171 	int idx;
172 	int is_l4;
173 };
174 
175 /* Rx Frame Steering */
176 enum stmmac_rfs_type {
177 	STMMAC_RFS_T_VLAN,
178 	STMMAC_RFS_T_LLDP,
179 	STMMAC_RFS_T_1588,
180 	STMMAC_RFS_T_MAX,
181 };
182 
183 struct stmmac_rfs_entry {
184 	unsigned long cookie;
185 	u16 etype;
186 	int in_use;
187 	int type;
188 	int tc;
189 };
190 
191 struct stmmac_dma_conf {
192 	unsigned int dma_buf_sz;
193 
194 	/* RX Queue */
195 	struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES];
196 	unsigned int dma_rx_size;
197 
198 	/* TX Queue */
199 	struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES];
200 	unsigned int dma_tx_size;
201 };
202 
203 struct stmmac_priv {
204 	/* Frequently used values are kept adjacent for cache effect */
205 	u32 tx_coal_frames[MTL_MAX_TX_QUEUES];
206 	u32 tx_coal_timer[MTL_MAX_TX_QUEUES];
207 	u32 rx_coal_frames[MTL_MAX_TX_QUEUES];
208 
209 	int hwts_tx_en;
210 	bool tx_path_in_lpi_mode;
211 	bool tso;
212 	int sph;
213 	int sph_cap;
214 	u32 sarc_type;
215 
216 	unsigned int rx_copybreak;
217 	u32 rx_riwt[MTL_MAX_TX_QUEUES];
218 	int hwts_rx_en;
219 
220 	void __iomem *ioaddr;
221 	struct net_device *dev;
222 	struct device *device;
223 	struct mac_device_info *hw;
224 	int (*hwif_quirks)(struct stmmac_priv *priv);
225 	struct mutex lock;
226 
227 	struct stmmac_dma_conf dma_conf;
228 
229 	/* Generic channel for NAPI */
230 	struct stmmac_channel channel[STMMAC_CH_MAX];
231 
232 	int speed;
233 	unsigned int flow_ctrl;
234 	unsigned int pause;
235 	struct mii_bus *mii;
236 
237 	struct phylink_config phylink_config;
238 	struct phylink *phylink;
239 
240 	struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp;
241 	struct stmmac_safety_stats sstats;
242 	struct plat_stmmacenet_data *plat;
243 	struct dma_features dma_cap;
244 	struct stmmac_counters mmc;
245 	int hw_cap_support;
246 	int synopsys_id;
247 	u32 msg_enable;
248 	int wolopts;
249 	int wol_irq;
250 	int clk_csr;
251 	struct timer_list eee_ctrl_timer;
252 	int lpi_irq;
253 	int eee_enabled;
254 	int eee_active;
255 	int tx_lpi_timer;
256 	int tx_lpi_enabled;
257 	int eee_tw_timer;
258 	bool eee_sw_timer_en;
259 	unsigned int mode;
260 	unsigned int chain_mode;
261 	int extend_desc;
262 	struct hwtstamp_config tstamp_config;
263 	struct ptp_clock *ptp_clock;
264 	struct ptp_clock_info ptp_clock_ops;
265 	unsigned int default_addend;
266 	u32 sub_second_inc;
267 	u32 systime_flags;
268 	u32 adv_ts;
269 	int use_riwt;
270 	int irq_wake;
271 	rwlock_t ptp_lock;
272 	/* Protects auxiliary snapshot registers from concurrent access. */
273 	struct mutex aux_ts_lock;
274 	wait_queue_head_t tstamp_busy_wait;
275 
276 	void __iomem *mmcaddr;
277 	void __iomem *ptpaddr;
278 	unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
279 	int sfty_ce_irq;
280 	int sfty_ue_irq;
281 	int rx_irq[MTL_MAX_RX_QUEUES];
282 	int tx_irq[MTL_MAX_TX_QUEUES];
283 	/*irq name */
284 	char int_name_mac[IFNAMSIZ + 9];
285 	char int_name_wol[IFNAMSIZ + 9];
286 	char int_name_lpi[IFNAMSIZ + 9];
287 	char int_name_sfty_ce[IFNAMSIZ + 10];
288 	char int_name_sfty_ue[IFNAMSIZ + 10];
289 	char int_name_rx_irq[MTL_MAX_TX_QUEUES][IFNAMSIZ + 14];
290 	char int_name_tx_irq[MTL_MAX_TX_QUEUES][IFNAMSIZ + 18];
291 
292 #ifdef CONFIG_DEBUG_FS
293 	struct dentry *dbgfs_dir;
294 #endif
295 
296 	unsigned long state;
297 	struct workqueue_struct *wq;
298 	struct work_struct service_task;
299 
300 	/* Workqueue for handling FPE hand-shaking */
301 	unsigned long fpe_task_state;
302 	struct workqueue_struct *fpe_wq;
303 	struct work_struct fpe_task;
304 	char wq_name[IFNAMSIZ + 4];
305 
306 	/* TC Handling */
307 	unsigned int tc_entries_max;
308 	unsigned int tc_off_max;
309 	struct stmmac_tc_entry *tc_entries;
310 	unsigned int flow_entries_max;
311 	struct stmmac_flow_entry *flow_entries;
312 	unsigned int rfs_entries_max[STMMAC_RFS_T_MAX];
313 	unsigned int rfs_entries_cnt[STMMAC_RFS_T_MAX];
314 	unsigned int rfs_entries_total;
315 	struct stmmac_rfs_entry *rfs_entries;
316 
317 	/* Pulse Per Second output */
318 	struct stmmac_pps_cfg pps[STMMAC_PPS_MAX];
319 
320 	/* Receive Side Scaling */
321 	struct stmmac_rss rss;
322 
323 	/* XDP BPF Program */
324 	unsigned long *af_xdp_zc_qps;
325 	struct bpf_prog *xdp_prog;
326 };
327 
328 enum stmmac_state {
329 	STMMAC_DOWN,
330 	STMMAC_RESET_REQUESTED,
331 	STMMAC_RESETING,
332 	STMMAC_SERVICE_SCHED,
333 };
334 
335 int stmmac_mdio_unregister(struct net_device *ndev);
336 int stmmac_mdio_register(struct net_device *ndev);
337 int stmmac_mdio_reset(struct mii_bus *mii);
338 int stmmac_xpcs_setup(struct mii_bus *mii);
339 void stmmac_set_ethtool_ops(struct net_device *netdev);
340 
341 int stmmac_init_tstamp_counter(struct stmmac_priv *priv, u32 systime_flags);
342 void stmmac_ptp_register(struct stmmac_priv *priv);
343 void stmmac_ptp_unregister(struct stmmac_priv *priv);
344 int stmmac_xdp_open(struct net_device *dev);
345 void stmmac_xdp_release(struct net_device *dev);
346 int stmmac_resume(struct device *dev);
347 int stmmac_suspend(struct device *dev);
348 int stmmac_dvr_remove(struct device *dev);
349 int stmmac_dvr_probe(struct device *device,
350 		     struct plat_stmmacenet_data *plat_dat,
351 		     struct stmmac_resources *res);
352 void stmmac_disable_eee_mode(struct stmmac_priv *priv);
353 bool stmmac_eee_init(struct stmmac_priv *priv);
354 int stmmac_reinit_queues(struct net_device *dev, u32 rx_cnt, u32 tx_cnt);
355 int stmmac_reinit_ringparam(struct net_device *dev, u32 rx_size, u32 tx_size);
356 int stmmac_bus_clks_config(struct stmmac_priv *priv, bool enabled);
357 void stmmac_fpe_handshake(struct stmmac_priv *priv, bool enable);
358 
stmmac_xdp_is_enabled(struct stmmac_priv * priv)359 static inline bool stmmac_xdp_is_enabled(struct stmmac_priv *priv)
360 {
361 	return !!priv->xdp_prog;
362 }
363 
stmmac_rx_offset(struct stmmac_priv * priv)364 static inline unsigned int stmmac_rx_offset(struct stmmac_priv *priv)
365 {
366 	if (stmmac_xdp_is_enabled(priv))
367 		return XDP_PACKET_HEADROOM;
368 
369 	return 0;
370 }
371 
372 void stmmac_disable_rx_queue(struct stmmac_priv *priv, u32 queue);
373 void stmmac_enable_rx_queue(struct stmmac_priv *priv, u32 queue);
374 void stmmac_disable_tx_queue(struct stmmac_priv *priv, u32 queue);
375 void stmmac_enable_tx_queue(struct stmmac_priv *priv, u32 queue);
376 int stmmac_xsk_wakeup(struct net_device *dev, u32 queue, u32 flags);
377 struct timespec64 stmmac_calc_tas_basetime(ktime_t old_base_time,
378 					   ktime_t current_time,
379 					   u64 cycle_time);
380 
381 #if IS_ENABLED(CONFIG_STMMAC_SELFTESTS)
382 void stmmac_selftest_run(struct net_device *dev,
383 			 struct ethtool_test *etest, u64 *buf);
384 void stmmac_selftest_get_strings(struct stmmac_priv *priv, u8 *data);
385 int stmmac_selftest_get_count(struct stmmac_priv *priv);
386 #else
stmmac_selftest_run(struct net_device * dev,struct ethtool_test * etest,u64 * buf)387 static inline void stmmac_selftest_run(struct net_device *dev,
388 				       struct ethtool_test *etest, u64 *buf)
389 {
390 	/* Not enabled */
391 }
stmmac_selftest_get_strings(struct stmmac_priv * priv,u8 * data)392 static inline void stmmac_selftest_get_strings(struct stmmac_priv *priv,
393 					       u8 *data)
394 {
395 	/* Not enabled */
396 }
stmmac_selftest_get_count(struct stmmac_priv * priv)397 static inline int stmmac_selftest_get_count(struct stmmac_priv *priv)
398 {
399 	return -EOPNOTSUPP;
400 }
401 #endif /* CONFIG_STMMAC_SELFTESTS */
402 
403 #endif /* __STMMAC_H__ */
404