1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*******************************************************************************
3   Copyright (C) 2007-2009  STMicroelectronics Ltd
4 
5 
6   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
7 *******************************************************************************/
8 
9 #ifndef __STMMAC_H__
10 #define __STMMAC_H__
11 
12 #define STMMAC_RESOURCE_NAME   "stmmaceth"
13 
14 #include <linux/clk.h>
15 #include <linux/hrtimer.h>
16 #include <linux/if_vlan.h>
17 #include <linux/stmmac.h>
18 #include <linux/phylink.h>
19 #include <linux/pci.h>
20 #include "common.h"
21 #include <linux/ptp_clock_kernel.h>
22 #include <linux/net_tstamp.h>
23 #include <linux/reset.h>
24 #include <net/page_pool.h>
25 #include <uapi/linux/bpf.h>
26 
27 struct stmmac_resources {
28 	void __iomem *addr;
29 	u8 mac[ETH_ALEN];
30 	int wol_irq;
31 	int lpi_irq;
32 	int irq;
33 	int sfty_ce_irq;
34 	int sfty_ue_irq;
35 	int rx_irq[MTL_MAX_RX_QUEUES];
36 	int tx_irq[MTL_MAX_TX_QUEUES];
37 };
38 
39 enum stmmac_txbuf_type {
40 	STMMAC_TXBUF_T_SKB,
41 	STMMAC_TXBUF_T_XDP_TX,
42 	STMMAC_TXBUF_T_XDP_NDO,
43 	STMMAC_TXBUF_T_XSK_TX,
44 };
45 
46 struct stmmac_tx_info {
47 	dma_addr_t buf;
48 	bool map_as_page;
49 	unsigned len;
50 	bool last_segment;
51 	bool is_jumbo;
52 	enum stmmac_txbuf_type buf_type;
53 };
54 
55 #define STMMAC_TBS_AVAIL	BIT(0)
56 #define STMMAC_TBS_EN		BIT(1)
57 
58 /* Frequently used values are kept adjacent for cache effect */
59 struct stmmac_tx_queue {
60 	u32 tx_count_frames;
61 	int tbs;
62 	struct hrtimer txtimer;
63 	u32 queue_index;
64 	struct stmmac_priv *priv_data;
65 	struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp;
66 	struct dma_edesc *dma_entx;
67 	struct dma_desc *dma_tx;
68 	union {
69 		struct sk_buff **tx_skbuff;
70 		struct xdp_frame **xdpf;
71 	};
72 	struct stmmac_tx_info *tx_skbuff_dma;
73 	struct xsk_buff_pool *xsk_pool;
74 	u32 xsk_frames_done;
75 	unsigned int cur_tx;
76 	unsigned int dirty_tx;
77 	dma_addr_t dma_tx_phy;
78 	dma_addr_t tx_tail_addr;
79 	u32 mss;
80 };
81 
82 struct stmmac_rx_buffer {
83 	union {
84 		struct {
85 			struct page *page;
86 			dma_addr_t addr;
87 			__u32 page_offset;
88 		};
89 		struct xdp_buff *xdp;
90 	};
91 	struct page *sec_page;
92 	dma_addr_t sec_addr;
93 };
94 
95 struct stmmac_rx_queue {
96 	u32 rx_count_frames;
97 	u32 queue_index;
98 	struct xdp_rxq_info xdp_rxq;
99 	struct xsk_buff_pool *xsk_pool;
100 	struct page_pool *page_pool;
101 	struct stmmac_rx_buffer *buf_pool;
102 	struct stmmac_priv *priv_data;
103 	struct dma_extended_desc *dma_erx;
104 	struct dma_desc *dma_rx ____cacheline_aligned_in_smp;
105 	unsigned int cur_rx;
106 	unsigned int dirty_rx;
107 	unsigned int buf_alloc_num;
108 	u32 rx_zeroc_thresh;
109 	dma_addr_t dma_rx_phy;
110 	u32 rx_tail_addr;
111 	unsigned int state_saved;
112 	struct {
113 		struct sk_buff *skb;
114 		unsigned int len;
115 		unsigned int error;
116 	} state;
117 };
118 
119 struct stmmac_channel {
120 	struct napi_struct rx_napi ____cacheline_aligned_in_smp;
121 	struct napi_struct tx_napi ____cacheline_aligned_in_smp;
122 	struct napi_struct rxtx_napi ____cacheline_aligned_in_smp;
123 	struct stmmac_priv *priv_data;
124 	spinlock_t lock;
125 	u32 index;
126 };
127 
128 struct stmmac_tc_entry {
129 	bool in_use;
130 	bool in_hw;
131 	bool is_last;
132 	bool is_frag;
133 	void *frag_ptr;
134 	unsigned int table_pos;
135 	u32 handle;
136 	u32 prio;
137 	struct {
138 		u32 match_data;
139 		u32 match_en;
140 		u8 af:1;
141 		u8 rf:1;
142 		u8 im:1;
143 		u8 nc:1;
144 		u8 res1:4;
145 		u8 frame_offset;
146 		u8 ok_index;
147 		u8 dma_ch_no;
148 		u32 res2;
149 	} __packed val;
150 };
151 
152 #define STMMAC_PPS_MAX		4
153 struct stmmac_pps_cfg {
154 	bool available;
155 	struct timespec64 start;
156 	struct timespec64 period;
157 };
158 
159 struct stmmac_rss {
160 	int enable;
161 	u8 key[STMMAC_RSS_HASH_KEY_SIZE];
162 	u32 table[STMMAC_RSS_MAX_TABLE_SIZE];
163 };
164 
165 #define STMMAC_FLOW_ACTION_DROP		BIT(0)
166 struct stmmac_flow_entry {
167 	unsigned long cookie;
168 	unsigned long action;
169 	u8 ip_proto;
170 	int in_use;
171 	int idx;
172 	int is_l4;
173 };
174 
175 /* Rx Frame Steering */
176 enum stmmac_rfs_type {
177 	STMMAC_RFS_T_VLAN,
178 	STMMAC_RFS_T_LLDP,
179 	STMMAC_RFS_T_1588,
180 	STMMAC_RFS_T_MAX,
181 };
182 
183 struct stmmac_rfs_entry {
184 	unsigned long cookie;
185 	u16 etype;
186 	int in_use;
187 	int type;
188 	int tc;
189 };
190 
191 struct stmmac_priv {
192 	/* Frequently used values are kept adjacent for cache effect */
193 	u32 tx_coal_frames[MTL_MAX_TX_QUEUES];
194 	u32 tx_coal_timer[MTL_MAX_TX_QUEUES];
195 	u32 rx_coal_frames[MTL_MAX_TX_QUEUES];
196 
197 	int hwts_tx_en;
198 	bool tx_path_in_lpi_mode;
199 	bool tso;
200 	int sph;
201 	int sph_cap;
202 	u32 sarc_type;
203 
204 	unsigned int dma_buf_sz;
205 	unsigned int rx_copybreak;
206 	u32 rx_riwt[MTL_MAX_TX_QUEUES];
207 	int hwts_rx_en;
208 
209 	void __iomem *ioaddr;
210 	struct net_device *dev;
211 	struct device *device;
212 	struct mac_device_info *hw;
213 	int (*hwif_quirks)(struct stmmac_priv *priv);
214 	struct mutex lock;
215 
216 	/* RX Queue */
217 	struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES];
218 	unsigned int dma_rx_size;
219 
220 	/* TX Queue */
221 	struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES];
222 	unsigned int dma_tx_size;
223 
224 	/* Generic channel for NAPI */
225 	struct stmmac_channel channel[STMMAC_CH_MAX];
226 
227 	int speed;
228 	unsigned int flow_ctrl;
229 	unsigned int pause;
230 	struct mii_bus *mii;
231 
232 	struct phylink_config phylink_config;
233 	struct phylink *phylink;
234 
235 	struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp;
236 	struct stmmac_safety_stats sstats;
237 	struct plat_stmmacenet_data *plat;
238 	struct dma_features dma_cap;
239 	struct stmmac_counters mmc;
240 	int hw_cap_support;
241 	int synopsys_id;
242 	u32 msg_enable;
243 	int wolopts;
244 	int wol_irq;
245 	int clk_csr;
246 	struct timer_list eee_ctrl_timer;
247 	int lpi_irq;
248 	int eee_enabled;
249 	int eee_active;
250 	int tx_lpi_timer;
251 	int tx_lpi_enabled;
252 	int eee_tw_timer;
253 	bool eee_sw_timer_en;
254 	unsigned int mode;
255 	unsigned int chain_mode;
256 	int extend_desc;
257 	struct hwtstamp_config tstamp_config;
258 	struct ptp_clock *ptp_clock;
259 	struct ptp_clock_info ptp_clock_ops;
260 	unsigned int default_addend;
261 	u32 sub_second_inc;
262 	u32 systime_flags;
263 	u32 adv_ts;
264 	int use_riwt;
265 	int irq_wake;
266 	rwlock_t ptp_lock;
267 	/* Protects auxiliary snapshot registers from concurrent access. */
268 	struct mutex aux_ts_lock;
269 	wait_queue_head_t tstamp_busy_wait;
270 
271 	void __iomem *mmcaddr;
272 	void __iomem *ptpaddr;
273 	unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
274 	int sfty_ce_irq;
275 	int sfty_ue_irq;
276 	int rx_irq[MTL_MAX_RX_QUEUES];
277 	int tx_irq[MTL_MAX_TX_QUEUES];
278 	/*irq name */
279 	char int_name_mac[IFNAMSIZ + 9];
280 	char int_name_wol[IFNAMSIZ + 9];
281 	char int_name_lpi[IFNAMSIZ + 9];
282 	char int_name_sfty_ce[IFNAMSIZ + 10];
283 	char int_name_sfty_ue[IFNAMSIZ + 10];
284 	char int_name_rx_irq[MTL_MAX_TX_QUEUES][IFNAMSIZ + 14];
285 	char int_name_tx_irq[MTL_MAX_TX_QUEUES][IFNAMSIZ + 18];
286 
287 #ifdef CONFIG_DEBUG_FS
288 	struct dentry *dbgfs_dir;
289 #endif
290 
291 	unsigned long state;
292 	struct workqueue_struct *wq;
293 	struct work_struct service_task;
294 
295 	/* Workqueue for handling FPE hand-shaking */
296 	unsigned long fpe_task_state;
297 	struct workqueue_struct *fpe_wq;
298 	struct work_struct fpe_task;
299 	char wq_name[IFNAMSIZ + 4];
300 
301 	/* TC Handling */
302 	unsigned int tc_entries_max;
303 	unsigned int tc_off_max;
304 	struct stmmac_tc_entry *tc_entries;
305 	unsigned int flow_entries_max;
306 	struct stmmac_flow_entry *flow_entries;
307 	unsigned int rfs_entries_max[STMMAC_RFS_T_MAX];
308 	unsigned int rfs_entries_cnt[STMMAC_RFS_T_MAX];
309 	unsigned int rfs_entries_total;
310 	struct stmmac_rfs_entry *rfs_entries;
311 
312 	/* Pulse Per Second output */
313 	struct stmmac_pps_cfg pps[STMMAC_PPS_MAX];
314 
315 	/* Receive Side Scaling */
316 	struct stmmac_rss rss;
317 
318 	/* XDP BPF Program */
319 	unsigned long *af_xdp_zc_qps;
320 	struct bpf_prog *xdp_prog;
321 };
322 
323 enum stmmac_state {
324 	STMMAC_DOWN,
325 	STMMAC_RESET_REQUESTED,
326 	STMMAC_RESETING,
327 	STMMAC_SERVICE_SCHED,
328 };
329 
330 int stmmac_mdio_unregister(struct net_device *ndev);
331 int stmmac_mdio_register(struct net_device *ndev);
332 int stmmac_mdio_reset(struct mii_bus *mii);
333 int stmmac_xpcs_setup(struct mii_bus *mii);
334 void stmmac_set_ethtool_ops(struct net_device *netdev);
335 
336 int stmmac_init_tstamp_counter(struct stmmac_priv *priv, u32 systime_flags);
337 void stmmac_ptp_register(struct stmmac_priv *priv);
338 void stmmac_ptp_unregister(struct stmmac_priv *priv);
339 int stmmac_xdp_open(struct net_device *dev);
340 void stmmac_xdp_release(struct net_device *dev);
341 int stmmac_resume(struct device *dev);
342 int stmmac_suspend(struct device *dev);
343 int stmmac_dvr_remove(struct device *dev);
344 int stmmac_dvr_probe(struct device *device,
345 		     struct plat_stmmacenet_data *plat_dat,
346 		     struct stmmac_resources *res);
347 void stmmac_disable_eee_mode(struct stmmac_priv *priv);
348 bool stmmac_eee_init(struct stmmac_priv *priv);
349 int stmmac_reinit_queues(struct net_device *dev, u32 rx_cnt, u32 tx_cnt);
350 int stmmac_reinit_ringparam(struct net_device *dev, u32 rx_size, u32 tx_size);
351 int stmmac_bus_clks_config(struct stmmac_priv *priv, bool enabled);
352 void stmmac_fpe_handshake(struct stmmac_priv *priv, bool enable);
353 
stmmac_xdp_is_enabled(struct stmmac_priv * priv)354 static inline bool stmmac_xdp_is_enabled(struct stmmac_priv *priv)
355 {
356 	return !!priv->xdp_prog;
357 }
358 
stmmac_rx_offset(struct stmmac_priv * priv)359 static inline unsigned int stmmac_rx_offset(struct stmmac_priv *priv)
360 {
361 	if (stmmac_xdp_is_enabled(priv))
362 		return XDP_PACKET_HEADROOM;
363 
364 	return 0;
365 }
366 
367 void stmmac_disable_rx_queue(struct stmmac_priv *priv, u32 queue);
368 void stmmac_enable_rx_queue(struct stmmac_priv *priv, u32 queue);
369 void stmmac_disable_tx_queue(struct stmmac_priv *priv, u32 queue);
370 void stmmac_enable_tx_queue(struct stmmac_priv *priv, u32 queue);
371 int stmmac_xsk_wakeup(struct net_device *dev, u32 queue, u32 flags);
372 struct timespec64 stmmac_calc_tas_basetime(ktime_t old_base_time,
373 					   ktime_t current_time,
374 					   u64 cycle_time);
375 
376 #if IS_ENABLED(CONFIG_STMMAC_SELFTESTS)
377 void stmmac_selftest_run(struct net_device *dev,
378 			 struct ethtool_test *etest, u64 *buf);
379 void stmmac_selftest_get_strings(struct stmmac_priv *priv, u8 *data);
380 int stmmac_selftest_get_count(struct stmmac_priv *priv);
381 #else
stmmac_selftest_run(struct net_device * dev,struct ethtool_test * etest,u64 * buf)382 static inline void stmmac_selftest_run(struct net_device *dev,
383 				       struct ethtool_test *etest, u64 *buf)
384 {
385 	/* Not enabled */
386 }
stmmac_selftest_get_strings(struct stmmac_priv * priv,u8 * data)387 static inline void stmmac_selftest_get_strings(struct stmmac_priv *priv,
388 					       u8 *data)
389 {
390 	/* Not enabled */
391 }
stmmac_selftest_get_count(struct stmmac_priv * priv)392 static inline int stmmac_selftest_get_count(struct stmmac_priv *priv)
393 {
394 	return -EOPNOTSUPP;
395 }
396 #endif /* CONFIG_STMMAC_SELFTESTS */
397 
398 #endif /* __STMMAC_H__ */
399