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Searched defs:regSDMA0_QUEUE0_MIDCMD_DATA0 (Results 1 – 2 of 2) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_11_0_0_offset.h252 #define regSDMA0_QUEUE0_MIDCMD_DATA0 macro
Dgc_11_0_3_offset.h258 #define regSDMA0_QUEUE0_MIDCMD_DATA0 macro