1 /*
2  * Copyright 2008 Advanced Micro Devices, Inc.
3  * Copyright 2008 Red Hat Inc.
4  * Copyright 2009 Jerome Glisse.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors: Dave Airlie
25  *          Alex Deucher
26  *          Jerome Glisse
27  */
28 #include "drmP.h"
29 #include "drm.h"
30 #include "radeon_drm.h"
31 #include "radeon.h"
32 
radeon_gem_object_init(struct drm_gem_object * obj)33 int radeon_gem_object_init(struct drm_gem_object *obj)
34 {
35 	BUG();
36 
37 	return 0;
38 }
39 
radeon_gem_object_free(struct drm_gem_object * gobj)40 void radeon_gem_object_free(struct drm_gem_object *gobj)
41 {
42 	struct radeon_bo *robj = gem_to_radeon_bo(gobj);
43 
44 	if (robj) {
45 		radeon_bo_unref(&robj);
46 	}
47 }
48 
radeon_gem_object_create(struct radeon_device * rdev,int size,int alignment,int initial_domain,bool discardable,bool kernel,struct drm_gem_object ** obj)49 int radeon_gem_object_create(struct radeon_device *rdev, int size,
50 				int alignment, int initial_domain,
51 				bool discardable, bool kernel,
52 				struct drm_gem_object **obj)
53 {
54 	struct radeon_bo *robj;
55 	int r;
56 
57 	*obj = NULL;
58 	/* At least align on page size */
59 	if (alignment < PAGE_SIZE) {
60 		alignment = PAGE_SIZE;
61 	}
62 	r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, &robj);
63 	if (r) {
64 		if (r != -ERESTARTSYS)
65 			DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",
66 				  size, initial_domain, alignment, r);
67 		return r;
68 	}
69 	*obj = &robj->gem_base;
70 
71 	mutex_lock(&rdev->gem.mutex);
72 	list_add_tail(&robj->list, &rdev->gem.objects);
73 	mutex_unlock(&rdev->gem.mutex);
74 
75 	return 0;
76 }
77 
radeon_gem_object_pin(struct drm_gem_object * obj,uint32_t pin_domain,uint64_t * gpu_addr)78 int radeon_gem_object_pin(struct drm_gem_object *obj, uint32_t pin_domain,
79 			  uint64_t *gpu_addr)
80 {
81 	struct radeon_bo *robj = gem_to_radeon_bo(obj);
82 	int r;
83 
84 	r = radeon_bo_reserve(robj, false);
85 	if (unlikely(r != 0))
86 		return r;
87 	r = radeon_bo_pin(robj, pin_domain, gpu_addr);
88 	radeon_bo_unreserve(robj);
89 	return r;
90 }
91 
radeon_gem_object_unpin(struct drm_gem_object * obj)92 void radeon_gem_object_unpin(struct drm_gem_object *obj)
93 {
94 	struct radeon_bo *robj = gem_to_radeon_bo(obj);
95 	int r;
96 
97 	r = radeon_bo_reserve(robj, false);
98 	if (likely(r == 0)) {
99 		radeon_bo_unpin(robj);
100 		radeon_bo_unreserve(robj);
101 	}
102 }
103 
radeon_gem_set_domain(struct drm_gem_object * gobj,uint32_t rdomain,uint32_t wdomain)104 int radeon_gem_set_domain(struct drm_gem_object *gobj,
105 			  uint32_t rdomain, uint32_t wdomain)
106 {
107 	struct radeon_bo *robj;
108 	uint32_t domain;
109 	int r;
110 
111 	/* FIXME: reeimplement */
112 	robj = gem_to_radeon_bo(gobj);
113 	/* work out where to validate the buffer to */
114 	domain = wdomain;
115 	if (!domain) {
116 		domain = rdomain;
117 	}
118 	if (!domain) {
119 		/* Do nothings */
120 		printk(KERN_WARNING "Set domain withou domain !\n");
121 		return 0;
122 	}
123 	if (domain == RADEON_GEM_DOMAIN_CPU) {
124 		/* Asking for cpu access wait for object idle */
125 		r = radeon_bo_wait(robj, NULL, false);
126 		if (r) {
127 			printk(KERN_ERR "Failed to wait for object !\n");
128 			return r;
129 		}
130 	}
131 	return 0;
132 }
133 
radeon_gem_init(struct radeon_device * rdev)134 int radeon_gem_init(struct radeon_device *rdev)
135 {
136 	INIT_LIST_HEAD(&rdev->gem.objects);
137 	return 0;
138 }
139 
radeon_gem_fini(struct radeon_device * rdev)140 void radeon_gem_fini(struct radeon_device *rdev)
141 {
142 	radeon_bo_force_delete(rdev);
143 }
144 
145 
146 /*
147  * GEM ioctls.
148  */
radeon_gem_info_ioctl(struct drm_device * dev,void * data,struct drm_file * filp)149 int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
150 			  struct drm_file *filp)
151 {
152 	struct radeon_device *rdev = dev->dev_private;
153 	struct drm_radeon_gem_info *args = data;
154 	struct ttm_mem_type_manager *man;
155 
156 	man = &rdev->mman.bdev.man[TTM_PL_VRAM];
157 
158 	args->vram_size = rdev->mc.real_vram_size;
159 	args->vram_visible = (u64)man->size << PAGE_SHIFT;
160 	if (rdev->stollen_vga_memory)
161 		args->vram_visible -= radeon_bo_size(rdev->stollen_vga_memory);
162 	args->vram_visible -= radeon_fbdev_total_size(rdev);
163 	args->gart_size = rdev->mc.gtt_size - rdev->cp.ring_size - 4096 -
164 		RADEON_IB_POOL_SIZE*64*1024;
165 	return 0;
166 }
167 
radeon_gem_pread_ioctl(struct drm_device * dev,void * data,struct drm_file * filp)168 int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
169 			   struct drm_file *filp)
170 {
171 	/* TODO: implement */
172 	DRM_ERROR("unimplemented %s\n", __func__);
173 	return -ENOSYS;
174 }
175 
radeon_gem_pwrite_ioctl(struct drm_device * dev,void * data,struct drm_file * filp)176 int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
177 			    struct drm_file *filp)
178 {
179 	/* TODO: implement */
180 	DRM_ERROR("unimplemented %s\n", __func__);
181 	return -ENOSYS;
182 }
183 
radeon_gem_create_ioctl(struct drm_device * dev,void * data,struct drm_file * filp)184 int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
185 			    struct drm_file *filp)
186 {
187 	struct radeon_device *rdev = dev->dev_private;
188 	struct drm_radeon_gem_create *args = data;
189 	struct drm_gem_object *gobj;
190 	uint32_t handle;
191 	int r;
192 
193 	/* create a gem object to contain this object in */
194 	args->size = roundup(args->size, PAGE_SIZE);
195 	r = radeon_gem_object_create(rdev, args->size, args->alignment,
196 					args->initial_domain, false,
197 					false, &gobj);
198 	if (r) {
199 		return r;
200 	}
201 	r = drm_gem_handle_create(filp, gobj, &handle);
202 	/* drop reference from allocate - handle holds it now */
203 	drm_gem_object_unreference_unlocked(gobj);
204 	if (r) {
205 		return r;
206 	}
207 	args->handle = handle;
208 	return 0;
209 }
210 
radeon_gem_set_domain_ioctl(struct drm_device * dev,void * data,struct drm_file * filp)211 int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
212 				struct drm_file *filp)
213 {
214 	/* transition the BO to a domain -
215 	 * just validate the BO into a certain domain */
216 	struct drm_radeon_gem_set_domain *args = data;
217 	struct drm_gem_object *gobj;
218 	struct radeon_bo *robj;
219 	int r;
220 
221 	/* for now if someone requests domain CPU -
222 	 * just make sure the buffer is finished with */
223 
224 	/* just do a BO wait for now */
225 	gobj = drm_gem_object_lookup(dev, filp, args->handle);
226 	if (gobj == NULL) {
227 		return -ENOENT;
228 	}
229 	robj = gem_to_radeon_bo(gobj);
230 
231 	r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
232 
233 	drm_gem_object_unreference_unlocked(gobj);
234 	return r;
235 }
236 
radeon_mode_dumb_mmap(struct drm_file * filp,struct drm_device * dev,uint32_t handle,uint64_t * offset_p)237 int radeon_mode_dumb_mmap(struct drm_file *filp,
238 			  struct drm_device *dev,
239 			  uint32_t handle, uint64_t *offset_p)
240 {
241 	struct drm_gem_object *gobj;
242 	struct radeon_bo *robj;
243 
244 	gobj = drm_gem_object_lookup(dev, filp, handle);
245 	if (gobj == NULL) {
246 		return -ENOENT;
247 	}
248 	robj = gem_to_radeon_bo(gobj);
249 	*offset_p = radeon_bo_mmap_offset(robj);
250 	drm_gem_object_unreference_unlocked(gobj);
251 	return 0;
252 }
253 
radeon_gem_mmap_ioctl(struct drm_device * dev,void * data,struct drm_file * filp)254 int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
255 			  struct drm_file *filp)
256 {
257 	struct drm_radeon_gem_mmap *args = data;
258 
259 	return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
260 }
261 
radeon_gem_busy_ioctl(struct drm_device * dev,void * data,struct drm_file * filp)262 int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
263 			  struct drm_file *filp)
264 {
265 	struct drm_radeon_gem_busy *args = data;
266 	struct drm_gem_object *gobj;
267 	struct radeon_bo *robj;
268 	int r;
269 	uint32_t cur_placement = 0;
270 
271 	gobj = drm_gem_object_lookup(dev, filp, args->handle);
272 	if (gobj == NULL) {
273 		return -ENOENT;
274 	}
275 	robj = gem_to_radeon_bo(gobj);
276 	r = radeon_bo_wait(robj, &cur_placement, true);
277 	switch (cur_placement) {
278 	case TTM_PL_VRAM:
279 		args->domain = RADEON_GEM_DOMAIN_VRAM;
280 		break;
281 	case TTM_PL_TT:
282 		args->domain = RADEON_GEM_DOMAIN_GTT;
283 		break;
284 	case TTM_PL_SYSTEM:
285 		args->domain = RADEON_GEM_DOMAIN_CPU;
286 	default:
287 		break;
288 	}
289 	drm_gem_object_unreference_unlocked(gobj);
290 	return r;
291 }
292 
radeon_gem_wait_idle_ioctl(struct drm_device * dev,void * data,struct drm_file * filp)293 int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
294 			      struct drm_file *filp)
295 {
296 	struct drm_radeon_gem_wait_idle *args = data;
297 	struct drm_gem_object *gobj;
298 	struct radeon_bo *robj;
299 	int r;
300 
301 	gobj = drm_gem_object_lookup(dev, filp, args->handle);
302 	if (gobj == NULL) {
303 		return -ENOENT;
304 	}
305 	robj = gem_to_radeon_bo(gobj);
306 	r = radeon_bo_wait(robj, NULL, false);
307 	/* callback hw specific functions if any */
308 	if (robj->rdev->asic->ioctl_wait_idle)
309 		robj->rdev->asic->ioctl_wait_idle(robj->rdev, robj);
310 	drm_gem_object_unreference_unlocked(gobj);
311 	return r;
312 }
313 
radeon_gem_set_tiling_ioctl(struct drm_device * dev,void * data,struct drm_file * filp)314 int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
315 				struct drm_file *filp)
316 {
317 	struct drm_radeon_gem_set_tiling *args = data;
318 	struct drm_gem_object *gobj;
319 	struct radeon_bo *robj;
320 	int r = 0;
321 
322 	DRM_DEBUG("%d \n", args->handle);
323 	gobj = drm_gem_object_lookup(dev, filp, args->handle);
324 	if (gobj == NULL)
325 		return -ENOENT;
326 	robj = gem_to_radeon_bo(gobj);
327 	r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
328 	drm_gem_object_unreference_unlocked(gobj);
329 	return r;
330 }
331 
radeon_gem_get_tiling_ioctl(struct drm_device * dev,void * data,struct drm_file * filp)332 int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
333 				struct drm_file *filp)
334 {
335 	struct drm_radeon_gem_get_tiling *args = data;
336 	struct drm_gem_object *gobj;
337 	struct radeon_bo *rbo;
338 	int r = 0;
339 
340 	DRM_DEBUG("\n");
341 	gobj = drm_gem_object_lookup(dev, filp, args->handle);
342 	if (gobj == NULL)
343 		return -ENOENT;
344 	rbo = gem_to_radeon_bo(gobj);
345 	r = radeon_bo_reserve(rbo, false);
346 	if (unlikely(r != 0))
347 		goto out;
348 	radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
349 	radeon_bo_unreserve(rbo);
350 out:
351 	drm_gem_object_unreference_unlocked(gobj);
352 	return r;
353 }
354 
radeon_mode_dumb_create(struct drm_file * file_priv,struct drm_device * dev,struct drm_mode_create_dumb * args)355 int radeon_mode_dumb_create(struct drm_file *file_priv,
356 			    struct drm_device *dev,
357 			    struct drm_mode_create_dumb *args)
358 {
359 	struct radeon_device *rdev = dev->dev_private;
360 	struct drm_gem_object *gobj;
361 	uint32_t handle;
362 	int r;
363 
364 	args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
365 	args->size = args->pitch * args->height;
366 	args->size = ALIGN(args->size, PAGE_SIZE);
367 
368 	r = radeon_gem_object_create(rdev, args->size, 0,
369 				     RADEON_GEM_DOMAIN_VRAM,
370 				     false, ttm_bo_type_device,
371 				     &gobj);
372 	if (r)
373 		return -ENOMEM;
374 
375 	r = drm_gem_handle_create(file_priv, gobj, &handle);
376 	/* drop reference from allocate - handle holds it now */
377 	drm_gem_object_unreference_unlocked(gobj);
378 	if (r) {
379 		return r;
380 	}
381 	args->handle = handle;
382 	return 0;
383 }
384 
radeon_mode_dumb_destroy(struct drm_file * file_priv,struct drm_device * dev,uint32_t handle)385 int radeon_mode_dumb_destroy(struct drm_file *file_priv,
386 			     struct drm_device *dev,
387 			     uint32_t handle)
388 {
389 	return drm_gem_handle_delete(file_priv, handle);
390 }
391