1 /**
2 * \file radeon_drv.c
3 * ATI Radeon driver
4 *
5 * \author Gareth Hughes <gareth@valinux.com>
6 */
7
8 /*
9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10 * All Rights Reserved.
11 *
12 * Permission is hereby granted, free of charge, to any person obtaining a
13 * copy of this software and associated documentation files (the "Software"),
14 * to deal in the Software without restriction, including without limitation
15 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16 * and/or sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following conditions:
18 *
19 * The above copyright notice and this permission notice (including the next
20 * paragraph) shall be included in all copies or substantial portions of the
21 * Software.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29 * OTHER DEALINGS IN THE SOFTWARE.
30 */
31
32 #include "drmP.h"
33 #include "drm.h"
34 #include "radeon_drm.h"
35 #include "radeon_drv.h"
36
37 #include "drm_pciids.h"
38 #include <linux/console.h>
39 #include <linux/module.h>
40
41
42 /*
43 * KMS wrapper.
44 * - 2.0.0 - initial interface
45 * - 2.1.0 - add square tiling interface
46 * - 2.2.0 - add r6xx/r7xx const buffer support
47 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
48 * - 2.4.0 - add crtc id query
49 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
50 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
51 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
52 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
53 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
54 * 2.10.0 - fusion 2D tiling
55 * 2.11.0 - backend map, initial compute support for the CS checker
56 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
57 * 2.13.0 - virtual memory support, streamout
58 * 2.14.0 - add evergreen tiling informations
59 * 2.15.0 - add max_pipes query
60 * 2.16.0 - fix evergreen 2D tiled surface calculation
61 */
62 #define KMS_DRIVER_MAJOR 2
63 #define KMS_DRIVER_MINOR 16
64 #define KMS_DRIVER_PATCHLEVEL 0
65 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
66 int radeon_driver_unload_kms(struct drm_device *dev);
67 int radeon_driver_firstopen_kms(struct drm_device *dev);
68 void radeon_driver_lastclose_kms(struct drm_device *dev);
69 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
70 void radeon_driver_postclose_kms(struct drm_device *dev,
71 struct drm_file *file_priv);
72 void radeon_driver_preclose_kms(struct drm_device *dev,
73 struct drm_file *file_priv);
74 int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
75 int radeon_resume_kms(struct drm_device *dev);
76 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
77 int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
78 void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
79 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
80 int *max_error,
81 struct timeval *vblank_time,
82 unsigned flags);
83 void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
84 int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
85 void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
86 irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
87 int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
88 struct drm_file *file_priv);
89 int radeon_gem_object_init(struct drm_gem_object *obj);
90 void radeon_gem_object_free(struct drm_gem_object *obj);
91 int radeon_gem_object_open(struct drm_gem_object *obj,
92 struct drm_file *file_priv);
93 void radeon_gem_object_close(struct drm_gem_object *obj,
94 struct drm_file *file_priv);
95 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
96 int *vpos, int *hpos);
97 extern struct drm_ioctl_desc radeon_ioctls_kms[];
98 extern int radeon_max_kms_ioctl;
99 int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
100 int radeon_mode_dumb_mmap(struct drm_file *filp,
101 struct drm_device *dev,
102 uint32_t handle, uint64_t *offset_p);
103 int radeon_mode_dumb_create(struct drm_file *file_priv,
104 struct drm_device *dev,
105 struct drm_mode_create_dumb *args);
106 int radeon_mode_dumb_destroy(struct drm_file *file_priv,
107 struct drm_device *dev,
108 uint32_t handle);
109
110 #if defined(CONFIG_DEBUG_FS)
111 int radeon_debugfs_init(struct drm_minor *minor);
112 void radeon_debugfs_cleanup(struct drm_minor *minor);
113 #endif
114
115
116 int radeon_no_wb;
117 int radeon_modeset = -1;
118 int radeon_dynclks = -1;
119 int radeon_r4xx_atom = 0;
120 int radeon_agpmode = 0;
121 int radeon_vram_limit = 0;
122 int radeon_gart_size = 512; /* default gart size */
123 int radeon_benchmarking = 0;
124 int radeon_testing = 0;
125 int radeon_connector_table = 0;
126 int radeon_tv = 1;
127 int radeon_audio = 0;
128 int radeon_disp_priority = 0;
129 int radeon_hw_i2c = 0;
130 int radeon_pcie_gen2 = 0;
131 int radeon_msi = -1;
132
133 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
134 module_param_named(no_wb, radeon_no_wb, int, 0444);
135
136 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
137 module_param_named(modeset, radeon_modeset, int, 0400);
138
139 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
140 module_param_named(dynclks, radeon_dynclks, int, 0444);
141
142 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
143 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
144
145 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
146 module_param_named(vramlimit, radeon_vram_limit, int, 0600);
147
148 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
149 module_param_named(agpmode, radeon_agpmode, int, 0444);
150
151 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)");
152 module_param_named(gartsize, radeon_gart_size, int, 0600);
153
154 MODULE_PARM_DESC(benchmark, "Run benchmark");
155 module_param_named(benchmark, radeon_benchmarking, int, 0444);
156
157 MODULE_PARM_DESC(test, "Run tests");
158 module_param_named(test, radeon_testing, int, 0444);
159
160 MODULE_PARM_DESC(connector_table, "Force connector table");
161 module_param_named(connector_table, radeon_connector_table, int, 0444);
162
163 MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
164 module_param_named(tv, radeon_tv, int, 0444);
165
166 MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
167 module_param_named(audio, radeon_audio, int, 0444);
168
169 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
170 module_param_named(disp_priority, radeon_disp_priority, int, 0444);
171
172 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
173 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
174
175 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (1 = enable)");
176 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
177
178 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
179 module_param_named(msi, radeon_msi, int, 0444);
180
radeon_suspend(struct drm_device * dev,pm_message_t state)181 static int radeon_suspend(struct drm_device *dev, pm_message_t state)
182 {
183 drm_radeon_private_t *dev_priv = dev->dev_private;
184
185 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
186 return 0;
187
188 /* Disable *all* interrupts */
189 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
190 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
191 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
192 return 0;
193 }
194
radeon_resume(struct drm_device * dev)195 static int radeon_resume(struct drm_device *dev)
196 {
197 drm_radeon_private_t *dev_priv = dev->dev_private;
198
199 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
200 return 0;
201
202 /* Restore interrupt registers */
203 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
204 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
205 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
206 return 0;
207 }
208
209 static struct pci_device_id pciidlist[] = {
210 radeon_PCI_IDS
211 };
212
213 #if defined(CONFIG_DRM_RADEON_KMS)
214 MODULE_DEVICE_TABLE(pci, pciidlist);
215 #endif
216
217 static const struct file_operations radeon_driver_old_fops = {
218 .owner = THIS_MODULE,
219 .open = drm_open,
220 .release = drm_release,
221 .unlocked_ioctl = drm_ioctl,
222 .mmap = drm_mmap,
223 .poll = drm_poll,
224 .fasync = drm_fasync,
225 .read = drm_read,
226 #ifdef CONFIG_COMPAT
227 .compat_ioctl = radeon_compat_ioctl,
228 #endif
229 .llseek = noop_llseek,
230 };
231
232 static struct drm_driver driver_old = {
233 .driver_features =
234 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
235 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
236 .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
237 .load = radeon_driver_load,
238 .firstopen = radeon_driver_firstopen,
239 .open = radeon_driver_open,
240 .preclose = radeon_driver_preclose,
241 .postclose = radeon_driver_postclose,
242 .lastclose = radeon_driver_lastclose,
243 .unload = radeon_driver_unload,
244 .suspend = radeon_suspend,
245 .resume = radeon_resume,
246 .get_vblank_counter = radeon_get_vblank_counter,
247 .enable_vblank = radeon_enable_vblank,
248 .disable_vblank = radeon_disable_vblank,
249 .master_create = radeon_master_create,
250 .master_destroy = radeon_master_destroy,
251 .irq_preinstall = radeon_driver_irq_preinstall,
252 .irq_postinstall = radeon_driver_irq_postinstall,
253 .irq_uninstall = radeon_driver_irq_uninstall,
254 .irq_handler = radeon_driver_irq_handler,
255 .reclaim_buffers = drm_core_reclaim_buffers,
256 .ioctls = radeon_ioctls,
257 .dma_ioctl = radeon_cp_buffers,
258 .fops = &radeon_driver_old_fops,
259 .name = DRIVER_NAME,
260 .desc = DRIVER_DESC,
261 .date = DRIVER_DATE,
262 .major = DRIVER_MAJOR,
263 .minor = DRIVER_MINOR,
264 .patchlevel = DRIVER_PATCHLEVEL,
265 };
266
267 static struct drm_driver kms_driver;
268
radeon_kick_out_firmware_fb(struct pci_dev * pdev)269 static void radeon_kick_out_firmware_fb(struct pci_dev *pdev)
270 {
271 struct apertures_struct *ap;
272 bool primary = false;
273
274 ap = alloc_apertures(1);
275 ap->ranges[0].base = pci_resource_start(pdev, 0);
276 ap->ranges[0].size = pci_resource_len(pdev, 0);
277
278 #ifdef CONFIG_X86
279 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
280 #endif
281 remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
282 kfree(ap);
283 }
284
285 static int __devinit
radeon_pci_probe(struct pci_dev * pdev,const struct pci_device_id * ent)286 radeon_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
287 {
288 /* Get rid of things like offb */
289 radeon_kick_out_firmware_fb(pdev);
290
291 return drm_get_pci_dev(pdev, ent, &kms_driver);
292 }
293
294 static void
radeon_pci_remove(struct pci_dev * pdev)295 radeon_pci_remove(struct pci_dev *pdev)
296 {
297 struct drm_device *dev = pci_get_drvdata(pdev);
298
299 drm_put_dev(dev);
300 }
301
302 static int
radeon_pci_suspend(struct pci_dev * pdev,pm_message_t state)303 radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
304 {
305 struct drm_device *dev = pci_get_drvdata(pdev);
306 return radeon_suspend_kms(dev, state);
307 }
308
309 static int
radeon_pci_resume(struct pci_dev * pdev)310 radeon_pci_resume(struct pci_dev *pdev)
311 {
312 struct drm_device *dev = pci_get_drvdata(pdev);
313 return radeon_resume_kms(dev);
314 }
315
316 static const struct file_operations radeon_driver_kms_fops = {
317 .owner = THIS_MODULE,
318 .open = drm_open,
319 .release = drm_release,
320 .unlocked_ioctl = drm_ioctl,
321 .mmap = radeon_mmap,
322 .poll = drm_poll,
323 .fasync = drm_fasync,
324 .read = drm_read,
325 #ifdef CONFIG_COMPAT
326 .compat_ioctl = radeon_kms_compat_ioctl,
327 #endif
328 };
329
330 static struct drm_driver kms_driver = {
331 .driver_features =
332 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
333 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM,
334 .dev_priv_size = 0,
335 .load = radeon_driver_load_kms,
336 .firstopen = radeon_driver_firstopen_kms,
337 .open = radeon_driver_open_kms,
338 .preclose = radeon_driver_preclose_kms,
339 .postclose = radeon_driver_postclose_kms,
340 .lastclose = radeon_driver_lastclose_kms,
341 .unload = radeon_driver_unload_kms,
342 .suspend = radeon_suspend_kms,
343 .resume = radeon_resume_kms,
344 .get_vblank_counter = radeon_get_vblank_counter_kms,
345 .enable_vblank = radeon_enable_vblank_kms,
346 .disable_vblank = radeon_disable_vblank_kms,
347 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
348 .get_scanout_position = radeon_get_crtc_scanoutpos,
349 #if defined(CONFIG_DEBUG_FS)
350 .debugfs_init = radeon_debugfs_init,
351 .debugfs_cleanup = radeon_debugfs_cleanup,
352 #endif
353 .irq_preinstall = radeon_driver_irq_preinstall_kms,
354 .irq_postinstall = radeon_driver_irq_postinstall_kms,
355 .irq_uninstall = radeon_driver_irq_uninstall_kms,
356 .irq_handler = radeon_driver_irq_handler_kms,
357 .reclaim_buffers = drm_core_reclaim_buffers,
358 .ioctls = radeon_ioctls_kms,
359 .gem_init_object = radeon_gem_object_init,
360 .gem_free_object = radeon_gem_object_free,
361 .gem_open_object = radeon_gem_object_open,
362 .gem_close_object = radeon_gem_object_close,
363 .dma_ioctl = radeon_dma_ioctl_kms,
364 .dumb_create = radeon_mode_dumb_create,
365 .dumb_map_offset = radeon_mode_dumb_mmap,
366 .dumb_destroy = radeon_mode_dumb_destroy,
367 .fops = &radeon_driver_kms_fops,
368 .name = DRIVER_NAME,
369 .desc = DRIVER_DESC,
370 .date = DRIVER_DATE,
371 .major = KMS_DRIVER_MAJOR,
372 .minor = KMS_DRIVER_MINOR,
373 .patchlevel = KMS_DRIVER_PATCHLEVEL,
374 };
375
376 static struct drm_driver *driver;
377 static struct pci_driver *pdriver;
378
379 static struct pci_driver radeon_pci_driver = {
380 .name = DRIVER_NAME,
381 .id_table = pciidlist,
382 };
383
384 static struct pci_driver radeon_kms_pci_driver = {
385 .name = DRIVER_NAME,
386 .id_table = pciidlist,
387 .probe = radeon_pci_probe,
388 .remove = radeon_pci_remove,
389 .suspend = radeon_pci_suspend,
390 .resume = radeon_pci_resume,
391 };
392
radeon_init(void)393 static int __init radeon_init(void)
394 {
395 driver = &driver_old;
396 pdriver = &radeon_pci_driver;
397 driver->num_ioctls = radeon_max_ioctl;
398 #ifdef CONFIG_VGA_CONSOLE
399 if (vgacon_text_force() && radeon_modeset == -1) {
400 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
401 driver = &driver_old;
402 pdriver = &radeon_pci_driver;
403 driver->driver_features &= ~DRIVER_MODESET;
404 radeon_modeset = 0;
405 }
406 #endif
407 /* if enabled by default */
408 if (radeon_modeset == -1) {
409 #ifdef CONFIG_DRM_RADEON_KMS
410 DRM_INFO("radeon defaulting to kernel modesetting.\n");
411 radeon_modeset = 1;
412 #else
413 DRM_INFO("radeon defaulting to userspace modesetting.\n");
414 radeon_modeset = 0;
415 #endif
416 }
417 if (radeon_modeset == 1) {
418 DRM_INFO("radeon kernel modesetting enabled.\n");
419 driver = &kms_driver;
420 pdriver = &radeon_kms_pci_driver;
421 driver->driver_features |= DRIVER_MODESET;
422 driver->num_ioctls = radeon_max_kms_ioctl;
423 radeon_register_atpx_handler();
424 }
425 /* if the vga console setting is enabled still
426 * let modprobe override it */
427 return drm_pci_init(driver, pdriver);
428 }
429
radeon_exit(void)430 static void __exit radeon_exit(void)
431 {
432 drm_pci_exit(driver, pdriver);
433 radeon_unregister_atpx_handler();
434 }
435
436 module_init(radeon_init);
437 module_exit(radeon_exit);
438
439 MODULE_AUTHOR(DRIVER_AUTHOR);
440 MODULE_DESCRIPTION(DRIVER_DESC);
441 MODULE_LICENSE("GPL and additional rights");
442