1 /*
2  * PCBIT-D device driver definitions
3  *
4  * Copyright (C) 1996 Universidade de Lisboa
5  *
6  * Written by Pedro Roque Marques (pedro_m@yahoo.com)
7  *
8  * This software may be used and distributed according to the terms of
9  * the GNU General Public License, incorporated herein by reference.
10  */
11 
12 #ifndef PCBIT_H
13 #define PCBIT_H
14 
15 #define MAX_PCBIT_CARDS 4
16 
17 
18 #define BLOCK_TIMER
19 
20 #ifdef __KERNEL__
21 
22 struct pcbit_chan {
23 	unsigned short id;
24 	unsigned short callref;                   /* Call Reference */
25 	unsigned char  proto;                     /* layer2protocol  */
26 	unsigned char  queued;                    /* unacked data messages */
27 	unsigned char  layer2link;                /* used in TData */
28 	unsigned char  snum;                      /* used in TData */
29 	unsigned short s_refnum;
30 	unsigned short r_refnum;
31 	unsigned short fsm_state;
32 	struct timer_list fsm_timer;
33 #ifdef  BLOCK_TIMER
34 	struct timer_list block_timer;
35 #endif
36 };
37 
38 struct msn_entry {
39 	char *msn;
40 	struct msn_entry * next;
41 };
42 
43 struct pcbit_dev {
44 	/* board */
45 
46 	volatile unsigned char* sh_mem;		/* RDP address	*/
47 	unsigned long ph_mem;
48 	unsigned int irq;
49 	unsigned int id;
50 	unsigned int interrupt;			/* set during interrupt
51 						   processing */
52 
53 	/* isdn4linux */
54 
55 	struct msn_entry * msn_list;		/* ISDN address list */
56 
57 	isdn_if * dev_if;
58 
59 	ushort ll_hdrlen;
60 	ushort hl_hdrlen;
61 
62 	/* link layer */
63 	unsigned char l2_state;
64 
65 	struct frame_buf *read_queue;
66 	struct frame_buf *read_frame;
67 	struct frame_buf *write_queue;
68 
69 	/* Protocol start */
70 	wait_queue_head_t set_running_wq;
71 	struct timer_list set_running_timer;
72 
73 	struct timer_list error_recover_timer;
74 
75 	struct tq_struct qdelivery;
76 
77 	u_char w_busy;
78 	u_char r_busy;
79 
80 	volatile unsigned char *readptr;
81 	volatile unsigned char *writeptr;
82 
83 	ushort loadptr;
84 
85 	unsigned short fsize[8];		/* sent layer2 frames size */
86 
87 	unsigned char send_seq;
88 	unsigned char rcv_seq;
89 	unsigned char unack_seq;
90 
91 	unsigned short free;
92 
93 	/* channels */
94 
95 	struct pcbit_chan *b1;
96 	struct pcbit_chan *b2;
97 };
98 
99 #define STATS_TIMER (10*HZ)
100 #define ERRTIME     (HZ/10)
101 
102 /* MRU */
103 #define MAXBUFSIZE  1534
104 #define MRU   MAXBUFSIZE
105 
106 #define STATBUF_LEN 2048
107 /*
108  *
109  */
110 
111 #endif /* __KERNEL__ */
112 
113 /* isdn_ctrl only allows a long sized argument */
114 
115 struct pcbit_ioctl {
116 	union {
117 		struct byte_op {
118 			ushort addr;
119 			ushort value;
120 		} rdp_byte;
121 		unsigned long l2_status;
122 	} info;
123 };
124 
125 
126 
127 #define PCBIT_IOCTL_GETSTAT  0x01    /* layer2 status */
128 #define PCBIT_IOCTL_LWMODE   0x02    /* linear write mode */
129 #define PCBIT_IOCTL_STRLOAD  0x03    /* start load mode */
130 #define PCBIT_IOCTL_ENDLOAD  0x04    /* end load mode */
131 #define PCBIT_IOCTL_SETBYTE  0x05    /* set byte */
132 #define PCBIT_IOCTL_GETBYTE  0x06    /* get byte */
133 #define PCBIT_IOCTL_RUNNING  0x07    /* set protocol running */
134 #define PCBIT_IOCTL_WATCH188 0x08    /* set watch 188 */
135 #define PCBIT_IOCTL_PING188  0x09    /* ping 188 */
136 #define PCBIT_IOCTL_FWMODE   0x0A    /* firmware write mode */
137 #define PCBIT_IOCTL_STOP     0x0B    /* stop protocol */
138 #define PCBIT_IOCTL_APION    0x0C    /* issue API_ON  */
139 
140 #ifndef __KERNEL__
141 
142 #define PCBIT_GETSTAT  (PCBIT_IOCTL_GETSTAT  + IIOCDRVCTL)
143 #define PCBIT_LWMODE   (PCBIT_IOCTL_LWMODE   + IIOCDRVCTL)
144 #define PCBIT_STRLOAD  (PCBIT_IOCTL_STRLOAD  + IIOCDRVCTL)
145 #define PCBIT_ENDLOAD  (PCBIT_IOCTL_ENDLOAD  + IIOCDRVCTL)
146 #define PCBIT_SETBYTE  (PCBIT_IOCTL_SETBYTE  + IIOCDRVCTL)
147 #define PCBIT_GETBYTE  (PCBIT_IOCTL_GETBYTE  + IIOCDRVCTL)
148 #define PCBIT_RUNNING  (PCBIT_IOCTL_RUNNING  + IIOCDRVCTL)
149 #define PCBIT_WATCH188 (PCBIT_IOCTL_WATCH188 + IIOCDRVCTL)
150 #define PCBIT_PING188  (PCBIT_IOCTL_PING188  + IIOCDRVCTL)
151 #define PCBIT_FWMODE   (PCBIT_IOCTL_FWMODE   + IIOCDRVCTL)
152 #define PCBIT_STOP     (PCBIT_IOCTL_STOP     + IIOCDRVCTL)
153 #define PCBIT_APION    (PCBIT_IOCTL_APION    + IIOCDRVCTL)
154 
155 #define MAXSUPERLINE 3000
156 
157 #endif
158 
159 #define L2_DOWN     0
160 #define L2_LOADING  1
161 #define L2_LWMODE   2
162 #define L2_FWMODE   3
163 #define L2_STARTING 4
164 #define L2_RUNNING  5
165 #define L2_ERROR    6
166 
167 #endif
168