1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * QLogic Fibre Channel HBA Driver
4 * Copyright (c) 2003-2014 QLogic Corporation
5 */
6 #include "qla_def.h"
7 #include "qla_gbl.h"
8
9 #include <linux/delay.h>
10 #include <linux/slab.h>
11 #include <linux/vmalloc.h>
12
13 #include "qla_devtbl.h"
14
15 #ifdef CONFIG_SPARC
16 #include <asm/prom.h>
17 #endif
18
19 #include "qla_target.h"
20
21 /*
22 * QLogic ISP2x00 Hardware Support Function Prototypes.
23 */
24 static int qla2x00_isp_firmware(scsi_qla_host_t *);
25 static int qla2x00_setup_chip(scsi_qla_host_t *);
26 static int qla2x00_fw_ready(scsi_qla_host_t *);
27 static int qla2x00_configure_hba(scsi_qla_host_t *);
28 static int qla2x00_configure_loop(scsi_qla_host_t *);
29 static int qla2x00_configure_local_loop(scsi_qla_host_t *);
30 static int qla2x00_configure_fabric(scsi_qla_host_t *);
31 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *);
32 static int qla2x00_restart_isp(scsi_qla_host_t *);
33
34 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
35 static int qla84xx_init_chip(scsi_qla_host_t *);
36 static int qla25xx_init_queues(struct qla_hw_data *);
37 static void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha,
38 struct event_arg *ea);
39 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *,
40 struct event_arg *);
41 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *);
42
43 /* SRB Extensions ---------------------------------------------------------- */
44
45 void
qla2x00_sp_timeout(struct timer_list * t)46 qla2x00_sp_timeout(struct timer_list *t)
47 {
48 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer);
49 struct srb_iocb *iocb;
50 scsi_qla_host_t *vha = sp->vha;
51
52 WARN_ON(irqs_disabled());
53 iocb = &sp->u.iocb_cmd;
54 iocb->timeout(sp);
55
56 /* ref: TMR */
57 kref_put(&sp->cmd_kref, qla2x00_sp_release);
58
59 if (vha && qla2x00_isp_reg_stat(vha->hw)) {
60 ql_log(ql_log_info, vha, 0x9008,
61 "PCI/Register disconnect.\n");
62 qla_pci_set_eeh_busy(vha);
63 }
64 }
65
qla2x00_sp_free(srb_t * sp)66 void qla2x00_sp_free(srb_t *sp)
67 {
68 struct srb_iocb *iocb = &sp->u.iocb_cmd;
69
70 del_timer(&iocb->timer);
71 qla2x00_rel_sp(sp);
72 }
73
qla2xxx_rel_done_warning(srb_t * sp,int res)74 void qla2xxx_rel_done_warning(srb_t *sp, int res)
75 {
76 WARN_ONCE(1, "Calling done() of an already freed srb %p object\n", sp);
77 }
78
qla2xxx_rel_free_warning(srb_t * sp)79 void qla2xxx_rel_free_warning(srb_t *sp)
80 {
81 WARN_ONCE(1, "Calling free() of an already freed srb %p object\n", sp);
82 }
83
84 /* Asynchronous Login/Logout Routines -------------------------------------- */
85
86 unsigned long
qla2x00_get_async_timeout(struct scsi_qla_host * vha)87 qla2x00_get_async_timeout(struct scsi_qla_host *vha)
88 {
89 unsigned long tmo;
90 struct qla_hw_data *ha = vha->hw;
91
92 /* Firmware should use switch negotiated r_a_tov for timeout. */
93 tmo = ha->r_a_tov / 10 * 2;
94 if (IS_QLAFX00(ha)) {
95 tmo = FX00_DEF_RATOV * 2;
96 } else if (!IS_FWI2_CAPABLE(ha)) {
97 /*
98 * Except for earlier ISPs where the timeout is seeded from the
99 * initialization control block.
100 */
101 tmo = ha->login_timeout;
102 }
103 return tmo;
104 }
105
qla24xx_abort_iocb_timeout(void * data)106 static void qla24xx_abort_iocb_timeout(void *data)
107 {
108 srb_t *sp = data;
109 struct srb_iocb *abt = &sp->u.iocb_cmd;
110 struct qla_qpair *qpair = sp->qpair;
111 u32 handle;
112 unsigned long flags;
113 int sp_found = 0, cmdsp_found = 0;
114
115 if (sp->cmd_sp)
116 ql_dbg(ql_dbg_async, sp->vha, 0x507c,
117 "Abort timeout - cmd hdl=%x, cmd type=%x hdl=%x, type=%x\n",
118 sp->cmd_sp->handle, sp->cmd_sp->type,
119 sp->handle, sp->type);
120 else
121 ql_dbg(ql_dbg_async, sp->vha, 0x507c,
122 "Abort timeout 2 - hdl=%x, type=%x\n",
123 sp->handle, sp->type);
124
125 spin_lock_irqsave(qpair->qp_lock_ptr, flags);
126 for (handle = 1; handle < qpair->req->num_outstanding_cmds; handle++) {
127 if (sp->cmd_sp && (qpair->req->outstanding_cmds[handle] ==
128 sp->cmd_sp)) {
129 qpair->req->outstanding_cmds[handle] = NULL;
130 cmdsp_found = 1;
131 }
132
133 /* removing the abort */
134 if (qpair->req->outstanding_cmds[handle] == sp) {
135 qpair->req->outstanding_cmds[handle] = NULL;
136 sp_found = 1;
137 break;
138 }
139 }
140 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
141
142 if (cmdsp_found && sp->cmd_sp) {
143 /*
144 * This done function should take care of
145 * original command ref: INIT
146 */
147 sp->cmd_sp->done(sp->cmd_sp, QLA_OS_TIMER_EXPIRED);
148 }
149
150 if (sp_found) {
151 abt->u.abt.comp_status = cpu_to_le16(CS_TIMEOUT);
152 sp->done(sp, QLA_OS_TIMER_EXPIRED);
153 }
154 }
155
qla24xx_abort_sp_done(srb_t * sp,int res)156 static void qla24xx_abort_sp_done(srb_t *sp, int res)
157 {
158 struct srb_iocb *abt = &sp->u.iocb_cmd;
159 srb_t *orig_sp = sp->cmd_sp;
160
161 if (orig_sp)
162 qla_wait_nvme_release_cmd_kref(orig_sp);
163
164 if (sp->flags & SRB_WAKEUP_ON_COMP)
165 complete(&abt->u.abt.comp);
166 else
167 /* ref: INIT */
168 kref_put(&sp->cmd_kref, qla2x00_sp_release);
169 }
170
qla24xx_async_abort_cmd(srb_t * cmd_sp,bool wait)171 int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait)
172 {
173 scsi_qla_host_t *vha = cmd_sp->vha;
174 struct srb_iocb *abt_iocb;
175 srb_t *sp;
176 int rval = QLA_FUNCTION_FAILED;
177
178 /* ref: INIT for ABTS command */
179 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport,
180 GFP_ATOMIC);
181 if (!sp)
182 return QLA_MEMORY_ALLOC_FAILED;
183
184 qla_vha_mark_busy(vha);
185 abt_iocb = &sp->u.iocb_cmd;
186 sp->type = SRB_ABT_CMD;
187 sp->name = "abort";
188 sp->qpair = cmd_sp->qpair;
189 sp->cmd_sp = cmd_sp;
190 if (wait)
191 sp->flags = SRB_WAKEUP_ON_COMP;
192
193 init_completion(&abt_iocb->u.abt.comp);
194 /* FW can send 2 x ABTS's timeout/20s */
195 qla2x00_init_async_sp(sp, 42, qla24xx_abort_sp_done);
196 sp->u.iocb_cmd.timeout = qla24xx_abort_iocb_timeout;
197
198 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
199 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id);
200
201 ql_dbg(ql_dbg_async, vha, 0x507c,
202 "Abort command issued - hdl=%x, type=%x\n", cmd_sp->handle,
203 cmd_sp->type);
204
205 rval = qla2x00_start_sp(sp);
206 if (rval != QLA_SUCCESS) {
207 /* ref: INIT */
208 kref_put(&sp->cmd_kref, qla2x00_sp_release);
209 return rval;
210 }
211
212 if (wait) {
213 wait_for_completion(&abt_iocb->u.abt.comp);
214 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
215 QLA_SUCCESS : QLA_ERR_FROM_FW;
216 /* ref: INIT */
217 kref_put(&sp->cmd_kref, qla2x00_sp_release);
218 }
219
220 return rval;
221 }
222
223 void
qla2x00_async_iocb_timeout(void * data)224 qla2x00_async_iocb_timeout(void *data)
225 {
226 srb_t *sp = data;
227 fc_port_t *fcport = sp->fcport;
228 struct srb_iocb *lio = &sp->u.iocb_cmd;
229 int rc, h;
230 unsigned long flags;
231
232 if (fcport) {
233 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
234 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n",
235 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name);
236
237 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
238 } else {
239 pr_info("Async-%s timeout - hdl=%x.\n",
240 sp->name, sp->handle);
241 }
242
243 switch (sp->type) {
244 case SRB_LOGIN_CMD:
245 rc = qla24xx_async_abort_cmd(sp, false);
246 if (rc) {
247 /* Retry as needed. */
248 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
249 lio->u.logio.data[1] =
250 lio->u.logio.flags & SRB_LOGIN_RETRIED ?
251 QLA_LOGIO_LOGIN_RETRIED : 0;
252 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
253 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
254 h++) {
255 if (sp->qpair->req->outstanding_cmds[h] ==
256 sp) {
257 sp->qpair->req->outstanding_cmds[h] =
258 NULL;
259 break;
260 }
261 }
262 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
263 sp->done(sp, QLA_FUNCTION_TIMEOUT);
264 }
265 break;
266 case SRB_LOGOUT_CMD:
267 case SRB_CT_PTHRU_CMD:
268 case SRB_MB_IOCB:
269 case SRB_NACK_PLOGI:
270 case SRB_NACK_PRLI:
271 case SRB_NACK_LOGO:
272 case SRB_CTRL_VP:
273 default:
274 rc = qla24xx_async_abort_cmd(sp, false);
275 if (rc) {
276 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
277 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
278 h++) {
279 if (sp->qpair->req->outstanding_cmds[h] ==
280 sp) {
281 sp->qpair->req->outstanding_cmds[h] =
282 NULL;
283 break;
284 }
285 }
286 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
287 sp->done(sp, QLA_FUNCTION_TIMEOUT);
288 }
289 break;
290 }
291 }
292
qla2x00_async_login_sp_done(srb_t * sp,int res)293 static void qla2x00_async_login_sp_done(srb_t *sp, int res)
294 {
295 struct scsi_qla_host *vha = sp->vha;
296 struct srb_iocb *lio = &sp->u.iocb_cmd;
297 struct event_arg ea;
298
299 ql_dbg(ql_dbg_disc, vha, 0x20dd,
300 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res);
301
302 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
303
304 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
305 memset(&ea, 0, sizeof(ea));
306 ea.fcport = sp->fcport;
307 ea.data[0] = lio->u.logio.data[0];
308 ea.data[1] = lio->u.logio.data[1];
309 ea.iop[0] = lio->u.logio.iop[0];
310 ea.iop[1] = lio->u.logio.iop[1];
311 ea.sp = sp;
312 if (res)
313 ea.data[0] = MBS_COMMAND_ERROR;
314 qla24xx_handle_plogi_done_event(vha, &ea);
315 }
316
317 /* ref: INIT */
318 kref_put(&sp->cmd_kref, qla2x00_sp_release);
319 }
320
321 int
qla2x00_async_login(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)322 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
323 uint16_t *data)
324 {
325 srb_t *sp;
326 struct srb_iocb *lio;
327 int rval = QLA_FUNCTION_FAILED;
328
329 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) ||
330 fcport->loop_id == FC_NO_LOOP_ID) {
331 ql_log(ql_log_warn, vha, 0xffff,
332 "%s: %8phC - not sending command.\n",
333 __func__, fcport->port_name);
334 return rval;
335 }
336
337 /* ref: INIT */
338 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
339 if (!sp)
340 goto done;
341
342 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND);
343 fcport->flags |= FCF_ASYNC_SENT;
344 fcport->logout_completed = 0;
345
346 sp->type = SRB_LOGIN_CMD;
347 sp->name = "login";
348 sp->gen1 = fcport->rscn_gen;
349 sp->gen2 = fcport->login_gen;
350 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
351 qla2x00_async_login_sp_done);
352
353 lio = &sp->u.iocb_cmd;
354 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport)) {
355 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY;
356 } else {
357 if (vha->hw->flags.edif_enabled &&
358 DBELL_ACTIVE(vha)) {
359 lio->u.logio.flags |=
360 (SRB_LOGIN_FCSP | SRB_LOGIN_SKIP_PRLI);
361 } else {
362 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
363 }
364 }
365
366 if (NVME_TARGET(vha->hw, fcport))
367 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI;
368
369 rval = qla2x00_start_sp(sp);
370
371 ql_dbg(ql_dbg_disc, vha, 0x2072,
372 "Async-login - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n",
373 fcport->port_name, sp->handle, fcport->loop_id,
374 fcport->d_id.b24, fcport->login_retry,
375 lio->u.logio.flags & SRB_LOGIN_FCSP ? "FCSP" : "");
376
377 if (rval != QLA_SUCCESS) {
378 fcport->flags |= FCF_LOGIN_NEEDED;
379 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
380 goto done_free_sp;
381 }
382
383 return rval;
384
385 done_free_sp:
386 /* ref: INIT */
387 kref_put(&sp->cmd_kref, qla2x00_sp_release);
388 fcport->flags &= ~FCF_ASYNC_SENT;
389 done:
390 fcport->flags &= ~FCF_ASYNC_ACTIVE;
391 return rval;
392 }
393
qla2x00_async_logout_sp_done(srb_t * sp,int res)394 static void qla2x00_async_logout_sp_done(srb_t *sp, int res)
395 {
396 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
397 sp->fcport->login_gen++;
398 qlt_logo_completion_handler(sp->fcport, sp->u.iocb_cmd.u.logio.data[0]);
399 /* ref: INIT */
400 kref_put(&sp->cmd_kref, qla2x00_sp_release);
401 }
402
403 int
qla2x00_async_logout(struct scsi_qla_host * vha,fc_port_t * fcport)404 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
405 {
406 srb_t *sp;
407 int rval = QLA_FUNCTION_FAILED;
408
409 fcport->flags |= FCF_ASYNC_SENT;
410 /* ref: INIT */
411 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
412 if (!sp)
413 goto done;
414
415 sp->type = SRB_LOGOUT_CMD;
416 sp->name = "logout";
417 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
418 qla2x00_async_logout_sp_done),
419
420 ql_dbg(ql_dbg_disc, vha, 0x2070,
421 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC explicit %d.\n",
422 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
423 fcport->d_id.b.area, fcport->d_id.b.al_pa,
424 fcport->port_name, fcport->explicit_logout);
425
426 rval = qla2x00_start_sp(sp);
427 if (rval != QLA_SUCCESS)
428 goto done_free_sp;
429 return rval;
430
431 done_free_sp:
432 /* ref: INIT */
433 kref_put(&sp->cmd_kref, qla2x00_sp_release);
434 done:
435 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
436 return rval;
437 }
438
439 void
qla2x00_async_prlo_done(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)440 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport,
441 uint16_t *data)
442 {
443 fcport->flags &= ~FCF_ASYNC_ACTIVE;
444 /* Don't re-login in target mode */
445 if (!fcport->tgt_session)
446 qla2x00_mark_device_lost(vha, fcport, 1);
447 qlt_logo_completion_handler(fcport, data[0]);
448 }
449
qla2x00_async_prlo_sp_done(srb_t * sp,int res)450 static void qla2x00_async_prlo_sp_done(srb_t *sp, int res)
451 {
452 struct srb_iocb *lio = &sp->u.iocb_cmd;
453 struct scsi_qla_host *vha = sp->vha;
454
455 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE;
456 if (!test_bit(UNLOADING, &vha->dpc_flags))
457 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport,
458 lio->u.logio.data);
459 /* ref: INIT */
460 kref_put(&sp->cmd_kref, qla2x00_sp_release);
461 }
462
463 int
qla2x00_async_prlo(struct scsi_qla_host * vha,fc_port_t * fcport)464 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport)
465 {
466 srb_t *sp;
467 int rval;
468
469 rval = QLA_FUNCTION_FAILED;
470 /* ref: INIT */
471 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
472 if (!sp)
473 goto done;
474
475 sp->type = SRB_PRLO_CMD;
476 sp->name = "prlo";
477 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
478 qla2x00_async_prlo_sp_done);
479
480 ql_dbg(ql_dbg_disc, vha, 0x2070,
481 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
482 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
483 fcport->d_id.b.area, fcport->d_id.b.al_pa);
484
485 rval = qla2x00_start_sp(sp);
486 if (rval != QLA_SUCCESS)
487 goto done_free_sp;
488
489 return rval;
490
491 done_free_sp:
492 /* ref: INIT */
493 kref_put(&sp->cmd_kref, qla2x00_sp_release);
494 done:
495 fcport->flags &= ~FCF_ASYNC_ACTIVE;
496 return rval;
497 }
498
499 static
qla24xx_handle_adisc_event(scsi_qla_host_t * vha,struct event_arg * ea)500 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea)
501 {
502 struct fc_port *fcport = ea->fcport;
503
504 ql_dbg(ql_dbg_disc, vha, 0x20d2,
505 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n",
506 __func__, fcport->port_name, fcport->disc_state,
507 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2,
508 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id);
509
510 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
511 ea->data[0]);
512
513 if (ea->data[0] != MBS_COMMAND_COMPLETE) {
514 ql_dbg(ql_dbg_disc, vha, 0x2066,
515 "%s %8phC: adisc fail: post delete\n",
516 __func__, ea->fcport->port_name);
517 /* deleted = 0 & logout_on_delete = force fw cleanup */
518 fcport->deleted = 0;
519 fcport->logout_on_delete = 1;
520 qlt_schedule_sess_for_deletion(ea->fcport);
521 return;
522 }
523
524 if (ea->fcport->disc_state == DSC_DELETE_PEND)
525 return;
526
527 if (ea->sp->gen2 != ea->fcport->login_gen) {
528 /* target side must have changed it. */
529 ql_dbg(ql_dbg_disc, vha, 0x20d3,
530 "%s %8phC generation changed\n",
531 __func__, ea->fcport->port_name);
532 return;
533 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) {
534 qla_rscn_replay(fcport);
535 qlt_schedule_sess_for_deletion(fcport);
536 return;
537 }
538
539 __qla24xx_handle_gpdb_event(vha, ea);
540 }
541
qla_post_els_plogi_work(struct scsi_qla_host * vha,fc_port_t * fcport)542 static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport)
543 {
544 struct qla_work_evt *e;
545
546 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI);
547 if (!e)
548 return QLA_FUNCTION_FAILED;
549
550 e->u.fcport.fcport = fcport;
551 fcport->flags |= FCF_ASYNC_ACTIVE;
552 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND);
553 return qla2x00_post_work(vha, e);
554 }
555
qla2x00_async_adisc_sp_done(srb_t * sp,int res)556 static void qla2x00_async_adisc_sp_done(srb_t *sp, int res)
557 {
558 struct scsi_qla_host *vha = sp->vha;
559 struct event_arg ea;
560 struct srb_iocb *lio = &sp->u.iocb_cmd;
561
562 ql_dbg(ql_dbg_disc, vha, 0x2066,
563 "Async done-%s res %x %8phC\n",
564 sp->name, res, sp->fcport->port_name);
565
566 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
567
568 memset(&ea, 0, sizeof(ea));
569 ea.rc = res;
570 ea.data[0] = lio->u.logio.data[0];
571 ea.data[1] = lio->u.logio.data[1];
572 ea.iop[0] = lio->u.logio.iop[0];
573 ea.iop[1] = lio->u.logio.iop[1];
574 ea.fcport = sp->fcport;
575 ea.sp = sp;
576 if (res)
577 ea.data[0] = MBS_COMMAND_ERROR;
578
579 qla24xx_handle_adisc_event(vha, &ea);
580 /* ref: INIT */
581 kref_put(&sp->cmd_kref, qla2x00_sp_release);
582 }
583
584 int
qla2x00_async_adisc(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)585 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
586 uint16_t *data)
587 {
588 srb_t *sp;
589 struct srb_iocb *lio;
590 int rval = QLA_FUNCTION_FAILED;
591
592 if (IS_SESSION_DELETED(fcport)) {
593 ql_log(ql_log_warn, vha, 0xffff,
594 "%s: %8phC is being delete - not sending command.\n",
595 __func__, fcport->port_name);
596 fcport->flags &= ~FCF_ASYNC_ACTIVE;
597 return rval;
598 }
599
600 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
601 return rval;
602
603 fcport->flags |= FCF_ASYNC_SENT;
604 /* ref: INIT */
605 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
606 if (!sp)
607 goto done;
608
609 sp->type = SRB_ADISC_CMD;
610 sp->name = "adisc";
611 sp->gen1 = fcport->rscn_gen;
612 sp->gen2 = fcport->login_gen;
613 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
614 qla2x00_async_adisc_sp_done);
615
616 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) {
617 lio = &sp->u.iocb_cmd;
618 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
619 }
620
621 ql_dbg(ql_dbg_disc, vha, 0x206f,
622 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n",
623 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name);
624
625 rval = qla2x00_start_sp(sp);
626 if (rval != QLA_SUCCESS)
627 goto done_free_sp;
628
629 return rval;
630
631 done_free_sp:
632 /* ref: INIT */
633 kref_put(&sp->cmd_kref, qla2x00_sp_release);
634 done:
635 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
636 qla2x00_post_async_adisc_work(vha, fcport, data);
637 return rval;
638 }
639
qla2x00_is_reserved_id(scsi_qla_host_t * vha,uint16_t loop_id)640 static bool qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id)
641 {
642 struct qla_hw_data *ha = vha->hw;
643
644 if (IS_FWI2_CAPABLE(ha))
645 return loop_id > NPH_LAST_HANDLE;
646
647 return (loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) ||
648 loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST;
649 }
650
651 /**
652 * qla2x00_find_new_loop_id - scan through our port list and find a new usable loop ID
653 * @vha: adapter state pointer.
654 * @dev: port structure pointer.
655 *
656 * Returns:
657 * qla2x00 local function return status code.
658 *
659 * Context:
660 * Kernel context.
661 */
qla2x00_find_new_loop_id(scsi_qla_host_t * vha,fc_port_t * dev)662 static int qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
663 {
664 int rval;
665 struct qla_hw_data *ha = vha->hw;
666 unsigned long flags = 0;
667
668 rval = QLA_SUCCESS;
669
670 spin_lock_irqsave(&ha->vport_slock, flags);
671
672 dev->loop_id = find_first_zero_bit(ha->loop_id_map, LOOPID_MAP_SIZE);
673 if (dev->loop_id >= LOOPID_MAP_SIZE ||
674 qla2x00_is_reserved_id(vha, dev->loop_id)) {
675 dev->loop_id = FC_NO_LOOP_ID;
676 rval = QLA_FUNCTION_FAILED;
677 } else {
678 set_bit(dev->loop_id, ha->loop_id_map);
679 }
680 spin_unlock_irqrestore(&ha->vport_slock, flags);
681
682 if (rval == QLA_SUCCESS)
683 ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
684 "Assigning new loopid=%x, portid=%x.\n",
685 dev->loop_id, dev->d_id.b24);
686 else
687 ql_log(ql_log_warn, dev->vha, 0x2087,
688 "No loop_id's available, portid=%x.\n",
689 dev->d_id.b24);
690
691 return rval;
692 }
693
qla2x00_clear_loop_id(fc_port_t * fcport)694 void qla2x00_clear_loop_id(fc_port_t *fcport)
695 {
696 struct qla_hw_data *ha = fcport->vha->hw;
697
698 if (fcport->loop_id == FC_NO_LOOP_ID ||
699 qla2x00_is_reserved_id(fcport->vha, fcport->loop_id))
700 return;
701
702 clear_bit(fcport->loop_id, ha->loop_id_map);
703 fcport->loop_id = FC_NO_LOOP_ID;
704 }
705
qla24xx_handle_gnl_done_event(scsi_qla_host_t * vha,struct event_arg * ea)706 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha,
707 struct event_arg *ea)
708 {
709 fc_port_t *fcport, *conflict_fcport;
710 struct get_name_list_extended *e;
711 u16 i, n, found = 0, loop_id;
712 port_id_t id;
713 u64 wwn;
714 u16 data[2];
715 u8 current_login_state, nvme_cls;
716
717 fcport = ea->fcport;
718 ql_dbg(ql_dbg_disc, vha, 0xffff,
719 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d edif %d\n",
720 __func__, fcport->port_name, fcport->disc_state,
721 fcport->fw_login_state, ea->rc,
722 fcport->login_gen, fcport->last_login_gen,
723 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id, fcport->edif.enable);
724
725 if (fcport->disc_state == DSC_DELETE_PEND)
726 return;
727
728 if (ea->rc) { /* rval */
729 if (fcport->login_retry == 0) {
730 ql_dbg(ql_dbg_disc, vha, 0x20de,
731 "GNL failed Port login retry %8phN, retry cnt=%d.\n",
732 fcport->port_name, fcport->login_retry);
733 }
734 return;
735 }
736
737 if (fcport->last_rscn_gen != fcport->rscn_gen) {
738 qla_rscn_replay(fcport);
739 qlt_schedule_sess_for_deletion(fcport);
740 return;
741 } else if (fcport->last_login_gen != fcport->login_gen) {
742 ql_dbg(ql_dbg_disc, vha, 0x20e0,
743 "%s %8phC login gen changed\n",
744 __func__, fcport->port_name);
745 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
746 return;
747 }
748
749 n = ea->data[0] / sizeof(struct get_name_list_extended);
750
751 ql_dbg(ql_dbg_disc, vha, 0x20e1,
752 "%s %d %8phC n %d %02x%02x%02x lid %d \n",
753 __func__, __LINE__, fcport->port_name, n,
754 fcport->d_id.b.domain, fcport->d_id.b.area,
755 fcport->d_id.b.al_pa, fcport->loop_id);
756
757 for (i = 0; i < n; i++) {
758 e = &vha->gnl.l[i];
759 wwn = wwn_to_u64(e->port_name);
760 id.b.domain = e->port_id[2];
761 id.b.area = e->port_id[1];
762 id.b.al_pa = e->port_id[0];
763 id.b.rsvd_1 = 0;
764
765 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE))
766 continue;
767
768 if (IS_SW_RESV_ADDR(id))
769 continue;
770
771 found = 1;
772
773 loop_id = le16_to_cpu(e->nport_handle);
774 loop_id = (loop_id & 0x7fff);
775 nvme_cls = e->current_login_state >> 4;
776 current_login_state = e->current_login_state & 0xf;
777
778 if (PRLI_PHASE(nvme_cls)) {
779 current_login_state = nvme_cls;
780 fcport->fc4_type &= ~FS_FC4TYPE_FCP;
781 fcport->fc4_type |= FS_FC4TYPE_NVME;
782 } else if (PRLI_PHASE(current_login_state)) {
783 fcport->fc4_type |= FS_FC4TYPE_FCP;
784 fcport->fc4_type &= ~FS_FC4TYPE_NVME;
785 }
786
787 ql_dbg(ql_dbg_disc, vha, 0x20e2,
788 "%s found %8phC CLS [%x|%x] fc4_type %d ID[%06x|%06x] lid[%d|%d]\n",
789 __func__, fcport->port_name,
790 e->current_login_state, fcport->fw_login_state,
791 fcport->fc4_type, id.b24, fcport->d_id.b24,
792 loop_id, fcport->loop_id);
793
794 switch (fcport->disc_state) {
795 case DSC_DELETE_PEND:
796 case DSC_DELETED:
797 break;
798 default:
799 if ((id.b24 != fcport->d_id.b24 &&
800 fcport->d_id.b24 &&
801 fcport->loop_id != FC_NO_LOOP_ID) ||
802 (fcport->loop_id != FC_NO_LOOP_ID &&
803 fcport->loop_id != loop_id)) {
804 ql_dbg(ql_dbg_disc, vha, 0x20e3,
805 "%s %d %8phC post del sess\n",
806 __func__, __LINE__, fcport->port_name);
807 if (fcport->n2n_flag)
808 fcport->d_id.b24 = 0;
809 qlt_schedule_sess_for_deletion(fcport);
810 return;
811 }
812 break;
813 }
814
815 fcport->loop_id = loop_id;
816 if (fcport->n2n_flag)
817 fcport->d_id.b24 = id.b24;
818
819 wwn = wwn_to_u64(fcport->port_name);
820 qlt_find_sess_invalidate_other(vha, wwn,
821 id, loop_id, &conflict_fcport);
822
823 if (conflict_fcport) {
824 /*
825 * Another share fcport share the same loop_id &
826 * nport id. Conflict fcport needs to finish
827 * cleanup before this fcport can proceed to login.
828 */
829 conflict_fcport->conflict = fcport;
830 fcport->login_pause = 1;
831 }
832
833 switch (vha->hw->current_topology) {
834 default:
835 switch (current_login_state) {
836 case DSC_LS_PRLI_COMP:
837 ql_dbg(ql_dbg_disc,
838 vha, 0x20e4, "%s %d %8phC post gpdb\n",
839 __func__, __LINE__, fcport->port_name);
840
841 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
842 fcport->port_type = FCT_INITIATOR;
843 else
844 fcport->port_type = FCT_TARGET;
845 data[0] = data[1] = 0;
846 qla2x00_post_async_adisc_work(vha, fcport,
847 data);
848 break;
849 case DSC_LS_PLOGI_COMP:
850 if (vha->hw->flags.edif_enabled) {
851 /* check to see if App support Secure */
852 qla24xx_post_gpdb_work(vha, fcport, 0);
853 break;
854 }
855 fallthrough;
856 case DSC_LS_PORT_UNAVAIL:
857 default:
858 if (fcport->loop_id == FC_NO_LOOP_ID) {
859 qla2x00_find_new_loop_id(vha, fcport);
860 fcport->fw_login_state =
861 DSC_LS_PORT_UNAVAIL;
862 }
863 ql_dbg(ql_dbg_disc, vha, 0x20e5,
864 "%s %d %8phC\n", __func__, __LINE__,
865 fcport->port_name);
866 qla24xx_fcport_handle_login(vha, fcport);
867 break;
868 }
869 break;
870 case ISP_CFG_N:
871 fcport->fw_login_state = current_login_state;
872 fcport->d_id = id;
873 switch (current_login_state) {
874 case DSC_LS_PRLI_PEND:
875 /*
876 * In the middle of PRLI. Let it finish.
877 * Allow relogin code to recheck state again
878 * with GNL. Push disc_state back to DELETED
879 * so GNL can go out again
880 */
881 qla2x00_set_fcport_disc_state(fcport,
882 DSC_DELETED);
883 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
884 break;
885 case DSC_LS_PRLI_COMP:
886 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
887 fcport->port_type = FCT_INITIATOR;
888 else
889 fcport->port_type = FCT_TARGET;
890
891 data[0] = data[1] = 0;
892 qla2x00_post_async_adisc_work(vha, fcport,
893 data);
894 break;
895 case DSC_LS_PLOGI_COMP:
896 if (vha->hw->flags.edif_enabled &&
897 DBELL_ACTIVE(vha)) {
898 /* check to see if App support secure or not */
899 qla24xx_post_gpdb_work(vha, fcport, 0);
900 break;
901 }
902 if (fcport_is_bigger(fcport)) {
903 /* local adapter is smaller */
904 if (fcport->loop_id != FC_NO_LOOP_ID)
905 qla2x00_clear_loop_id(fcport);
906
907 fcport->loop_id = loop_id;
908 qla24xx_fcport_handle_login(vha,
909 fcport);
910 break;
911 }
912 fallthrough;
913 default:
914 if (fcport_is_smaller(fcport)) {
915 /* local adapter is bigger */
916 if (fcport->loop_id != FC_NO_LOOP_ID)
917 qla2x00_clear_loop_id(fcport);
918
919 fcport->loop_id = loop_id;
920 qla24xx_fcport_handle_login(vha,
921 fcport);
922 }
923 break;
924 }
925 break;
926 } /* switch (ha->current_topology) */
927 }
928
929 if (!found) {
930 switch (vha->hw->current_topology) {
931 case ISP_CFG_F:
932 case ISP_CFG_FL:
933 for (i = 0; i < n; i++) {
934 e = &vha->gnl.l[i];
935 id.b.domain = e->port_id[0];
936 id.b.area = e->port_id[1];
937 id.b.al_pa = e->port_id[2];
938 id.b.rsvd_1 = 0;
939 loop_id = le16_to_cpu(e->nport_handle);
940
941 if (fcport->d_id.b24 == id.b24) {
942 conflict_fcport =
943 qla2x00_find_fcport_by_wwpn(vha,
944 e->port_name, 0);
945 if (conflict_fcport) {
946 ql_dbg(ql_dbg_disc + ql_dbg_verbose,
947 vha, 0x20e5,
948 "%s %d %8phC post del sess\n",
949 __func__, __LINE__,
950 conflict_fcport->port_name);
951 qlt_schedule_sess_for_deletion
952 (conflict_fcport);
953 }
954 }
955 /*
956 * FW already picked this loop id for
957 * another fcport
958 */
959 if (fcport->loop_id == loop_id)
960 fcport->loop_id = FC_NO_LOOP_ID;
961 }
962 qla24xx_fcport_handle_login(vha, fcport);
963 break;
964 case ISP_CFG_N:
965 qla2x00_set_fcport_disc_state(fcport, DSC_DELETED);
966 if (time_after_eq(jiffies, fcport->dm_login_expire)) {
967 if (fcport->n2n_link_reset_cnt < 2) {
968 fcport->n2n_link_reset_cnt++;
969 /*
970 * remote port is not sending PLOGI.
971 * Reset link to kick start his state
972 * machine
973 */
974 set_bit(N2N_LINK_RESET,
975 &vha->dpc_flags);
976 } else {
977 if (fcport->n2n_chip_reset < 1) {
978 ql_log(ql_log_info, vha, 0x705d,
979 "Chip reset to bring laser down");
980 set_bit(ISP_ABORT_NEEDED,
981 &vha->dpc_flags);
982 fcport->n2n_chip_reset++;
983 } else {
984 ql_log(ql_log_info, vha, 0x705d,
985 "Remote port %8ph is not coming back\n",
986 fcport->port_name);
987 fcport->scan_state = 0;
988 }
989 }
990 qla2xxx_wake_dpc(vha);
991 } else {
992 /*
993 * report port suppose to do PLOGI. Give him
994 * more time. FW will catch it.
995 */
996 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
997 }
998 break;
999 case ISP_CFG_NL:
1000 qla24xx_fcport_handle_login(vha, fcport);
1001 break;
1002 default:
1003 break;
1004 }
1005 }
1006 } /* gnl_event */
1007
qla24xx_async_gnl_sp_done(srb_t * sp,int res)1008 static void qla24xx_async_gnl_sp_done(srb_t *sp, int res)
1009 {
1010 struct scsi_qla_host *vha = sp->vha;
1011 unsigned long flags;
1012 struct fc_port *fcport = NULL, *tf;
1013 u16 i, n = 0, loop_id;
1014 struct event_arg ea;
1015 struct get_name_list_extended *e;
1016 u64 wwn;
1017 struct list_head h;
1018 bool found = false;
1019
1020 ql_dbg(ql_dbg_disc, vha, 0x20e7,
1021 "Async done-%s res %x mb[1]=%x mb[2]=%x \n",
1022 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1],
1023 sp->u.iocb_cmd.u.mbx.in_mb[2]);
1024
1025
1026 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE);
1027 memset(&ea, 0, sizeof(ea));
1028 ea.sp = sp;
1029 ea.rc = res;
1030
1031 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >=
1032 sizeof(struct get_name_list_extended)) {
1033 n = sp->u.iocb_cmd.u.mbx.in_mb[1] /
1034 sizeof(struct get_name_list_extended);
1035 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */
1036 }
1037
1038 for (i = 0; i < n; i++) {
1039 e = &vha->gnl.l[i];
1040 loop_id = le16_to_cpu(e->nport_handle);
1041 /* mask out reserve bit */
1042 loop_id = (loop_id & 0x7fff);
1043 set_bit(loop_id, vha->hw->loop_id_map);
1044 wwn = wwn_to_u64(e->port_name);
1045
1046 ql_dbg(ql_dbg_disc, vha, 0x20e8,
1047 "%s %8phC %02x:%02x:%02x CLS %x/%x lid %x \n",
1048 __func__, &wwn, e->port_id[2], e->port_id[1],
1049 e->port_id[0], e->current_login_state, e->last_login_state,
1050 (loop_id & 0x7fff));
1051 }
1052
1053 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1054
1055 INIT_LIST_HEAD(&h);
1056 fcport = tf = NULL;
1057 if (!list_empty(&vha->gnl.fcports))
1058 list_splice_init(&vha->gnl.fcports, &h);
1059 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1060
1061 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) {
1062 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1063 list_del_init(&fcport->gnl_entry);
1064 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1065 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1066 ea.fcport = fcport;
1067
1068 qla24xx_handle_gnl_done_event(vha, &ea);
1069 }
1070
1071 /* create new fcport if fw has knowledge of new sessions */
1072 for (i = 0; i < n; i++) {
1073 port_id_t id;
1074 u64 wwnn;
1075
1076 e = &vha->gnl.l[i];
1077 wwn = wwn_to_u64(e->port_name);
1078
1079 found = false;
1080 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) {
1081 if (!memcmp((u8 *)&wwn, fcport->port_name,
1082 WWN_SIZE)) {
1083 found = true;
1084 break;
1085 }
1086 }
1087
1088 id.b.domain = e->port_id[2];
1089 id.b.area = e->port_id[1];
1090 id.b.al_pa = e->port_id[0];
1091 id.b.rsvd_1 = 0;
1092
1093 if (!found && wwn && !IS_SW_RESV_ADDR(id)) {
1094 ql_dbg(ql_dbg_disc, vha, 0x2065,
1095 "%s %d %8phC %06x post new sess\n",
1096 __func__, __LINE__, (u8 *)&wwn, id.b24);
1097 wwnn = wwn_to_u64(e->node_name);
1098 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn,
1099 (u8 *)&wwnn, NULL, 0);
1100 }
1101 }
1102
1103 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1104 vha->gnl.sent = 0;
1105 if (!list_empty(&vha->gnl.fcports)) {
1106 /* retrigger gnl */
1107 list_for_each_entry_safe(fcport, tf, &vha->gnl.fcports,
1108 gnl_entry) {
1109 list_del_init(&fcport->gnl_entry);
1110 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1111 if (qla24xx_post_gnl_work(vha, fcport) == QLA_SUCCESS)
1112 break;
1113 }
1114 }
1115 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1116
1117 /* ref: INIT */
1118 kref_put(&sp->cmd_kref, qla2x00_sp_release);
1119 }
1120
qla24xx_async_gnl(struct scsi_qla_host * vha,fc_port_t * fcport)1121 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport)
1122 {
1123 srb_t *sp;
1124 int rval = QLA_FUNCTION_FAILED;
1125 unsigned long flags;
1126 u16 *mb;
1127
1128 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
1129 return rval;
1130
1131 ql_dbg(ql_dbg_disc, vha, 0x20d9,
1132 "Async-gnlist WWPN %8phC \n", fcport->port_name);
1133
1134 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1135 fcport->flags |= FCF_ASYNC_SENT;
1136 qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
1137 fcport->last_rscn_gen = fcport->rscn_gen;
1138 fcport->last_login_gen = fcport->login_gen;
1139
1140 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports);
1141 if (vha->gnl.sent) {
1142 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1143 return QLA_SUCCESS;
1144 }
1145 vha->gnl.sent = 1;
1146 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1147
1148 /* ref: INIT */
1149 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1150 if (!sp)
1151 goto done;
1152
1153 sp->type = SRB_MB_IOCB;
1154 sp->name = "gnlist";
1155 sp->gen1 = fcport->rscn_gen;
1156 sp->gen2 = fcport->login_gen;
1157 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
1158 qla24xx_async_gnl_sp_done);
1159
1160 mb = sp->u.iocb_cmd.u.mbx.out_mb;
1161 mb[0] = MBC_PORT_NODE_NAME_LIST;
1162 mb[1] = BIT_2 | BIT_3;
1163 mb[2] = MSW(vha->gnl.ldma);
1164 mb[3] = LSW(vha->gnl.ldma);
1165 mb[6] = MSW(MSD(vha->gnl.ldma));
1166 mb[7] = LSW(MSD(vha->gnl.ldma));
1167 mb[8] = vha->gnl.size;
1168 mb[9] = vha->vp_idx;
1169
1170 ql_dbg(ql_dbg_disc, vha, 0x20da,
1171 "Async-%s - OUT WWPN %8phC hndl %x\n",
1172 sp->name, fcport->port_name, sp->handle);
1173
1174 rval = qla2x00_start_sp(sp);
1175 if (rval != QLA_SUCCESS)
1176 goto done_free_sp;
1177
1178 return rval;
1179
1180 done_free_sp:
1181 /* ref: INIT */
1182 kref_put(&sp->cmd_kref, qla2x00_sp_release);
1183 done:
1184 fcport->flags &= ~(FCF_ASYNC_ACTIVE | FCF_ASYNC_SENT);
1185 return rval;
1186 }
1187
qla24xx_post_gnl_work(struct scsi_qla_host * vha,fc_port_t * fcport)1188 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport)
1189 {
1190 struct qla_work_evt *e;
1191
1192 e = qla2x00_alloc_work(vha, QLA_EVT_GNL);
1193 if (!e)
1194 return QLA_FUNCTION_FAILED;
1195
1196 e->u.fcport.fcport = fcport;
1197 fcport->flags |= FCF_ASYNC_ACTIVE;
1198 return qla2x00_post_work(vha, e);
1199 }
1200
qla24xx_async_gpdb_sp_done(srb_t * sp,int res)1201 static void qla24xx_async_gpdb_sp_done(srb_t *sp, int res)
1202 {
1203 struct scsi_qla_host *vha = sp->vha;
1204 struct qla_hw_data *ha = vha->hw;
1205 fc_port_t *fcport = sp->fcport;
1206 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb;
1207 struct event_arg ea;
1208
1209 ql_dbg(ql_dbg_disc, vha, 0x20db,
1210 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n",
1211 sp->name, res, fcport->port_name, mb[1], mb[2]);
1212
1213 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1214
1215 if (res == QLA_FUNCTION_TIMEOUT)
1216 goto done;
1217
1218 memset(&ea, 0, sizeof(ea));
1219 ea.fcport = fcport;
1220 ea.sp = sp;
1221
1222 qla24xx_handle_gpdb_event(vha, &ea);
1223
1224 done:
1225 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in,
1226 sp->u.iocb_cmd.u.mbx.in_dma);
1227
1228 kref_put(&sp->cmd_kref, qla2x00_sp_release);
1229 }
1230
qla24xx_post_prli_work(struct scsi_qla_host * vha,fc_port_t * fcport)1231 int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport)
1232 {
1233 struct qla_work_evt *e;
1234
1235 if (vha->host->active_mode == MODE_TARGET)
1236 return QLA_FUNCTION_FAILED;
1237
1238 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI);
1239 if (!e)
1240 return QLA_FUNCTION_FAILED;
1241
1242 e->u.fcport.fcport = fcport;
1243
1244 return qla2x00_post_work(vha, e);
1245 }
1246
qla2x00_async_prli_sp_done(srb_t * sp,int res)1247 static void qla2x00_async_prli_sp_done(srb_t *sp, int res)
1248 {
1249 struct scsi_qla_host *vha = sp->vha;
1250 struct srb_iocb *lio = &sp->u.iocb_cmd;
1251 struct event_arg ea;
1252
1253 ql_dbg(ql_dbg_disc, vha, 0x2129,
1254 "%s %8phC res %x\n", __func__,
1255 sp->fcport->port_name, res);
1256
1257 sp->fcport->flags &= ~FCF_ASYNC_SENT;
1258
1259 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
1260 memset(&ea, 0, sizeof(ea));
1261 ea.fcport = sp->fcport;
1262 ea.data[0] = lio->u.logio.data[0];
1263 ea.data[1] = lio->u.logio.data[1];
1264 ea.iop[0] = lio->u.logio.iop[0];
1265 ea.iop[1] = lio->u.logio.iop[1];
1266 ea.sp = sp;
1267 if (res == QLA_OS_TIMER_EXPIRED)
1268 ea.data[0] = QLA_OS_TIMER_EXPIRED;
1269 else if (res)
1270 ea.data[0] = MBS_COMMAND_ERROR;
1271
1272 qla24xx_handle_prli_done_event(vha, &ea);
1273 }
1274
1275 kref_put(&sp->cmd_kref, qla2x00_sp_release);
1276 }
1277
1278 int
qla24xx_async_prli(struct scsi_qla_host * vha,fc_port_t * fcport)1279 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport)
1280 {
1281 srb_t *sp;
1282 struct srb_iocb *lio;
1283 int rval = QLA_FUNCTION_FAILED;
1284
1285 if (!vha->flags.online) {
1286 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n",
1287 __func__, __LINE__, fcport->port_name);
1288 return rval;
1289 }
1290
1291 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND ||
1292 fcport->fw_login_state == DSC_LS_PRLI_PEND) &&
1293 qla_dual_mode_enabled(vha)) {
1294 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n",
1295 __func__, __LINE__, fcport->port_name);
1296 return rval;
1297 }
1298
1299 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1300 if (!sp)
1301 return rval;
1302
1303 fcport->flags |= FCF_ASYNC_SENT;
1304 fcport->logout_completed = 0;
1305
1306 sp->type = SRB_PRLI_CMD;
1307 sp->name = "prli";
1308 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
1309 qla2x00_async_prli_sp_done);
1310
1311 lio = &sp->u.iocb_cmd;
1312 lio->u.logio.flags = 0;
1313
1314 if (NVME_TARGET(vha->hw, fcport))
1315 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI;
1316
1317 ql_dbg(ql_dbg_disc, vha, 0x211b,
1318 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d fc4type %x priority %x %s.\n",
1319 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24,
1320 fcport->login_retry, fcport->fc4_type, vha->hw->fc4_type_priority,
1321 NVME_TARGET(vha->hw, fcport) ? "nvme" : "fcp");
1322
1323 rval = qla2x00_start_sp(sp);
1324 if (rval != QLA_SUCCESS) {
1325 fcport->flags |= FCF_LOGIN_NEEDED;
1326 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1327 goto done_free_sp;
1328 }
1329
1330 return rval;
1331
1332 done_free_sp:
1333 /* ref: INIT */
1334 kref_put(&sp->cmd_kref, qla2x00_sp_release);
1335 fcport->flags &= ~FCF_ASYNC_SENT;
1336 return rval;
1337 }
1338
qla24xx_post_gpdb_work(struct scsi_qla_host * vha,fc_port_t * fcport,u8 opt)1339 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1340 {
1341 struct qla_work_evt *e;
1342
1343 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB);
1344 if (!e)
1345 return QLA_FUNCTION_FAILED;
1346
1347 e->u.fcport.fcport = fcport;
1348 e->u.fcport.opt = opt;
1349 fcport->flags |= FCF_ASYNC_ACTIVE;
1350 return qla2x00_post_work(vha, e);
1351 }
1352
qla24xx_async_gpdb(struct scsi_qla_host * vha,fc_port_t * fcport,u8 opt)1353 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1354 {
1355 srb_t *sp;
1356 struct srb_iocb *mbx;
1357 int rval = QLA_FUNCTION_FAILED;
1358 u16 *mb;
1359 dma_addr_t pd_dma;
1360 struct port_database_24xx *pd;
1361 struct qla_hw_data *ha = vha->hw;
1362
1363 if (IS_SESSION_DELETED(fcport)) {
1364 ql_log(ql_log_warn, vha, 0xffff,
1365 "%s: %8phC is being delete - not sending command.\n",
1366 __func__, fcport->port_name);
1367 fcport->flags &= ~FCF_ASYNC_ACTIVE;
1368 return rval;
1369 }
1370
1371 if (!vha->flags.online || fcport->flags & FCF_ASYNC_SENT) {
1372 ql_log(ql_log_warn, vha, 0xffff,
1373 "%s: %8phC online %d flags %x - not sending command.\n",
1374 __func__, fcport->port_name, vha->flags.online, fcport->flags);
1375 goto done;
1376 }
1377
1378 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1379 if (!sp)
1380 goto done;
1381
1382 qla2x00_set_fcport_disc_state(fcport, DSC_GPDB);
1383
1384 fcport->flags |= FCF_ASYNC_SENT;
1385 sp->type = SRB_MB_IOCB;
1386 sp->name = "gpdb";
1387 sp->gen1 = fcport->rscn_gen;
1388 sp->gen2 = fcport->login_gen;
1389 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
1390 qla24xx_async_gpdb_sp_done);
1391
1392 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
1393 if (pd == NULL) {
1394 ql_log(ql_log_warn, vha, 0xd043,
1395 "Failed to allocate port database structure.\n");
1396 goto done_free_sp;
1397 }
1398
1399 mb = sp->u.iocb_cmd.u.mbx.out_mb;
1400 mb[0] = MBC_GET_PORT_DATABASE;
1401 mb[1] = fcport->loop_id;
1402 mb[2] = MSW(pd_dma);
1403 mb[3] = LSW(pd_dma);
1404 mb[6] = MSW(MSD(pd_dma));
1405 mb[7] = LSW(MSD(pd_dma));
1406 mb[9] = vha->vp_idx;
1407 mb[10] = opt;
1408
1409 mbx = &sp->u.iocb_cmd;
1410 mbx->u.mbx.in = (void *)pd;
1411 mbx->u.mbx.in_dma = pd_dma;
1412
1413 ql_dbg(ql_dbg_disc, vha, 0x20dc,
1414 "Async-%s %8phC hndl %x opt %x\n",
1415 sp->name, fcport->port_name, sp->handle, opt);
1416
1417 rval = qla2x00_start_sp(sp);
1418 if (rval != QLA_SUCCESS)
1419 goto done_free_sp;
1420 return rval;
1421
1422 done_free_sp:
1423 if (pd)
1424 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1425
1426 kref_put(&sp->cmd_kref, qla2x00_sp_release);
1427 fcport->flags &= ~FCF_ASYNC_SENT;
1428 done:
1429 fcport->flags &= ~FCF_ASYNC_ACTIVE;
1430 qla24xx_post_gpdb_work(vha, fcport, opt);
1431 return rval;
1432 }
1433
1434 static
__qla24xx_handle_gpdb_event(scsi_qla_host_t * vha,struct event_arg * ea)1435 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1436 {
1437 unsigned long flags;
1438
1439 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1440 ea->fcport->login_gen++;
1441 ea->fcport->deleted = 0;
1442 ea->fcport->logout_on_delete = 1;
1443
1444 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) {
1445 vha->fcport_count++;
1446 ea->fcport->login_succ = 1;
1447
1448 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1449 qla24xx_sched_upd_fcport(ea->fcport);
1450 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1451 } else if (ea->fcport->login_succ) {
1452 /*
1453 * We have an existing session. A late RSCN delivery
1454 * must have triggered the session to be re-validate.
1455 * Session is still valid.
1456 */
1457 ql_dbg(ql_dbg_disc, vha, 0x20d6,
1458 "%s %d %8phC session revalidate success\n",
1459 __func__, __LINE__, ea->fcport->port_name);
1460 qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_COMPLETE);
1461 }
1462 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1463 }
1464
qla_chk_secure_login(scsi_qla_host_t * vha,fc_port_t * fcport,struct port_database_24xx * pd)1465 static int qla_chk_secure_login(scsi_qla_host_t *vha, fc_port_t *fcport,
1466 struct port_database_24xx *pd)
1467 {
1468 int rc = 0;
1469
1470 if (pd->secure_login) {
1471 ql_dbg(ql_dbg_disc, vha, 0x104d,
1472 "Secure Login established on %8phC\n",
1473 fcport->port_name);
1474 fcport->flags |= FCF_FCSP_DEVICE;
1475 } else {
1476 ql_dbg(ql_dbg_disc, vha, 0x104d,
1477 "non-Secure Login %8phC",
1478 fcport->port_name);
1479 fcport->flags &= ~FCF_FCSP_DEVICE;
1480 }
1481 if (vha->hw->flags.edif_enabled) {
1482 if (fcport->flags & FCF_FCSP_DEVICE) {
1483 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_AUTH_PEND);
1484 /* Start edif prli timer & ring doorbell for app */
1485 fcport->edif.rx_sa_set = 0;
1486 fcport->edif.tx_sa_set = 0;
1487 fcport->edif.rx_sa_pending = 0;
1488 fcport->edif.tx_sa_pending = 0;
1489
1490 qla2x00_post_aen_work(vha, FCH_EVT_PORT_ONLINE,
1491 fcport->d_id.b24);
1492
1493 if (DBELL_ACTIVE(vha)) {
1494 ql_dbg(ql_dbg_disc, vha, 0x20ef,
1495 "%s %d %8phC EDIF: post DB_AUTH: AUTH needed\n",
1496 __func__, __LINE__, fcport->port_name);
1497 fcport->edif.app_sess_online = 1;
1498
1499 qla_edb_eventcreate(vha, VND_CMD_AUTH_STATE_NEEDED,
1500 fcport->d_id.b24, 0, fcport);
1501 }
1502
1503 rc = 1;
1504 } else if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) {
1505 ql_dbg(ql_dbg_disc, vha, 0x2117,
1506 "%s %d %8phC post prli\n",
1507 __func__, __LINE__, fcport->port_name);
1508 qla24xx_post_prli_work(vha, fcport);
1509 rc = 1;
1510 }
1511 }
1512 return rc;
1513 }
1514
1515 static
qla24xx_handle_gpdb_event(scsi_qla_host_t * vha,struct event_arg * ea)1516 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1517 {
1518 fc_port_t *fcport = ea->fcport;
1519 struct port_database_24xx *pd;
1520 struct srb *sp = ea->sp;
1521 uint8_t ls;
1522
1523 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in;
1524
1525 fcport->flags &= ~FCF_ASYNC_SENT;
1526
1527 ql_dbg(ql_dbg_disc, vha, 0x20d2,
1528 "%s %8phC DS %d LS %x fc4_type %x rc %x\n", __func__,
1529 fcport->port_name, fcport->disc_state, pd->current_login_state,
1530 fcport->fc4_type, ea->rc);
1531
1532 if (fcport->disc_state == DSC_DELETE_PEND) {
1533 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC\n",
1534 __func__, __LINE__, fcport->port_name);
1535 return;
1536 }
1537
1538 if (NVME_TARGET(vha->hw, fcport))
1539 ls = pd->current_login_state >> 4;
1540 else
1541 ls = pd->current_login_state & 0xf;
1542
1543 if (ea->sp->gen2 != fcport->login_gen) {
1544 /* target side must have changed it. */
1545
1546 ql_dbg(ql_dbg_disc, vha, 0x20d3,
1547 "%s %8phC generation changed\n",
1548 __func__, fcport->port_name);
1549 return;
1550 } else if (ea->sp->gen1 != fcport->rscn_gen) {
1551 qla_rscn_replay(fcport);
1552 qlt_schedule_sess_for_deletion(fcport);
1553 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n",
1554 __func__, __LINE__, fcport->port_name, ls);
1555 return;
1556 }
1557
1558 switch (ls) {
1559 case PDS_PRLI_COMPLETE:
1560 __qla24xx_parse_gpdb(vha, fcport, pd);
1561 break;
1562 case PDS_PLOGI_COMPLETE:
1563 if (qla_chk_secure_login(vha, fcport, pd)) {
1564 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n",
1565 __func__, __LINE__, fcport->port_name, ls);
1566 return;
1567 }
1568 fallthrough;
1569 case PDS_PLOGI_PENDING:
1570 case PDS_PRLI_PENDING:
1571 case PDS_PRLI2_PENDING:
1572 /* Set discovery state back to GNL to Relogin attempt */
1573 if (qla_dual_mode_enabled(vha) ||
1574 qla_ini_mode_enabled(vha)) {
1575 qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
1576 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1577 }
1578 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n",
1579 __func__, __LINE__, fcport->port_name, ls);
1580 return;
1581 case PDS_LOGO_PENDING:
1582 case PDS_PORT_UNAVAILABLE:
1583 default:
1584 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n",
1585 __func__, __LINE__, fcport->port_name);
1586 qlt_schedule_sess_for_deletion(fcport);
1587 return;
1588 }
1589 __qla24xx_handle_gpdb_event(vha, ea);
1590 } /* gpdb event */
1591
qla_chk_n2n_b4_login(struct scsi_qla_host * vha,fc_port_t * fcport)1592 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1593 {
1594 u8 login = 0;
1595 int rc;
1596
1597 ql_dbg(ql_dbg_disc, vha, 0x307b,
1598 "%s %8phC DS %d LS %d lid %d retries=%d\n",
1599 __func__, fcport->port_name, fcport->disc_state,
1600 fcport->fw_login_state, fcport->loop_id, fcport->login_retry);
1601
1602 if (qla_tgt_mode_enabled(vha))
1603 return;
1604
1605 if (qla_dual_mode_enabled(vha)) {
1606 if (N2N_TOPO(vha->hw)) {
1607 u64 mywwn, wwn;
1608
1609 mywwn = wwn_to_u64(vha->port_name);
1610 wwn = wwn_to_u64(fcport->port_name);
1611 if (mywwn > wwn)
1612 login = 1;
1613 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1614 && time_after_eq(jiffies,
1615 fcport->plogi_nack_done_deadline))
1616 login = 1;
1617 } else {
1618 login = 1;
1619 }
1620 } else {
1621 /* initiator mode */
1622 login = 1;
1623 }
1624
1625 if (login && fcport->login_retry) {
1626 fcport->login_retry--;
1627 if (fcport->loop_id == FC_NO_LOOP_ID) {
1628 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
1629 rc = qla2x00_find_new_loop_id(vha, fcport);
1630 if (rc) {
1631 ql_dbg(ql_dbg_disc, vha, 0x20e6,
1632 "%s %d %8phC post del sess - out of loopid\n",
1633 __func__, __LINE__, fcport->port_name);
1634 fcport->scan_state = 0;
1635 qlt_schedule_sess_for_deletion(fcport);
1636 return;
1637 }
1638 }
1639 ql_dbg(ql_dbg_disc, vha, 0x20bf,
1640 "%s %d %8phC post login\n",
1641 __func__, __LINE__, fcport->port_name);
1642 qla2x00_post_async_login_work(vha, fcport, NULL);
1643 }
1644 }
1645
qla24xx_fcport_handle_login(struct scsi_qla_host * vha,fc_port_t * fcport)1646 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1647 {
1648 u16 data[2];
1649 u64 wwn;
1650 u16 sec;
1651
1652 ql_dbg(ql_dbg_disc, vha, 0x20d8,
1653 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d fc4type %x\n",
1654 __func__, fcport->port_name, fcport->disc_state,
1655 fcport->fw_login_state, fcport->login_pause, fcport->flags,
1656 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen,
1657 fcport->login_gen, fcport->loop_id, fcport->scan_state,
1658 fcport->fc4_type);
1659
1660 if (fcport->scan_state != QLA_FCPORT_FOUND ||
1661 fcport->disc_state == DSC_DELETE_PEND)
1662 return 0;
1663
1664 if ((fcport->loop_id != FC_NO_LOOP_ID) &&
1665 qla_dual_mode_enabled(vha) &&
1666 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1667 (fcport->fw_login_state == DSC_LS_PRLI_PEND)))
1668 return 0;
1669
1670 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP &&
1671 !N2N_TOPO(vha->hw)) {
1672 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1673 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1674 return 0;
1675 }
1676 }
1677
1678 /* Target won't initiate port login if fabric is present */
1679 if (vha->host->active_mode == MODE_TARGET && !N2N_TOPO(vha->hw))
1680 return 0;
1681
1682 if (fcport->flags & (FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE)) {
1683 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1684 return 0;
1685 }
1686
1687 switch (fcport->disc_state) {
1688 case DSC_DELETED:
1689 wwn = wwn_to_u64(fcport->node_name);
1690 switch (vha->hw->current_topology) {
1691 case ISP_CFG_N:
1692 if (fcport_is_smaller(fcport)) {
1693 /* this adapter is bigger */
1694 if (fcport->login_retry) {
1695 if (fcport->loop_id == FC_NO_LOOP_ID) {
1696 qla2x00_find_new_loop_id(vha,
1697 fcport);
1698 fcport->fw_login_state =
1699 DSC_LS_PORT_UNAVAIL;
1700 }
1701 fcport->login_retry--;
1702 qla_post_els_plogi_work(vha, fcport);
1703 } else {
1704 ql_log(ql_log_info, vha, 0x705d,
1705 "Unable to reach remote port %8phC",
1706 fcport->port_name);
1707 }
1708 } else {
1709 qla24xx_post_gnl_work(vha, fcport);
1710 }
1711 break;
1712 default:
1713 if (wwn == 0) {
1714 ql_dbg(ql_dbg_disc, vha, 0xffff,
1715 "%s %d %8phC post GNNID\n",
1716 __func__, __LINE__, fcport->port_name);
1717 qla24xx_post_gnnid_work(vha, fcport);
1718 } else if (fcport->loop_id == FC_NO_LOOP_ID) {
1719 ql_dbg(ql_dbg_disc, vha, 0x20bd,
1720 "%s %d %8phC post gnl\n",
1721 __func__, __LINE__, fcport->port_name);
1722 qla24xx_post_gnl_work(vha, fcport);
1723 } else {
1724 qla_chk_n2n_b4_login(vha, fcport);
1725 }
1726 break;
1727 }
1728 break;
1729
1730 case DSC_GNL:
1731 switch (vha->hw->current_topology) {
1732 case ISP_CFG_N:
1733 if ((fcport->current_login_state & 0xf) == 0x6) {
1734 ql_dbg(ql_dbg_disc, vha, 0x2118,
1735 "%s %d %8phC post GPDB work\n",
1736 __func__, __LINE__, fcport->port_name);
1737 fcport->chip_reset =
1738 vha->hw->base_qpair->chip_reset;
1739 qla24xx_post_gpdb_work(vha, fcport, 0);
1740 } else {
1741 ql_dbg(ql_dbg_disc, vha, 0x2118,
1742 "%s %d %8phC post %s PRLI\n",
1743 __func__, __LINE__, fcport->port_name,
1744 NVME_TARGET(vha->hw, fcport) ? "NVME" :
1745 "FC");
1746 qla24xx_post_prli_work(vha, fcport);
1747 }
1748 break;
1749 default:
1750 if (fcport->login_pause) {
1751 ql_dbg(ql_dbg_disc, vha, 0x20d8,
1752 "%s %d %8phC exit\n",
1753 __func__, __LINE__,
1754 fcport->port_name);
1755 fcport->last_rscn_gen = fcport->rscn_gen;
1756 fcport->last_login_gen = fcport->login_gen;
1757 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1758 break;
1759 }
1760 qla_chk_n2n_b4_login(vha, fcport);
1761 break;
1762 }
1763 break;
1764
1765 case DSC_LOGIN_FAILED:
1766 if (N2N_TOPO(vha->hw))
1767 qla_chk_n2n_b4_login(vha, fcport);
1768 else
1769 qlt_schedule_sess_for_deletion(fcport);
1770 break;
1771
1772 case DSC_LOGIN_COMPLETE:
1773 /* recheck login state */
1774 data[0] = data[1] = 0;
1775 qla2x00_post_async_adisc_work(vha, fcport, data);
1776 break;
1777
1778 case DSC_LOGIN_PEND:
1779 if (vha->hw->flags.edif_enabled)
1780 break;
1781
1782 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) {
1783 ql_dbg(ql_dbg_disc, vha, 0x2118,
1784 "%s %d %8phC post %s PRLI\n",
1785 __func__, __LINE__, fcport->port_name,
1786 NVME_TARGET(vha->hw, fcport) ? "NVME" : "FC");
1787 qla24xx_post_prli_work(vha, fcport);
1788 }
1789 break;
1790
1791 case DSC_UPD_FCPORT:
1792 sec = jiffies_to_msecs(jiffies -
1793 fcport->jiffies_at_registration)/1000;
1794 if (fcport->sec_since_registration < sec && sec &&
1795 !(sec % 60)) {
1796 fcport->sec_since_registration = sec;
1797 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff,
1798 "%s %8phC - Slow Rport registration(%d Sec)\n",
1799 __func__, fcport->port_name, sec);
1800 }
1801
1802 if (fcport->next_disc_state != DSC_DELETE_PEND)
1803 fcport->next_disc_state = DSC_ADISC;
1804 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1805 break;
1806
1807 default:
1808 break;
1809 }
1810
1811 return 0;
1812 }
1813
qla24xx_post_newsess_work(struct scsi_qla_host * vha,port_id_t * id,u8 * port_name,u8 * node_name,void * pla,u8 fc4_type)1814 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id,
1815 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type)
1816 {
1817 struct qla_work_evt *e;
1818
1819 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS);
1820 if (!e)
1821 return QLA_FUNCTION_FAILED;
1822
1823 e->u.new_sess.id = *id;
1824 e->u.new_sess.pla = pla;
1825 e->u.new_sess.fc4_type = fc4_type;
1826 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE);
1827 if (node_name)
1828 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE);
1829
1830 return qla2x00_post_work(vha, e);
1831 }
1832
qla2x00_handle_rscn(scsi_qla_host_t * vha,struct event_arg * ea)1833 void qla2x00_handle_rscn(scsi_qla_host_t *vha, struct event_arg *ea)
1834 {
1835 fc_port_t *fcport;
1836 unsigned long flags;
1837
1838 switch (ea->id.b.rsvd_1) {
1839 case RSCN_PORT_ADDR:
1840 fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1);
1841 if (fcport) {
1842 if (fcport->flags & FCF_FCP2_DEVICE &&
1843 atomic_read(&fcport->state) == FCS_ONLINE) {
1844 ql_dbg(ql_dbg_disc, vha, 0x2115,
1845 "Delaying session delete for FCP2 portid=%06x %8phC ",
1846 fcport->d_id.b24, fcport->port_name);
1847 return;
1848 }
1849
1850 if (vha->hw->flags.edif_enabled && DBELL_ACTIVE(vha)) {
1851 /*
1852 * On ipsec start by remote port, Target port
1853 * may use RSCN to trigger initiator to
1854 * relogin. If driver is already in the
1855 * process of a relogin, then ignore the RSCN
1856 * and allow the current relogin to continue.
1857 * This reduces thrashing of the connection.
1858 */
1859 if (atomic_read(&fcport->state) == FCS_ONLINE) {
1860 /*
1861 * If state = online, then set scan_needed=1 to do relogin.
1862 * Otherwise we're already in the middle of a relogin
1863 */
1864 fcport->scan_needed = 1;
1865 fcport->rscn_gen++;
1866 }
1867 } else {
1868 fcport->scan_needed = 1;
1869 fcport->rscn_gen++;
1870 }
1871 }
1872 break;
1873 case RSCN_AREA_ADDR:
1874 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1875 if (fcport->flags & FCF_FCP2_DEVICE &&
1876 atomic_read(&fcport->state) == FCS_ONLINE)
1877 continue;
1878
1879 if ((ea->id.b24 & 0xffff00) == (fcport->d_id.b24 & 0xffff00)) {
1880 fcport->scan_needed = 1;
1881 fcport->rscn_gen++;
1882 }
1883 }
1884 break;
1885 case RSCN_DOM_ADDR:
1886 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1887 if (fcport->flags & FCF_FCP2_DEVICE &&
1888 atomic_read(&fcport->state) == FCS_ONLINE)
1889 continue;
1890
1891 if ((ea->id.b24 & 0xff0000) == (fcport->d_id.b24 & 0xff0000)) {
1892 fcport->scan_needed = 1;
1893 fcport->rscn_gen++;
1894 }
1895 }
1896 break;
1897 case RSCN_FAB_ADDR:
1898 default:
1899 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1900 if (fcport->flags & FCF_FCP2_DEVICE &&
1901 atomic_read(&fcport->state) == FCS_ONLINE)
1902 continue;
1903
1904 fcport->scan_needed = 1;
1905 fcport->rscn_gen++;
1906 }
1907 break;
1908 }
1909
1910 spin_lock_irqsave(&vha->work_lock, flags);
1911 if (vha->scan.scan_flags == 0) {
1912 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s: schedule\n", __func__);
1913 vha->scan.scan_flags |= SF_QUEUED;
1914 schedule_delayed_work(&vha->scan.scan_work, 5);
1915 }
1916 spin_unlock_irqrestore(&vha->work_lock, flags);
1917 }
1918
qla24xx_handle_relogin_event(scsi_qla_host_t * vha,struct event_arg * ea)1919 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha,
1920 struct event_arg *ea)
1921 {
1922 fc_port_t *fcport = ea->fcport;
1923
1924 if (test_bit(UNLOADING, &vha->dpc_flags))
1925 return;
1926
1927 ql_dbg(ql_dbg_disc, vha, 0x2102,
1928 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n",
1929 __func__, fcport->port_name, fcport->disc_state,
1930 fcport->fw_login_state, fcport->login_pause,
1931 fcport->deleted, fcport->conflict,
1932 fcport->last_rscn_gen, fcport->rscn_gen,
1933 fcport->last_login_gen, fcport->login_gen,
1934 fcport->flags);
1935
1936 if (fcport->last_rscn_gen != fcport->rscn_gen) {
1937 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gnl\n",
1938 __func__, __LINE__, fcport->port_name);
1939 qla24xx_post_gnl_work(vha, fcport);
1940 return;
1941 }
1942
1943 qla24xx_fcport_handle_login(vha, fcport);
1944 }
1945
qla_handle_els_plogi_done(scsi_qla_host_t * vha,struct event_arg * ea)1946 void qla_handle_els_plogi_done(scsi_qla_host_t *vha,
1947 struct event_arg *ea)
1948 {
1949 if (N2N_TOPO(vha->hw) && fcport_is_smaller(ea->fcport) &&
1950 vha->hw->flags.edif_enabled) {
1951 /* check to see if App support Secure */
1952 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1953 return;
1954 }
1955
1956 /* for pure Target Mode, PRLI will not be initiated */
1957 if (vha->host->active_mode == MODE_TARGET)
1958 return;
1959
1960 ql_dbg(ql_dbg_disc, vha, 0x2118,
1961 "%s %d %8phC post PRLI\n",
1962 __func__, __LINE__, ea->fcport->port_name);
1963 qla24xx_post_prli_work(vha, ea->fcport);
1964 }
1965
1966 /*
1967 * RSCN(s) came in for this fcport, but the RSCN(s) was not able
1968 * to be consumed by the fcport
1969 */
qla_rscn_replay(fc_port_t * fcport)1970 void qla_rscn_replay(fc_port_t *fcport)
1971 {
1972 struct event_arg ea;
1973
1974 switch (fcport->disc_state) {
1975 case DSC_DELETE_PEND:
1976 return;
1977 default:
1978 break;
1979 }
1980
1981 if (fcport->scan_needed) {
1982 memset(&ea, 0, sizeof(ea));
1983 ea.id = fcport->d_id;
1984 ea.id.b.rsvd_1 = RSCN_PORT_ADDR;
1985 qla2x00_handle_rscn(fcport->vha, &ea);
1986 }
1987 }
1988
1989 static void
qla2x00_tmf_iocb_timeout(void * data)1990 qla2x00_tmf_iocb_timeout(void *data)
1991 {
1992 srb_t *sp = data;
1993 struct srb_iocb *tmf = &sp->u.iocb_cmd;
1994 int rc, h;
1995 unsigned long flags;
1996
1997 rc = qla24xx_async_abort_cmd(sp, false);
1998 if (rc) {
1999 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
2000 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; h++) {
2001 if (sp->qpair->req->outstanding_cmds[h] == sp) {
2002 sp->qpair->req->outstanding_cmds[h] = NULL;
2003 break;
2004 }
2005 }
2006 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
2007 tmf->u.tmf.comp_status = cpu_to_le16(CS_TIMEOUT);
2008 tmf->u.tmf.data = QLA_FUNCTION_FAILED;
2009 complete(&tmf->u.tmf.comp);
2010 }
2011 }
2012
qla2x00_tmf_sp_done(srb_t * sp,int res)2013 static void qla2x00_tmf_sp_done(srb_t *sp, int res)
2014 {
2015 struct srb_iocb *tmf = &sp->u.iocb_cmd;
2016
2017 complete(&tmf->u.tmf.comp);
2018 }
2019
2020 int
qla2x00_async_tm_cmd(fc_port_t * fcport,uint32_t flags,uint32_t lun,uint32_t tag)2021 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
2022 uint32_t tag)
2023 {
2024 struct scsi_qla_host *vha = fcport->vha;
2025 struct srb_iocb *tm_iocb;
2026 srb_t *sp;
2027 int rval = QLA_FUNCTION_FAILED;
2028
2029 /* ref: INIT */
2030 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
2031 if (!sp)
2032 goto done;
2033
2034 qla_vha_mark_busy(vha);
2035 sp->type = SRB_TM_CMD;
2036 sp->name = "tmf";
2037 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha),
2038 qla2x00_tmf_sp_done);
2039 sp->u.iocb_cmd.timeout = qla2x00_tmf_iocb_timeout;
2040
2041 tm_iocb = &sp->u.iocb_cmd;
2042 init_completion(&tm_iocb->u.tmf.comp);
2043 tm_iocb->u.tmf.flags = flags;
2044 tm_iocb->u.tmf.lun = lun;
2045
2046 ql_dbg(ql_dbg_taskm, vha, 0x802f,
2047 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
2048 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
2049 fcport->d_id.b.area, fcport->d_id.b.al_pa);
2050
2051 rval = qla2x00_start_sp(sp);
2052 if (rval != QLA_SUCCESS)
2053 goto done_free_sp;
2054 wait_for_completion(&tm_iocb->u.tmf.comp);
2055
2056 rval = tm_iocb->u.tmf.data;
2057
2058 if (rval != QLA_SUCCESS) {
2059 ql_log(ql_log_warn, vha, 0x8030,
2060 "TM IOCB failed (%x).\n", rval);
2061 }
2062
2063 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) {
2064 flags = tm_iocb->u.tmf.flags;
2065 lun = (uint16_t)tm_iocb->u.tmf.lun;
2066
2067 /* Issue Marker IOCB */
2068 qla2x00_marker(vha, vha->hw->base_qpair,
2069 fcport->loop_id, lun,
2070 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
2071 }
2072
2073 done_free_sp:
2074 /* ref: INIT */
2075 kref_put(&sp->cmd_kref, qla2x00_sp_release);
2076 fcport->flags &= ~FCF_ASYNC_SENT;
2077 done:
2078 return rval;
2079 }
2080
2081 int
qla24xx_async_abort_command(srb_t * sp)2082 qla24xx_async_abort_command(srb_t *sp)
2083 {
2084 unsigned long flags = 0;
2085
2086 uint32_t handle;
2087 fc_port_t *fcport = sp->fcport;
2088 struct qla_qpair *qpair = sp->qpair;
2089 struct scsi_qla_host *vha = fcport->vha;
2090 struct req_que *req = qpair->req;
2091
2092 spin_lock_irqsave(qpair->qp_lock_ptr, flags);
2093 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
2094 if (req->outstanding_cmds[handle] == sp)
2095 break;
2096 }
2097 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
2098
2099 if (handle == req->num_outstanding_cmds) {
2100 /* Command not found. */
2101 return QLA_ERR_NOT_FOUND;
2102 }
2103 if (sp->type == SRB_FXIOCB_DCMD)
2104 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
2105 FXDISC_ABORT_IOCTL);
2106
2107 return qla24xx_async_abort_cmd(sp, true);
2108 }
2109
2110 static void
qla24xx_handle_prli_done_event(struct scsi_qla_host * vha,struct event_arg * ea)2111 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
2112 {
2113 struct srb *sp;
2114 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
2115 ea->data[0]);
2116
2117 switch (ea->data[0]) {
2118 case MBS_COMMAND_COMPLETE:
2119 ql_dbg(ql_dbg_disc, vha, 0x2118,
2120 "%s %d %8phC post gpdb\n",
2121 __func__, __LINE__, ea->fcport->port_name);
2122
2123 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
2124 ea->fcport->logout_on_delete = 1;
2125 ea->fcport->nvme_prli_service_param = ea->iop[0];
2126 if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST)
2127 ea->fcport->nvme_first_burst_size =
2128 (ea->iop[1] & 0xffff) * 512;
2129 else
2130 ea->fcport->nvme_first_burst_size = 0;
2131 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
2132 break;
2133 default:
2134 sp = ea->sp;
2135 ql_dbg(ql_dbg_disc, vha, 0x2118,
2136 "%s %d %8phC priority %s, fc4type %x prev try %s\n",
2137 __func__, __LINE__, ea->fcport->port_name,
2138 vha->hw->fc4_type_priority == FC4_PRIORITY_FCP ?
2139 "FCP" : "NVMe", ea->fcport->fc4_type,
2140 (sp->u.iocb_cmd.u.logio.flags & SRB_LOGIN_NVME_PRLI) ?
2141 "NVME" : "FCP");
2142
2143 if (NVME_FCP_TARGET(ea->fcport)) {
2144 if (sp->u.iocb_cmd.u.logio.flags & SRB_LOGIN_NVME_PRLI)
2145 ea->fcport->do_prli_nvme = 0;
2146 else
2147 ea->fcport->do_prli_nvme = 1;
2148 } else {
2149 ea->fcport->do_prli_nvme = 0;
2150 }
2151
2152 if (N2N_TOPO(vha->hw)) {
2153 if (ea->fcport->n2n_link_reset_cnt ==
2154 vha->hw->login_retry_count &&
2155 ea->fcport->flags & FCF_FCSP_DEVICE) {
2156 /* remote authentication app just started */
2157 ea->fcport->n2n_link_reset_cnt = 0;
2158 }
2159
2160 if (ea->fcport->n2n_link_reset_cnt <
2161 vha->hw->login_retry_count) {
2162 ea->fcport->n2n_link_reset_cnt++;
2163 vha->relogin_jif = jiffies + 2 * HZ;
2164 /*
2165 * PRLI failed. Reset link to kick start
2166 * state machine
2167 */
2168 set_bit(N2N_LINK_RESET, &vha->dpc_flags);
2169 qla2xxx_wake_dpc(vha);
2170 } else {
2171 ql_log(ql_log_warn, vha, 0x2119,
2172 "%s %d %8phC Unable to reconnect\n",
2173 __func__, __LINE__,
2174 ea->fcport->port_name);
2175 }
2176 } else {
2177 /*
2178 * switch connect. login failed. Take connection down
2179 * and allow relogin to retrigger
2180 */
2181 ea->fcport->flags &= ~FCF_ASYNC_SENT;
2182 ea->fcport->keep_nport_handle = 0;
2183 ea->fcport->logout_on_delete = 1;
2184 qlt_schedule_sess_for_deletion(ea->fcport);
2185 }
2186 break;
2187 }
2188 }
2189
2190 void
qla24xx_handle_plogi_done_event(struct scsi_qla_host * vha,struct event_arg * ea)2191 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
2192 {
2193 port_id_t cid; /* conflict Nport id */
2194 u16 lid;
2195 struct fc_port *conflict_fcport;
2196 unsigned long flags;
2197 struct fc_port *fcport = ea->fcport;
2198
2199 ql_dbg(ql_dbg_disc, vha, 0xffff,
2200 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n",
2201 __func__, fcport->port_name, fcport->disc_state,
2202 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen,
2203 ea->sp->gen1, fcport->rscn_gen,
2204 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]);
2205
2206 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
2207 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) {
2208 ql_dbg(ql_dbg_disc, vha, 0x20ea,
2209 "%s %d %8phC Remote is trying to login\n",
2210 __func__, __LINE__, fcport->port_name);
2211 return;
2212 }
2213
2214 if ((fcport->disc_state == DSC_DELETE_PEND) ||
2215 (fcport->disc_state == DSC_DELETED)) {
2216 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2217 return;
2218 }
2219
2220 if (ea->sp->gen2 != fcport->login_gen) {
2221 /* target side must have changed it. */
2222 ql_dbg(ql_dbg_disc, vha, 0x20d3,
2223 "%s %8phC generation changed\n",
2224 __func__, fcport->port_name);
2225 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2226 return;
2227 } else if (ea->sp->gen1 != fcport->rscn_gen) {
2228 ql_dbg(ql_dbg_disc, vha, 0x20d3,
2229 "%s %8phC RSCN generation changed\n",
2230 __func__, fcport->port_name);
2231 qla_rscn_replay(fcport);
2232 qlt_schedule_sess_for_deletion(fcport);
2233 return;
2234 }
2235
2236 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
2237 ea->data[0]);
2238
2239 switch (ea->data[0]) {
2240 case MBS_COMMAND_COMPLETE:
2241 /*
2242 * Driver must validate login state - If PRLI not complete,
2243 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
2244 * requests.
2245 */
2246 if (vha->hw->flags.edif_enabled) {
2247 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
2248 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
2249 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
2250 ea->fcport->logout_on_delete = 1;
2251 ea->fcport->send_els_logo = 0;
2252 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP;
2253 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
2254
2255 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
2256 } else {
2257 if (NVME_TARGET(vha->hw, fcport)) {
2258 ql_dbg(ql_dbg_disc, vha, 0x2117,
2259 "%s %d %8phC post prli\n",
2260 __func__, __LINE__, fcport->port_name);
2261 qla24xx_post_prli_work(vha, fcport);
2262 } else {
2263 ql_dbg(ql_dbg_disc, vha, 0x20ea,
2264 "%s %d %8phC LoopID 0x%x in use with %06x. post gpdb\n",
2265 __func__, __LINE__, fcport->port_name,
2266 fcport->loop_id, fcport->d_id.b24);
2267
2268 set_bit(fcport->loop_id, vha->hw->loop_id_map);
2269 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
2270 fcport->chip_reset = vha->hw->base_qpair->chip_reset;
2271 fcport->logout_on_delete = 1;
2272 fcport->send_els_logo = 0;
2273 fcport->fw_login_state = DSC_LS_PRLI_COMP;
2274 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
2275
2276 qla24xx_post_gpdb_work(vha, fcport, 0);
2277 }
2278 }
2279 break;
2280 case MBS_COMMAND_ERROR:
2281 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n",
2282 __func__, __LINE__, ea->fcport->port_name, ea->data[1]);
2283
2284 qlt_schedule_sess_for_deletion(ea->fcport);
2285 break;
2286 case MBS_LOOP_ID_USED:
2287 /* data[1] = IO PARAM 1 = nport ID */
2288 cid.b.domain = (ea->iop[1] >> 16) & 0xff;
2289 cid.b.area = (ea->iop[1] >> 8) & 0xff;
2290 cid.b.al_pa = ea->iop[1] & 0xff;
2291 cid.b.rsvd_1 = 0;
2292
2293 ql_dbg(ql_dbg_disc, vha, 0x20ec,
2294 "%s %d %8phC lid %#x in use with pid %06x post gnl\n",
2295 __func__, __LINE__, ea->fcport->port_name,
2296 ea->fcport->loop_id, cid.b24);
2297
2298 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
2299 ea->fcport->loop_id = FC_NO_LOOP_ID;
2300 qla24xx_post_gnl_work(vha, ea->fcport);
2301 break;
2302 case MBS_PORT_ID_USED:
2303 lid = ea->iop[1] & 0xffff;
2304 qlt_find_sess_invalidate_other(vha,
2305 wwn_to_u64(ea->fcport->port_name),
2306 ea->fcport->d_id, lid, &conflict_fcport);
2307
2308 if (conflict_fcport) {
2309 /*
2310 * Another fcport share the same loop_id/nport id.
2311 * Conflict fcport needs to finish cleanup before this
2312 * fcport can proceed to login.
2313 */
2314 conflict_fcport->conflict = ea->fcport;
2315 ea->fcport->login_pause = 1;
2316
2317 ql_dbg(ql_dbg_disc, vha, 0x20ed,
2318 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n",
2319 __func__, __LINE__, ea->fcport->port_name,
2320 ea->fcport->d_id.b24, lid);
2321 } else {
2322 ql_dbg(ql_dbg_disc, vha, 0x20ed,
2323 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n",
2324 __func__, __LINE__, ea->fcport->port_name,
2325 ea->fcport->d_id.b24, lid);
2326
2327 qla2x00_clear_loop_id(ea->fcport);
2328 set_bit(lid, vha->hw->loop_id_map);
2329 ea->fcport->loop_id = lid;
2330 ea->fcport->keep_nport_handle = 0;
2331 ea->fcport->logout_on_delete = 1;
2332 qlt_schedule_sess_for_deletion(ea->fcport);
2333 }
2334 break;
2335 }
2336 return;
2337 }
2338
2339 /****************************************************************************/
2340 /* QLogic ISP2x00 Hardware Support Functions. */
2341 /****************************************************************************/
2342
2343 static int
qla83xx_nic_core_fw_load(scsi_qla_host_t * vha)2344 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
2345 {
2346 int rval = QLA_SUCCESS;
2347 struct qla_hw_data *ha = vha->hw;
2348 uint32_t idc_major_ver, idc_minor_ver;
2349 uint16_t config[4];
2350
2351 qla83xx_idc_lock(vha, 0);
2352
2353 /* SV: TODO: Assign initialization timeout from
2354 * flash-info / other param
2355 */
2356 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
2357 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
2358
2359 /* Set our fcoe function presence */
2360 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
2361 ql_dbg(ql_dbg_p3p, vha, 0xb077,
2362 "Error while setting DRV-Presence.\n");
2363 rval = QLA_FUNCTION_FAILED;
2364 goto exit;
2365 }
2366
2367 /* Decide the reset ownership */
2368 qla83xx_reset_ownership(vha);
2369
2370 /*
2371 * On first protocol driver load:
2372 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
2373 * register.
2374 * Others: Check compatibility with current IDC Major version.
2375 */
2376 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
2377 if (ha->flags.nic_core_reset_owner) {
2378 /* Set IDC Major version */
2379 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
2380 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
2381
2382 /* Clearing IDC-Lock-Recovery register */
2383 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
2384 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
2385 /*
2386 * Clear further IDC participation if we are not compatible with
2387 * the current IDC Major Version.
2388 */
2389 ql_log(ql_log_warn, vha, 0xb07d,
2390 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
2391 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
2392 __qla83xx_clear_drv_presence(vha);
2393 rval = QLA_FUNCTION_FAILED;
2394 goto exit;
2395 }
2396 /* Each function sets its supported Minor version. */
2397 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
2398 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
2399 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
2400
2401 if (ha->flags.nic_core_reset_owner) {
2402 memset(config, 0, sizeof(config));
2403 if (!qla81xx_get_port_config(vha, config))
2404 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
2405 QLA8XXX_DEV_READY);
2406 }
2407
2408 rval = qla83xx_idc_state_handler(vha);
2409
2410 exit:
2411 qla83xx_idc_unlock(vha, 0);
2412
2413 return rval;
2414 }
2415
2416 /*
2417 * qla2x00_initialize_adapter
2418 * Initialize board.
2419 *
2420 * Input:
2421 * ha = adapter block pointer.
2422 *
2423 * Returns:
2424 * 0 = success
2425 */
2426 int
qla2x00_initialize_adapter(scsi_qla_host_t * vha)2427 qla2x00_initialize_adapter(scsi_qla_host_t *vha)
2428 {
2429 int rval;
2430 struct qla_hw_data *ha = vha->hw;
2431 struct req_que *req = ha->req_q_map[0];
2432 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2433
2434 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats));
2435 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat));
2436
2437 /* Clear adapter flags. */
2438 vha->flags.online = 0;
2439 ha->flags.chip_reset_done = 0;
2440 vha->flags.reset_active = 0;
2441 ha->flags.pci_channel_io_perm_failure = 0;
2442 ha->flags.eeh_busy = 0;
2443 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
2444 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2445 atomic_set(&vha->loop_state, LOOP_DOWN);
2446 vha->device_flags = DFLG_NO_CABLE;
2447 vha->dpc_flags = 0;
2448 vha->flags.management_server_logged_in = 0;
2449 vha->marker_needed = 0;
2450 ha->isp_abort_cnt = 0;
2451 ha->beacon_blink_led = 0;
2452
2453 set_bit(0, ha->req_qid_map);
2454 set_bit(0, ha->rsp_qid_map);
2455
2456 ql_dbg(ql_dbg_init, vha, 0x0040,
2457 "Configuring PCI space...\n");
2458 rval = ha->isp_ops->pci_config(vha);
2459 if (rval) {
2460 ql_log(ql_log_warn, vha, 0x0044,
2461 "Unable to configure PCI space.\n");
2462 return (rval);
2463 }
2464
2465 ha->isp_ops->reset_chip(vha);
2466
2467 /* Check for secure flash support */
2468 if (IS_QLA28XX(ha)) {
2469 if (rd_reg_word(®->mailbox12) & BIT_0)
2470 ha->flags.secure_adapter = 1;
2471 ql_log(ql_log_info, vha, 0xffff, "Secure Adapter: %s\n",
2472 (ha->flags.secure_adapter) ? "Yes" : "No");
2473 }
2474
2475
2476 rval = qla2xxx_get_flash_info(vha);
2477 if (rval) {
2478 ql_log(ql_log_fatal, vha, 0x004f,
2479 "Unable to validate FLASH data.\n");
2480 return rval;
2481 }
2482
2483 if (IS_QLA8044(ha)) {
2484 qla8044_read_reset_template(vha);
2485
2486 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0.
2487 * If DONRESET_BIT0 is set, drivers should not set dev_state
2488 * to NEED_RESET. But if NEED_RESET is set, drivers should
2489 * should honor the reset. */
2490 if (ql2xdontresethba == 1)
2491 qla8044_set_idc_dontreset(vha);
2492 }
2493
2494 ha->isp_ops->get_flash_version(vha, req->ring);
2495 ql_dbg(ql_dbg_init, vha, 0x0061,
2496 "Configure NVRAM parameters...\n");
2497
2498 /* Let priority default to FCP, can be overridden by nvram_config */
2499 ha->fc4_type_priority = FC4_PRIORITY_FCP;
2500
2501 ha->isp_ops->nvram_config(vha);
2502
2503 if (ha->fc4_type_priority != FC4_PRIORITY_FCP &&
2504 ha->fc4_type_priority != FC4_PRIORITY_NVME)
2505 ha->fc4_type_priority = FC4_PRIORITY_FCP;
2506
2507 ql_log(ql_log_info, vha, 0xffff, "FC4 priority set to %s\n",
2508 ha->fc4_type_priority == FC4_PRIORITY_FCP ? "FCP" : "NVMe");
2509
2510 if (ha->flags.disable_serdes) {
2511 /* Mask HBA via NVRAM settings? */
2512 ql_log(ql_log_info, vha, 0x0077,
2513 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
2514 return QLA_FUNCTION_FAILED;
2515 }
2516
2517 ql_dbg(ql_dbg_init, vha, 0x0078,
2518 "Verifying loaded RISC code...\n");
2519
2520 /* If smartsan enabled then require fdmi and rdp enabled */
2521 if (ql2xsmartsan) {
2522 ql2xfdmienable = 1;
2523 ql2xrdpenable = 1;
2524 }
2525
2526 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
2527 rval = ha->isp_ops->chip_diag(vha);
2528 if (rval)
2529 return (rval);
2530 rval = qla2x00_setup_chip(vha);
2531 if (rval)
2532 return (rval);
2533 }
2534
2535 if (IS_QLA84XX(ha)) {
2536 ha->cs84xx = qla84xx_get_chip(vha);
2537 if (!ha->cs84xx) {
2538 ql_log(ql_log_warn, vha, 0x00d0,
2539 "Unable to configure ISP84XX.\n");
2540 return QLA_FUNCTION_FAILED;
2541 }
2542 }
2543
2544 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha))
2545 rval = qla2x00_init_rings(vha);
2546
2547 /* No point in continuing if firmware initialization failed. */
2548 if (rval != QLA_SUCCESS)
2549 return rval;
2550
2551 ha->flags.chip_reset_done = 1;
2552
2553 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
2554 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
2555 rval = qla84xx_init_chip(vha);
2556 if (rval != QLA_SUCCESS) {
2557 ql_log(ql_log_warn, vha, 0x00d4,
2558 "Unable to initialize ISP84XX.\n");
2559 qla84xx_put_chip(vha);
2560 }
2561 }
2562
2563 /* Load the NIC Core f/w if we are the first protocol driver. */
2564 if (IS_QLA8031(ha)) {
2565 rval = qla83xx_nic_core_fw_load(vha);
2566 if (rval)
2567 ql_log(ql_log_warn, vha, 0x0124,
2568 "Error in initializing NIC Core f/w.\n");
2569 }
2570
2571 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
2572 qla24xx_read_fcp_prio_cfg(vha);
2573
2574 if (IS_P3P_TYPE(ha))
2575 qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
2576 else
2577 qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
2578
2579 return (rval);
2580 }
2581
2582 /**
2583 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
2584 * @vha: HA context
2585 *
2586 * Returns 0 on success.
2587 */
2588 int
qla2100_pci_config(scsi_qla_host_t * vha)2589 qla2100_pci_config(scsi_qla_host_t *vha)
2590 {
2591 uint16_t w;
2592 unsigned long flags;
2593 struct qla_hw_data *ha = vha->hw;
2594 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2595
2596 pci_set_master(ha->pdev);
2597 pci_try_set_mwi(ha->pdev);
2598
2599 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2600 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2601 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2602
2603 pci_disable_rom(ha->pdev);
2604
2605 /* Get PCI bus information. */
2606 spin_lock_irqsave(&ha->hardware_lock, flags);
2607 ha->pci_attr = rd_reg_word(®->ctrl_status);
2608 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2609
2610 return QLA_SUCCESS;
2611 }
2612
2613 /**
2614 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
2615 * @vha: HA context
2616 *
2617 * Returns 0 on success.
2618 */
2619 int
qla2300_pci_config(scsi_qla_host_t * vha)2620 qla2300_pci_config(scsi_qla_host_t *vha)
2621 {
2622 uint16_t w;
2623 unsigned long flags = 0;
2624 uint32_t cnt;
2625 struct qla_hw_data *ha = vha->hw;
2626 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2627
2628 pci_set_master(ha->pdev);
2629 pci_try_set_mwi(ha->pdev);
2630
2631 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2632 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2633
2634 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2635 w &= ~PCI_COMMAND_INTX_DISABLE;
2636 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2637
2638 /*
2639 * If this is a 2300 card and not 2312, reset the
2640 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
2641 * the 2310 also reports itself as a 2300 so we need to get the
2642 * fb revision level -- a 6 indicates it really is a 2300 and
2643 * not a 2310.
2644 */
2645 if (IS_QLA2300(ha)) {
2646 spin_lock_irqsave(&ha->hardware_lock, flags);
2647
2648 /* Pause RISC. */
2649 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC);
2650 for (cnt = 0; cnt < 30000; cnt++) {
2651 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) != 0)
2652 break;
2653
2654 udelay(10);
2655 }
2656
2657 /* Select FPM registers. */
2658 wrt_reg_word(®->ctrl_status, 0x20);
2659 rd_reg_word(®->ctrl_status);
2660
2661 /* Get the fb rev level */
2662 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
2663
2664 if (ha->fb_rev == FPM_2300)
2665 pci_clear_mwi(ha->pdev);
2666
2667 /* Deselect FPM registers. */
2668 wrt_reg_word(®->ctrl_status, 0x0);
2669 rd_reg_word(®->ctrl_status);
2670
2671 /* Release RISC module. */
2672 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
2673 for (cnt = 0; cnt < 30000; cnt++) {
2674 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) == 0)
2675 break;
2676
2677 udelay(10);
2678 }
2679
2680 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2681 }
2682
2683 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2684
2685 pci_disable_rom(ha->pdev);
2686
2687 /* Get PCI bus information. */
2688 spin_lock_irqsave(&ha->hardware_lock, flags);
2689 ha->pci_attr = rd_reg_word(®->ctrl_status);
2690 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2691
2692 return QLA_SUCCESS;
2693 }
2694
2695 /**
2696 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
2697 * @vha: HA context
2698 *
2699 * Returns 0 on success.
2700 */
2701 int
qla24xx_pci_config(scsi_qla_host_t * vha)2702 qla24xx_pci_config(scsi_qla_host_t *vha)
2703 {
2704 uint16_t w;
2705 unsigned long flags = 0;
2706 struct qla_hw_data *ha = vha->hw;
2707 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2708
2709 pci_set_master(ha->pdev);
2710 pci_try_set_mwi(ha->pdev);
2711
2712 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2713 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2714 w &= ~PCI_COMMAND_INTX_DISABLE;
2715 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2716
2717 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2718
2719 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
2720 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
2721 pcix_set_mmrbc(ha->pdev, 2048);
2722
2723 /* PCIe -- adjust Maximum Read Request Size (2048). */
2724 if (pci_is_pcie(ha->pdev))
2725 pcie_set_readrq(ha->pdev, 4096);
2726
2727 pci_disable_rom(ha->pdev);
2728
2729 ha->chip_revision = ha->pdev->revision;
2730
2731 /* Get PCI bus information. */
2732 spin_lock_irqsave(&ha->hardware_lock, flags);
2733 ha->pci_attr = rd_reg_dword(®->ctrl_status);
2734 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2735
2736 return QLA_SUCCESS;
2737 }
2738
2739 /**
2740 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
2741 * @vha: HA context
2742 *
2743 * Returns 0 on success.
2744 */
2745 int
qla25xx_pci_config(scsi_qla_host_t * vha)2746 qla25xx_pci_config(scsi_qla_host_t *vha)
2747 {
2748 uint16_t w;
2749 struct qla_hw_data *ha = vha->hw;
2750
2751 pci_set_master(ha->pdev);
2752 pci_try_set_mwi(ha->pdev);
2753
2754 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2755 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2756 w &= ~PCI_COMMAND_INTX_DISABLE;
2757 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2758
2759 /* PCIe -- adjust Maximum Read Request Size (2048). */
2760 if (pci_is_pcie(ha->pdev))
2761 pcie_set_readrq(ha->pdev, 4096);
2762
2763 pci_disable_rom(ha->pdev);
2764
2765 ha->chip_revision = ha->pdev->revision;
2766
2767 return QLA_SUCCESS;
2768 }
2769
2770 /**
2771 * qla2x00_isp_firmware() - Choose firmware image.
2772 * @vha: HA context
2773 *
2774 * Returns 0 on success.
2775 */
2776 static int
qla2x00_isp_firmware(scsi_qla_host_t * vha)2777 qla2x00_isp_firmware(scsi_qla_host_t *vha)
2778 {
2779 int rval;
2780 uint16_t loop_id, topo, sw_cap;
2781 uint8_t domain, area, al_pa;
2782 struct qla_hw_data *ha = vha->hw;
2783
2784 /* Assume loading risc code */
2785 rval = QLA_FUNCTION_FAILED;
2786
2787 if (ha->flags.disable_risc_code_load) {
2788 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
2789
2790 /* Verify checksum of loaded RISC code. */
2791 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
2792 if (rval == QLA_SUCCESS) {
2793 /* And, verify we are not in ROM code. */
2794 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
2795 &area, &domain, &topo, &sw_cap);
2796 }
2797 }
2798
2799 if (rval)
2800 ql_dbg(ql_dbg_init, vha, 0x007a,
2801 "**** Load RISC code ****.\n");
2802
2803 return (rval);
2804 }
2805
2806 /**
2807 * qla2x00_reset_chip() - Reset ISP chip.
2808 * @vha: HA context
2809 *
2810 * Returns 0 on success.
2811 */
2812 int
qla2x00_reset_chip(scsi_qla_host_t * vha)2813 qla2x00_reset_chip(scsi_qla_host_t *vha)
2814 {
2815 unsigned long flags = 0;
2816 struct qla_hw_data *ha = vha->hw;
2817 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2818 uint32_t cnt;
2819 uint16_t cmd;
2820 int rval = QLA_FUNCTION_FAILED;
2821
2822 if (unlikely(pci_channel_offline(ha->pdev)))
2823 return rval;
2824
2825 ha->isp_ops->disable_intrs(ha);
2826
2827 spin_lock_irqsave(&ha->hardware_lock, flags);
2828
2829 /* Turn off master enable */
2830 cmd = 0;
2831 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
2832 cmd &= ~PCI_COMMAND_MASTER;
2833 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2834
2835 if (!IS_QLA2100(ha)) {
2836 /* Pause RISC. */
2837 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC);
2838 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
2839 for (cnt = 0; cnt < 30000; cnt++) {
2840 if ((rd_reg_word(®->hccr) &
2841 HCCR_RISC_PAUSE) != 0)
2842 break;
2843 udelay(100);
2844 }
2845 } else {
2846 rd_reg_word(®->hccr); /* PCI Posting. */
2847 udelay(10);
2848 }
2849
2850 /* Select FPM registers. */
2851 wrt_reg_word(®->ctrl_status, 0x20);
2852 rd_reg_word(®->ctrl_status); /* PCI Posting. */
2853
2854 /* FPM Soft Reset. */
2855 wrt_reg_word(®->fpm_diag_config, 0x100);
2856 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */
2857
2858 /* Toggle Fpm Reset. */
2859 if (!IS_QLA2200(ha)) {
2860 wrt_reg_word(®->fpm_diag_config, 0x0);
2861 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */
2862 }
2863
2864 /* Select frame buffer registers. */
2865 wrt_reg_word(®->ctrl_status, 0x10);
2866 rd_reg_word(®->ctrl_status); /* PCI Posting. */
2867
2868 /* Reset frame buffer FIFOs. */
2869 if (IS_QLA2200(ha)) {
2870 WRT_FB_CMD_REG(ha, reg, 0xa000);
2871 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
2872 } else {
2873 WRT_FB_CMD_REG(ha, reg, 0x00fc);
2874
2875 /* Read back fb_cmd until zero or 3 seconds max */
2876 for (cnt = 0; cnt < 3000; cnt++) {
2877 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
2878 break;
2879 udelay(100);
2880 }
2881 }
2882
2883 /* Select RISC module registers. */
2884 wrt_reg_word(®->ctrl_status, 0);
2885 rd_reg_word(®->ctrl_status); /* PCI Posting. */
2886
2887 /* Reset RISC processor. */
2888 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
2889 rd_reg_word(®->hccr); /* PCI Posting. */
2890
2891 /* Release RISC processor. */
2892 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
2893 rd_reg_word(®->hccr); /* PCI Posting. */
2894 }
2895
2896 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT);
2897 wrt_reg_word(®->hccr, HCCR_CLR_HOST_INT);
2898
2899 /* Reset ISP chip. */
2900 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET);
2901
2902 /* Wait for RISC to recover from reset. */
2903 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2904 /*
2905 * It is necessary to for a delay here since the card doesn't
2906 * respond to PCI reads during a reset. On some architectures
2907 * this will result in an MCA.
2908 */
2909 udelay(20);
2910 for (cnt = 30000; cnt; cnt--) {
2911 if ((rd_reg_word(®->ctrl_status) &
2912 CSR_ISP_SOFT_RESET) == 0)
2913 break;
2914 udelay(100);
2915 }
2916 } else
2917 udelay(10);
2918
2919 /* Reset RISC processor. */
2920 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
2921
2922 wrt_reg_word(®->semaphore, 0);
2923
2924 /* Release RISC processor. */
2925 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
2926 rd_reg_word(®->hccr); /* PCI Posting. */
2927
2928 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2929 for (cnt = 0; cnt < 30000; cnt++) {
2930 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
2931 break;
2932
2933 udelay(100);
2934 }
2935 } else
2936 udelay(100);
2937
2938 /* Turn on master enable */
2939 cmd |= PCI_COMMAND_MASTER;
2940 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2941
2942 /* Disable RISC pause on FPM parity error. */
2943 if (!IS_QLA2100(ha)) {
2944 wrt_reg_word(®->hccr, HCCR_DISABLE_PARITY_PAUSE);
2945 rd_reg_word(®->hccr); /* PCI Posting. */
2946 }
2947
2948 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2949
2950 return QLA_SUCCESS;
2951 }
2952
2953 /**
2954 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
2955 * @vha: HA context
2956 *
2957 * Returns 0 on success.
2958 */
2959 static int
qla81xx_reset_mpi(scsi_qla_host_t * vha)2960 qla81xx_reset_mpi(scsi_qla_host_t *vha)
2961 {
2962 uint16_t mb[4] = {0x1010, 0, 1, 0};
2963
2964 if (!IS_QLA81XX(vha->hw))
2965 return QLA_SUCCESS;
2966
2967 return qla81xx_write_mpi_register(vha, mb);
2968 }
2969
2970 static int
qla_chk_risc_recovery(scsi_qla_host_t * vha)2971 qla_chk_risc_recovery(scsi_qla_host_t *vha)
2972 {
2973 struct qla_hw_data *ha = vha->hw;
2974 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2975 __le16 __iomem *mbptr = ®->mailbox0;
2976 int i;
2977 u16 mb[32];
2978 int rc = QLA_SUCCESS;
2979
2980 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
2981 return rc;
2982
2983 /* this check is only valid after RISC reset */
2984 mb[0] = rd_reg_word(mbptr);
2985 mbptr++;
2986 if (mb[0] == 0xf) {
2987 rc = QLA_FUNCTION_FAILED;
2988
2989 for (i = 1; i < 32; i++) {
2990 mb[i] = rd_reg_word(mbptr);
2991 mbptr++;
2992 }
2993
2994 ql_log(ql_log_warn, vha, 0x1015,
2995 "RISC reset failed. mb[0-7] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
2996 mb[0], mb[1], mb[2], mb[3], mb[4], mb[5], mb[6], mb[7]);
2997 ql_log(ql_log_warn, vha, 0x1015,
2998 "RISC reset failed. mb[8-15] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
2999 mb[8], mb[9], mb[10], mb[11], mb[12], mb[13], mb[14],
3000 mb[15]);
3001 ql_log(ql_log_warn, vha, 0x1015,
3002 "RISC reset failed. mb[16-23] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
3003 mb[16], mb[17], mb[18], mb[19], mb[20], mb[21], mb[22],
3004 mb[23]);
3005 ql_log(ql_log_warn, vha, 0x1015,
3006 "RISC reset failed. mb[24-31] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
3007 mb[24], mb[25], mb[26], mb[27], mb[28], mb[29], mb[30],
3008 mb[31]);
3009 }
3010 return rc;
3011 }
3012
3013 /**
3014 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
3015 * @vha: HA context
3016 *
3017 * Returns 0 on success.
3018 */
3019 static inline int
qla24xx_reset_risc(scsi_qla_host_t * vha)3020 qla24xx_reset_risc(scsi_qla_host_t *vha)
3021 {
3022 unsigned long flags = 0;
3023 struct qla_hw_data *ha = vha->hw;
3024 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
3025 uint32_t cnt;
3026 uint16_t wd;
3027 static int abts_cnt; /* ISP abort retry counts */
3028 int rval = QLA_SUCCESS;
3029 int print = 1;
3030
3031 spin_lock_irqsave(&ha->hardware_lock, flags);
3032
3033 /* Reset RISC. */
3034 wrt_reg_dword(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
3035 for (cnt = 0; cnt < 30000; cnt++) {
3036 if ((rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
3037 break;
3038
3039 udelay(10);
3040 }
3041
3042 if (!(rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE))
3043 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags);
3044
3045 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
3046 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
3047 rd_reg_dword(®->hccr),
3048 rd_reg_dword(®->ctrl_status),
3049 (rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE));
3050
3051 wrt_reg_dword(®->ctrl_status,
3052 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
3053 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
3054
3055 udelay(100);
3056
3057 /* Wait for firmware to complete NVRAM accesses. */
3058 rd_reg_word(®->mailbox0);
3059 for (cnt = 10000; rd_reg_word(®->mailbox0) != 0 &&
3060 rval == QLA_SUCCESS; cnt--) {
3061 barrier();
3062 if (cnt)
3063 udelay(5);
3064 else
3065 rval = QLA_FUNCTION_TIMEOUT;
3066 }
3067
3068 if (rval == QLA_SUCCESS)
3069 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags);
3070
3071 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
3072 "HCCR: 0x%x, MailBox0 Status 0x%x\n",
3073 rd_reg_dword(®->hccr),
3074 rd_reg_word(®->mailbox0));
3075
3076 /* Wait for soft-reset to complete. */
3077 rd_reg_dword(®->ctrl_status);
3078 for (cnt = 0; cnt < 60; cnt++) {
3079 barrier();
3080 if ((rd_reg_dword(®->ctrl_status) &
3081 CSRX_ISP_SOFT_RESET) == 0)
3082 break;
3083
3084 udelay(5);
3085 }
3086 if (!(rd_reg_dword(®->ctrl_status) & CSRX_ISP_SOFT_RESET))
3087 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags);
3088
3089 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
3090 "HCCR: 0x%x, Soft Reset status: 0x%x\n",
3091 rd_reg_dword(®->hccr),
3092 rd_reg_dword(®->ctrl_status));
3093
3094 /* If required, do an MPI FW reset now */
3095 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
3096 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
3097 if (++abts_cnt < 5) {
3098 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
3099 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
3100 } else {
3101 /*
3102 * We exhausted the ISP abort retries. We have to
3103 * set the board offline.
3104 */
3105 abts_cnt = 0;
3106 vha->flags.online = 0;
3107 }
3108 }
3109 }
3110
3111 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET);
3112 rd_reg_dword(®->hccr);
3113
3114 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE);
3115 rd_reg_dword(®->hccr);
3116
3117 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_RESET);
3118 mdelay(10);
3119 rd_reg_dword(®->hccr);
3120
3121 wd = rd_reg_word(®->mailbox0);
3122 for (cnt = 300; wd != 0 && rval == QLA_SUCCESS; cnt--) {
3123 barrier();
3124 if (cnt) {
3125 mdelay(1);
3126 if (print && qla_chk_risc_recovery(vha))
3127 print = 0;
3128
3129 wd = rd_reg_word(®->mailbox0);
3130 } else {
3131 rval = QLA_FUNCTION_TIMEOUT;
3132
3133 ql_log(ql_log_warn, vha, 0x015e,
3134 "RISC reset timeout\n");
3135 }
3136 }
3137
3138 if (rval == QLA_SUCCESS)
3139 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags);
3140
3141 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
3142 "Host Risc 0x%x, mailbox0 0x%x\n",
3143 rd_reg_dword(®->hccr),
3144 rd_reg_word(®->mailbox0));
3145
3146 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3147
3148 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f,
3149 "Driver in %s mode\n",
3150 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling");
3151
3152 if (IS_NOPOLLING_TYPE(ha))
3153 ha->isp_ops->enable_intrs(ha);
3154
3155 return rval;
3156 }
3157
3158 static void
qla25xx_read_risc_sema_reg(scsi_qla_host_t * vha,uint32_t * data)3159 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
3160 {
3161 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
3162
3163 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET);
3164 *data = rd_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET);
3165 }
3166
3167 static void
qla25xx_write_risc_sema_reg(scsi_qla_host_t * vha,uint32_t data)3168 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
3169 {
3170 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
3171
3172 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET);
3173 wrt_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET, data);
3174 }
3175
3176 static void
qla25xx_manipulate_risc_semaphore(scsi_qla_host_t * vha)3177 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
3178 {
3179 uint32_t wd32 = 0;
3180 uint delta_msec = 100;
3181 uint elapsed_msec = 0;
3182 uint timeout_msec;
3183 ulong n;
3184
3185 if (vha->hw->pdev->subsystem_device != 0x0175 &&
3186 vha->hw->pdev->subsystem_device != 0x0240)
3187 return;
3188
3189 wrt_reg_dword(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);
3190 udelay(100);
3191
3192 attempt:
3193 timeout_msec = TIMEOUT_SEMAPHORE;
3194 n = timeout_msec / delta_msec;
3195 while (n--) {
3196 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
3197 qla25xx_read_risc_sema_reg(vha, &wd32);
3198 if (wd32 & RISC_SEMAPHORE)
3199 break;
3200 msleep(delta_msec);
3201 elapsed_msec += delta_msec;
3202 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
3203 goto force;
3204 }
3205
3206 if (!(wd32 & RISC_SEMAPHORE))
3207 goto force;
3208
3209 if (!(wd32 & RISC_SEMAPHORE_FORCE))
3210 goto acquired;
3211
3212 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
3213 timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
3214 n = timeout_msec / delta_msec;
3215 while (n--) {
3216 qla25xx_read_risc_sema_reg(vha, &wd32);
3217 if (!(wd32 & RISC_SEMAPHORE_FORCE))
3218 break;
3219 msleep(delta_msec);
3220 elapsed_msec += delta_msec;
3221 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
3222 goto force;
3223 }
3224
3225 if (wd32 & RISC_SEMAPHORE_FORCE)
3226 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
3227
3228 goto attempt;
3229
3230 force:
3231 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
3232
3233 acquired:
3234 return;
3235 }
3236
3237 /**
3238 * qla24xx_reset_chip() - Reset ISP24xx chip.
3239 * @vha: HA context
3240 *
3241 * Returns 0 on success.
3242 */
3243 int
qla24xx_reset_chip(scsi_qla_host_t * vha)3244 qla24xx_reset_chip(scsi_qla_host_t *vha)
3245 {
3246 struct qla_hw_data *ha = vha->hw;
3247 int rval = QLA_FUNCTION_FAILED;
3248
3249 if (pci_channel_offline(ha->pdev) &&
3250 ha->flags.pci_channel_io_perm_failure) {
3251 return rval;
3252 }
3253
3254 ha->isp_ops->disable_intrs(ha);
3255
3256 qla25xx_manipulate_risc_semaphore(vha);
3257
3258 /* Perform RISC reset. */
3259 rval = qla24xx_reset_risc(vha);
3260
3261 return rval;
3262 }
3263
3264 /**
3265 * qla2x00_chip_diag() - Test chip for proper operation.
3266 * @vha: HA context
3267 *
3268 * Returns 0 on success.
3269 */
3270 int
qla2x00_chip_diag(scsi_qla_host_t * vha)3271 qla2x00_chip_diag(scsi_qla_host_t *vha)
3272 {
3273 int rval;
3274 struct qla_hw_data *ha = vha->hw;
3275 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3276 unsigned long flags = 0;
3277 uint16_t data;
3278 uint32_t cnt;
3279 uint16_t mb[5];
3280 struct req_que *req = ha->req_q_map[0];
3281
3282 /* Assume a failed state */
3283 rval = QLA_FUNCTION_FAILED;
3284
3285 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n",
3286 ®->flash_address);
3287
3288 spin_lock_irqsave(&ha->hardware_lock, flags);
3289
3290 /* Reset ISP chip. */
3291 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET);
3292
3293 /*
3294 * We need to have a delay here since the card will not respond while
3295 * in reset causing an MCA on some architectures.
3296 */
3297 udelay(20);
3298 data = qla2x00_debounce_register(®->ctrl_status);
3299 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
3300 udelay(5);
3301 data = rd_reg_word(®->ctrl_status);
3302 barrier();
3303 }
3304
3305 if (!cnt)
3306 goto chip_diag_failed;
3307
3308 ql_dbg(ql_dbg_init, vha, 0x007c,
3309 "Reset register cleared by chip reset.\n");
3310
3311 /* Reset RISC processor. */
3312 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
3313 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
3314
3315 /* Workaround for QLA2312 PCI parity error */
3316 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
3317 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
3318 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
3319 udelay(5);
3320 data = RD_MAILBOX_REG(ha, reg, 0);
3321 barrier();
3322 }
3323 } else
3324 udelay(10);
3325
3326 if (!cnt)
3327 goto chip_diag_failed;
3328
3329 /* Check product ID of chip */
3330 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n");
3331
3332 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
3333 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
3334 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
3335 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
3336 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
3337 mb[3] != PROD_ID_3) {
3338 ql_log(ql_log_warn, vha, 0x0062,
3339 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
3340 mb[1], mb[2], mb[3]);
3341
3342 goto chip_diag_failed;
3343 }
3344 ha->product_id[0] = mb[1];
3345 ha->product_id[1] = mb[2];
3346 ha->product_id[2] = mb[3];
3347 ha->product_id[3] = mb[4];
3348
3349 /* Adjust fw RISC transfer size */
3350 if (req->length > 1024)
3351 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
3352 else
3353 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
3354 req->length;
3355
3356 if (IS_QLA2200(ha) &&
3357 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
3358 /* Limit firmware transfer size with a 2200A */
3359 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
3360
3361 ha->device_type |= DT_ISP2200A;
3362 ha->fw_transfer_size = 128;
3363 }
3364
3365 /* Wrap Incoming Mailboxes Test. */
3366 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3367
3368 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
3369 rval = qla2x00_mbx_reg_test(vha);
3370 if (rval)
3371 ql_log(ql_log_warn, vha, 0x0080,
3372 "Failed mailbox send register test.\n");
3373 else
3374 /* Flag a successful rval */
3375 rval = QLA_SUCCESS;
3376 spin_lock_irqsave(&ha->hardware_lock, flags);
3377
3378 chip_diag_failed:
3379 if (rval)
3380 ql_log(ql_log_info, vha, 0x0081,
3381 "Chip diagnostics **** FAILED ****.\n");
3382
3383 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3384
3385 return (rval);
3386 }
3387
3388 /**
3389 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
3390 * @vha: HA context
3391 *
3392 * Returns 0 on success.
3393 */
3394 int
qla24xx_chip_diag(scsi_qla_host_t * vha)3395 qla24xx_chip_diag(scsi_qla_host_t *vha)
3396 {
3397 int rval;
3398 struct qla_hw_data *ha = vha->hw;
3399 struct req_que *req = ha->req_q_map[0];
3400
3401 if (IS_P3P_TYPE(ha))
3402 return QLA_SUCCESS;
3403
3404 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
3405
3406 rval = qla2x00_mbx_reg_test(vha);
3407 if (rval) {
3408 ql_log(ql_log_warn, vha, 0x0082,
3409 "Failed mailbox send register test.\n");
3410 } else {
3411 /* Flag a successful rval */
3412 rval = QLA_SUCCESS;
3413 }
3414
3415 return rval;
3416 }
3417
3418 static void
qla2x00_init_fce_trace(scsi_qla_host_t * vha)3419 qla2x00_init_fce_trace(scsi_qla_host_t *vha)
3420 {
3421 int rval;
3422 dma_addr_t tc_dma;
3423 void *tc;
3424 struct qla_hw_data *ha = vha->hw;
3425
3426 if (!IS_FWI2_CAPABLE(ha))
3427 return;
3428
3429 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3430 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
3431 return;
3432
3433 if (ha->fce) {
3434 ql_dbg(ql_dbg_init, vha, 0x00bd,
3435 "%s: FCE Mem is already allocated.\n",
3436 __func__);
3437 return;
3438 }
3439
3440 /* Allocate memory for Fibre Channel Event Buffer. */
3441 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
3442 GFP_KERNEL);
3443 if (!tc) {
3444 ql_log(ql_log_warn, vha, 0x00be,
3445 "Unable to allocate (%d KB) for FCE.\n",
3446 FCE_SIZE / 1024);
3447 return;
3448 }
3449
3450 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
3451 ha->fce_mb, &ha->fce_bufs);
3452 if (rval) {
3453 ql_log(ql_log_warn, vha, 0x00bf,
3454 "Unable to initialize FCE (%d).\n", rval);
3455 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, tc_dma);
3456 return;
3457 }
3458
3459 ql_dbg(ql_dbg_init, vha, 0x00c0,
3460 "Allocated (%d KB) for FCE...\n", FCE_SIZE / 1024);
3461
3462 ha->flags.fce_enabled = 1;
3463 ha->fce_dma = tc_dma;
3464 ha->fce = tc;
3465 }
3466
3467 static void
qla2x00_init_eft_trace(scsi_qla_host_t * vha)3468 qla2x00_init_eft_trace(scsi_qla_host_t *vha)
3469 {
3470 int rval;
3471 dma_addr_t tc_dma;
3472 void *tc;
3473 struct qla_hw_data *ha = vha->hw;
3474
3475 if (!IS_FWI2_CAPABLE(ha))
3476 return;
3477
3478 if (ha->eft) {
3479 ql_dbg(ql_dbg_init, vha, 0x00bd,
3480 "%s: EFT Mem is already allocated.\n",
3481 __func__);
3482 return;
3483 }
3484
3485 /* Allocate memory for Extended Trace Buffer. */
3486 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
3487 GFP_KERNEL);
3488 if (!tc) {
3489 ql_log(ql_log_warn, vha, 0x00c1,
3490 "Unable to allocate (%d KB) for EFT.\n",
3491 EFT_SIZE / 1024);
3492 return;
3493 }
3494
3495 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
3496 if (rval) {
3497 ql_log(ql_log_warn, vha, 0x00c2,
3498 "Unable to initialize EFT (%d).\n", rval);
3499 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, tc_dma);
3500 return;
3501 }
3502
3503 ql_dbg(ql_dbg_init, vha, 0x00c3,
3504 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
3505
3506 ha->eft_dma = tc_dma;
3507 ha->eft = tc;
3508 }
3509
3510 static void
qla2x00_alloc_offload_mem(scsi_qla_host_t * vha)3511 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha)
3512 {
3513 qla2x00_init_fce_trace(vha);
3514 qla2x00_init_eft_trace(vha);
3515 }
3516
3517 void
qla2x00_alloc_fw_dump(scsi_qla_host_t * vha)3518 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
3519 {
3520 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
3521 eft_size, fce_size, mq_size;
3522 struct qla_hw_data *ha = vha->hw;
3523 struct req_que *req = ha->req_q_map[0];
3524 struct rsp_que *rsp = ha->rsp_q_map[0];
3525 struct qla2xxx_fw_dump *fw_dump;
3526
3527 if (ha->fw_dump) {
3528 ql_dbg(ql_dbg_init, vha, 0x00bd,
3529 "Firmware dump already allocated.\n");
3530 return;
3531 }
3532
3533 ha->fw_dumped = 0;
3534 ha->fw_dump_cap_flags = 0;
3535 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
3536 req_q_size = rsp_q_size = 0;
3537
3538 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3539 fixed_size = sizeof(struct qla2100_fw_dump);
3540 } else if (IS_QLA23XX(ha)) {
3541 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
3542 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
3543 sizeof(uint16_t);
3544 } else if (IS_FWI2_CAPABLE(ha)) {
3545 if (IS_QLA83XX(ha))
3546 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
3547 else if (IS_QLA81XX(ha))
3548 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
3549 else if (IS_QLA25XX(ha))
3550 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
3551 else
3552 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
3553
3554 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
3555 sizeof(uint32_t);
3556 if (ha->mqenable) {
3557 if (!IS_QLA83XX(ha))
3558 mq_size = sizeof(struct qla2xxx_mq_chain);
3559 /*
3560 * Allocate maximum buffer size for all queues - Q0.
3561 * Resizing must be done at end-of-dump processing.
3562 */
3563 mq_size += (ha->max_req_queues - 1) *
3564 (req->length * sizeof(request_t));
3565 mq_size += (ha->max_rsp_queues - 1) *
3566 (rsp->length * sizeof(response_t));
3567 }
3568 if (ha->tgt.atio_ring)
3569 mq_size += ha->tgt.atio_q_length * sizeof(request_t);
3570
3571 qla2x00_init_fce_trace(vha);
3572 if (ha->fce)
3573 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
3574 qla2x00_init_eft_trace(vha);
3575 if (ha->eft)
3576 eft_size = EFT_SIZE;
3577 }
3578
3579 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3580 struct fwdt *fwdt = ha->fwdt;
3581 uint j;
3582
3583 for (j = 0; j < 2; j++, fwdt++) {
3584 if (!fwdt->template) {
3585 ql_dbg(ql_dbg_init, vha, 0x00ba,
3586 "-> fwdt%u no template\n", j);
3587 continue;
3588 }
3589 ql_dbg(ql_dbg_init, vha, 0x00fa,
3590 "-> fwdt%u calculating fwdump size...\n", j);
3591 fwdt->dump_size = qla27xx_fwdt_calculate_dump_size(
3592 vha, fwdt->template);
3593 ql_dbg(ql_dbg_init, vha, 0x00fa,
3594 "-> fwdt%u calculated fwdump size = %#lx bytes\n",
3595 j, fwdt->dump_size);
3596 dump_size += fwdt->dump_size;
3597 }
3598 /* Add space for spare MPI fw dump. */
3599 dump_size += ha->fwdt[1].dump_size;
3600 } else {
3601 req_q_size = req->length * sizeof(request_t);
3602 rsp_q_size = rsp->length * sizeof(response_t);
3603 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
3604 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size
3605 + eft_size;
3606 ha->chain_offset = dump_size;
3607 dump_size += mq_size + fce_size;
3608 if (ha->exchoffld_buf)
3609 dump_size += sizeof(struct qla2xxx_offld_chain) +
3610 ha->exchoffld_size;
3611 if (ha->exlogin_buf)
3612 dump_size += sizeof(struct qla2xxx_offld_chain) +
3613 ha->exlogin_size;
3614 }
3615
3616 if (!ha->fw_dump_len || dump_size > ha->fw_dump_alloc_len) {
3617
3618 ql_dbg(ql_dbg_init, vha, 0x00c5,
3619 "%s dump_size %d fw_dump_len %d fw_dump_alloc_len %d\n",
3620 __func__, dump_size, ha->fw_dump_len,
3621 ha->fw_dump_alloc_len);
3622
3623 fw_dump = vmalloc(dump_size);
3624 if (!fw_dump) {
3625 ql_log(ql_log_warn, vha, 0x00c4,
3626 "Unable to allocate (%d KB) for firmware dump.\n",
3627 dump_size / 1024);
3628 } else {
3629 mutex_lock(&ha->optrom_mutex);
3630 if (ha->fw_dumped) {
3631 memcpy(fw_dump, ha->fw_dump, ha->fw_dump_len);
3632 vfree(ha->fw_dump);
3633 ha->fw_dump = fw_dump;
3634 ha->fw_dump_alloc_len = dump_size;
3635 ql_dbg(ql_dbg_init, vha, 0x00c5,
3636 "Re-Allocated (%d KB) and save firmware dump.\n",
3637 dump_size / 1024);
3638 } else {
3639 vfree(ha->fw_dump);
3640 ha->fw_dump = fw_dump;
3641
3642 ha->fw_dump_len = ha->fw_dump_alloc_len =
3643 dump_size;
3644 ql_dbg(ql_dbg_init, vha, 0x00c5,
3645 "Allocated (%d KB) for firmware dump.\n",
3646 dump_size / 1024);
3647
3648 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3649 ha->mpi_fw_dump = (char *)fw_dump +
3650 ha->fwdt[1].dump_size;
3651 mutex_unlock(&ha->optrom_mutex);
3652 return;
3653 }
3654
3655 ha->fw_dump->signature[0] = 'Q';
3656 ha->fw_dump->signature[1] = 'L';
3657 ha->fw_dump->signature[2] = 'G';
3658 ha->fw_dump->signature[3] = 'C';
3659 ha->fw_dump->version = htonl(1);
3660
3661 ha->fw_dump->fixed_size = htonl(fixed_size);
3662 ha->fw_dump->mem_size = htonl(mem_size);
3663 ha->fw_dump->req_q_size = htonl(req_q_size);
3664 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
3665
3666 ha->fw_dump->eft_size = htonl(eft_size);
3667 ha->fw_dump->eft_addr_l =
3668 htonl(LSD(ha->eft_dma));
3669 ha->fw_dump->eft_addr_h =
3670 htonl(MSD(ha->eft_dma));
3671
3672 ha->fw_dump->header_size =
3673 htonl(offsetof
3674 (struct qla2xxx_fw_dump, isp));
3675 }
3676 mutex_unlock(&ha->optrom_mutex);
3677 }
3678 }
3679 }
3680
3681 static int
qla81xx_mpi_sync(scsi_qla_host_t * vha)3682 qla81xx_mpi_sync(scsi_qla_host_t *vha)
3683 {
3684 #define MPS_MASK 0xe0
3685 int rval;
3686 uint16_t dc;
3687 uint32_t dw;
3688
3689 if (!IS_QLA81XX(vha->hw))
3690 return QLA_SUCCESS;
3691
3692 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
3693 if (rval != QLA_SUCCESS) {
3694 ql_log(ql_log_warn, vha, 0x0105,
3695 "Unable to acquire semaphore.\n");
3696 goto done;
3697 }
3698
3699 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
3700 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
3701 if (rval != QLA_SUCCESS) {
3702 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
3703 goto done_release;
3704 }
3705
3706 dc &= MPS_MASK;
3707 if (dc == (dw & MPS_MASK))
3708 goto done_release;
3709
3710 dw &= ~MPS_MASK;
3711 dw |= dc;
3712 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
3713 if (rval != QLA_SUCCESS) {
3714 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
3715 }
3716
3717 done_release:
3718 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
3719 if (rval != QLA_SUCCESS) {
3720 ql_log(ql_log_warn, vha, 0x006d,
3721 "Unable to release semaphore.\n");
3722 }
3723
3724 done:
3725 return rval;
3726 }
3727
3728 int
qla2x00_alloc_outstanding_cmds(struct qla_hw_data * ha,struct req_que * req)3729 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
3730 {
3731 /* Don't try to reallocate the array */
3732 if (req->outstanding_cmds)
3733 return QLA_SUCCESS;
3734
3735 if (!IS_FWI2_CAPABLE(ha))
3736 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
3737 else {
3738 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count)
3739 req->num_outstanding_cmds = ha->cur_fw_xcb_count;
3740 else
3741 req->num_outstanding_cmds = ha->cur_fw_iocb_count;
3742 }
3743
3744 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
3745 sizeof(srb_t *),
3746 GFP_KERNEL);
3747
3748 if (!req->outstanding_cmds) {
3749 /*
3750 * Try to allocate a minimal size just so we can get through
3751 * initialization.
3752 */
3753 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
3754 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
3755 sizeof(srb_t *),
3756 GFP_KERNEL);
3757
3758 if (!req->outstanding_cmds) {
3759 ql_log(ql_log_fatal, NULL, 0x0126,
3760 "Failed to allocate memory for "
3761 "outstanding_cmds for req_que %p.\n", req);
3762 req->num_outstanding_cmds = 0;
3763 return QLA_FUNCTION_FAILED;
3764 }
3765 }
3766
3767 return QLA_SUCCESS;
3768 }
3769
3770 #define PRINT_FIELD(_field, _flag, _str) { \
3771 if (a0->_field & _flag) {\
3772 if (p) {\
3773 strcat(ptr, "|");\
3774 ptr++;\
3775 leftover--;\
3776 } \
3777 len = snprintf(ptr, leftover, "%s", _str); \
3778 p = 1;\
3779 leftover -= len;\
3780 ptr += len; \
3781 } \
3782 }
3783
qla2xxx_print_sfp_info(struct scsi_qla_host * vha)3784 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha)
3785 {
3786 #define STR_LEN 64
3787 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data;
3788 u8 str[STR_LEN], *ptr, p;
3789 int leftover, len;
3790
3791 memset(str, 0, STR_LEN);
3792 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name);
3793 ql_dbg(ql_dbg_init, vha, 0x015a,
3794 "SFP MFG Name: %s\n", str);
3795
3796 memset(str, 0, STR_LEN);
3797 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn);
3798 ql_dbg(ql_dbg_init, vha, 0x015c,
3799 "SFP Part Name: %s\n", str);
3800
3801 /* media */
3802 memset(str, 0, STR_LEN);
3803 ptr = str;
3804 leftover = STR_LEN;
3805 p = len = 0;
3806 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX");
3807 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair");
3808 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax");
3809 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax");
3810 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um");
3811 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um");
3812 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode");
3813 ql_dbg(ql_dbg_init, vha, 0x0160,
3814 "SFP Media: %s\n", str);
3815
3816 /* link length */
3817 memset(str, 0, STR_LEN);
3818 ptr = str;
3819 leftover = STR_LEN;
3820 p = len = 0;
3821 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long");
3822 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short");
3823 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate");
3824 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long");
3825 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium");
3826 ql_dbg(ql_dbg_init, vha, 0x0196,
3827 "SFP Link Length: %s\n", str);
3828
3829 memset(str, 0, STR_LEN);
3830 ptr = str;
3831 leftover = STR_LEN;
3832 p = len = 0;
3833 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)");
3834 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)");
3835 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)");
3836 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)");
3837 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)");
3838 ql_dbg(ql_dbg_init, vha, 0x016e,
3839 "SFP FC Link Tech: %s\n", str);
3840
3841 if (a0->length_km)
3842 ql_dbg(ql_dbg_init, vha, 0x016f,
3843 "SFP Distant: %d km\n", a0->length_km);
3844 if (a0->length_100m)
3845 ql_dbg(ql_dbg_init, vha, 0x0170,
3846 "SFP Distant: %d m\n", a0->length_100m*100);
3847 if (a0->length_50um_10m)
3848 ql_dbg(ql_dbg_init, vha, 0x0189,
3849 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10);
3850 if (a0->length_62um_10m)
3851 ql_dbg(ql_dbg_init, vha, 0x018a,
3852 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10);
3853 if (a0->length_om4_10m)
3854 ql_dbg(ql_dbg_init, vha, 0x0194,
3855 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10);
3856 if (a0->length_om3_10m)
3857 ql_dbg(ql_dbg_init, vha, 0x0195,
3858 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10);
3859 }
3860
3861
3862 /**
3863 * qla24xx_detect_sfp()
3864 *
3865 * @vha: adapter state pointer.
3866 *
3867 * @return
3868 * 0 -- Configure firmware to use short-range settings -- normal
3869 * buffer-to-buffer credits.
3870 *
3871 * 1 -- Configure firmware to use long-range settings -- extra
3872 * buffer-to-buffer credits should be allocated with
3873 * ha->lr_distance containing distance settings from NVRAM or SFP
3874 * (if supported).
3875 */
3876 int
qla24xx_detect_sfp(scsi_qla_host_t * vha)3877 qla24xx_detect_sfp(scsi_qla_host_t *vha)
3878 {
3879 int rc, used_nvram;
3880 struct sff_8247_a0 *a;
3881 struct qla_hw_data *ha = vha->hw;
3882 struct nvram_81xx *nv = ha->nvram;
3883 #define LR_DISTANCE_UNKNOWN 2
3884 static const char * const types[] = { "Short", "Long" };
3885 static const char * const lengths[] = { "(10km)", "(5km)", "" };
3886 u8 ll = 0;
3887
3888 /* Seed with NVRAM settings. */
3889 used_nvram = 0;
3890 ha->flags.lr_detected = 0;
3891 if (IS_BPM_RANGE_CAPABLE(ha) &&
3892 (nv->enhanced_features & NEF_LR_DIST_ENABLE)) {
3893 used_nvram = 1;
3894 ha->flags.lr_detected = 1;
3895 ha->lr_distance =
3896 (nv->enhanced_features >> LR_DIST_NV_POS)
3897 & LR_DIST_NV_MASK;
3898 }
3899
3900 if (!IS_BPM_ENABLED(vha))
3901 goto out;
3902 /* Determine SR/LR capabilities of SFP/Transceiver. */
3903 rc = qla2x00_read_sfp_dev(vha, NULL, 0);
3904 if (rc)
3905 goto out;
3906
3907 used_nvram = 0;
3908 a = (struct sff_8247_a0 *)vha->hw->sfp_data;
3909 qla2xxx_print_sfp_info(vha);
3910
3911 ha->flags.lr_detected = 0;
3912 ll = a->fc_ll_cc7;
3913 if (ll & FC_LL_VL || ll & FC_LL_L) {
3914 /* Long range, track length. */
3915 ha->flags.lr_detected = 1;
3916
3917 if (a->length_km > 5 || a->length_100m > 50)
3918 ha->lr_distance = LR_DISTANCE_10K;
3919 else
3920 ha->lr_distance = LR_DISTANCE_5K;
3921 }
3922
3923 out:
3924 ql_dbg(ql_dbg_async, vha, 0x507b,
3925 "SFP detect: %s-Range SFP %s (nvr=%x ll=%x lr=%x lrd=%x).\n",
3926 types[ha->flags.lr_detected],
3927 ha->flags.lr_detected ? lengths[ha->lr_distance] :
3928 lengths[LR_DISTANCE_UNKNOWN],
3929 used_nvram, ll, ha->flags.lr_detected, ha->lr_distance);
3930 return ha->flags.lr_detected;
3931 }
3932
qla_init_iocb_limit(scsi_qla_host_t * vha)3933 void qla_init_iocb_limit(scsi_qla_host_t *vha)
3934 {
3935 u16 i, num_qps;
3936 u32 limit;
3937 struct qla_hw_data *ha = vha->hw;
3938
3939 num_qps = ha->num_qpairs + 1;
3940 limit = (ha->orig_fw_iocb_count * QLA_IOCB_PCT_LIMIT) / 100;
3941
3942 ha->base_qpair->fwres.iocbs_total = ha->orig_fw_iocb_count;
3943 ha->base_qpair->fwres.iocbs_limit = limit;
3944 ha->base_qpair->fwres.iocbs_qp_limit = limit / num_qps;
3945 ha->base_qpair->fwres.iocbs_used = 0;
3946 for (i = 0; i < ha->max_qpairs; i++) {
3947 if (ha->queue_pair_map[i]) {
3948 ha->queue_pair_map[i]->fwres.iocbs_total =
3949 ha->orig_fw_iocb_count;
3950 ha->queue_pair_map[i]->fwres.iocbs_limit = limit;
3951 ha->queue_pair_map[i]->fwres.iocbs_qp_limit =
3952 limit / num_qps;
3953 ha->queue_pair_map[i]->fwres.iocbs_used = 0;
3954 }
3955 }
3956 }
3957
3958 /**
3959 * qla2x00_setup_chip() - Load and start RISC firmware.
3960 * @vha: HA context
3961 *
3962 * Returns 0 on success.
3963 */
3964 static int
qla2x00_setup_chip(scsi_qla_host_t * vha)3965 qla2x00_setup_chip(scsi_qla_host_t *vha)
3966 {
3967 int rval;
3968 uint32_t srisc_address = 0;
3969 struct qla_hw_data *ha = vha->hw;
3970 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3971 unsigned long flags;
3972 uint16_t fw_major_version;
3973 int done_once = 0;
3974
3975 if (IS_P3P_TYPE(ha)) {
3976 rval = ha->isp_ops->load_risc(vha, &srisc_address);
3977 if (rval == QLA_SUCCESS) {
3978 qla2x00_stop_firmware(vha);
3979 goto enable_82xx_npiv;
3980 } else
3981 goto failed;
3982 }
3983
3984 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3985 /* Disable SRAM, Instruction RAM and GP RAM parity. */
3986 spin_lock_irqsave(&ha->hardware_lock, flags);
3987 wrt_reg_word(®->hccr, (HCCR_ENABLE_PARITY + 0x0));
3988 rd_reg_word(®->hccr);
3989 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3990 }
3991
3992 qla81xx_mpi_sync(vha);
3993
3994 execute_fw_with_lr:
3995 /* Load firmware sequences */
3996 rval = ha->isp_ops->load_risc(vha, &srisc_address);
3997 if (rval == QLA_SUCCESS) {
3998 ql_dbg(ql_dbg_init, vha, 0x00c9,
3999 "Verifying Checksum of loaded RISC code.\n");
4000
4001 rval = qla2x00_verify_checksum(vha, srisc_address);
4002 if (rval == QLA_SUCCESS) {
4003 /* Start firmware execution. */
4004 ql_dbg(ql_dbg_init, vha, 0x00ca,
4005 "Starting firmware.\n");
4006
4007 if (ql2xexlogins)
4008 ha->flags.exlogins_enabled = 1;
4009
4010 if (qla_is_exch_offld_enabled(vha))
4011 ha->flags.exchoffld_enabled = 1;
4012
4013 rval = qla2x00_execute_fw(vha, srisc_address);
4014 /* Retrieve firmware information. */
4015 if (rval == QLA_SUCCESS) {
4016 /* Enable BPM support? */
4017 if (!done_once++ && qla24xx_detect_sfp(vha)) {
4018 ql_dbg(ql_dbg_init, vha, 0x00ca,
4019 "Re-starting firmware -- BPM.\n");
4020 /* Best-effort - re-init. */
4021 ha->isp_ops->reset_chip(vha);
4022 ha->isp_ops->chip_diag(vha);
4023 goto execute_fw_with_lr;
4024 }
4025
4026 if (IS_ZIO_THRESHOLD_CAPABLE(ha))
4027 qla27xx_set_zio_threshold(vha,
4028 ha->last_zio_threshold);
4029
4030 rval = qla2x00_set_exlogins_buffer(vha);
4031 if (rval != QLA_SUCCESS)
4032 goto failed;
4033
4034 rval = qla2x00_set_exchoffld_buffer(vha);
4035 if (rval != QLA_SUCCESS)
4036 goto failed;
4037
4038 enable_82xx_npiv:
4039 fw_major_version = ha->fw_major_version;
4040 if (IS_P3P_TYPE(ha))
4041 qla82xx_check_md_needed(vha);
4042 else
4043 rval = qla2x00_get_fw_version(vha);
4044 if (rval != QLA_SUCCESS)
4045 goto failed;
4046 ha->flags.npiv_supported = 0;
4047 if (IS_QLA2XXX_MIDTYPE(ha) &&
4048 (ha->fw_attributes & BIT_2)) {
4049 ha->flags.npiv_supported = 1;
4050 if ((!ha->max_npiv_vports) ||
4051 ((ha->max_npiv_vports + 1) %
4052 MIN_MULTI_ID_FABRIC))
4053 ha->max_npiv_vports =
4054 MIN_MULTI_ID_FABRIC - 1;
4055 }
4056 qla2x00_get_resource_cnts(vha);
4057 qla_init_iocb_limit(vha);
4058
4059 /*
4060 * Allocate the array of outstanding commands
4061 * now that we know the firmware resources.
4062 */
4063 rval = qla2x00_alloc_outstanding_cmds(ha,
4064 vha->req);
4065 if (rval != QLA_SUCCESS)
4066 goto failed;
4067
4068 if (!fw_major_version && !(IS_P3P_TYPE(ha)))
4069 qla2x00_alloc_offload_mem(vha);
4070
4071 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha)))
4072 qla2x00_alloc_fw_dump(vha);
4073
4074 } else {
4075 goto failed;
4076 }
4077 } else {
4078 ql_log(ql_log_fatal, vha, 0x00cd,
4079 "ISP Firmware failed checksum.\n");
4080 goto failed;
4081 }
4082
4083 /* Enable PUREX PASSTHRU */
4084 if (ql2xrdpenable || ha->flags.scm_supported_f ||
4085 ha->flags.edif_enabled)
4086 qla25xx_set_els_cmds_supported(vha);
4087 } else
4088 goto failed;
4089
4090 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
4091 /* Enable proper parity. */
4092 spin_lock_irqsave(&ha->hardware_lock, flags);
4093 if (IS_QLA2300(ha))
4094 /* SRAM parity */
4095 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x1);
4096 else
4097 /* SRAM, Instruction RAM and GP RAM parity */
4098 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x7);
4099 rd_reg_word(®->hccr);
4100 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4101 }
4102
4103 if (IS_QLA27XX(ha) || IS_QLA28XX(ha))
4104 ha->flags.fac_supported = 1;
4105 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
4106 uint32_t size;
4107
4108 rval = qla81xx_fac_get_sector_size(vha, &size);
4109 if (rval == QLA_SUCCESS) {
4110 ha->flags.fac_supported = 1;
4111 ha->fdt_block_size = size << 2;
4112 } else {
4113 ql_log(ql_log_warn, vha, 0x00ce,
4114 "Unsupported FAC firmware (%d.%02d.%02d).\n",
4115 ha->fw_major_version, ha->fw_minor_version,
4116 ha->fw_subminor_version);
4117
4118 if (IS_QLA83XX(ha)) {
4119 ha->flags.fac_supported = 0;
4120 rval = QLA_SUCCESS;
4121 }
4122 }
4123 }
4124 failed:
4125 if (rval) {
4126 ql_log(ql_log_fatal, vha, 0x00cf,
4127 "Setup chip ****FAILED****.\n");
4128 }
4129
4130 return (rval);
4131 }
4132
4133 /**
4134 * qla2x00_init_response_q_entries() - Initializes response queue entries.
4135 * @rsp: response queue
4136 *
4137 * Beginning of request ring has initialization control block already built
4138 * by nvram config routine.
4139 *
4140 * Returns 0 on success.
4141 */
4142 void
qla2x00_init_response_q_entries(struct rsp_que * rsp)4143 qla2x00_init_response_q_entries(struct rsp_que *rsp)
4144 {
4145 uint16_t cnt;
4146 response_t *pkt;
4147
4148 rsp->ring_ptr = rsp->ring;
4149 rsp->ring_index = 0;
4150 rsp->status_srb = NULL;
4151 pkt = rsp->ring_ptr;
4152 for (cnt = 0; cnt < rsp->length; cnt++) {
4153 pkt->signature = RESPONSE_PROCESSED;
4154 pkt++;
4155 }
4156 }
4157
4158 /**
4159 * qla2x00_update_fw_options() - Read and process firmware options.
4160 * @vha: HA context
4161 *
4162 * Returns 0 on success.
4163 */
4164 void
qla2x00_update_fw_options(scsi_qla_host_t * vha)4165 qla2x00_update_fw_options(scsi_qla_host_t *vha)
4166 {
4167 uint16_t swing, emphasis, tx_sens, rx_sens;
4168 struct qla_hw_data *ha = vha->hw;
4169
4170 memset(ha->fw_options, 0, sizeof(ha->fw_options));
4171 qla2x00_get_fw_options(vha, ha->fw_options);
4172
4173 if (IS_QLA2100(ha) || IS_QLA2200(ha))
4174 return;
4175
4176 /* Serial Link options. */
4177 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
4178 "Serial link options.\n");
4179 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
4180 ha->fw_seriallink_options, sizeof(ha->fw_seriallink_options));
4181
4182 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
4183 if (ha->fw_seriallink_options[3] & BIT_2) {
4184 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
4185
4186 /* 1G settings */
4187 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
4188 emphasis = (ha->fw_seriallink_options[2] &
4189 (BIT_4 | BIT_3)) >> 3;
4190 tx_sens = ha->fw_seriallink_options[0] &
4191 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4192 rx_sens = (ha->fw_seriallink_options[0] &
4193 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
4194 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
4195 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
4196 if (rx_sens == 0x0)
4197 rx_sens = 0x3;
4198 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
4199 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
4200 ha->fw_options[10] |= BIT_5 |
4201 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
4202 (tx_sens & (BIT_1 | BIT_0));
4203
4204 /* 2G settings */
4205 swing = (ha->fw_seriallink_options[2] &
4206 (BIT_7 | BIT_6 | BIT_5)) >> 5;
4207 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
4208 tx_sens = ha->fw_seriallink_options[1] &
4209 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4210 rx_sens = (ha->fw_seriallink_options[1] &
4211 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
4212 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
4213 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
4214 if (rx_sens == 0x0)
4215 rx_sens = 0x3;
4216 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
4217 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
4218 ha->fw_options[11] |= BIT_5 |
4219 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
4220 (tx_sens & (BIT_1 | BIT_0));
4221 }
4222
4223 /* FCP2 options. */
4224 /* Return command IOCBs without waiting for an ABTS to complete. */
4225 ha->fw_options[3] |= BIT_13;
4226
4227 /* LED scheme. */
4228 if (ha->flags.enable_led_scheme)
4229 ha->fw_options[2] |= BIT_12;
4230
4231 /* Detect ISP6312. */
4232 if (IS_QLA6312(ha))
4233 ha->fw_options[2] |= BIT_13;
4234
4235 /* Set Retry FLOGI in case of P2P connection */
4236 if (ha->operating_mode == P2P) {
4237 ha->fw_options[2] |= BIT_3;
4238 ql_dbg(ql_dbg_disc, vha, 0x2100,
4239 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
4240 __func__, ha->fw_options[2]);
4241 }
4242
4243 /* Update firmware options. */
4244 qla2x00_set_fw_options(vha, ha->fw_options);
4245 }
4246
4247 void
qla24xx_update_fw_options(scsi_qla_host_t * vha)4248 qla24xx_update_fw_options(scsi_qla_host_t *vha)
4249 {
4250 int rval;
4251 struct qla_hw_data *ha = vha->hw;
4252
4253 if (IS_P3P_TYPE(ha))
4254 return;
4255
4256 /* Hold status IOCBs until ABTS response received. */
4257 if (ql2xfwholdabts)
4258 ha->fw_options[3] |= BIT_12;
4259
4260 /* Set Retry FLOGI in case of P2P connection */
4261 if (ha->operating_mode == P2P) {
4262 ha->fw_options[2] |= BIT_3;
4263 ql_dbg(ql_dbg_disc, vha, 0x2101,
4264 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
4265 __func__, ha->fw_options[2]);
4266 }
4267
4268 /* Move PUREX, ABTS RX & RIDA to ATIOQ */
4269 if (ql2xmvasynctoatio && !ha->flags.edif_enabled &&
4270 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) {
4271 if (qla_tgt_mode_enabled(vha) ||
4272 qla_dual_mode_enabled(vha))
4273 ha->fw_options[2] |= BIT_11;
4274 else
4275 ha->fw_options[2] &= ~BIT_11;
4276 }
4277
4278 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
4279 IS_QLA28XX(ha)) {
4280 /*
4281 * Tell FW to track each exchange to prevent
4282 * driver from using stale exchange.
4283 */
4284 if (qla_tgt_mode_enabled(vha) ||
4285 qla_dual_mode_enabled(vha))
4286 ha->fw_options[2] |= BIT_4;
4287 else
4288 ha->fw_options[2] &= ~(BIT_4);
4289
4290 /* Reserve 1/2 of emergency exchanges for ELS.*/
4291 if (qla2xuseresexchforels)
4292 ha->fw_options[2] |= BIT_8;
4293 else
4294 ha->fw_options[2] &= ~BIT_8;
4295
4296 /*
4297 * N2N: set Secure=1 for PLOGI ACC and
4298 * fw shal not send PRLI after PLOGI Acc
4299 */
4300 if (ha->flags.edif_enabled &&
4301 DBELL_ACTIVE(vha)) {
4302 ha->fw_options[3] |= BIT_15;
4303 ha->flags.n2n_fw_acc_sec = 1;
4304 } else {
4305 ha->fw_options[3] &= ~BIT_15;
4306 ha->flags.n2n_fw_acc_sec = 0;
4307 }
4308 }
4309
4310 if (ql2xrdpenable || ha->flags.scm_supported_f ||
4311 ha->flags.edif_enabled)
4312 ha->fw_options[1] |= ADD_FO1_ENABLE_PUREX_IOCB;
4313
4314 /* Enable Async 8130/8131 events -- transceiver insertion/removal */
4315 if (IS_BPM_RANGE_CAPABLE(ha))
4316 ha->fw_options[3] |= BIT_10;
4317
4318 ql_dbg(ql_dbg_init, vha, 0x00e8,
4319 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
4320 __func__, ha->fw_options[1], ha->fw_options[2],
4321 ha->fw_options[3], vha->host->active_mode);
4322
4323 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3])
4324 qla2x00_set_fw_options(vha, ha->fw_options);
4325
4326 /* Update Serial Link options. */
4327 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
4328 return;
4329
4330 rval = qla2x00_set_serdes_params(vha,
4331 le16_to_cpu(ha->fw_seriallink_options24[1]),
4332 le16_to_cpu(ha->fw_seriallink_options24[2]),
4333 le16_to_cpu(ha->fw_seriallink_options24[3]));
4334 if (rval != QLA_SUCCESS) {
4335 ql_log(ql_log_warn, vha, 0x0104,
4336 "Unable to update Serial Link options (%x).\n", rval);
4337 }
4338 }
4339
4340 void
qla2x00_config_rings(struct scsi_qla_host * vha)4341 qla2x00_config_rings(struct scsi_qla_host *vha)
4342 {
4343 struct qla_hw_data *ha = vha->hw;
4344 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4345 struct req_que *req = ha->req_q_map[0];
4346 struct rsp_que *rsp = ha->rsp_q_map[0];
4347
4348 /* Setup ring parameters in initialization control block. */
4349 ha->init_cb->request_q_outpointer = cpu_to_le16(0);
4350 ha->init_cb->response_q_inpointer = cpu_to_le16(0);
4351 ha->init_cb->request_q_length = cpu_to_le16(req->length);
4352 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
4353 put_unaligned_le64(req->dma, &ha->init_cb->request_q_address);
4354 put_unaligned_le64(rsp->dma, &ha->init_cb->response_q_address);
4355
4356 wrt_reg_word(ISP_REQ_Q_IN(ha, reg), 0);
4357 wrt_reg_word(ISP_REQ_Q_OUT(ha, reg), 0);
4358 wrt_reg_word(ISP_RSP_Q_IN(ha, reg), 0);
4359 wrt_reg_word(ISP_RSP_Q_OUT(ha, reg), 0);
4360 rd_reg_word(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
4361 }
4362
4363 void
qla24xx_config_rings(struct scsi_qla_host * vha)4364 qla24xx_config_rings(struct scsi_qla_host *vha)
4365 {
4366 struct qla_hw_data *ha = vha->hw;
4367 device_reg_t *reg = ISP_QUE_REG(ha, 0);
4368 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
4369 struct qla_msix_entry *msix;
4370 struct init_cb_24xx *icb;
4371 uint16_t rid = 0;
4372 struct req_que *req = ha->req_q_map[0];
4373 struct rsp_que *rsp = ha->rsp_q_map[0];
4374
4375 /* Setup ring parameters in initialization control block. */
4376 icb = (struct init_cb_24xx *)ha->init_cb;
4377 icb->request_q_outpointer = cpu_to_le16(0);
4378 icb->response_q_inpointer = cpu_to_le16(0);
4379 icb->request_q_length = cpu_to_le16(req->length);
4380 icb->response_q_length = cpu_to_le16(rsp->length);
4381 put_unaligned_le64(req->dma, &icb->request_q_address);
4382 put_unaligned_le64(rsp->dma, &icb->response_q_address);
4383
4384 /* Setup ATIO queue dma pointers for target mode */
4385 icb->atio_q_inpointer = cpu_to_le16(0);
4386 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
4387 put_unaligned_le64(ha->tgt.atio_dma, &icb->atio_q_address);
4388
4389 if (IS_SHADOW_REG_CAPABLE(ha))
4390 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29);
4391
4392 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
4393 IS_QLA28XX(ha)) {
4394 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS);
4395 icb->rid = cpu_to_le16(rid);
4396 if (ha->flags.msix_enabled) {
4397 msix = &ha->msix_entries[1];
4398 ql_dbg(ql_dbg_init, vha, 0x0019,
4399 "Registering vector 0x%x for base que.\n",
4400 msix->entry);
4401 icb->msix = cpu_to_le16(msix->entry);
4402 }
4403 /* Use alternate PCI bus number */
4404 if (MSB(rid))
4405 icb->firmware_options_2 |= cpu_to_le32(BIT_19);
4406 /* Use alternate PCI devfn */
4407 if (LSB(rid))
4408 icb->firmware_options_2 |= cpu_to_le32(BIT_18);
4409
4410 /* Use Disable MSIX Handshake mode for capable adapters */
4411 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
4412 (ha->flags.msix_enabled)) {
4413 icb->firmware_options_2 &= cpu_to_le32(~BIT_22);
4414 ha->flags.disable_msix_handshake = 1;
4415 ql_dbg(ql_dbg_init, vha, 0x00fe,
4416 "MSIX Handshake Disable Mode turned on.\n");
4417 } else {
4418 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
4419 }
4420 icb->firmware_options_2 |= cpu_to_le32(BIT_23);
4421
4422 wrt_reg_dword(®->isp25mq.req_q_in, 0);
4423 wrt_reg_dword(®->isp25mq.req_q_out, 0);
4424 wrt_reg_dword(®->isp25mq.rsp_q_in, 0);
4425 wrt_reg_dword(®->isp25mq.rsp_q_out, 0);
4426 } else {
4427 wrt_reg_dword(®->isp24.req_q_in, 0);
4428 wrt_reg_dword(®->isp24.req_q_out, 0);
4429 wrt_reg_dword(®->isp24.rsp_q_in, 0);
4430 wrt_reg_dword(®->isp24.rsp_q_out, 0);
4431 }
4432
4433 qlt_24xx_config_rings(vha);
4434
4435 /* If the user has configured the speed, set it here */
4436 if (ha->set_data_rate) {
4437 ql_dbg(ql_dbg_init, vha, 0x00fd,
4438 "Speed set by user : %s Gbps \n",
4439 qla2x00_get_link_speed_str(ha, ha->set_data_rate));
4440 icb->firmware_options_3 = cpu_to_le32(ha->set_data_rate << 13);
4441 }
4442
4443 /* PCI posting */
4444 rd_reg_word(&ioreg->hccr);
4445 }
4446
4447 /**
4448 * qla2x00_init_rings() - Initializes firmware.
4449 * @vha: HA context
4450 *
4451 * Beginning of request ring has initialization control block already built
4452 * by nvram config routine.
4453 *
4454 * Returns 0 on success.
4455 */
4456 int
qla2x00_init_rings(scsi_qla_host_t * vha)4457 qla2x00_init_rings(scsi_qla_host_t *vha)
4458 {
4459 int rval;
4460 unsigned long flags = 0;
4461 int cnt, que;
4462 struct qla_hw_data *ha = vha->hw;
4463 struct req_que *req;
4464 struct rsp_que *rsp;
4465 struct mid_init_cb_24xx *mid_init_cb =
4466 (struct mid_init_cb_24xx *) ha->init_cb;
4467
4468 spin_lock_irqsave(&ha->hardware_lock, flags);
4469
4470 /* Clear outstanding commands array. */
4471 for (que = 0; que < ha->max_req_queues; que++) {
4472 req = ha->req_q_map[que];
4473 if (!req || !test_bit(que, ha->req_qid_map))
4474 continue;
4475 req->out_ptr = (uint16_t *)(req->ring + req->length);
4476 *req->out_ptr = 0;
4477 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
4478 req->outstanding_cmds[cnt] = NULL;
4479
4480 req->current_outstanding_cmd = 1;
4481
4482 /* Initialize firmware. */
4483 req->ring_ptr = req->ring;
4484 req->ring_index = 0;
4485 req->cnt = req->length;
4486 }
4487
4488 for (que = 0; que < ha->max_rsp_queues; que++) {
4489 rsp = ha->rsp_q_map[que];
4490 if (!rsp || !test_bit(que, ha->rsp_qid_map))
4491 continue;
4492 rsp->in_ptr = (uint16_t *)(rsp->ring + rsp->length);
4493 *rsp->in_ptr = 0;
4494 /* Initialize response queue entries */
4495 if (IS_QLAFX00(ha))
4496 qlafx00_init_response_q_entries(rsp);
4497 else
4498 qla2x00_init_response_q_entries(rsp);
4499 }
4500
4501 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
4502 ha->tgt.atio_ring_index = 0;
4503 /* Initialize ATIO queue entries */
4504 qlt_init_atio_q_entries(vha);
4505
4506 ha->isp_ops->config_rings(vha);
4507
4508 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4509
4510 if (IS_QLAFX00(ha)) {
4511 rval = qlafx00_init_firmware(vha, ha->init_cb_size);
4512 goto next_check;
4513 }
4514
4515 /* Update any ISP specific firmware options before initialization. */
4516 ha->isp_ops->update_fw_options(vha);
4517
4518 ql_dbg(ql_dbg_init, vha, 0x00d1,
4519 "Issue init firmware FW opt 1-3= %08x %08x %08x.\n",
4520 le32_to_cpu(mid_init_cb->init_cb.firmware_options_1),
4521 le32_to_cpu(mid_init_cb->init_cb.firmware_options_2),
4522 le32_to_cpu(mid_init_cb->init_cb.firmware_options_3));
4523
4524 if (ha->flags.npiv_supported) {
4525 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
4526 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
4527 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
4528 }
4529
4530 if (IS_FWI2_CAPABLE(ha)) {
4531 mid_init_cb->options = cpu_to_le16(BIT_1);
4532 mid_init_cb->init_cb.execution_throttle =
4533 cpu_to_le16(ha->cur_fw_xcb_count);
4534 ha->flags.dport_enabled =
4535 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) &
4536 BIT_7) != 0;
4537 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n",
4538 (ha->flags.dport_enabled) ? "enabled" : "disabled");
4539 /* FA-WWPN Status */
4540 ha->flags.fawwpn_enabled =
4541 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) &
4542 BIT_6) != 0;
4543 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n",
4544 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
4545 /* Init_cb will be reused for other command(s). Save a backup copy of port_name */
4546 memcpy(ha->port_name, ha->init_cb->port_name, WWN_SIZE);
4547 }
4548
4549 /* ELS pass through payload is limit by frame size. */
4550 if (ha->flags.edif_enabled)
4551 mid_init_cb->init_cb.frame_payload_size = cpu_to_le16(ELS_MAX_PAYLOAD);
4552
4553 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
4554 next_check:
4555 if (rval) {
4556 ql_log(ql_log_fatal, vha, 0x00d2,
4557 "Init Firmware **** FAILED ****.\n");
4558 } else {
4559 ql_dbg(ql_dbg_init, vha, 0x00d3,
4560 "Init Firmware -- success.\n");
4561 QLA_FW_STARTED(ha);
4562 vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0;
4563 }
4564
4565 return (rval);
4566 }
4567
4568 /**
4569 * qla2x00_fw_ready() - Waits for firmware ready.
4570 * @vha: HA context
4571 *
4572 * Returns 0 on success.
4573 */
4574 static int
qla2x00_fw_ready(scsi_qla_host_t * vha)4575 qla2x00_fw_ready(scsi_qla_host_t *vha)
4576 {
4577 int rval;
4578 unsigned long wtime, mtime, cs84xx_time;
4579 uint16_t min_wait; /* Minimum wait time if loop is down */
4580 uint16_t wait_time; /* Wait time if loop is coming ready */
4581 uint16_t state[6];
4582 struct qla_hw_data *ha = vha->hw;
4583
4584 if (IS_QLAFX00(vha->hw))
4585 return qlafx00_fw_ready(vha);
4586
4587 /* Time to wait for loop down */
4588 if (IS_P3P_TYPE(ha))
4589 min_wait = 30;
4590 else
4591 min_wait = 20;
4592
4593 /*
4594 * Firmware should take at most one RATOV to login, plus 5 seconds for
4595 * our own processing.
4596 */
4597 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
4598 wait_time = min_wait;
4599 }
4600
4601 /* Min wait time if loop down */
4602 mtime = jiffies + (min_wait * HZ);
4603
4604 /* wait time before firmware ready */
4605 wtime = jiffies + (wait_time * HZ);
4606
4607 /* Wait for ISP to finish LIP */
4608 if (!vha->flags.init_done)
4609 ql_log(ql_log_info, vha, 0x801e,
4610 "Waiting for LIP to complete.\n");
4611
4612 do {
4613 memset(state, -1, sizeof(state));
4614 rval = qla2x00_get_firmware_state(vha, state);
4615 if (rval == QLA_SUCCESS) {
4616 if (state[0] < FSTATE_LOSS_OF_SYNC) {
4617 vha->device_flags &= ~DFLG_NO_CABLE;
4618 }
4619 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
4620 ql_dbg(ql_dbg_taskm, vha, 0x801f,
4621 "fw_state=%x 84xx=%x.\n", state[0],
4622 state[2]);
4623 if ((state[2] & FSTATE_LOGGED_IN) &&
4624 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
4625 ql_dbg(ql_dbg_taskm, vha, 0x8028,
4626 "Sending verify iocb.\n");
4627
4628 cs84xx_time = jiffies;
4629 rval = qla84xx_init_chip(vha);
4630 if (rval != QLA_SUCCESS) {
4631 ql_log(ql_log_warn,
4632 vha, 0x8007,
4633 "Init chip failed.\n");
4634 break;
4635 }
4636
4637 /* Add time taken to initialize. */
4638 cs84xx_time = jiffies - cs84xx_time;
4639 wtime += cs84xx_time;
4640 mtime += cs84xx_time;
4641 ql_dbg(ql_dbg_taskm, vha, 0x8008,
4642 "Increasing wait time by %ld. "
4643 "New time %ld.\n", cs84xx_time,
4644 wtime);
4645 }
4646 } else if (state[0] == FSTATE_READY) {
4647 ql_dbg(ql_dbg_taskm, vha, 0x8037,
4648 "F/W Ready - OK.\n");
4649
4650 qla2x00_get_retry_cnt(vha, &ha->retry_count,
4651 &ha->login_timeout, &ha->r_a_tov);
4652
4653 rval = QLA_SUCCESS;
4654 break;
4655 }
4656
4657 rval = QLA_FUNCTION_FAILED;
4658
4659 if (atomic_read(&vha->loop_down_timer) &&
4660 state[0] != FSTATE_READY) {
4661 /* Loop down. Timeout on min_wait for states
4662 * other than Wait for Login.
4663 */
4664 if (time_after_eq(jiffies, mtime)) {
4665 ql_log(ql_log_info, vha, 0x8038,
4666 "Cable is unplugged...\n");
4667
4668 vha->device_flags |= DFLG_NO_CABLE;
4669 break;
4670 }
4671 }
4672 } else {
4673 /* Mailbox cmd failed. Timeout on min_wait. */
4674 if (time_after_eq(jiffies, mtime) ||
4675 ha->flags.isp82xx_fw_hung)
4676 break;
4677 }
4678
4679 if (time_after_eq(jiffies, wtime))
4680 break;
4681
4682 /* Delay for a while */
4683 msleep(500);
4684 } while (1);
4685
4686 ql_dbg(ql_dbg_taskm, vha, 0x803a,
4687 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0],
4688 state[1], state[2], state[3], state[4], state[5], jiffies);
4689
4690 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
4691 ql_log(ql_log_warn, vha, 0x803b,
4692 "Firmware ready **** FAILED ****.\n");
4693 }
4694
4695 return (rval);
4696 }
4697
4698 /*
4699 * qla2x00_configure_hba
4700 * Setup adapter context.
4701 *
4702 * Input:
4703 * ha = adapter state pointer.
4704 *
4705 * Returns:
4706 * 0 = success
4707 *
4708 * Context:
4709 * Kernel context.
4710 */
4711 static int
qla2x00_configure_hba(scsi_qla_host_t * vha)4712 qla2x00_configure_hba(scsi_qla_host_t *vha)
4713 {
4714 int rval;
4715 uint16_t loop_id;
4716 uint16_t topo;
4717 uint16_t sw_cap;
4718 uint8_t al_pa;
4719 uint8_t area;
4720 uint8_t domain;
4721 char connect_type[22];
4722 struct qla_hw_data *ha = vha->hw;
4723 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4724 port_id_t id;
4725 unsigned long flags;
4726
4727 /* Get host addresses. */
4728 rval = qla2x00_get_adapter_id(vha,
4729 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
4730 if (rval != QLA_SUCCESS) {
4731 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
4732 IS_CNA_CAPABLE(ha) ||
4733 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
4734 ql_dbg(ql_dbg_disc, vha, 0x2008,
4735 "Loop is in a transition state.\n");
4736 } else {
4737 ql_log(ql_log_warn, vha, 0x2009,
4738 "Unable to get host loop ID.\n");
4739 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) &&
4740 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) {
4741 ql_log(ql_log_warn, vha, 0x1151,
4742 "Doing link init.\n");
4743 if (qla24xx_link_initialize(vha) == QLA_SUCCESS)
4744 return rval;
4745 }
4746 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
4747 }
4748 return (rval);
4749 }
4750
4751 if (topo == 4) {
4752 ql_log(ql_log_info, vha, 0x200a,
4753 "Cannot get topology - retrying.\n");
4754 return (QLA_FUNCTION_FAILED);
4755 }
4756
4757 vha->loop_id = loop_id;
4758
4759 /* initialize */
4760 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
4761 ha->operating_mode = LOOP;
4762
4763 switch (topo) {
4764 case 0:
4765 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
4766 ha->switch_cap = 0;
4767 ha->current_topology = ISP_CFG_NL;
4768 strcpy(connect_type, "(Loop)");
4769 break;
4770
4771 case 1:
4772 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
4773 ha->switch_cap = sw_cap;
4774 ha->current_topology = ISP_CFG_FL;
4775 strcpy(connect_type, "(FL_Port)");
4776 break;
4777
4778 case 2:
4779 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
4780 ha->switch_cap = 0;
4781 ha->operating_mode = P2P;
4782 ha->current_topology = ISP_CFG_N;
4783 strcpy(connect_type, "(N_Port-to-N_Port)");
4784 break;
4785
4786 case 3:
4787 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
4788 ha->switch_cap = sw_cap;
4789 ha->operating_mode = P2P;
4790 ha->current_topology = ISP_CFG_F;
4791 strcpy(connect_type, "(F_Port)");
4792 break;
4793
4794 default:
4795 ql_dbg(ql_dbg_disc, vha, 0x200f,
4796 "HBA in unknown topology %x, using NL.\n", topo);
4797 ha->switch_cap = 0;
4798 ha->current_topology = ISP_CFG_NL;
4799 strcpy(connect_type, "(Loop)");
4800 break;
4801 }
4802
4803 /* Save Host port and loop ID. */
4804 /* byte order - Big Endian */
4805 id.b.domain = domain;
4806 id.b.area = area;
4807 id.b.al_pa = al_pa;
4808 id.b.rsvd_1 = 0;
4809 spin_lock_irqsave(&ha->hardware_lock, flags);
4810 if (vha->hw->flags.edif_enabled) {
4811 if (topo != 2)
4812 qlt_update_host_map(vha, id);
4813 } else if (!(topo == 2 && ha->flags.n2n_bigger))
4814 qlt_update_host_map(vha, id);
4815 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4816
4817 if (!vha->flags.init_done)
4818 ql_log(ql_log_info, vha, 0x2010,
4819 "Topology - %s, Host Loop address 0x%x.\n",
4820 connect_type, vha->loop_id);
4821
4822 return(rval);
4823 }
4824
4825 inline void
qla2x00_set_model_info(scsi_qla_host_t * vha,uint8_t * model,size_t len,const char * def)4826 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
4827 const char *def)
4828 {
4829 char *st, *en;
4830 uint16_t index;
4831 uint64_t zero[2] = { 0 };
4832 struct qla_hw_data *ha = vha->hw;
4833 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
4834 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
4835
4836 if (len > sizeof(zero))
4837 len = sizeof(zero);
4838 if (memcmp(model, &zero, len) != 0) {
4839 memcpy(ha->model_number, model, len);
4840 st = en = ha->model_number;
4841 en += len - 1;
4842 while (en > st) {
4843 if (*en != 0x20 && *en != 0x00)
4844 break;
4845 *en-- = '\0';
4846 }
4847
4848 index = (ha->pdev->subsystem_device & 0xff);
4849 if (use_tbl &&
4850 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4851 index < QLA_MODEL_NAMES)
4852 strlcpy(ha->model_desc,
4853 qla2x00_model_name[index * 2 + 1],
4854 sizeof(ha->model_desc));
4855 } else {
4856 index = (ha->pdev->subsystem_device & 0xff);
4857 if (use_tbl &&
4858 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4859 index < QLA_MODEL_NAMES) {
4860 strlcpy(ha->model_number,
4861 qla2x00_model_name[index * 2],
4862 sizeof(ha->model_number));
4863 strlcpy(ha->model_desc,
4864 qla2x00_model_name[index * 2 + 1],
4865 sizeof(ha->model_desc));
4866 } else {
4867 strlcpy(ha->model_number, def,
4868 sizeof(ha->model_number));
4869 }
4870 }
4871 if (IS_FWI2_CAPABLE(ha))
4872 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
4873 sizeof(ha->model_desc));
4874 }
4875
4876 /* On sparc systems, obtain port and node WWN from firmware
4877 * properties.
4878 */
qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t * vha,nvram_t * nv)4879 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
4880 {
4881 #ifdef CONFIG_SPARC
4882 struct qla_hw_data *ha = vha->hw;
4883 struct pci_dev *pdev = ha->pdev;
4884 struct device_node *dp = pci_device_to_OF_node(pdev);
4885 const u8 *val;
4886 int len;
4887
4888 val = of_get_property(dp, "port-wwn", &len);
4889 if (val && len >= WWN_SIZE)
4890 memcpy(nv->port_name, val, WWN_SIZE);
4891
4892 val = of_get_property(dp, "node-wwn", &len);
4893 if (val && len >= WWN_SIZE)
4894 memcpy(nv->node_name, val, WWN_SIZE);
4895 #endif
4896 }
4897
4898 /*
4899 * NVRAM configuration for ISP 2xxx
4900 *
4901 * Input:
4902 * ha = adapter block pointer.
4903 *
4904 * Output:
4905 * initialization control block in response_ring
4906 * host adapters parameters in host adapter block
4907 *
4908 * Returns:
4909 * 0 = success.
4910 */
4911 int
qla2x00_nvram_config(scsi_qla_host_t * vha)4912 qla2x00_nvram_config(scsi_qla_host_t *vha)
4913 {
4914 int rval;
4915 uint8_t chksum = 0;
4916 uint16_t cnt;
4917 uint8_t *dptr1, *dptr2;
4918 struct qla_hw_data *ha = vha->hw;
4919 init_cb_t *icb = ha->init_cb;
4920 nvram_t *nv = ha->nvram;
4921 uint8_t *ptr = ha->nvram;
4922 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4923
4924 rval = QLA_SUCCESS;
4925
4926 /* Determine NVRAM starting address. */
4927 ha->nvram_size = sizeof(*nv);
4928 ha->nvram_base = 0;
4929 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
4930 if ((rd_reg_word(®->ctrl_status) >> 14) == 1)
4931 ha->nvram_base = 0x80;
4932
4933 /* Get NVRAM data and calculate checksum. */
4934 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
4935 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
4936 chksum += *ptr++;
4937
4938 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
4939 "Contents of NVRAM.\n");
4940 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
4941 nv, ha->nvram_size);
4942
4943 /* Bad NVRAM data, set defaults parameters. */
4944 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
4945 nv->nvram_version < 1) {
4946 /* Reset NVRAM data. */
4947 ql_log(ql_log_warn, vha, 0x0064,
4948 "Inconsistent NVRAM detected: checksum=%#x id=%.4s version=%#x.\n",
4949 chksum, nv->id, nv->nvram_version);
4950 ql_log(ql_log_warn, vha, 0x0065,
4951 "Falling back to "
4952 "functioning (yet invalid -- WWPN) defaults.\n");
4953
4954 /*
4955 * Set default initialization control block.
4956 */
4957 memset(nv, 0, ha->nvram_size);
4958 nv->parameter_block_version = ICB_VERSION;
4959
4960 if (IS_QLA23XX(ha)) {
4961 nv->firmware_options[0] = BIT_2 | BIT_1;
4962 nv->firmware_options[1] = BIT_7 | BIT_5;
4963 nv->add_firmware_options[0] = BIT_5;
4964 nv->add_firmware_options[1] = BIT_5 | BIT_4;
4965 nv->frame_payload_size = cpu_to_le16(2048);
4966 nv->special_options[1] = BIT_7;
4967 } else if (IS_QLA2200(ha)) {
4968 nv->firmware_options[0] = BIT_2 | BIT_1;
4969 nv->firmware_options[1] = BIT_7 | BIT_5;
4970 nv->add_firmware_options[0] = BIT_5;
4971 nv->add_firmware_options[1] = BIT_5 | BIT_4;
4972 nv->frame_payload_size = cpu_to_le16(1024);
4973 } else if (IS_QLA2100(ha)) {
4974 nv->firmware_options[0] = BIT_3 | BIT_1;
4975 nv->firmware_options[1] = BIT_5;
4976 nv->frame_payload_size = cpu_to_le16(1024);
4977 }
4978
4979 nv->max_iocb_allocation = cpu_to_le16(256);
4980 nv->execution_throttle = cpu_to_le16(16);
4981 nv->retry_count = 8;
4982 nv->retry_delay = 1;
4983
4984 nv->port_name[0] = 33;
4985 nv->port_name[3] = 224;
4986 nv->port_name[4] = 139;
4987
4988 qla2xxx_nvram_wwn_from_ofw(vha, nv);
4989
4990 nv->login_timeout = 4;
4991
4992 /*
4993 * Set default host adapter parameters
4994 */
4995 nv->host_p[1] = BIT_2;
4996 nv->reset_delay = 5;
4997 nv->port_down_retry_count = 8;
4998 nv->max_luns_per_target = cpu_to_le16(8);
4999 nv->link_down_timeout = 60;
5000
5001 rval = 1;
5002 }
5003
5004 /* Reset Initialization control block */
5005 memset(icb, 0, ha->init_cb_size);
5006
5007 /*
5008 * Setup driver NVRAM options.
5009 */
5010 nv->firmware_options[0] |= (BIT_6 | BIT_1);
5011 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
5012 nv->firmware_options[1] |= (BIT_5 | BIT_0);
5013 nv->firmware_options[1] &= ~BIT_4;
5014
5015 if (IS_QLA23XX(ha)) {
5016 nv->firmware_options[0] |= BIT_2;
5017 nv->firmware_options[0] &= ~BIT_3;
5018 nv->special_options[0] &= ~BIT_6;
5019 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
5020
5021 if (IS_QLA2300(ha)) {
5022 if (ha->fb_rev == FPM_2310) {
5023 strcpy(ha->model_number, "QLA2310");
5024 } else {
5025 strcpy(ha->model_number, "QLA2300");
5026 }
5027 } else {
5028 qla2x00_set_model_info(vha, nv->model_number,
5029 sizeof(nv->model_number), "QLA23xx");
5030 }
5031 } else if (IS_QLA2200(ha)) {
5032 nv->firmware_options[0] |= BIT_2;
5033 /*
5034 * 'Point-to-point preferred, else loop' is not a safe
5035 * connection mode setting.
5036 */
5037 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
5038 (BIT_5 | BIT_4)) {
5039 /* Force 'loop preferred, else point-to-point'. */
5040 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
5041 nv->add_firmware_options[0] |= BIT_5;
5042 }
5043 strcpy(ha->model_number, "QLA22xx");
5044 } else /*if (IS_QLA2100(ha))*/ {
5045 strcpy(ha->model_number, "QLA2100");
5046 }
5047
5048 /*
5049 * Copy over NVRAM RISC parameter block to initialization control block.
5050 */
5051 dptr1 = (uint8_t *)icb;
5052 dptr2 = (uint8_t *)&nv->parameter_block_version;
5053 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
5054 while (cnt--)
5055 *dptr1++ = *dptr2++;
5056
5057 /* Copy 2nd half. */
5058 dptr1 = (uint8_t *)icb->add_firmware_options;
5059 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
5060 while (cnt--)
5061 *dptr1++ = *dptr2++;
5062 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
5063 /* Use alternate WWN? */
5064 if (nv->host_p[1] & BIT_7) {
5065 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
5066 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
5067 }
5068
5069 /* Prepare nodename */
5070 if ((icb->firmware_options[1] & BIT_6) == 0) {
5071 /*
5072 * Firmware will apply the following mask if the nodename was
5073 * not provided.
5074 */
5075 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
5076 icb->node_name[0] &= 0xF0;
5077 }
5078
5079 /*
5080 * Set host adapter parameters.
5081 */
5082
5083 /*
5084 * BIT_7 in the host-parameters section allows for modification to
5085 * internal driver logging.
5086 */
5087 if (nv->host_p[0] & BIT_7)
5088 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
5089 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
5090 /* Always load RISC code on non ISP2[12]00 chips. */
5091 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
5092 ha->flags.disable_risc_code_load = 0;
5093 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
5094 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
5095 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
5096 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
5097 ha->flags.disable_serdes = 0;
5098
5099 ha->operating_mode =
5100 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
5101
5102 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
5103 sizeof(ha->fw_seriallink_options));
5104
5105 /* save HBA serial number */
5106 ha->serial0 = icb->port_name[5];
5107 ha->serial1 = icb->port_name[6];
5108 ha->serial2 = icb->port_name[7];
5109 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
5110 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
5111
5112 icb->execution_throttle = cpu_to_le16(0xFFFF);
5113
5114 ha->retry_count = nv->retry_count;
5115
5116 /* Set minimum login_timeout to 4 seconds. */
5117 if (nv->login_timeout != ql2xlogintimeout)
5118 nv->login_timeout = ql2xlogintimeout;
5119 if (nv->login_timeout < 4)
5120 nv->login_timeout = 4;
5121 ha->login_timeout = nv->login_timeout;
5122
5123 /* Set minimum RATOV to 100 tenths of a second. */
5124 ha->r_a_tov = 100;
5125
5126 ha->loop_reset_delay = nv->reset_delay;
5127
5128 /* Link Down Timeout = 0:
5129 *
5130 * When Port Down timer expires we will start returning
5131 * I/O's to OS with "DID_NO_CONNECT".
5132 *
5133 * Link Down Timeout != 0:
5134 *
5135 * The driver waits for the link to come up after link down
5136 * before returning I/Os to OS with "DID_NO_CONNECT".
5137 */
5138 if (nv->link_down_timeout == 0) {
5139 ha->loop_down_abort_time =
5140 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
5141 } else {
5142 ha->link_down_timeout = nv->link_down_timeout;
5143 ha->loop_down_abort_time =
5144 (LOOP_DOWN_TIME - ha->link_down_timeout);
5145 }
5146
5147 /*
5148 * Need enough time to try and get the port back.
5149 */
5150 ha->port_down_retry_count = nv->port_down_retry_count;
5151 if (qlport_down_retry)
5152 ha->port_down_retry_count = qlport_down_retry;
5153 /* Set login_retry_count */
5154 ha->login_retry_count = nv->retry_count;
5155 if (ha->port_down_retry_count == nv->port_down_retry_count &&
5156 ha->port_down_retry_count > 3)
5157 ha->login_retry_count = ha->port_down_retry_count;
5158 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
5159 ha->login_retry_count = ha->port_down_retry_count;
5160 if (ql2xloginretrycount)
5161 ha->login_retry_count = ql2xloginretrycount;
5162
5163 icb->lun_enables = cpu_to_le16(0);
5164 icb->command_resource_count = 0;
5165 icb->immediate_notify_resource_count = 0;
5166 icb->timeout = cpu_to_le16(0);
5167
5168 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
5169 /* Enable RIO */
5170 icb->firmware_options[0] &= ~BIT_3;
5171 icb->add_firmware_options[0] &=
5172 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
5173 icb->add_firmware_options[0] |= BIT_2;
5174 icb->response_accumulation_timer = 3;
5175 icb->interrupt_delay_timer = 5;
5176
5177 vha->flags.process_response_queue = 1;
5178 } else {
5179 /* Enable ZIO. */
5180 if (!vha->flags.init_done) {
5181 ha->zio_mode = icb->add_firmware_options[0] &
5182 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
5183 ha->zio_timer = icb->interrupt_delay_timer ?
5184 icb->interrupt_delay_timer : 2;
5185 }
5186 icb->add_firmware_options[0] &=
5187 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
5188 vha->flags.process_response_queue = 0;
5189 if (ha->zio_mode != QLA_ZIO_DISABLED) {
5190 ha->zio_mode = QLA_ZIO_MODE_6;
5191
5192 ql_log(ql_log_info, vha, 0x0068,
5193 "ZIO mode %d enabled; timer delay (%d us).\n",
5194 ha->zio_mode, ha->zio_timer * 100);
5195
5196 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
5197 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
5198 vha->flags.process_response_queue = 1;
5199 }
5200 }
5201
5202 if (rval) {
5203 ql_log(ql_log_warn, vha, 0x0069,
5204 "NVRAM configuration failed.\n");
5205 }
5206 return (rval);
5207 }
5208
5209 static void
qla2x00_rport_del(void * data)5210 qla2x00_rport_del(void *data)
5211 {
5212 fc_port_t *fcport = data;
5213 struct fc_rport *rport;
5214 unsigned long flags;
5215
5216 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
5217 rport = fcport->drport ? fcport->drport : fcport->rport;
5218 fcport->drport = NULL;
5219 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
5220 if (rport) {
5221 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b,
5222 "%s %8phN. rport %p roles %x\n",
5223 __func__, fcport->port_name, rport,
5224 rport->roles);
5225
5226 fc_remote_port_delete(rport);
5227 }
5228 }
5229
qla2x00_set_fcport_state(fc_port_t * fcport,int state)5230 void qla2x00_set_fcport_state(fc_port_t *fcport, int state)
5231 {
5232 int old_state;
5233
5234 old_state = atomic_read(&fcport->state);
5235 atomic_set(&fcport->state, state);
5236
5237 /* Don't print state transitions during initial allocation of fcport */
5238 if (old_state && old_state != state) {
5239 ql_dbg(ql_dbg_disc, fcport->vha, 0x207d,
5240 "FCPort %8phC state transitioned from %s to %s - portid=%02x%02x%02x.\n",
5241 fcport->port_name, port_state_str[old_state],
5242 port_state_str[state], fcport->d_id.b.domain,
5243 fcport->d_id.b.area, fcport->d_id.b.al_pa);
5244 }
5245 }
5246
5247 /**
5248 * qla2x00_alloc_fcport() - Allocate a generic fcport.
5249 * @vha: HA context
5250 * @flags: allocation flags
5251 *
5252 * Returns a pointer to the allocated fcport, or NULL, if none available.
5253 */
5254 fc_port_t *
qla2x00_alloc_fcport(scsi_qla_host_t * vha,gfp_t flags)5255 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
5256 {
5257 fc_port_t *fcport;
5258
5259 fcport = kzalloc(sizeof(fc_port_t), flags);
5260 if (!fcport)
5261 return NULL;
5262
5263 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev,
5264 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma,
5265 flags);
5266 if (!fcport->ct_desc.ct_sns) {
5267 ql_log(ql_log_warn, vha, 0xd049,
5268 "Failed to allocate ct_sns request.\n");
5269 kfree(fcport);
5270 return NULL;
5271 }
5272
5273 /* Setup fcport template structure. */
5274 fcport->vha = vha;
5275 fcport->port_type = FCT_UNKNOWN;
5276 fcport->loop_id = FC_NO_LOOP_ID;
5277 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
5278 fcport->supported_classes = FC_COS_UNSPECIFIED;
5279 fcport->fp_speed = PORT_SPEED_UNKNOWN;
5280
5281 fcport->disc_state = DSC_DELETED;
5282 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
5283 fcport->deleted = QLA_SESS_DELETED;
5284 fcport->login_retry = vha->hw->login_retry_count;
5285 fcport->chip_reset = vha->hw->base_qpair->chip_reset;
5286 fcport->logout_on_delete = 1;
5287 fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
5288 fcport->tgt_short_link_down_cnt = 0;
5289 fcport->dev_loss_tmo = 0;
5290
5291 if (!fcport->ct_desc.ct_sns) {
5292 ql_log(ql_log_warn, vha, 0xd049,
5293 "Failed to allocate ct_sns request.\n");
5294 kfree(fcport);
5295 return NULL;
5296 }
5297
5298 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn);
5299 INIT_WORK(&fcport->free_work, qlt_free_session_done);
5300 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn);
5301 INIT_LIST_HEAD(&fcport->gnl_entry);
5302 INIT_LIST_HEAD(&fcport->list);
5303
5304 INIT_LIST_HEAD(&fcport->sess_cmd_list);
5305 spin_lock_init(&fcport->sess_cmd_lock);
5306
5307 spin_lock_init(&fcport->edif.sa_list_lock);
5308 INIT_LIST_HEAD(&fcport->edif.tx_sa_list);
5309 INIT_LIST_HEAD(&fcport->edif.rx_sa_list);
5310
5311 spin_lock_init(&fcport->edif.indx_list_lock);
5312 INIT_LIST_HEAD(&fcport->edif.edif_indx_list);
5313
5314 return fcport;
5315 }
5316
5317 void
qla2x00_free_fcport(fc_port_t * fcport)5318 qla2x00_free_fcport(fc_port_t *fcport)
5319 {
5320 if (fcport->ct_desc.ct_sns) {
5321 dma_free_coherent(&fcport->vha->hw->pdev->dev,
5322 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns,
5323 fcport->ct_desc.ct_sns_dma);
5324
5325 fcport->ct_desc.ct_sns = NULL;
5326 }
5327
5328 qla_edif_flush_sa_ctl_lists(fcport);
5329 list_del(&fcport->list);
5330 qla2x00_clear_loop_id(fcport);
5331
5332 qla_edif_list_del(fcport);
5333
5334 kfree(fcport);
5335 }
5336
qla_get_login_template(scsi_qla_host_t * vha)5337 static void qla_get_login_template(scsi_qla_host_t *vha)
5338 {
5339 struct qla_hw_data *ha = vha->hw;
5340 int rval;
5341 u32 *bp, sz;
5342 __be32 *q;
5343
5344 memset(ha->init_cb, 0, ha->init_cb_size);
5345 sz = min_t(int, sizeof(struct fc_els_flogi), ha->init_cb_size);
5346 rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma,
5347 ha->init_cb, sz);
5348 if (rval != QLA_SUCCESS) {
5349 ql_dbg(ql_dbg_init, vha, 0x00d1,
5350 "PLOGI ELS param read fail.\n");
5351 return;
5352 }
5353 q = (__be32 *)&ha->plogi_els_payld.fl_csp;
5354
5355 bp = (uint32_t *)ha->init_cb;
5356 cpu_to_be32_array(q, bp, sz / 4);
5357 ha->flags.plogi_template_valid = 1;
5358 }
5359
5360 /*
5361 * qla2x00_configure_loop
5362 * Updates Fibre Channel Device Database with what is actually on loop.
5363 *
5364 * Input:
5365 * ha = adapter block pointer.
5366 *
5367 * Returns:
5368 * 0 = success.
5369 * 1 = error.
5370 * 2 = database was full and device was not configured.
5371 */
5372 static int
qla2x00_configure_loop(scsi_qla_host_t * vha)5373 qla2x00_configure_loop(scsi_qla_host_t *vha)
5374 {
5375 int rval;
5376 unsigned long flags, save_flags;
5377 struct qla_hw_data *ha = vha->hw;
5378
5379 rval = QLA_SUCCESS;
5380
5381 /* Get Initiator ID */
5382 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
5383 rval = qla2x00_configure_hba(vha);
5384 if (rval != QLA_SUCCESS) {
5385 ql_dbg(ql_dbg_disc, vha, 0x2013,
5386 "Unable to configure HBA.\n");
5387 return (rval);
5388 }
5389 }
5390
5391 save_flags = flags = vha->dpc_flags;
5392 ql_dbg(ql_dbg_disc, vha, 0x2014,
5393 "Configure loop -- dpc flags = 0x%lx.\n", flags);
5394
5395 /*
5396 * If we have both an RSCN and PORT UPDATE pending then handle them
5397 * both at the same time.
5398 */
5399 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5400 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
5401
5402 qla2x00_get_data_rate(vha);
5403 qla_get_login_template(vha);
5404
5405 /* Determine what we need to do */
5406 if ((ha->current_topology == ISP_CFG_FL ||
5407 ha->current_topology == ISP_CFG_F) &&
5408 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
5409
5410 set_bit(RSCN_UPDATE, &flags);
5411 clear_bit(LOCAL_LOOP_UPDATE, &flags);
5412
5413 } else if (ha->current_topology == ISP_CFG_NL ||
5414 ha->current_topology == ISP_CFG_N) {
5415 clear_bit(RSCN_UPDATE, &flags);
5416 set_bit(LOCAL_LOOP_UPDATE, &flags);
5417 } else if (!vha->flags.online ||
5418 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
5419 set_bit(RSCN_UPDATE, &flags);
5420 set_bit(LOCAL_LOOP_UPDATE, &flags);
5421 }
5422
5423 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
5424 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5425 ql_dbg(ql_dbg_disc, vha, 0x2015,
5426 "Loop resync needed, failing.\n");
5427 rval = QLA_FUNCTION_FAILED;
5428 } else
5429 rval = qla2x00_configure_local_loop(vha);
5430 }
5431
5432 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
5433 if (LOOP_TRANSITION(vha)) {
5434 ql_dbg(ql_dbg_disc, vha, 0x2099,
5435 "Needs RSCN update and loop transition.\n");
5436 rval = QLA_FUNCTION_FAILED;
5437 }
5438 else
5439 rval = qla2x00_configure_fabric(vha);
5440 }
5441
5442 if (rval == QLA_SUCCESS) {
5443 if (atomic_read(&vha->loop_down_timer) ||
5444 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5445 rval = QLA_FUNCTION_FAILED;
5446 } else {
5447 atomic_set(&vha->loop_state, LOOP_READY);
5448 ql_dbg(ql_dbg_disc, vha, 0x2069,
5449 "LOOP READY.\n");
5450 ha->flags.fw_init_done = 1;
5451
5452 /*
5453 * use link up to wake up app to get ready for
5454 * authentication.
5455 */
5456 if (ha->flags.edif_enabled && DBELL_INACTIVE(vha))
5457 qla2x00_post_aen_work(vha, FCH_EVT_LINKUP,
5458 ha->link_data_rate);
5459
5460 /*
5461 * Process any ATIO queue entries that came in
5462 * while we weren't online.
5463 */
5464 if (qla_tgt_mode_enabled(vha) ||
5465 qla_dual_mode_enabled(vha)) {
5466 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
5467 qlt_24xx_process_atio_queue(vha, 0);
5468 spin_unlock_irqrestore(&ha->tgt.atio_lock,
5469 flags);
5470 }
5471 }
5472 }
5473
5474 if (rval) {
5475 ql_dbg(ql_dbg_disc, vha, 0x206a,
5476 "%s *** FAILED ***.\n", __func__);
5477 } else {
5478 ql_dbg(ql_dbg_disc, vha, 0x206b,
5479 "%s: exiting normally. local port wwpn %8phN id %06x)\n",
5480 __func__, vha->port_name, vha->d_id.b24);
5481 }
5482
5483 /* Restore state if a resync event occurred during processing */
5484 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5485 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
5486 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5487 if (test_bit(RSCN_UPDATE, &save_flags)) {
5488 set_bit(RSCN_UPDATE, &vha->dpc_flags);
5489 }
5490 }
5491
5492 return (rval);
5493 }
5494
qla2x00_configure_n2n_loop(scsi_qla_host_t * vha)5495 static int qla2x00_configure_n2n_loop(scsi_qla_host_t *vha)
5496 {
5497 unsigned long flags;
5498 fc_port_t *fcport;
5499
5500 ql_dbg(ql_dbg_disc, vha, 0x206a, "%s %d.\n", __func__, __LINE__);
5501
5502 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags))
5503 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5504
5505 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5506 if (fcport->n2n_flag) {
5507 qla24xx_fcport_handle_login(vha, fcport);
5508 return QLA_SUCCESS;
5509 }
5510 }
5511
5512 spin_lock_irqsave(&vha->work_lock, flags);
5513 vha->scan.scan_retry++;
5514 spin_unlock_irqrestore(&vha->work_lock, flags);
5515
5516 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
5517 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5518 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5519 }
5520 return QLA_FUNCTION_FAILED;
5521 }
5522
5523 static void
qla_reinitialize_link(scsi_qla_host_t * vha)5524 qla_reinitialize_link(scsi_qla_host_t *vha)
5525 {
5526 int rval;
5527
5528 atomic_set(&vha->loop_state, LOOP_DOWN);
5529 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
5530 rval = qla2x00_full_login_lip(vha);
5531 if (rval == QLA_SUCCESS) {
5532 ql_dbg(ql_dbg_disc, vha, 0xd050, "Link reinitialized\n");
5533 } else {
5534 ql_dbg(ql_dbg_disc, vha, 0xd051,
5535 "Link reinitialization failed (%d)\n", rval);
5536 }
5537 }
5538
5539 /*
5540 * qla2x00_configure_local_loop
5541 * Updates Fibre Channel Device Database with local loop devices.
5542 *
5543 * Input:
5544 * ha = adapter block pointer.
5545 *
5546 * Returns:
5547 * 0 = success.
5548 */
5549 static int
qla2x00_configure_local_loop(scsi_qla_host_t * vha)5550 qla2x00_configure_local_loop(scsi_qla_host_t *vha)
5551 {
5552 int rval, rval2;
5553 int found_devs;
5554 int found;
5555 fc_port_t *fcport, *new_fcport;
5556 uint16_t index;
5557 uint16_t entries;
5558 struct gid_list_info *gid;
5559 uint16_t loop_id;
5560 uint8_t domain, area, al_pa;
5561 struct qla_hw_data *ha = vha->hw;
5562 unsigned long flags;
5563
5564 /* Inititae N2N login. */
5565 if (N2N_TOPO(ha))
5566 return qla2x00_configure_n2n_loop(vha);
5567
5568 found_devs = 0;
5569 new_fcport = NULL;
5570 entries = MAX_FIBRE_DEVICES_LOOP;
5571
5572 /* Get list of logged in devices. */
5573 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
5574 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
5575 &entries);
5576 if (rval != QLA_SUCCESS)
5577 goto err;
5578
5579 ql_dbg(ql_dbg_disc, vha, 0x2011,
5580 "Entries in ID list (%d).\n", entries);
5581 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
5582 ha->gid_list, entries * sizeof(*ha->gid_list));
5583
5584 if (entries == 0) {
5585 spin_lock_irqsave(&vha->work_lock, flags);
5586 vha->scan.scan_retry++;
5587 spin_unlock_irqrestore(&vha->work_lock, flags);
5588
5589 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
5590 u8 loop_map_entries = 0;
5591 int rc;
5592
5593 rc = qla2x00_get_fcal_position_map(vha, NULL,
5594 &loop_map_entries);
5595 if (rc == QLA_SUCCESS && loop_map_entries > 1) {
5596 /*
5597 * There are devices that are still not logged
5598 * in. Reinitialize to give them a chance.
5599 */
5600 qla_reinitialize_link(vha);
5601 return QLA_FUNCTION_FAILED;
5602 }
5603 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5604 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5605 }
5606 } else {
5607 vha->scan.scan_retry = 0;
5608 }
5609
5610 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5611 fcport->scan_state = QLA_FCPORT_SCAN;
5612 }
5613
5614 /* Allocate temporary fcport for any new fcports discovered. */
5615 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5616 if (new_fcport == NULL) {
5617 ql_log(ql_log_warn, vha, 0x2012,
5618 "Memory allocation failed for fcport.\n");
5619 rval = QLA_MEMORY_ALLOC_FAILED;
5620 goto err;
5621 }
5622 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5623
5624 /* Add devices to port list. */
5625 gid = ha->gid_list;
5626 for (index = 0; index < entries; index++) {
5627 domain = gid->domain;
5628 area = gid->area;
5629 al_pa = gid->al_pa;
5630 if (IS_QLA2100(ha) || IS_QLA2200(ha))
5631 loop_id = gid->loop_id_2100;
5632 else
5633 loop_id = le16_to_cpu(gid->loop_id);
5634 gid = (void *)gid + ha->gid_list_info_size;
5635
5636 /* Bypass reserved domain fields. */
5637 if ((domain & 0xf0) == 0xf0)
5638 continue;
5639
5640 /* Bypass if not same domain and area of adapter. */
5641 if (area && domain && ((area != vha->d_id.b.area) ||
5642 (domain != vha->d_id.b.domain)) &&
5643 (ha->current_topology == ISP_CFG_NL))
5644 continue;
5645
5646
5647 /* Bypass invalid local loop ID. */
5648 if (loop_id > LAST_LOCAL_LOOP_ID)
5649 continue;
5650
5651 memset(new_fcport->port_name, 0, WWN_SIZE);
5652
5653 /* Fill in member data. */
5654 new_fcport->d_id.b.domain = domain;
5655 new_fcport->d_id.b.area = area;
5656 new_fcport->d_id.b.al_pa = al_pa;
5657 new_fcport->loop_id = loop_id;
5658 new_fcport->scan_state = QLA_FCPORT_FOUND;
5659
5660 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
5661 if (rval2 != QLA_SUCCESS) {
5662 ql_dbg(ql_dbg_disc, vha, 0x2097,
5663 "Failed to retrieve fcport information "
5664 "-- get_port_database=%x, loop_id=0x%04x.\n",
5665 rval2, new_fcport->loop_id);
5666 /* Skip retry if N2N */
5667 if (ha->current_topology != ISP_CFG_N) {
5668 ql_dbg(ql_dbg_disc, vha, 0x2105,
5669 "Scheduling resync.\n");
5670 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5671 continue;
5672 }
5673 }
5674
5675 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5676 /* Check for matching device in port list. */
5677 found = 0;
5678 fcport = NULL;
5679 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5680 if (memcmp(new_fcport->port_name, fcport->port_name,
5681 WWN_SIZE))
5682 continue;
5683
5684 fcport->flags &= ~FCF_FABRIC_DEVICE;
5685 fcport->loop_id = new_fcport->loop_id;
5686 fcport->port_type = new_fcport->port_type;
5687 fcport->d_id.b24 = new_fcport->d_id.b24;
5688 memcpy(fcport->node_name, new_fcport->node_name,
5689 WWN_SIZE);
5690 fcport->scan_state = QLA_FCPORT_FOUND;
5691 if (fcport->login_retry == 0) {
5692 fcport->login_retry = vha->hw->login_retry_count;
5693 ql_dbg(ql_dbg_disc, vha, 0x2135,
5694 "Port login retry %8phN, lid 0x%04x retry cnt=%d.\n",
5695 fcport->port_name, fcport->loop_id,
5696 fcport->login_retry);
5697 }
5698 found++;
5699 break;
5700 }
5701
5702 if (!found) {
5703 /* New device, add to fcports list. */
5704 list_add_tail(&new_fcport->list, &vha->vp_fcports);
5705
5706 /* Allocate a new replacement fcport. */
5707 fcport = new_fcport;
5708
5709 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5710
5711 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5712
5713 if (new_fcport == NULL) {
5714 ql_log(ql_log_warn, vha, 0xd031,
5715 "Failed to allocate memory for fcport.\n");
5716 rval = QLA_MEMORY_ALLOC_FAILED;
5717 goto err;
5718 }
5719 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5720 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5721 }
5722
5723 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5724
5725 /* Base iIDMA settings on HBA port speed. */
5726 fcport->fp_speed = ha->link_data_rate;
5727
5728 found_devs++;
5729 }
5730
5731 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5732 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5733 break;
5734
5735 if (fcport->scan_state == QLA_FCPORT_SCAN) {
5736 if ((qla_dual_mode_enabled(vha) ||
5737 qla_ini_mode_enabled(vha)) &&
5738 atomic_read(&fcport->state) == FCS_ONLINE) {
5739 qla2x00_mark_device_lost(vha, fcport,
5740 ql2xplogiabsentdevice);
5741 if (fcport->loop_id != FC_NO_LOOP_ID &&
5742 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5743 fcport->port_type != FCT_INITIATOR &&
5744 fcport->port_type != FCT_BROADCAST) {
5745 ql_dbg(ql_dbg_disc, vha, 0x20f0,
5746 "%s %d %8phC post del sess\n",
5747 __func__, __LINE__,
5748 fcport->port_name);
5749
5750 qlt_schedule_sess_for_deletion(fcport);
5751 continue;
5752 }
5753 }
5754 }
5755
5756 if (fcport->scan_state == QLA_FCPORT_FOUND)
5757 qla24xx_fcport_handle_login(vha, fcport);
5758 }
5759
5760 qla2x00_free_fcport(new_fcport);
5761
5762 return rval;
5763
5764 err:
5765 ql_dbg(ql_dbg_disc, vha, 0x2098,
5766 "Configure local loop error exit: rval=%x.\n", rval);
5767 return rval;
5768 }
5769
5770 static void
qla2x00_iidma_fcport(scsi_qla_host_t * vha,fc_port_t * fcport)5771 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
5772 {
5773 int rval;
5774 uint16_t mb[MAILBOX_REGISTER_COUNT];
5775 struct qla_hw_data *ha = vha->hw;
5776
5777 if (!IS_IIDMA_CAPABLE(ha))
5778 return;
5779
5780 if (atomic_read(&fcport->state) != FCS_ONLINE)
5781 return;
5782
5783 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
5784 fcport->fp_speed > ha->link_data_rate ||
5785 !ha->flags.gpsc_supported)
5786 return;
5787
5788 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
5789 mb);
5790 if (rval != QLA_SUCCESS) {
5791 ql_dbg(ql_dbg_disc, vha, 0x2004,
5792 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n",
5793 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]);
5794 } else {
5795 ql_dbg(ql_dbg_disc, vha, 0x2005,
5796 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n",
5797 qla2x00_get_link_speed_str(ha, fcport->fp_speed),
5798 fcport->fp_speed, fcport->port_name);
5799 }
5800 }
5801
qla_do_iidma_work(struct scsi_qla_host * vha,fc_port_t * fcport)5802 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5803 {
5804 qla2x00_iidma_fcport(vha, fcport);
5805 qla24xx_update_fcport_fcp_prio(vha, fcport);
5806 }
5807
qla_post_iidma_work(struct scsi_qla_host * vha,fc_port_t * fcport)5808 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5809 {
5810 struct qla_work_evt *e;
5811
5812 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA);
5813 if (!e)
5814 return QLA_FUNCTION_FAILED;
5815
5816 e->u.fcport.fcport = fcport;
5817 return qla2x00_post_work(vha, e);
5818 }
5819
5820 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/
5821 static void
qla2x00_reg_remote_port(scsi_qla_host_t * vha,fc_port_t * fcport)5822 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
5823 {
5824 struct fc_rport_identifiers rport_ids;
5825 struct fc_rport *rport;
5826 unsigned long flags;
5827
5828 if (atomic_read(&fcport->state) == FCS_ONLINE)
5829 return;
5830
5831 rport_ids.node_name = wwn_to_u64(fcport->node_name);
5832 rport_ids.port_name = wwn_to_u64(fcport->port_name);
5833 rport_ids.port_id = fcport->d_id.b.domain << 16 |
5834 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
5835 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
5836 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
5837 if (!rport) {
5838 ql_log(ql_log_warn, vha, 0x2006,
5839 "Unable to allocate fc remote port.\n");
5840 return;
5841 }
5842
5843 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
5844 *((fc_port_t **)rport->dd_data) = fcport;
5845 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
5846 fcport->dev_loss_tmo = rport->dev_loss_tmo;
5847
5848 rport->supported_classes = fcport->supported_classes;
5849
5850 rport_ids.roles = FC_PORT_ROLE_UNKNOWN;
5851 if (fcport->port_type == FCT_INITIATOR)
5852 rport_ids.roles |= FC_PORT_ROLE_FCP_INITIATOR;
5853 if (fcport->port_type == FCT_TARGET)
5854 rport_ids.roles |= FC_PORT_ROLE_FCP_TARGET;
5855 if (fcport->port_type & FCT_NVME_INITIATOR)
5856 rport_ids.roles |= FC_PORT_ROLE_NVME_INITIATOR;
5857 if (fcport->port_type & FCT_NVME_TARGET)
5858 rport_ids.roles |= FC_PORT_ROLE_NVME_TARGET;
5859 if (fcport->port_type & FCT_NVME_DISCOVERY)
5860 rport_ids.roles |= FC_PORT_ROLE_NVME_DISCOVERY;
5861
5862 fc_remote_port_rolechg(rport, rport_ids.roles);
5863
5864 ql_dbg(ql_dbg_disc, vha, 0x20ee,
5865 "%s: %8phN. rport %ld:0:%d (%p) is %s mode\n",
5866 __func__, fcport->port_name, vha->host_no,
5867 rport->scsi_target_id, rport,
5868 (fcport->port_type == FCT_TARGET) ? "tgt" :
5869 ((fcport->port_type & FCT_NVME) ? "nvme" : "ini"));
5870 }
5871
5872 /*
5873 * qla2x00_update_fcport
5874 * Updates device on list.
5875 *
5876 * Input:
5877 * ha = adapter block pointer.
5878 * fcport = port structure pointer.
5879 *
5880 * Return:
5881 * 0 - Success
5882 * BIT_0 - error
5883 *
5884 * Context:
5885 * Kernel context.
5886 */
5887 void
qla2x00_update_fcport(scsi_qla_host_t * vha,fc_port_t * fcport)5888 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
5889 {
5890 if (IS_SW_RESV_ADDR(fcport->d_id))
5891 return;
5892
5893 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n",
5894 __func__, fcport->port_name);
5895
5896 qla2x00_set_fcport_disc_state(fcport, DSC_UPD_FCPORT);
5897 fcport->login_retry = vha->hw->login_retry_count;
5898 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
5899 fcport->deleted = 0;
5900 if (vha->hw->current_topology == ISP_CFG_NL)
5901 fcport->logout_on_delete = 0;
5902 else
5903 fcport->logout_on_delete = 1;
5904 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0;
5905
5906 if (fcport->tgt_link_down_time < fcport->dev_loss_tmo) {
5907 fcport->tgt_short_link_down_cnt++;
5908 fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
5909 }
5910
5911 switch (vha->hw->current_topology) {
5912 case ISP_CFG_N:
5913 case ISP_CFG_NL:
5914 fcport->keep_nport_handle = 1;
5915 break;
5916 default:
5917 break;
5918 }
5919
5920 qla2x00_iidma_fcport(vha, fcport);
5921
5922 qla2x00_dfs_create_rport(vha, fcport);
5923
5924 qla24xx_update_fcport_fcp_prio(vha, fcport);
5925
5926 switch (vha->host->active_mode) {
5927 case MODE_INITIATOR:
5928 qla2x00_reg_remote_port(vha, fcport);
5929 break;
5930 case MODE_TARGET:
5931 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5932 !vha->vha_tgt.qla_tgt->tgt_stopped)
5933 qlt_fc_port_added(vha, fcport);
5934 break;
5935 case MODE_DUAL:
5936 qla2x00_reg_remote_port(vha, fcport);
5937 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5938 !vha->vha_tgt.qla_tgt->tgt_stopped)
5939 qlt_fc_port_added(vha, fcport);
5940 break;
5941 default:
5942 break;
5943 }
5944
5945 if (NVME_TARGET(vha->hw, fcport))
5946 qla_nvme_register_remote(vha, fcport);
5947
5948 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5949
5950 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) {
5951 if (fcport->id_changed) {
5952 fcport->id_changed = 0;
5953 ql_dbg(ql_dbg_disc, vha, 0x20d7,
5954 "%s %d %8phC post gfpnid fcp_cnt %d\n",
5955 __func__, __LINE__, fcport->port_name,
5956 vha->fcport_count);
5957 qla24xx_post_gfpnid_work(vha, fcport);
5958 } else {
5959 ql_dbg(ql_dbg_disc, vha, 0x20d7,
5960 "%s %d %8phC post gpsc fcp_cnt %d\n",
5961 __func__, __LINE__, fcport->port_name,
5962 vha->fcport_count);
5963 qla24xx_post_gpsc_work(vha, fcport);
5964 }
5965 }
5966
5967 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE);
5968 }
5969
qla_register_fcport_fn(struct work_struct * work)5970 void qla_register_fcport_fn(struct work_struct *work)
5971 {
5972 fc_port_t *fcport = container_of(work, struct fc_port, reg_work);
5973 u32 rscn_gen = fcport->rscn_gen;
5974 u16 data[2];
5975
5976 if (IS_SW_RESV_ADDR(fcport->d_id))
5977 return;
5978
5979 qla2x00_update_fcport(fcport->vha, fcport);
5980
5981 ql_dbg(ql_dbg_disc, fcport->vha, 0x911e,
5982 "%s rscn gen %d/%d next DS %d\n", __func__,
5983 rscn_gen, fcport->rscn_gen, fcport->next_disc_state);
5984
5985 if (rscn_gen != fcport->rscn_gen) {
5986 /* RSCN(s) came in while registration */
5987 switch (fcport->next_disc_state) {
5988 case DSC_DELETE_PEND:
5989 qlt_schedule_sess_for_deletion(fcport);
5990 break;
5991 case DSC_ADISC:
5992 data[0] = data[1] = 0;
5993 qla2x00_post_async_adisc_work(fcport->vha, fcport,
5994 data);
5995 break;
5996 default:
5997 break;
5998 }
5999 }
6000 }
6001
6002 /*
6003 * qla2x00_configure_fabric
6004 * Setup SNS devices with loop ID's.
6005 *
6006 * Input:
6007 * ha = adapter block pointer.
6008 *
6009 * Returns:
6010 * 0 = success.
6011 * BIT_0 = error
6012 */
6013 static int
qla2x00_configure_fabric(scsi_qla_host_t * vha)6014 qla2x00_configure_fabric(scsi_qla_host_t *vha)
6015 {
6016 int rval;
6017 fc_port_t *fcport;
6018 uint16_t mb[MAILBOX_REGISTER_COUNT];
6019 uint16_t loop_id;
6020 LIST_HEAD(new_fcports);
6021 struct qla_hw_data *ha = vha->hw;
6022 int discovery_gen;
6023
6024 /* If FL port exists, then SNS is present */
6025 if (IS_FWI2_CAPABLE(ha))
6026 loop_id = NPH_F_PORT;
6027 else
6028 loop_id = SNS_FL_PORT;
6029 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
6030 if (rval != QLA_SUCCESS) {
6031 ql_dbg(ql_dbg_disc, vha, 0x20a0,
6032 "MBX_GET_PORT_NAME failed, No FL Port.\n");
6033
6034 vha->device_flags &= ~SWITCH_FOUND;
6035 return (QLA_SUCCESS);
6036 }
6037 vha->device_flags |= SWITCH_FOUND;
6038
6039 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_port_name, 0);
6040 if (rval != QLA_SUCCESS)
6041 ql_dbg(ql_dbg_disc, vha, 0x20ff,
6042 "Failed to get Fabric Port Name\n");
6043
6044 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) {
6045 rval = qla2x00_send_change_request(vha, 0x3, 0);
6046 if (rval != QLA_SUCCESS)
6047 ql_log(ql_log_warn, vha, 0x121,
6048 "Failed to enable receiving of RSCN requests: 0x%x.\n",
6049 rval);
6050 }
6051
6052 do {
6053 qla2x00_mgmt_svr_login(vha);
6054
6055 /* Ensure we are logged into the SNS. */
6056 loop_id = NPH_SNS_LID(ha);
6057 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
6058 0xfc, mb, BIT_1|BIT_0);
6059 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
6060 ql_dbg(ql_dbg_disc, vha, 0x20a1,
6061 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n",
6062 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval);
6063 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6064 return rval;
6065 }
6066
6067 /* FDMI support. */
6068 if (ql2xfdmienable &&
6069 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
6070 qla2x00_fdmi_register(vha);
6071
6072 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
6073 if (qla2x00_rft_id(vha)) {
6074 /* EMPTY */
6075 ql_dbg(ql_dbg_disc, vha, 0x20a2,
6076 "Register FC-4 TYPE failed.\n");
6077 if (test_bit(LOOP_RESYNC_NEEDED,
6078 &vha->dpc_flags))
6079 break;
6080 }
6081 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) {
6082 /* EMPTY */
6083 ql_dbg(ql_dbg_disc, vha, 0x209a,
6084 "Register FC-4 Features failed.\n");
6085 if (test_bit(LOOP_RESYNC_NEEDED,
6086 &vha->dpc_flags))
6087 break;
6088 }
6089 if (vha->flags.nvme_enabled) {
6090 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) {
6091 ql_dbg(ql_dbg_disc, vha, 0x2049,
6092 "Register NVME FC Type Features failed.\n");
6093 }
6094 }
6095 if (qla2x00_rnn_id(vha)) {
6096 /* EMPTY */
6097 ql_dbg(ql_dbg_disc, vha, 0x2104,
6098 "Register Node Name failed.\n");
6099 if (test_bit(LOOP_RESYNC_NEEDED,
6100 &vha->dpc_flags))
6101 break;
6102 } else if (qla2x00_rsnn_nn(vha)) {
6103 /* EMPTY */
6104 ql_dbg(ql_dbg_disc, vha, 0x209b,
6105 "Register Symbolic Node Name failed.\n");
6106 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6107 break;
6108 }
6109 }
6110
6111
6112 /* Mark the time right before querying FW for connected ports.
6113 * This process is long, asynchronous and by the time it's done,
6114 * collected information might not be accurate anymore. E.g.
6115 * disconnected port might have re-connected and a brand new
6116 * session has been created. In this case session's generation
6117 * will be newer than discovery_gen. */
6118 qlt_do_generation_tick(vha, &discovery_gen);
6119
6120 if (USE_ASYNC_SCAN(ha)) {
6121 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI,
6122 NULL);
6123 if (rval)
6124 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6125 } else {
6126 list_for_each_entry(fcport, &vha->vp_fcports, list)
6127 fcport->scan_state = QLA_FCPORT_SCAN;
6128
6129 rval = qla2x00_find_all_fabric_devs(vha);
6130 }
6131 if (rval != QLA_SUCCESS)
6132 break;
6133 } while (0);
6134
6135 if (!vha->nvme_local_port && vha->flags.nvme_enabled)
6136 qla_nvme_register_hba(vha);
6137
6138 if (rval)
6139 ql_dbg(ql_dbg_disc, vha, 0x2068,
6140 "Configure fabric error exit rval=%d.\n", rval);
6141
6142 return (rval);
6143 }
6144
6145 /*
6146 * qla2x00_find_all_fabric_devs
6147 *
6148 * Input:
6149 * ha = adapter block pointer.
6150 * dev = database device entry pointer.
6151 *
6152 * Returns:
6153 * 0 = success.
6154 *
6155 * Context:
6156 * Kernel context.
6157 */
6158 static int
qla2x00_find_all_fabric_devs(scsi_qla_host_t * vha)6159 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha)
6160 {
6161 int rval;
6162 uint16_t loop_id;
6163 fc_port_t *fcport, *new_fcport;
6164 int found;
6165
6166 sw_info_t *swl;
6167 int swl_idx;
6168 int first_dev, last_dev;
6169 port_id_t wrap = {}, nxt_d_id;
6170 struct qla_hw_data *ha = vha->hw;
6171 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
6172 unsigned long flags;
6173
6174 rval = QLA_SUCCESS;
6175
6176 /* Try GID_PT to get device list, else GAN. */
6177 if (!ha->swl)
6178 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
6179 GFP_KERNEL);
6180 swl = ha->swl;
6181 if (!swl) {
6182 /*EMPTY*/
6183 ql_dbg(ql_dbg_disc, vha, 0x209c,
6184 "GID_PT allocations failed, fallback on GA_NXT.\n");
6185 } else {
6186 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
6187 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
6188 swl = NULL;
6189 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6190 return rval;
6191 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
6192 swl = NULL;
6193 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6194 return rval;
6195 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
6196 swl = NULL;
6197 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6198 return rval;
6199 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) {
6200 swl = NULL;
6201 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6202 return rval;
6203 }
6204
6205 /* If other queries succeeded probe for FC-4 type */
6206 if (swl) {
6207 qla2x00_gff_id(vha, swl);
6208 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6209 return rval;
6210 }
6211 }
6212 swl_idx = 0;
6213
6214 /* Allocate temporary fcport for any new fcports discovered. */
6215 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
6216 if (new_fcport == NULL) {
6217 ql_log(ql_log_warn, vha, 0x209d,
6218 "Failed to allocate memory for fcport.\n");
6219 return (QLA_MEMORY_ALLOC_FAILED);
6220 }
6221 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
6222 /* Set start port ID scan at adapter ID. */
6223 first_dev = 1;
6224 last_dev = 0;
6225
6226 /* Starting free loop ID. */
6227 loop_id = ha->min_external_loopid;
6228 for (; loop_id <= ha->max_loop_id; loop_id++) {
6229 if (qla2x00_is_reserved_id(vha, loop_id))
6230 continue;
6231
6232 if (ha->current_topology == ISP_CFG_FL &&
6233 (atomic_read(&vha->loop_down_timer) ||
6234 LOOP_TRANSITION(vha))) {
6235 atomic_set(&vha->loop_down_timer, 0);
6236 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6237 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
6238 break;
6239 }
6240
6241 if (swl != NULL) {
6242 if (last_dev) {
6243 wrap.b24 = new_fcport->d_id.b24;
6244 } else {
6245 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
6246 memcpy(new_fcport->node_name,
6247 swl[swl_idx].node_name, WWN_SIZE);
6248 memcpy(new_fcport->port_name,
6249 swl[swl_idx].port_name, WWN_SIZE);
6250 memcpy(new_fcport->fabric_port_name,
6251 swl[swl_idx].fabric_port_name, WWN_SIZE);
6252 new_fcport->fp_speed = swl[swl_idx].fp_speed;
6253 new_fcport->fc4_type = swl[swl_idx].fc4_type;
6254
6255 new_fcport->nvme_flag = 0;
6256 if (vha->flags.nvme_enabled &&
6257 swl[swl_idx].fc4_type & FS_FC4TYPE_NVME) {
6258 ql_log(ql_log_info, vha, 0x2131,
6259 "FOUND: NVME port %8phC as FC Type 28h\n",
6260 new_fcport->port_name);
6261 }
6262
6263 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
6264 last_dev = 1;
6265 }
6266 swl_idx++;
6267 }
6268 } else {
6269 /* Send GA_NXT to the switch */
6270 rval = qla2x00_ga_nxt(vha, new_fcport);
6271 if (rval != QLA_SUCCESS) {
6272 ql_log(ql_log_warn, vha, 0x209e,
6273 "SNS scan failed -- assuming "
6274 "zero-entry result.\n");
6275 rval = QLA_SUCCESS;
6276 break;
6277 }
6278 }
6279
6280 /* If wrap on switch device list, exit. */
6281 if (first_dev) {
6282 wrap.b24 = new_fcport->d_id.b24;
6283 first_dev = 0;
6284 } else if (new_fcport->d_id.b24 == wrap.b24) {
6285 ql_dbg(ql_dbg_disc, vha, 0x209f,
6286 "Device wrap (%02x%02x%02x).\n",
6287 new_fcport->d_id.b.domain,
6288 new_fcport->d_id.b.area,
6289 new_fcport->d_id.b.al_pa);
6290 break;
6291 }
6292
6293 /* Bypass if same physical adapter. */
6294 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
6295 continue;
6296
6297 /* Bypass virtual ports of the same host. */
6298 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24))
6299 continue;
6300
6301 /* Bypass if same domain and area of adapter. */
6302 if (((new_fcport->d_id.b24 & 0xffff00) ==
6303 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
6304 ISP_CFG_FL)
6305 continue;
6306
6307 /* Bypass reserved domain fields. */
6308 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
6309 continue;
6310
6311 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
6312 if (ql2xgffidenable &&
6313 (!(new_fcport->fc4_type & FS_FC4TYPE_FCP) &&
6314 new_fcport->fc4_type != 0))
6315 continue;
6316
6317 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
6318
6319 /* Locate matching device in database. */
6320 found = 0;
6321 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6322 if (memcmp(new_fcport->port_name, fcport->port_name,
6323 WWN_SIZE))
6324 continue;
6325
6326 fcport->scan_state = QLA_FCPORT_FOUND;
6327
6328 found++;
6329
6330 /* Update port state. */
6331 memcpy(fcport->fabric_port_name,
6332 new_fcport->fabric_port_name, WWN_SIZE);
6333 fcport->fp_speed = new_fcport->fp_speed;
6334
6335 /*
6336 * If address the same and state FCS_ONLINE
6337 * (or in target mode), nothing changed.
6338 */
6339 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
6340 (atomic_read(&fcport->state) == FCS_ONLINE ||
6341 (vha->host->active_mode == MODE_TARGET))) {
6342 break;
6343 }
6344
6345 if (fcport->login_retry == 0)
6346 fcport->login_retry =
6347 vha->hw->login_retry_count;
6348 /*
6349 * If device was not a fabric device before.
6350 */
6351 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
6352 fcport->d_id.b24 = new_fcport->d_id.b24;
6353 qla2x00_clear_loop_id(fcport);
6354 fcport->flags |= (FCF_FABRIC_DEVICE |
6355 FCF_LOGIN_NEEDED);
6356 break;
6357 }
6358
6359 /*
6360 * Port ID changed or device was marked to be updated;
6361 * Log it out if still logged in and mark it for
6362 * relogin later.
6363 */
6364 if (qla_tgt_mode_enabled(base_vha)) {
6365 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080,
6366 "port changed FC ID, %8phC"
6367 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n",
6368 fcport->port_name,
6369 fcport->d_id.b.domain,
6370 fcport->d_id.b.area,
6371 fcport->d_id.b.al_pa,
6372 fcport->loop_id,
6373 new_fcport->d_id.b.domain,
6374 new_fcport->d_id.b.area,
6375 new_fcport->d_id.b.al_pa);
6376 fcport->d_id.b24 = new_fcport->d_id.b24;
6377 break;
6378 }
6379
6380 fcport->d_id.b24 = new_fcport->d_id.b24;
6381 fcport->flags |= FCF_LOGIN_NEEDED;
6382 break;
6383 }
6384
6385 if (found && NVME_TARGET(vha->hw, fcport)) {
6386 if (fcport->disc_state == DSC_DELETE_PEND) {
6387 qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
6388 vha->fcport_count--;
6389 fcport->login_succ = 0;
6390 }
6391 }
6392
6393 if (found) {
6394 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
6395 continue;
6396 }
6397 /* If device was not in our fcports list, then add it. */
6398 new_fcport->scan_state = QLA_FCPORT_FOUND;
6399 list_add_tail(&new_fcport->list, &vha->vp_fcports);
6400
6401 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
6402
6403
6404 /* Allocate a new replacement fcport. */
6405 nxt_d_id.b24 = new_fcport->d_id.b24;
6406 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
6407 if (new_fcport == NULL) {
6408 ql_log(ql_log_warn, vha, 0xd032,
6409 "Memory allocation failed for fcport.\n");
6410 return (QLA_MEMORY_ALLOC_FAILED);
6411 }
6412 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
6413 new_fcport->d_id.b24 = nxt_d_id.b24;
6414 }
6415
6416 qla2x00_free_fcport(new_fcport);
6417
6418 /*
6419 * Logout all previous fabric dev marked lost, except FCP2 devices.
6420 */
6421 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6422 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6423 break;
6424
6425 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
6426 continue;
6427
6428 if (fcport->scan_state == QLA_FCPORT_SCAN) {
6429 if ((qla_dual_mode_enabled(vha) ||
6430 qla_ini_mode_enabled(vha)) &&
6431 atomic_read(&fcport->state) == FCS_ONLINE) {
6432 qla2x00_mark_device_lost(vha, fcport,
6433 ql2xplogiabsentdevice);
6434 if (fcport->loop_id != FC_NO_LOOP_ID &&
6435 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
6436 fcport->port_type != FCT_INITIATOR &&
6437 fcport->port_type != FCT_BROADCAST) {
6438 ql_dbg(ql_dbg_disc, vha, 0x20f0,
6439 "%s %d %8phC post del sess\n",
6440 __func__, __LINE__,
6441 fcport->port_name);
6442 qlt_schedule_sess_for_deletion(fcport);
6443 continue;
6444 }
6445 }
6446 }
6447
6448 if (fcport->scan_state == QLA_FCPORT_FOUND &&
6449 (fcport->flags & FCF_LOGIN_NEEDED) != 0)
6450 qla24xx_fcport_handle_login(vha, fcport);
6451 }
6452 return (rval);
6453 }
6454
6455 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */
6456 int
qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t * vha)6457 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha)
6458 {
6459 int loop_id = FC_NO_LOOP_ID;
6460 int lid = NPH_MGMT_SERVER - vha->vp_idx;
6461 unsigned long flags;
6462 struct qla_hw_data *ha = vha->hw;
6463
6464 if (vha->vp_idx == 0) {
6465 set_bit(NPH_MGMT_SERVER, ha->loop_id_map);
6466 return NPH_MGMT_SERVER;
6467 }
6468
6469 /* pick id from high and work down to low */
6470 spin_lock_irqsave(&ha->vport_slock, flags);
6471 for (; lid > 0; lid--) {
6472 if (!test_bit(lid, vha->hw->loop_id_map)) {
6473 set_bit(lid, vha->hw->loop_id_map);
6474 loop_id = lid;
6475 break;
6476 }
6477 }
6478 spin_unlock_irqrestore(&ha->vport_slock, flags);
6479
6480 return loop_id;
6481 }
6482
6483 /*
6484 * qla2x00_fabric_login
6485 * Issue fabric login command.
6486 *
6487 * Input:
6488 * ha = adapter block pointer.
6489 * device = pointer to FC device type structure.
6490 *
6491 * Returns:
6492 * 0 - Login successfully
6493 * 1 - Login failed
6494 * 2 - Initiator device
6495 * 3 - Fatal error
6496 */
6497 int
qla2x00_fabric_login(scsi_qla_host_t * vha,fc_port_t * fcport,uint16_t * next_loopid)6498 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
6499 uint16_t *next_loopid)
6500 {
6501 int rval;
6502 int retry;
6503 uint16_t tmp_loopid;
6504 uint16_t mb[MAILBOX_REGISTER_COUNT];
6505 struct qla_hw_data *ha = vha->hw;
6506
6507 retry = 0;
6508 tmp_loopid = 0;
6509
6510 for (;;) {
6511 ql_dbg(ql_dbg_disc, vha, 0x2000,
6512 "Trying Fabric Login w/loop id 0x%04x for port "
6513 "%02x%02x%02x.\n",
6514 fcport->loop_id, fcport->d_id.b.domain,
6515 fcport->d_id.b.area, fcport->d_id.b.al_pa);
6516
6517 /* Login fcport on switch. */
6518 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
6519 fcport->d_id.b.domain, fcport->d_id.b.area,
6520 fcport->d_id.b.al_pa, mb, BIT_0);
6521 if (rval != QLA_SUCCESS) {
6522 return rval;
6523 }
6524 if (mb[0] == MBS_PORT_ID_USED) {
6525 /*
6526 * Device has another loop ID. The firmware team
6527 * recommends the driver perform an implicit login with
6528 * the specified ID again. The ID we just used is save
6529 * here so we return with an ID that can be tried by
6530 * the next login.
6531 */
6532 retry++;
6533 tmp_loopid = fcport->loop_id;
6534 fcport->loop_id = mb[1];
6535
6536 ql_dbg(ql_dbg_disc, vha, 0x2001,
6537 "Fabric Login: port in use - next loop "
6538 "id=0x%04x, port id= %02x%02x%02x.\n",
6539 fcport->loop_id, fcport->d_id.b.domain,
6540 fcport->d_id.b.area, fcport->d_id.b.al_pa);
6541
6542 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
6543 /*
6544 * Login succeeded.
6545 */
6546 if (retry) {
6547 /* A retry occurred before. */
6548 *next_loopid = tmp_loopid;
6549 } else {
6550 /*
6551 * No retry occurred before. Just increment the
6552 * ID value for next login.
6553 */
6554 *next_loopid = (fcport->loop_id + 1);
6555 }
6556
6557 if (mb[1] & BIT_0) {
6558 fcport->port_type = FCT_INITIATOR;
6559 } else {
6560 fcport->port_type = FCT_TARGET;
6561 if (mb[1] & BIT_1) {
6562 fcport->flags |= FCF_FCP2_DEVICE;
6563 }
6564 }
6565
6566 if (mb[10] & BIT_0)
6567 fcport->supported_classes |= FC_COS_CLASS2;
6568 if (mb[10] & BIT_1)
6569 fcport->supported_classes |= FC_COS_CLASS3;
6570
6571 if (IS_FWI2_CAPABLE(ha)) {
6572 if (mb[10] & BIT_7)
6573 fcport->flags |=
6574 FCF_CONF_COMP_SUPPORTED;
6575 }
6576
6577 rval = QLA_SUCCESS;
6578 break;
6579 } else if (mb[0] == MBS_LOOP_ID_USED) {
6580 /*
6581 * Loop ID already used, try next loop ID.
6582 */
6583 fcport->loop_id++;
6584 rval = qla2x00_find_new_loop_id(vha, fcport);
6585 if (rval != QLA_SUCCESS) {
6586 /* Ran out of loop IDs to use */
6587 break;
6588 }
6589 } else if (mb[0] == MBS_COMMAND_ERROR) {
6590 /*
6591 * Firmware possibly timed out during login. If NO
6592 * retries are left to do then the device is declared
6593 * dead.
6594 */
6595 *next_loopid = fcport->loop_id;
6596 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
6597 fcport->d_id.b.domain, fcport->d_id.b.area,
6598 fcport->d_id.b.al_pa);
6599 qla2x00_mark_device_lost(vha, fcport, 1);
6600
6601 rval = 1;
6602 break;
6603 } else {
6604 /*
6605 * unrecoverable / not handled error
6606 */
6607 ql_dbg(ql_dbg_disc, vha, 0x2002,
6608 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
6609 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
6610 fcport->d_id.b.area, fcport->d_id.b.al_pa,
6611 fcport->loop_id, jiffies);
6612
6613 *next_loopid = fcport->loop_id;
6614 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
6615 fcport->d_id.b.domain, fcport->d_id.b.area,
6616 fcport->d_id.b.al_pa);
6617 qla2x00_clear_loop_id(fcport);
6618 fcport->login_retry = 0;
6619
6620 rval = 3;
6621 break;
6622 }
6623 }
6624
6625 return (rval);
6626 }
6627
6628 /*
6629 * qla2x00_local_device_login
6630 * Issue local device login command.
6631 *
6632 * Input:
6633 * ha = adapter block pointer.
6634 * loop_id = loop id of device to login to.
6635 *
6636 * Returns (Where's the #define!!!!):
6637 * 0 - Login successfully
6638 * 1 - Login failed
6639 * 3 - Fatal error
6640 */
6641 int
qla2x00_local_device_login(scsi_qla_host_t * vha,fc_port_t * fcport)6642 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
6643 {
6644 int rval;
6645 uint16_t mb[MAILBOX_REGISTER_COUNT];
6646
6647 memset(mb, 0, sizeof(mb));
6648 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
6649 if (rval == QLA_SUCCESS) {
6650 /* Interrogate mailbox registers for any errors */
6651 if (mb[0] == MBS_COMMAND_ERROR)
6652 rval = 1;
6653 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
6654 /* device not in PCB table */
6655 rval = 3;
6656 }
6657
6658 return (rval);
6659 }
6660
6661 /*
6662 * qla2x00_loop_resync
6663 * Resync with fibre channel devices.
6664 *
6665 * Input:
6666 * ha = adapter block pointer.
6667 *
6668 * Returns:
6669 * 0 = success
6670 */
6671 int
qla2x00_loop_resync(scsi_qla_host_t * vha)6672 qla2x00_loop_resync(scsi_qla_host_t *vha)
6673 {
6674 int rval = QLA_SUCCESS;
6675 uint32_t wait_time;
6676
6677 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6678 if (vha->flags.online) {
6679 if (!(rval = qla2x00_fw_ready(vha))) {
6680 /* Wait at most MAX_TARGET RSCNs for a stable link. */
6681 wait_time = 256;
6682 do {
6683 if (!IS_QLAFX00(vha->hw)) {
6684 /*
6685 * Issue a marker after FW becomes
6686 * ready.
6687 */
6688 qla2x00_marker(vha, vha->hw->base_qpair,
6689 0, 0, MK_SYNC_ALL);
6690 vha->marker_needed = 0;
6691 }
6692
6693 /* Remap devices on Loop. */
6694 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6695
6696 if (IS_QLAFX00(vha->hw))
6697 qlafx00_configure_devices(vha);
6698 else
6699 qla2x00_configure_loop(vha);
6700
6701 wait_time--;
6702 } while (!atomic_read(&vha->loop_down_timer) &&
6703 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
6704 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
6705 &vha->dpc_flags)));
6706 }
6707 }
6708
6709 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
6710 return (QLA_FUNCTION_FAILED);
6711
6712 if (rval)
6713 ql_dbg(ql_dbg_disc, vha, 0x206c,
6714 "%s *** FAILED ***.\n", __func__);
6715
6716 return (rval);
6717 }
6718
6719 /*
6720 * qla2x00_perform_loop_resync
6721 * Description: This function will set the appropriate flags and call
6722 * qla2x00_loop_resync. If successful loop will be resynced
6723 * Arguments : scsi_qla_host_t pointer
6724 * returm : Success or Failure
6725 */
6726
qla2x00_perform_loop_resync(scsi_qla_host_t * ha)6727 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
6728 {
6729 int32_t rval = 0;
6730
6731 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
6732 /*Configure the flags so that resync happens properly*/
6733 atomic_set(&ha->loop_down_timer, 0);
6734 if (!(ha->device_flags & DFLG_NO_CABLE)) {
6735 atomic_set(&ha->loop_state, LOOP_UP);
6736 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
6737 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
6738 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
6739
6740 rval = qla2x00_loop_resync(ha);
6741 } else
6742 atomic_set(&ha->loop_state, LOOP_DEAD);
6743
6744 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
6745 }
6746
6747 return rval;
6748 }
6749
6750 void
qla2x00_update_fcports(scsi_qla_host_t * base_vha)6751 qla2x00_update_fcports(scsi_qla_host_t *base_vha)
6752 {
6753 fc_port_t *fcport;
6754 struct scsi_qla_host *vha, *tvp;
6755 struct qla_hw_data *ha = base_vha->hw;
6756 unsigned long flags;
6757
6758 spin_lock_irqsave(&ha->vport_slock, flags);
6759 /* Go with deferred removal of rport references. */
6760 list_for_each_entry_safe(vha, tvp, &base_vha->hw->vp_list, list) {
6761 atomic_inc(&vha->vref_count);
6762 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6763 if (fcport->drport &&
6764 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
6765 spin_unlock_irqrestore(&ha->vport_slock, flags);
6766 qla2x00_rport_del(fcport);
6767
6768 spin_lock_irqsave(&ha->vport_slock, flags);
6769 }
6770 }
6771 atomic_dec(&vha->vref_count);
6772 wake_up(&vha->vref_waitq);
6773 }
6774 spin_unlock_irqrestore(&ha->vport_slock, flags);
6775 }
6776
6777 /* Assumes idc_lock always held on entry */
6778 void
qla83xx_reset_ownership(scsi_qla_host_t * vha)6779 qla83xx_reset_ownership(scsi_qla_host_t *vha)
6780 {
6781 struct qla_hw_data *ha = vha->hw;
6782 uint32_t drv_presence, drv_presence_mask;
6783 uint32_t dev_part_info1, dev_part_info2, class_type;
6784 uint32_t class_type_mask = 0x3;
6785 uint16_t fcoe_other_function = 0xffff, i;
6786
6787 if (IS_QLA8044(ha)) {
6788 drv_presence = qla8044_rd_direct(vha,
6789 QLA8044_CRB_DRV_ACTIVE_INDEX);
6790 dev_part_info1 = qla8044_rd_direct(vha,
6791 QLA8044_CRB_DEV_PART_INFO_INDEX);
6792 dev_part_info2 = qla8044_rd_direct(vha,
6793 QLA8044_CRB_DEV_PART_INFO2);
6794 } else {
6795 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6796 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
6797 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
6798 }
6799 for (i = 0; i < 8; i++) {
6800 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
6801 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6802 (i != ha->portnum)) {
6803 fcoe_other_function = i;
6804 break;
6805 }
6806 }
6807 if (fcoe_other_function == 0xffff) {
6808 for (i = 0; i < 8; i++) {
6809 class_type = ((dev_part_info2 >> (i * 4)) &
6810 class_type_mask);
6811 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6812 ((i + 8) != ha->portnum)) {
6813 fcoe_other_function = i + 8;
6814 break;
6815 }
6816 }
6817 }
6818 /*
6819 * Prepare drv-presence mask based on fcoe functions present.
6820 * However consider only valid physical fcoe function numbers (0-15).
6821 */
6822 drv_presence_mask = ~((1 << (ha->portnum)) |
6823 ((fcoe_other_function == 0xffff) ?
6824 0 : (1 << (fcoe_other_function))));
6825
6826 /* We are the reset owner iff:
6827 * - No other protocol drivers present.
6828 * - This is the lowest among fcoe functions. */
6829 if (!(drv_presence & drv_presence_mask) &&
6830 (ha->portnum < fcoe_other_function)) {
6831 ql_dbg(ql_dbg_p3p, vha, 0xb07f,
6832 "This host is Reset owner.\n");
6833 ha->flags.nic_core_reset_owner = 1;
6834 }
6835 }
6836
6837 static int
__qla83xx_set_drv_ack(scsi_qla_host_t * vha)6838 __qla83xx_set_drv_ack(scsi_qla_host_t *vha)
6839 {
6840 int rval = QLA_SUCCESS;
6841 struct qla_hw_data *ha = vha->hw;
6842 uint32_t drv_ack;
6843
6844 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6845 if (rval == QLA_SUCCESS) {
6846 drv_ack |= (1 << ha->portnum);
6847 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6848 }
6849
6850 return rval;
6851 }
6852
6853 static int
__qla83xx_clear_drv_ack(scsi_qla_host_t * vha)6854 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
6855 {
6856 int rval = QLA_SUCCESS;
6857 struct qla_hw_data *ha = vha->hw;
6858 uint32_t drv_ack;
6859
6860 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6861 if (rval == QLA_SUCCESS) {
6862 drv_ack &= ~(1 << ha->portnum);
6863 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6864 }
6865
6866 return rval;
6867 }
6868
6869 /* Assumes idc-lock always held on entry */
6870 void
qla83xx_idc_audit(scsi_qla_host_t * vha,int audit_type)6871 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
6872 {
6873 struct qla_hw_data *ha = vha->hw;
6874 uint32_t idc_audit_reg = 0, duration_secs = 0;
6875
6876 switch (audit_type) {
6877 case IDC_AUDIT_TIMESTAMP:
6878 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000);
6879 idc_audit_reg = (ha->portnum) |
6880 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
6881 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6882 break;
6883
6884 case IDC_AUDIT_COMPLETION:
6885 duration_secs = ((jiffies_to_msecs(jiffies) -
6886 jiffies_to_msecs(ha->idc_audit_ts)) / 1000);
6887 idc_audit_reg = (ha->portnum) |
6888 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
6889 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6890 break;
6891
6892 default:
6893 ql_log(ql_log_warn, vha, 0xb078,
6894 "Invalid audit type specified.\n");
6895 break;
6896 }
6897 }
6898
6899 /* Assumes idc_lock always held on entry */
6900 static int
qla83xx_initiating_reset(scsi_qla_host_t * vha)6901 qla83xx_initiating_reset(scsi_qla_host_t *vha)
6902 {
6903 struct qla_hw_data *ha = vha->hw;
6904 uint32_t idc_control, dev_state;
6905
6906 __qla83xx_get_idc_control(vha, &idc_control);
6907 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
6908 ql_log(ql_log_info, vha, 0xb080,
6909 "NIC Core reset has been disabled. idc-control=0x%x\n",
6910 idc_control);
6911 return QLA_FUNCTION_FAILED;
6912 }
6913
6914 /* Set NEED-RESET iff in READY state and we are the reset-owner */
6915 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6916 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
6917 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
6918 QLA8XXX_DEV_NEED_RESET);
6919 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n");
6920 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
6921 } else {
6922 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n",
6923 qdev_state(dev_state));
6924
6925 /* SV: XXX: Is timeout required here? */
6926 /* Wait for IDC state change READY -> NEED_RESET */
6927 while (dev_state == QLA8XXX_DEV_READY) {
6928 qla83xx_idc_unlock(vha, 0);
6929 msleep(200);
6930 qla83xx_idc_lock(vha, 0);
6931 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6932 }
6933 }
6934
6935 /* Send IDC ack by writing to drv-ack register */
6936 __qla83xx_set_drv_ack(vha);
6937
6938 return QLA_SUCCESS;
6939 }
6940
6941 int
__qla83xx_set_idc_control(scsi_qla_host_t * vha,uint32_t idc_control)6942 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
6943 {
6944 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6945 }
6946
6947 int
__qla83xx_get_idc_control(scsi_qla_host_t * vha,uint32_t * idc_control)6948 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
6949 {
6950 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6951 }
6952
6953 static int
qla83xx_check_driver_presence(scsi_qla_host_t * vha)6954 qla83xx_check_driver_presence(scsi_qla_host_t *vha)
6955 {
6956 uint32_t drv_presence = 0;
6957 struct qla_hw_data *ha = vha->hw;
6958
6959 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6960 if (drv_presence & (1 << ha->portnum))
6961 return QLA_SUCCESS;
6962 else
6963 return QLA_TEST_FAILED;
6964 }
6965
6966 int
qla83xx_nic_core_reset(scsi_qla_host_t * vha)6967 qla83xx_nic_core_reset(scsi_qla_host_t *vha)
6968 {
6969 int rval = QLA_SUCCESS;
6970 struct qla_hw_data *ha = vha->hw;
6971
6972 ql_dbg(ql_dbg_p3p, vha, 0xb058,
6973 "Entered %s().\n", __func__);
6974
6975 if (vha->device_flags & DFLG_DEV_FAILED) {
6976 ql_log(ql_log_warn, vha, 0xb059,
6977 "Device in unrecoverable FAILED state.\n");
6978 return QLA_FUNCTION_FAILED;
6979 }
6980
6981 qla83xx_idc_lock(vha, 0);
6982
6983 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
6984 ql_log(ql_log_warn, vha, 0xb05a,
6985 "Function=0x%x has been removed from IDC participation.\n",
6986 ha->portnum);
6987 rval = QLA_FUNCTION_FAILED;
6988 goto exit;
6989 }
6990
6991 qla83xx_reset_ownership(vha);
6992
6993 rval = qla83xx_initiating_reset(vha);
6994
6995 /*
6996 * Perform reset if we are the reset-owner,
6997 * else wait till IDC state changes to READY/FAILED.
6998 */
6999 if (rval == QLA_SUCCESS) {
7000 rval = qla83xx_idc_state_handler(vha);
7001
7002 if (rval == QLA_SUCCESS)
7003 ha->flags.nic_core_hung = 0;
7004 __qla83xx_clear_drv_ack(vha);
7005 }
7006
7007 exit:
7008 qla83xx_idc_unlock(vha, 0);
7009
7010 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__);
7011
7012 return rval;
7013 }
7014
7015 int
qla2xxx_mctp_dump(scsi_qla_host_t * vha)7016 qla2xxx_mctp_dump(scsi_qla_host_t *vha)
7017 {
7018 struct qla_hw_data *ha = vha->hw;
7019 int rval = QLA_FUNCTION_FAILED;
7020
7021 if (!IS_MCTP_CAPABLE(ha)) {
7022 /* This message can be removed from the final version */
7023 ql_log(ql_log_info, vha, 0x506d,
7024 "This board is not MCTP capable\n");
7025 return rval;
7026 }
7027
7028 if (!ha->mctp_dump) {
7029 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev,
7030 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL);
7031
7032 if (!ha->mctp_dump) {
7033 ql_log(ql_log_warn, vha, 0x506e,
7034 "Failed to allocate memory for mctp dump\n");
7035 return rval;
7036 }
7037 }
7038
7039 #define MCTP_DUMP_STR_ADDR 0x00000000
7040 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
7041 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
7042 if (rval != QLA_SUCCESS) {
7043 ql_log(ql_log_warn, vha, 0x506f,
7044 "Failed to capture mctp dump\n");
7045 } else {
7046 ql_log(ql_log_info, vha, 0x5070,
7047 "Mctp dump capture for host (%ld/%p).\n",
7048 vha->host_no, ha->mctp_dump);
7049 ha->mctp_dumped = 1;
7050 }
7051
7052 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
7053 ha->flags.nic_core_reset_hdlr_active = 1;
7054 rval = qla83xx_restart_nic_firmware(vha);
7055 if (rval)
7056 /* NIC Core reset failed. */
7057 ql_log(ql_log_warn, vha, 0x5071,
7058 "Failed to restart nic firmware\n");
7059 else
7060 ql_dbg(ql_dbg_p3p, vha, 0xb084,
7061 "Restarted NIC firmware successfully.\n");
7062 ha->flags.nic_core_reset_hdlr_active = 0;
7063 }
7064
7065 return rval;
7066
7067 }
7068
7069 /*
7070 * qla2x00_quiesce_io
7071 * Description: This function will block the new I/Os
7072 * Its not aborting any I/Os as context
7073 * is not destroyed during quiescence
7074 * Arguments: scsi_qla_host_t
7075 * return : void
7076 */
7077 void
qla2x00_quiesce_io(scsi_qla_host_t * vha)7078 qla2x00_quiesce_io(scsi_qla_host_t *vha)
7079 {
7080 struct qla_hw_data *ha = vha->hw;
7081 struct scsi_qla_host *vp, *tvp;
7082 unsigned long flags;
7083
7084 ql_dbg(ql_dbg_dpc, vha, 0x401d,
7085 "Quiescing I/O - ha=%p.\n", ha);
7086
7087 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
7088 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
7089 atomic_set(&vha->loop_state, LOOP_DOWN);
7090 qla2x00_mark_all_devices_lost(vha);
7091
7092 spin_lock_irqsave(&ha->vport_slock, flags);
7093 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
7094 atomic_inc(&vp->vref_count);
7095 spin_unlock_irqrestore(&ha->vport_slock, flags);
7096
7097 qla2x00_mark_all_devices_lost(vp);
7098
7099 spin_lock_irqsave(&ha->vport_slock, flags);
7100 atomic_dec(&vp->vref_count);
7101 }
7102 spin_unlock_irqrestore(&ha->vport_slock, flags);
7103 } else {
7104 if (!atomic_read(&vha->loop_down_timer))
7105 atomic_set(&vha->loop_down_timer,
7106 LOOP_DOWN_TIME);
7107 }
7108 /* Wait for pending cmds to complete */
7109 WARN_ON_ONCE(qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST)
7110 != QLA_SUCCESS);
7111 }
7112
7113 void
qla2x00_abort_isp_cleanup(scsi_qla_host_t * vha)7114 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
7115 {
7116 struct qla_hw_data *ha = vha->hw;
7117 struct scsi_qla_host *vp, *tvp;
7118 unsigned long flags;
7119 fc_port_t *fcport;
7120 u16 i;
7121
7122 /* For ISP82XX, driver waits for completion of the commands.
7123 * online flag should be set.
7124 */
7125 if (!(IS_P3P_TYPE(ha)))
7126 vha->flags.online = 0;
7127 ha->flags.chip_reset_done = 0;
7128 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
7129 vha->qla_stats.total_isp_aborts++;
7130
7131 ql_log(ql_log_info, vha, 0x00af,
7132 "Performing ISP error recovery - ha=%p.\n", ha);
7133
7134 ha->flags.purge_mbox = 1;
7135 /* For ISP82XX, reset_chip is just disabling interrupts.
7136 * Driver waits for the completion of the commands.
7137 * the interrupts need to be enabled.
7138 */
7139 if (!(IS_P3P_TYPE(ha)))
7140 ha->isp_ops->reset_chip(vha);
7141
7142 ha->link_data_rate = PORT_SPEED_UNKNOWN;
7143 SAVE_TOPO(ha);
7144 ha->flags.rida_fmt2 = 0;
7145 ha->flags.n2n_ae = 0;
7146 ha->flags.lip_ae = 0;
7147 ha->current_topology = 0;
7148 QLA_FW_STOPPED(ha);
7149 ha->flags.fw_init_done = 0;
7150 ha->chip_reset++;
7151 ha->base_qpair->chip_reset = ha->chip_reset;
7152 ha->base_qpair->cmd_cnt = ha->base_qpair->cmd_completion_cnt = 0;
7153 ha->base_qpair->prev_completion_cnt = 0;
7154 for (i = 0; i < ha->max_qpairs; i++) {
7155 if (ha->queue_pair_map[i]) {
7156 ha->queue_pair_map[i]->chip_reset =
7157 ha->base_qpair->chip_reset;
7158 ha->queue_pair_map[i]->cmd_cnt =
7159 ha->queue_pair_map[i]->cmd_completion_cnt = 0;
7160 ha->base_qpair->prev_completion_cnt = 0;
7161 }
7162 }
7163
7164 /* purge MBox commands */
7165 if (atomic_read(&ha->num_pend_mbx_stage3)) {
7166 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
7167 complete(&ha->mbx_intr_comp);
7168 }
7169
7170 i = 0;
7171 while (atomic_read(&ha->num_pend_mbx_stage3) ||
7172 atomic_read(&ha->num_pend_mbx_stage2) ||
7173 atomic_read(&ha->num_pend_mbx_stage1)) {
7174 msleep(20);
7175 i++;
7176 if (i > 50)
7177 break;
7178 }
7179 ha->flags.purge_mbox = 0;
7180
7181 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
7182 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
7183 atomic_set(&vha->loop_state, LOOP_DOWN);
7184 qla2x00_mark_all_devices_lost(vha);
7185
7186 spin_lock_irqsave(&ha->vport_slock, flags);
7187 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
7188 atomic_inc(&vp->vref_count);
7189 spin_unlock_irqrestore(&ha->vport_slock, flags);
7190
7191 qla2x00_mark_all_devices_lost(vp);
7192
7193 spin_lock_irqsave(&ha->vport_slock, flags);
7194 atomic_dec(&vp->vref_count);
7195 }
7196 spin_unlock_irqrestore(&ha->vport_slock, flags);
7197 } else {
7198 if (!atomic_read(&vha->loop_down_timer))
7199 atomic_set(&vha->loop_down_timer,
7200 LOOP_DOWN_TIME);
7201 }
7202
7203 /* Clear all async request states across all VPs. */
7204 list_for_each_entry(fcport, &vha->vp_fcports, list) {
7205 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
7206 fcport->scan_state = 0;
7207 }
7208 spin_lock_irqsave(&ha->vport_slock, flags);
7209 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
7210 atomic_inc(&vp->vref_count);
7211 spin_unlock_irqrestore(&ha->vport_slock, flags);
7212
7213 list_for_each_entry(fcport, &vp->vp_fcports, list)
7214 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
7215
7216 spin_lock_irqsave(&ha->vport_slock, flags);
7217 atomic_dec(&vp->vref_count);
7218 }
7219 spin_unlock_irqrestore(&ha->vport_slock, flags);
7220
7221 /* Make sure for ISP 82XX IO DMA is complete */
7222 if (IS_P3P_TYPE(ha)) {
7223 qla82xx_chip_reset_cleanup(vha);
7224 ql_log(ql_log_info, vha, 0x00b4,
7225 "Done chip reset cleanup.\n");
7226
7227 /* Done waiting for pending commands. Reset online flag */
7228 vha->flags.online = 0;
7229 }
7230
7231 /* Requeue all commands in outstanding command list. */
7232 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
7233 /* memory barrier */
7234 wmb();
7235 }
7236
7237 /*
7238 * qla2x00_abort_isp
7239 * Resets ISP and aborts all outstanding commands.
7240 *
7241 * Input:
7242 * ha = adapter block pointer.
7243 *
7244 * Returns:
7245 * 0 = success
7246 */
7247 int
qla2x00_abort_isp(scsi_qla_host_t * vha)7248 qla2x00_abort_isp(scsi_qla_host_t *vha)
7249 {
7250 int rval;
7251 uint8_t status = 0;
7252 struct qla_hw_data *ha = vha->hw;
7253 struct scsi_qla_host *vp, *tvp;
7254 struct req_que *req = ha->req_q_map[0];
7255 unsigned long flags;
7256
7257 if (vha->flags.online) {
7258 qla2x00_abort_isp_cleanup(vha);
7259
7260 vha->dport_status |= DPORT_DIAG_CHIP_RESET_IN_PROGRESS;
7261 vha->dport_status &= ~DPORT_DIAG_IN_PROGRESS;
7262
7263 if (vha->hw->flags.port_isolated)
7264 return status;
7265
7266 if (qla2x00_isp_reg_stat(ha)) {
7267 ql_log(ql_log_info, vha, 0x803f,
7268 "ISP Abort - ISP reg disconnect, exiting.\n");
7269 return status;
7270 }
7271
7272 if (test_and_clear_bit(ISP_ABORT_TO_ROM, &vha->dpc_flags)) {
7273 ha->flags.chip_reset_done = 1;
7274 vha->flags.online = 1;
7275 status = 0;
7276 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
7277 return status;
7278 }
7279
7280 if (IS_QLA8031(ha)) {
7281 ql_dbg(ql_dbg_p3p, vha, 0xb05c,
7282 "Clearing fcoe driver presence.\n");
7283 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
7284 ql_dbg(ql_dbg_p3p, vha, 0xb073,
7285 "Error while clearing DRV-Presence.\n");
7286 }
7287
7288 if (unlikely(pci_channel_offline(ha->pdev) &&
7289 ha->flags.pci_channel_io_perm_failure)) {
7290 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
7291 status = 0;
7292 return status;
7293 }
7294
7295 switch (vha->qlini_mode) {
7296 case QLA2XXX_INI_MODE_DISABLED:
7297 if (!qla_tgt_mode_enabled(vha))
7298 return 0;
7299 break;
7300 case QLA2XXX_INI_MODE_DUAL:
7301 if (!qla_dual_mode_enabled(vha) &&
7302 !qla_ini_mode_enabled(vha))
7303 return 0;
7304 break;
7305 case QLA2XXX_INI_MODE_ENABLED:
7306 default:
7307 break;
7308 }
7309
7310 ha->isp_ops->get_flash_version(vha, req->ring);
7311
7312 if (qla2x00_isp_reg_stat(ha)) {
7313 ql_log(ql_log_info, vha, 0x803f,
7314 "ISP Abort - ISP reg disconnect pre nvram config, exiting.\n");
7315 return status;
7316 }
7317 ha->isp_ops->nvram_config(vha);
7318
7319 if (qla2x00_isp_reg_stat(ha)) {
7320 ql_log(ql_log_info, vha, 0x803f,
7321 "ISP Abort - ISP reg disconnect post nvmram config, exiting.\n");
7322 return status;
7323 }
7324 if (!qla2x00_restart_isp(vha)) {
7325 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
7326
7327 if (!atomic_read(&vha->loop_down_timer)) {
7328 /*
7329 * Issue marker command only when we are going
7330 * to start the I/O .
7331 */
7332 vha->marker_needed = 1;
7333 }
7334
7335 vha->flags.online = 1;
7336
7337 ha->isp_ops->enable_intrs(ha);
7338
7339 ha->isp_abort_cnt = 0;
7340 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
7341
7342 if (IS_QLA81XX(ha) || IS_QLA8031(ha))
7343 qla2x00_get_fw_version(vha);
7344 if (ha->fce) {
7345 ha->flags.fce_enabled = 1;
7346 memset(ha->fce, 0,
7347 fce_calc_size(ha->fce_bufs));
7348 rval = qla2x00_enable_fce_trace(vha,
7349 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
7350 &ha->fce_bufs);
7351 if (rval) {
7352 ql_log(ql_log_warn, vha, 0x8033,
7353 "Unable to reinitialize FCE "
7354 "(%d).\n", rval);
7355 ha->flags.fce_enabled = 0;
7356 }
7357 }
7358
7359 if (ha->eft) {
7360 memset(ha->eft, 0, EFT_SIZE);
7361 rval = qla2x00_enable_eft_trace(vha,
7362 ha->eft_dma, EFT_NUM_BUFFERS);
7363 if (rval) {
7364 ql_log(ql_log_warn, vha, 0x8034,
7365 "Unable to reinitialize EFT "
7366 "(%d).\n", rval);
7367 }
7368 }
7369 } else { /* failed the ISP abort */
7370 vha->flags.online = 1;
7371 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
7372 if (ha->isp_abort_cnt == 0) {
7373 ql_log(ql_log_fatal, vha, 0x8035,
7374 "ISP error recover failed - "
7375 "board disabled.\n");
7376 /*
7377 * The next call disables the board
7378 * completely.
7379 */
7380 qla2x00_abort_isp_cleanup(vha);
7381 vha->flags.online = 0;
7382 clear_bit(ISP_ABORT_RETRY,
7383 &vha->dpc_flags);
7384 status = 0;
7385 } else { /* schedule another ISP abort */
7386 ha->isp_abort_cnt--;
7387 ql_dbg(ql_dbg_taskm, vha, 0x8020,
7388 "ISP abort - retry remaining %d.\n",
7389 ha->isp_abort_cnt);
7390 status = 1;
7391 }
7392 } else {
7393 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
7394 ql_dbg(ql_dbg_taskm, vha, 0x8021,
7395 "ISP error recovery - retrying (%d) "
7396 "more times.\n", ha->isp_abort_cnt);
7397 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
7398 status = 1;
7399 }
7400 }
7401
7402 }
7403
7404 if (vha->hw->flags.port_isolated) {
7405 qla2x00_abort_isp_cleanup(vha);
7406 return status;
7407 }
7408
7409 if (!status) {
7410 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
7411 qla2x00_configure_hba(vha);
7412 spin_lock_irqsave(&ha->vport_slock, flags);
7413 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
7414 if (vp->vp_idx) {
7415 atomic_inc(&vp->vref_count);
7416 spin_unlock_irqrestore(&ha->vport_slock, flags);
7417
7418 qla2x00_vp_abort_isp(vp);
7419
7420 spin_lock_irqsave(&ha->vport_slock, flags);
7421 atomic_dec(&vp->vref_count);
7422 }
7423 }
7424 spin_unlock_irqrestore(&ha->vport_slock, flags);
7425
7426 if (IS_QLA8031(ha)) {
7427 ql_dbg(ql_dbg_p3p, vha, 0xb05d,
7428 "Setting back fcoe driver presence.\n");
7429 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
7430 ql_dbg(ql_dbg_p3p, vha, 0xb074,
7431 "Error while setting DRV-Presence.\n");
7432 }
7433 } else {
7434 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
7435 __func__);
7436 }
7437
7438 return(status);
7439 }
7440
7441 /*
7442 * qla2x00_restart_isp
7443 * restarts the ISP after a reset
7444 *
7445 * Input:
7446 * ha = adapter block pointer.
7447 *
7448 * Returns:
7449 * 0 = success
7450 */
7451 static int
qla2x00_restart_isp(scsi_qla_host_t * vha)7452 qla2x00_restart_isp(scsi_qla_host_t *vha)
7453 {
7454 int status;
7455 struct qla_hw_data *ha = vha->hw;
7456
7457 /* If firmware needs to be loaded */
7458 if (qla2x00_isp_firmware(vha)) {
7459 vha->flags.online = 0;
7460 status = ha->isp_ops->chip_diag(vha);
7461 if (status)
7462 return status;
7463 status = qla2x00_setup_chip(vha);
7464 if (status)
7465 return status;
7466 }
7467
7468 status = qla2x00_init_rings(vha);
7469 if (status)
7470 return status;
7471
7472 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
7473 ha->flags.chip_reset_done = 1;
7474
7475 /* Initialize the queues in use */
7476 qla25xx_init_queues(ha);
7477
7478 status = qla2x00_fw_ready(vha);
7479 if (status) {
7480 /* if no cable then assume it's good */
7481 return vha->device_flags & DFLG_NO_CABLE ? 0 : status;
7482 }
7483
7484 /* Issue a marker after FW becomes ready. */
7485 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
7486 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
7487
7488 return 0;
7489 }
7490
7491 static int
qla25xx_init_queues(struct qla_hw_data * ha)7492 qla25xx_init_queues(struct qla_hw_data *ha)
7493 {
7494 struct rsp_que *rsp = NULL;
7495 struct req_que *req = NULL;
7496 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
7497 int ret = -1;
7498 int i;
7499
7500 for (i = 1; i < ha->max_rsp_queues; i++) {
7501 rsp = ha->rsp_q_map[i];
7502 if (rsp && test_bit(i, ha->rsp_qid_map)) {
7503 rsp->options &= ~BIT_0;
7504 ret = qla25xx_init_rsp_que(base_vha, rsp);
7505 if (ret != QLA_SUCCESS)
7506 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
7507 "%s Rsp que: %d init failed.\n",
7508 __func__, rsp->id);
7509 else
7510 ql_dbg(ql_dbg_init, base_vha, 0x0100,
7511 "%s Rsp que: %d inited.\n",
7512 __func__, rsp->id);
7513 }
7514 }
7515 for (i = 1; i < ha->max_req_queues; i++) {
7516 req = ha->req_q_map[i];
7517 if (req && test_bit(i, ha->req_qid_map)) {
7518 /* Clear outstanding commands array. */
7519 req->options &= ~BIT_0;
7520 ret = qla25xx_init_req_que(base_vha, req);
7521 if (ret != QLA_SUCCESS)
7522 ql_dbg(ql_dbg_init, base_vha, 0x0101,
7523 "%s Req que: %d init failed.\n",
7524 __func__, req->id);
7525 else
7526 ql_dbg(ql_dbg_init, base_vha, 0x0102,
7527 "%s Req que: %d inited.\n",
7528 __func__, req->id);
7529 }
7530 }
7531 return ret;
7532 }
7533
7534 /*
7535 * qla2x00_reset_adapter
7536 * Reset adapter.
7537 *
7538 * Input:
7539 * ha = adapter block pointer.
7540 */
7541 int
qla2x00_reset_adapter(scsi_qla_host_t * vha)7542 qla2x00_reset_adapter(scsi_qla_host_t *vha)
7543 {
7544 unsigned long flags = 0;
7545 struct qla_hw_data *ha = vha->hw;
7546 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
7547
7548 vha->flags.online = 0;
7549 ha->isp_ops->disable_intrs(ha);
7550
7551 spin_lock_irqsave(&ha->hardware_lock, flags);
7552 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
7553 rd_reg_word(®->hccr); /* PCI Posting. */
7554 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
7555 rd_reg_word(®->hccr); /* PCI Posting. */
7556 spin_unlock_irqrestore(&ha->hardware_lock, flags);
7557
7558 return QLA_SUCCESS;
7559 }
7560
7561 int
qla24xx_reset_adapter(scsi_qla_host_t * vha)7562 qla24xx_reset_adapter(scsi_qla_host_t *vha)
7563 {
7564 unsigned long flags = 0;
7565 struct qla_hw_data *ha = vha->hw;
7566 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
7567
7568 if (IS_P3P_TYPE(ha))
7569 return QLA_SUCCESS;
7570
7571 vha->flags.online = 0;
7572 ha->isp_ops->disable_intrs(ha);
7573
7574 spin_lock_irqsave(&ha->hardware_lock, flags);
7575 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET);
7576 rd_reg_dword(®->hccr);
7577 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE);
7578 rd_reg_dword(®->hccr);
7579 spin_unlock_irqrestore(&ha->hardware_lock, flags);
7580
7581 if (IS_NOPOLLING_TYPE(ha))
7582 ha->isp_ops->enable_intrs(ha);
7583
7584 return QLA_SUCCESS;
7585 }
7586
7587 /* On sparc systems, obtain port and node WWN from firmware
7588 * properties.
7589 */
qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t * vha,struct nvram_24xx * nv)7590 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
7591 struct nvram_24xx *nv)
7592 {
7593 #ifdef CONFIG_SPARC
7594 struct qla_hw_data *ha = vha->hw;
7595 struct pci_dev *pdev = ha->pdev;
7596 struct device_node *dp = pci_device_to_OF_node(pdev);
7597 const u8 *val;
7598 int len;
7599
7600 val = of_get_property(dp, "port-wwn", &len);
7601 if (val && len >= WWN_SIZE)
7602 memcpy(nv->port_name, val, WWN_SIZE);
7603
7604 val = of_get_property(dp, "node-wwn", &len);
7605 if (val && len >= WWN_SIZE)
7606 memcpy(nv->node_name, val, WWN_SIZE);
7607 #endif
7608 }
7609
7610 int
qla24xx_nvram_config(scsi_qla_host_t * vha)7611 qla24xx_nvram_config(scsi_qla_host_t *vha)
7612 {
7613 int rval;
7614 struct init_cb_24xx *icb;
7615 struct nvram_24xx *nv;
7616 __le32 *dptr;
7617 uint8_t *dptr1, *dptr2;
7618 uint32_t chksum;
7619 uint16_t cnt;
7620 struct qla_hw_data *ha = vha->hw;
7621
7622 rval = QLA_SUCCESS;
7623 icb = (struct init_cb_24xx *)ha->init_cb;
7624 nv = ha->nvram;
7625
7626 /* Determine NVRAM starting address. */
7627 if (ha->port_no == 0) {
7628 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
7629 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
7630 } else {
7631 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
7632 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
7633 }
7634
7635 ha->nvram_size = sizeof(*nv);
7636 ha->vpd_size = FA_NVRAM_VPD_SIZE;
7637
7638 /* Get VPD data into cache */
7639 ha->vpd = ha->nvram + VPD_OFFSET;
7640 ha->isp_ops->read_nvram(vha, ha->vpd,
7641 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
7642
7643 /* Get NVRAM data into cache and calculate checksum. */
7644 dptr = (__force __le32 *)nv;
7645 ha->isp_ops->read_nvram(vha, dptr, ha->nvram_base, ha->nvram_size);
7646 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
7647 chksum += le32_to_cpu(*dptr);
7648
7649 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
7650 "Contents of NVRAM\n");
7651 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
7652 nv, ha->nvram_size);
7653
7654 /* Bad NVRAM data, set defaults parameters. */
7655 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
7656 le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
7657 /* Reset NVRAM data. */
7658 ql_log(ql_log_warn, vha, 0x006b,
7659 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
7660 chksum, nv->id, nv->nvram_version);
7661 ql_dump_buffer(ql_dbg_init, vha, 0x006b, nv, sizeof(*nv));
7662 ql_log(ql_log_warn, vha, 0x006c,
7663 "Falling back to functioning (yet invalid -- WWPN) "
7664 "defaults.\n");
7665
7666 /*
7667 * Set default initialization control block.
7668 */
7669 memset(nv, 0, ha->nvram_size);
7670 nv->nvram_version = cpu_to_le16(ICB_VERSION);
7671 nv->version = cpu_to_le16(ICB_VERSION);
7672 nv->frame_payload_size = cpu_to_le16(2048);
7673 nv->execution_throttle = cpu_to_le16(0xFFFF);
7674 nv->exchange_count = cpu_to_le16(0);
7675 nv->hard_address = cpu_to_le16(124);
7676 nv->port_name[0] = 0x21;
7677 nv->port_name[1] = 0x00 + ha->port_no + 1;
7678 nv->port_name[2] = 0x00;
7679 nv->port_name[3] = 0xe0;
7680 nv->port_name[4] = 0x8b;
7681 nv->port_name[5] = 0x1c;
7682 nv->port_name[6] = 0x55;
7683 nv->port_name[7] = 0x86;
7684 nv->node_name[0] = 0x20;
7685 nv->node_name[1] = 0x00;
7686 nv->node_name[2] = 0x00;
7687 nv->node_name[3] = 0xe0;
7688 nv->node_name[4] = 0x8b;
7689 nv->node_name[5] = 0x1c;
7690 nv->node_name[6] = 0x55;
7691 nv->node_name[7] = 0x86;
7692 qla24xx_nvram_wwn_from_ofw(vha, nv);
7693 nv->login_retry_count = cpu_to_le16(8);
7694 nv->interrupt_delay_timer = cpu_to_le16(0);
7695 nv->login_timeout = cpu_to_le16(0);
7696 nv->firmware_options_1 =
7697 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
7698 nv->firmware_options_2 = cpu_to_le32(2 << 4);
7699 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
7700 nv->firmware_options_3 = cpu_to_le32(2 << 13);
7701 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
7702 nv->efi_parameters = cpu_to_le32(0);
7703 nv->reset_delay = 5;
7704 nv->max_luns_per_target = cpu_to_le16(128);
7705 nv->port_down_retry_count = cpu_to_le16(30);
7706 nv->link_down_timeout = cpu_to_le16(30);
7707
7708 rval = 1;
7709 }
7710
7711 if (qla_tgt_mode_enabled(vha)) {
7712 /* Don't enable full login after initial LIP */
7713 nv->firmware_options_1 &= cpu_to_le32(~BIT_13);
7714 /* Don't enable LIP full login for initiator */
7715 nv->host_p &= cpu_to_le32(~BIT_10);
7716 }
7717
7718 qlt_24xx_config_nvram_stage1(vha, nv);
7719
7720 /* Reset Initialization control block */
7721 memset(icb, 0, ha->init_cb_size);
7722
7723 /* Copy 1st segment. */
7724 dptr1 = (uint8_t *)icb;
7725 dptr2 = (uint8_t *)&nv->version;
7726 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
7727 while (cnt--)
7728 *dptr1++ = *dptr2++;
7729
7730 icb->login_retry_count = nv->login_retry_count;
7731 icb->link_down_on_nos = nv->link_down_on_nos;
7732
7733 /* Copy 2nd segment. */
7734 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
7735 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
7736 cnt = (uint8_t *)&icb->reserved_3 -
7737 (uint8_t *)&icb->interrupt_delay_timer;
7738 while (cnt--)
7739 *dptr1++ = *dptr2++;
7740 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
7741 /*
7742 * Setup driver NVRAM options.
7743 */
7744 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
7745 "QLA2462");
7746
7747 qlt_24xx_config_nvram_stage2(vha, icb);
7748
7749 if (nv->host_p & cpu_to_le32(BIT_15)) {
7750 /* Use alternate WWN? */
7751 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
7752 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
7753 }
7754
7755 /* Prepare nodename */
7756 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
7757 /*
7758 * Firmware will apply the following mask if the nodename was
7759 * not provided.
7760 */
7761 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
7762 icb->node_name[0] &= 0xF0;
7763 }
7764
7765 /* Set host adapter parameters. */
7766 ha->flags.disable_risc_code_load = 0;
7767 ha->flags.enable_lip_reset = 0;
7768 ha->flags.enable_lip_full_login =
7769 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
7770 ha->flags.enable_target_reset =
7771 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
7772 ha->flags.enable_led_scheme = 0;
7773 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
7774
7775 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
7776 (BIT_6 | BIT_5 | BIT_4)) >> 4;
7777
7778 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
7779 sizeof(ha->fw_seriallink_options24));
7780
7781 /* save HBA serial number */
7782 ha->serial0 = icb->port_name[5];
7783 ha->serial1 = icb->port_name[6];
7784 ha->serial2 = icb->port_name[7];
7785 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
7786 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
7787
7788 icb->execution_throttle = cpu_to_le16(0xFFFF);
7789
7790 ha->retry_count = le16_to_cpu(nv->login_retry_count);
7791
7792 /* Set minimum login_timeout to 4 seconds. */
7793 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
7794 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
7795 if (le16_to_cpu(nv->login_timeout) < 4)
7796 nv->login_timeout = cpu_to_le16(4);
7797 ha->login_timeout = le16_to_cpu(nv->login_timeout);
7798
7799 /* Set minimum RATOV to 100 tenths of a second. */
7800 ha->r_a_tov = 100;
7801
7802 ha->loop_reset_delay = nv->reset_delay;
7803
7804 /* Link Down Timeout = 0:
7805 *
7806 * When Port Down timer expires we will start returning
7807 * I/O's to OS with "DID_NO_CONNECT".
7808 *
7809 * Link Down Timeout != 0:
7810 *
7811 * The driver waits for the link to come up after link down
7812 * before returning I/Os to OS with "DID_NO_CONNECT".
7813 */
7814 if (le16_to_cpu(nv->link_down_timeout) == 0) {
7815 ha->loop_down_abort_time =
7816 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
7817 } else {
7818 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
7819 ha->loop_down_abort_time =
7820 (LOOP_DOWN_TIME - ha->link_down_timeout);
7821 }
7822
7823 /* Need enough time to try and get the port back. */
7824 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
7825 if (qlport_down_retry)
7826 ha->port_down_retry_count = qlport_down_retry;
7827
7828 /* Set login_retry_count */
7829 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
7830 if (ha->port_down_retry_count ==
7831 le16_to_cpu(nv->port_down_retry_count) &&
7832 ha->port_down_retry_count > 3)
7833 ha->login_retry_count = ha->port_down_retry_count;
7834 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
7835 ha->login_retry_count = ha->port_down_retry_count;
7836 if (ql2xloginretrycount)
7837 ha->login_retry_count = ql2xloginretrycount;
7838
7839 /* N2N: driver will initiate Login instead of FW */
7840 icb->firmware_options_3 |= cpu_to_le32(BIT_8);
7841
7842 /* Enable ZIO. */
7843 if (!vha->flags.init_done) {
7844 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
7845 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
7846 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
7847 le16_to_cpu(icb->interrupt_delay_timer) : 2;
7848 }
7849 icb->firmware_options_2 &= cpu_to_le32(
7850 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
7851 if (ha->zio_mode != QLA_ZIO_DISABLED) {
7852 ha->zio_mode = QLA_ZIO_MODE_6;
7853
7854 ql_log(ql_log_info, vha, 0x006f,
7855 "ZIO mode %d enabled; timer delay (%d us).\n",
7856 ha->zio_mode, ha->zio_timer * 100);
7857
7858 icb->firmware_options_2 |= cpu_to_le32(
7859 (uint32_t)ha->zio_mode);
7860 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
7861 }
7862
7863 if (rval) {
7864 ql_log(ql_log_warn, vha, 0x0070,
7865 "NVRAM configuration failed.\n");
7866 }
7867 return (rval);
7868 }
7869
7870 static void
qla27xx_print_image(struct scsi_qla_host * vha,char * name,struct qla27xx_image_status * image_status)7871 qla27xx_print_image(struct scsi_qla_host *vha, char *name,
7872 struct qla27xx_image_status *image_status)
7873 {
7874 ql_dbg(ql_dbg_init, vha, 0x018b,
7875 "%s %s: mask=%#02x gen=%#04x ver=%u.%u map=%#01x sum=%#08x sig=%#08x\n",
7876 name, "status",
7877 image_status->image_status_mask,
7878 le16_to_cpu(image_status->generation),
7879 image_status->ver_major,
7880 image_status->ver_minor,
7881 image_status->bitmap,
7882 le32_to_cpu(image_status->checksum),
7883 le32_to_cpu(image_status->signature));
7884 }
7885
7886 static bool
qla28xx_check_aux_image_status_signature(struct qla27xx_image_status * image_status)7887 qla28xx_check_aux_image_status_signature(
7888 struct qla27xx_image_status *image_status)
7889 {
7890 ulong signature = le32_to_cpu(image_status->signature);
7891
7892 return signature != QLA28XX_AUX_IMG_STATUS_SIGN;
7893 }
7894
7895 static bool
qla27xx_check_image_status_signature(struct qla27xx_image_status * image_status)7896 qla27xx_check_image_status_signature(struct qla27xx_image_status *image_status)
7897 {
7898 ulong signature = le32_to_cpu(image_status->signature);
7899
7900 return
7901 signature != QLA27XX_IMG_STATUS_SIGN &&
7902 signature != QLA28XX_IMG_STATUS_SIGN;
7903 }
7904
7905 static ulong
qla27xx_image_status_checksum(struct qla27xx_image_status * image_status)7906 qla27xx_image_status_checksum(struct qla27xx_image_status *image_status)
7907 {
7908 __le32 *p = (__force __le32 *)image_status;
7909 uint n = sizeof(*image_status) / sizeof(*p);
7910 uint32_t sum = 0;
7911
7912 for ( ; n--; p++)
7913 sum += le32_to_cpup(p);
7914
7915 return sum;
7916 }
7917
7918 static inline uint
qla28xx_component_bitmask(struct qla27xx_image_status * aux,uint bitmask)7919 qla28xx_component_bitmask(struct qla27xx_image_status *aux, uint bitmask)
7920 {
7921 return aux->bitmap & bitmask ?
7922 QLA27XX_SECONDARY_IMAGE : QLA27XX_PRIMARY_IMAGE;
7923 }
7924
7925 static void
qla28xx_component_status(struct active_regions * active_regions,struct qla27xx_image_status * aux)7926 qla28xx_component_status(
7927 struct active_regions *active_regions, struct qla27xx_image_status *aux)
7928 {
7929 active_regions->aux.board_config =
7930 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_BOARD_CONFIG);
7931
7932 active_regions->aux.vpd_nvram =
7933 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_VPD_NVRAM);
7934
7935 active_regions->aux.npiv_config_0_1 =
7936 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_0_1);
7937
7938 active_regions->aux.npiv_config_2_3 =
7939 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_2_3);
7940
7941 active_regions->aux.nvme_params =
7942 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NVME_PARAMS);
7943 }
7944
7945 static int
qla27xx_compare_image_generation(struct qla27xx_image_status * pri_image_status,struct qla27xx_image_status * sec_image_status)7946 qla27xx_compare_image_generation(
7947 struct qla27xx_image_status *pri_image_status,
7948 struct qla27xx_image_status *sec_image_status)
7949 {
7950 /* calculate generation delta as uint16 (this accounts for wrap) */
7951 int16_t delta =
7952 le16_to_cpu(pri_image_status->generation) -
7953 le16_to_cpu(sec_image_status->generation);
7954
7955 ql_dbg(ql_dbg_init, NULL, 0x0180, "generation delta = %d\n", delta);
7956
7957 return delta;
7958 }
7959
7960 void
qla28xx_get_aux_images(struct scsi_qla_host * vha,struct active_regions * active_regions)7961 qla28xx_get_aux_images(
7962 struct scsi_qla_host *vha, struct active_regions *active_regions)
7963 {
7964 struct qla_hw_data *ha = vha->hw;
7965 struct qla27xx_image_status pri_aux_image_status, sec_aux_image_status;
7966 bool valid_pri_image = false, valid_sec_image = false;
7967 bool active_pri_image = false, active_sec_image = false;
7968
7969 if (!ha->flt_region_aux_img_status_pri) {
7970 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary aux image not addressed\n");
7971 goto check_sec_image;
7972 }
7973
7974 qla24xx_read_flash_data(vha, (uint32_t *)&pri_aux_image_status,
7975 ha->flt_region_aux_img_status_pri,
7976 sizeof(pri_aux_image_status) >> 2);
7977 qla27xx_print_image(vha, "Primary aux image", &pri_aux_image_status);
7978
7979 if (qla28xx_check_aux_image_status_signature(&pri_aux_image_status)) {
7980 ql_dbg(ql_dbg_init, vha, 0x018b,
7981 "Primary aux image signature (%#x) not valid\n",
7982 le32_to_cpu(pri_aux_image_status.signature));
7983 goto check_sec_image;
7984 }
7985
7986 if (qla27xx_image_status_checksum(&pri_aux_image_status)) {
7987 ql_dbg(ql_dbg_init, vha, 0x018c,
7988 "Primary aux image checksum failed\n");
7989 goto check_sec_image;
7990 }
7991
7992 valid_pri_image = true;
7993
7994 if (pri_aux_image_status.image_status_mask & 1) {
7995 ql_dbg(ql_dbg_init, vha, 0x018d,
7996 "Primary aux image is active\n");
7997 active_pri_image = true;
7998 }
7999
8000 check_sec_image:
8001 if (!ha->flt_region_aux_img_status_sec) {
8002 ql_dbg(ql_dbg_init, vha, 0x018a,
8003 "Secondary aux image not addressed\n");
8004 goto check_valid_image;
8005 }
8006
8007 qla24xx_read_flash_data(vha, (uint32_t *)&sec_aux_image_status,
8008 ha->flt_region_aux_img_status_sec,
8009 sizeof(sec_aux_image_status) >> 2);
8010 qla27xx_print_image(vha, "Secondary aux image", &sec_aux_image_status);
8011
8012 if (qla28xx_check_aux_image_status_signature(&sec_aux_image_status)) {
8013 ql_dbg(ql_dbg_init, vha, 0x018b,
8014 "Secondary aux image signature (%#x) not valid\n",
8015 le32_to_cpu(sec_aux_image_status.signature));
8016 goto check_valid_image;
8017 }
8018
8019 if (qla27xx_image_status_checksum(&sec_aux_image_status)) {
8020 ql_dbg(ql_dbg_init, vha, 0x018c,
8021 "Secondary aux image checksum failed\n");
8022 goto check_valid_image;
8023 }
8024
8025 valid_sec_image = true;
8026
8027 if (sec_aux_image_status.image_status_mask & 1) {
8028 ql_dbg(ql_dbg_init, vha, 0x018d,
8029 "Secondary aux image is active\n");
8030 active_sec_image = true;
8031 }
8032
8033 check_valid_image:
8034 if (valid_pri_image && active_pri_image &&
8035 valid_sec_image && active_sec_image) {
8036 if (qla27xx_compare_image_generation(&pri_aux_image_status,
8037 &sec_aux_image_status) >= 0) {
8038 qla28xx_component_status(active_regions,
8039 &pri_aux_image_status);
8040 } else {
8041 qla28xx_component_status(active_regions,
8042 &sec_aux_image_status);
8043 }
8044 } else if (valid_pri_image && active_pri_image) {
8045 qla28xx_component_status(active_regions, &pri_aux_image_status);
8046 } else if (valid_sec_image && active_sec_image) {
8047 qla28xx_component_status(active_regions, &sec_aux_image_status);
8048 }
8049
8050 ql_dbg(ql_dbg_init, vha, 0x018f,
8051 "aux images active: BCFG=%u VPD/NVR=%u NPIV0/1=%u NPIV2/3=%u, NVME=%u\n",
8052 active_regions->aux.board_config,
8053 active_regions->aux.vpd_nvram,
8054 active_regions->aux.npiv_config_0_1,
8055 active_regions->aux.npiv_config_2_3,
8056 active_regions->aux.nvme_params);
8057 }
8058
8059 void
qla27xx_get_active_image(struct scsi_qla_host * vha,struct active_regions * active_regions)8060 qla27xx_get_active_image(struct scsi_qla_host *vha,
8061 struct active_regions *active_regions)
8062 {
8063 struct qla_hw_data *ha = vha->hw;
8064 struct qla27xx_image_status pri_image_status, sec_image_status;
8065 bool valid_pri_image = false, valid_sec_image = false;
8066 bool active_pri_image = false, active_sec_image = false;
8067
8068 if (!ha->flt_region_img_status_pri) {
8069 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary image not addressed\n");
8070 goto check_sec_image;
8071 }
8072
8073 if (qla24xx_read_flash_data(vha, (uint32_t *)&pri_image_status,
8074 ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2) !=
8075 QLA_SUCCESS) {
8076 WARN_ON_ONCE(true);
8077 goto check_sec_image;
8078 }
8079 qla27xx_print_image(vha, "Primary image", &pri_image_status);
8080
8081 if (qla27xx_check_image_status_signature(&pri_image_status)) {
8082 ql_dbg(ql_dbg_init, vha, 0x018b,
8083 "Primary image signature (%#x) not valid\n",
8084 le32_to_cpu(pri_image_status.signature));
8085 goto check_sec_image;
8086 }
8087
8088 if (qla27xx_image_status_checksum(&pri_image_status)) {
8089 ql_dbg(ql_dbg_init, vha, 0x018c,
8090 "Primary image checksum failed\n");
8091 goto check_sec_image;
8092 }
8093
8094 valid_pri_image = true;
8095
8096 if (pri_image_status.image_status_mask & 1) {
8097 ql_dbg(ql_dbg_init, vha, 0x018d,
8098 "Primary image is active\n");
8099 active_pri_image = true;
8100 }
8101
8102 check_sec_image:
8103 if (!ha->flt_region_img_status_sec) {
8104 ql_dbg(ql_dbg_init, vha, 0x018a, "Secondary image not addressed\n");
8105 goto check_valid_image;
8106 }
8107
8108 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status),
8109 ha->flt_region_img_status_sec, sizeof(sec_image_status) >> 2);
8110 qla27xx_print_image(vha, "Secondary image", &sec_image_status);
8111
8112 if (qla27xx_check_image_status_signature(&sec_image_status)) {
8113 ql_dbg(ql_dbg_init, vha, 0x018b,
8114 "Secondary image signature (%#x) not valid\n",
8115 le32_to_cpu(sec_image_status.signature));
8116 goto check_valid_image;
8117 }
8118
8119 if (qla27xx_image_status_checksum(&sec_image_status)) {
8120 ql_dbg(ql_dbg_init, vha, 0x018c,
8121 "Secondary image checksum failed\n");
8122 goto check_valid_image;
8123 }
8124
8125 valid_sec_image = true;
8126
8127 if (sec_image_status.image_status_mask & 1) {
8128 ql_dbg(ql_dbg_init, vha, 0x018d,
8129 "Secondary image is active\n");
8130 active_sec_image = true;
8131 }
8132
8133 check_valid_image:
8134 if (valid_pri_image && active_pri_image)
8135 active_regions->global = QLA27XX_PRIMARY_IMAGE;
8136
8137 if (valid_sec_image && active_sec_image) {
8138 if (!active_regions->global ||
8139 qla27xx_compare_image_generation(
8140 &pri_image_status, &sec_image_status) < 0) {
8141 active_regions->global = QLA27XX_SECONDARY_IMAGE;
8142 }
8143 }
8144
8145 ql_dbg(ql_dbg_init, vha, 0x018f, "active image %s (%u)\n",
8146 active_regions->global == QLA27XX_DEFAULT_IMAGE ?
8147 "default (boot/fw)" :
8148 active_regions->global == QLA27XX_PRIMARY_IMAGE ?
8149 "primary" :
8150 active_regions->global == QLA27XX_SECONDARY_IMAGE ?
8151 "secondary" : "invalid",
8152 active_regions->global);
8153 }
8154
qla24xx_risc_firmware_invalid(uint32_t * dword)8155 bool qla24xx_risc_firmware_invalid(uint32_t *dword)
8156 {
8157 return
8158 !(dword[4] | dword[5] | dword[6] | dword[7]) ||
8159 !(~dword[4] | ~dword[5] | ~dword[6] | ~dword[7]);
8160 }
8161
8162 static int
qla24xx_load_risc_flash(scsi_qla_host_t * vha,uint32_t * srisc_addr,uint32_t faddr)8163 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
8164 uint32_t faddr)
8165 {
8166 int rval;
8167 uint templates, segments, fragment;
8168 ulong i;
8169 uint j;
8170 ulong dlen;
8171 uint32_t *dcode;
8172 uint32_t risc_addr, risc_size, risc_attr = 0;
8173 struct qla_hw_data *ha = vha->hw;
8174 struct req_que *req = ha->req_q_map[0];
8175 struct fwdt *fwdt = ha->fwdt;
8176
8177 ql_dbg(ql_dbg_init, vha, 0x008b,
8178 "FW: Loading firmware from flash (%x).\n", faddr);
8179
8180 dcode = (uint32_t *)req->ring;
8181 qla24xx_read_flash_data(vha, dcode, faddr, 8);
8182 if (qla24xx_risc_firmware_invalid(dcode)) {
8183 ql_log(ql_log_fatal, vha, 0x008c,
8184 "Unable to verify the integrity of flash firmware "
8185 "image.\n");
8186 ql_log(ql_log_fatal, vha, 0x008d,
8187 "Firmware data: %08x %08x %08x %08x.\n",
8188 dcode[0], dcode[1], dcode[2], dcode[3]);
8189
8190 return QLA_FUNCTION_FAILED;
8191 }
8192
8193 dcode = (uint32_t *)req->ring;
8194 *srisc_addr = 0;
8195 segments = FA_RISC_CODE_SEGMENTS;
8196 for (j = 0; j < segments; j++) {
8197 ql_dbg(ql_dbg_init, vha, 0x008d,
8198 "-> Loading segment %u...\n", j);
8199 qla24xx_read_flash_data(vha, dcode, faddr, 10);
8200 risc_addr = be32_to_cpu((__force __be32)dcode[2]);
8201 risc_size = be32_to_cpu((__force __be32)dcode[3]);
8202 if (!*srisc_addr) {
8203 *srisc_addr = risc_addr;
8204 risc_attr = be32_to_cpu((__force __be32)dcode[9]);
8205 }
8206
8207 dlen = ha->fw_transfer_size >> 2;
8208 for (fragment = 0; risc_size; fragment++) {
8209 if (dlen > risc_size)
8210 dlen = risc_size;
8211
8212 ql_dbg(ql_dbg_init, vha, 0x008e,
8213 "-> Loading fragment %u: %#x <- %#x (%#lx dwords)...\n",
8214 fragment, risc_addr, faddr, dlen);
8215 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
8216 for (i = 0; i < dlen; i++)
8217 dcode[i] = swab32(dcode[i]);
8218
8219 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
8220 if (rval) {
8221 ql_log(ql_log_fatal, vha, 0x008f,
8222 "-> Failed load firmware fragment %u.\n",
8223 fragment);
8224 return QLA_FUNCTION_FAILED;
8225 }
8226
8227 faddr += dlen;
8228 risc_addr += dlen;
8229 risc_size -= dlen;
8230 }
8231 }
8232
8233 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8234 return QLA_SUCCESS;
8235
8236 templates = (risc_attr & BIT_9) ? 2 : 1;
8237 ql_dbg(ql_dbg_init, vha, 0x0160, "-> templates = %u\n", templates);
8238 for (j = 0; j < templates; j++, fwdt++) {
8239 vfree(fwdt->template);
8240 fwdt->template = NULL;
8241 fwdt->length = 0;
8242
8243 dcode = (uint32_t *)req->ring;
8244 qla24xx_read_flash_data(vha, dcode, faddr, 7);
8245 risc_size = be32_to_cpu((__force __be32)dcode[2]);
8246 ql_dbg(ql_dbg_init, vha, 0x0161,
8247 "-> fwdt%u template array at %#x (%#x dwords)\n",
8248 j, faddr, risc_size);
8249 if (!risc_size || !~risc_size) {
8250 ql_dbg(ql_dbg_init, vha, 0x0162,
8251 "-> fwdt%u failed to read array\n", j);
8252 goto failed;
8253 }
8254
8255 /* skip header and ignore checksum */
8256 faddr += 7;
8257 risc_size -= 8;
8258
8259 ql_dbg(ql_dbg_init, vha, 0x0163,
8260 "-> fwdt%u template allocate template %#x words...\n",
8261 j, risc_size);
8262 fwdt->template = vmalloc(risc_size * sizeof(*dcode));
8263 if (!fwdt->template) {
8264 ql_log(ql_log_warn, vha, 0x0164,
8265 "-> fwdt%u failed allocate template.\n", j);
8266 goto failed;
8267 }
8268
8269 dcode = fwdt->template;
8270 qla24xx_read_flash_data(vha, dcode, faddr, risc_size);
8271
8272 if (!qla27xx_fwdt_template_valid(dcode)) {
8273 ql_log(ql_log_warn, vha, 0x0165,
8274 "-> fwdt%u failed template validate\n", j);
8275 goto failed;
8276 }
8277
8278 dlen = qla27xx_fwdt_template_size(dcode);
8279 ql_dbg(ql_dbg_init, vha, 0x0166,
8280 "-> fwdt%u template size %#lx bytes (%#lx words)\n",
8281 j, dlen, dlen / sizeof(*dcode));
8282 if (dlen > risc_size * sizeof(*dcode)) {
8283 ql_log(ql_log_warn, vha, 0x0167,
8284 "-> fwdt%u template exceeds array (%-lu bytes)\n",
8285 j, dlen - risc_size * sizeof(*dcode));
8286 goto failed;
8287 }
8288
8289 fwdt->length = dlen;
8290 ql_dbg(ql_dbg_init, vha, 0x0168,
8291 "-> fwdt%u loaded template ok\n", j);
8292
8293 faddr += risc_size + 1;
8294 }
8295
8296 return QLA_SUCCESS;
8297
8298 failed:
8299 vfree(fwdt->template);
8300 fwdt->template = NULL;
8301 fwdt->length = 0;
8302
8303 return QLA_SUCCESS;
8304 }
8305
8306 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/"
8307
8308 int
qla2x00_load_risc(scsi_qla_host_t * vha,uint32_t * srisc_addr)8309 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8310 {
8311 int rval;
8312 int i, fragment;
8313 uint16_t *wcode;
8314 __be16 *fwcode;
8315 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
8316 struct fw_blob *blob;
8317 struct qla_hw_data *ha = vha->hw;
8318 struct req_que *req = ha->req_q_map[0];
8319
8320 /* Load firmware blob. */
8321 blob = qla2x00_request_firmware(vha);
8322 if (!blob) {
8323 ql_log(ql_log_info, vha, 0x0083,
8324 "Firmware image unavailable.\n");
8325 ql_log(ql_log_info, vha, 0x0084,
8326 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
8327 return QLA_FUNCTION_FAILED;
8328 }
8329
8330 rval = QLA_SUCCESS;
8331
8332 wcode = (uint16_t *)req->ring;
8333 *srisc_addr = 0;
8334 fwcode = (__force __be16 *)blob->fw->data;
8335 fwclen = 0;
8336
8337 /* Validate firmware image by checking version. */
8338 if (blob->fw->size < 8 * sizeof(uint16_t)) {
8339 ql_log(ql_log_fatal, vha, 0x0085,
8340 "Unable to verify integrity of firmware image (%zd).\n",
8341 blob->fw->size);
8342 goto fail_fw_integrity;
8343 }
8344 for (i = 0; i < 4; i++)
8345 wcode[i] = be16_to_cpu(fwcode[i + 4]);
8346 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
8347 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
8348 wcode[2] == 0 && wcode[3] == 0)) {
8349 ql_log(ql_log_fatal, vha, 0x0086,
8350 "Unable to verify integrity of firmware image.\n");
8351 ql_log(ql_log_fatal, vha, 0x0087,
8352 "Firmware data: %04x %04x %04x %04x.\n",
8353 wcode[0], wcode[1], wcode[2], wcode[3]);
8354 goto fail_fw_integrity;
8355 }
8356
8357 seg = blob->segs;
8358 while (*seg && rval == QLA_SUCCESS) {
8359 risc_addr = *seg;
8360 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
8361 risc_size = be16_to_cpu(fwcode[3]);
8362
8363 /* Validate firmware image size. */
8364 fwclen += risc_size * sizeof(uint16_t);
8365 if (blob->fw->size < fwclen) {
8366 ql_log(ql_log_fatal, vha, 0x0088,
8367 "Unable to verify integrity of firmware image "
8368 "(%zd).\n", blob->fw->size);
8369 goto fail_fw_integrity;
8370 }
8371
8372 fragment = 0;
8373 while (risc_size > 0 && rval == QLA_SUCCESS) {
8374 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
8375 if (wlen > risc_size)
8376 wlen = risc_size;
8377 ql_dbg(ql_dbg_init, vha, 0x0089,
8378 "Loading risc segment@ risc addr %x number of "
8379 "words 0x%x.\n", risc_addr, wlen);
8380
8381 for (i = 0; i < wlen; i++)
8382 wcode[i] = swab16((__force u32)fwcode[i]);
8383
8384 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
8385 wlen);
8386 if (rval) {
8387 ql_log(ql_log_fatal, vha, 0x008a,
8388 "Failed to load segment %d of firmware.\n",
8389 fragment);
8390 break;
8391 }
8392
8393 fwcode += wlen;
8394 risc_addr += wlen;
8395 risc_size -= wlen;
8396 fragment++;
8397 }
8398
8399 /* Next segment. */
8400 seg++;
8401 }
8402 return rval;
8403
8404 fail_fw_integrity:
8405 return QLA_FUNCTION_FAILED;
8406 }
8407
8408 static int
qla24xx_load_risc_blob(scsi_qla_host_t * vha,uint32_t * srisc_addr)8409 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8410 {
8411 int rval;
8412 uint templates, segments, fragment;
8413 uint32_t *dcode;
8414 ulong dlen;
8415 uint32_t risc_addr, risc_size, risc_attr = 0;
8416 ulong i;
8417 uint j;
8418 struct fw_blob *blob;
8419 __be32 *fwcode;
8420 struct qla_hw_data *ha = vha->hw;
8421 struct req_que *req = ha->req_q_map[0];
8422 struct fwdt *fwdt = ha->fwdt;
8423
8424 ql_dbg(ql_dbg_init, vha, 0x0090,
8425 "-> FW: Loading via request-firmware.\n");
8426
8427 blob = qla2x00_request_firmware(vha);
8428 if (!blob) {
8429 ql_log(ql_log_warn, vha, 0x0092,
8430 "-> Firmware file not found.\n");
8431
8432 return QLA_FUNCTION_FAILED;
8433 }
8434
8435 fwcode = (__force __be32 *)blob->fw->data;
8436 dcode = (__force uint32_t *)fwcode;
8437 if (qla24xx_risc_firmware_invalid(dcode)) {
8438 ql_log(ql_log_fatal, vha, 0x0093,
8439 "Unable to verify integrity of firmware image (%zd).\n",
8440 blob->fw->size);
8441 ql_log(ql_log_fatal, vha, 0x0095,
8442 "Firmware data: %08x %08x %08x %08x.\n",
8443 dcode[0], dcode[1], dcode[2], dcode[3]);
8444 return QLA_FUNCTION_FAILED;
8445 }
8446
8447 dcode = (uint32_t *)req->ring;
8448 *srisc_addr = 0;
8449 segments = FA_RISC_CODE_SEGMENTS;
8450 for (j = 0; j < segments; j++) {
8451 ql_dbg(ql_dbg_init, vha, 0x0096,
8452 "-> Loading segment %u...\n", j);
8453 risc_addr = be32_to_cpu(fwcode[2]);
8454 risc_size = be32_to_cpu(fwcode[3]);
8455
8456 if (!*srisc_addr) {
8457 *srisc_addr = risc_addr;
8458 risc_attr = be32_to_cpu(fwcode[9]);
8459 }
8460
8461 dlen = ha->fw_transfer_size >> 2;
8462 for (fragment = 0; risc_size; fragment++) {
8463 if (dlen > risc_size)
8464 dlen = risc_size;
8465
8466 ql_dbg(ql_dbg_init, vha, 0x0097,
8467 "-> Loading fragment %u: %#x <- %#x (%#lx words)...\n",
8468 fragment, risc_addr,
8469 (uint32_t)(fwcode - (typeof(fwcode))blob->fw->data),
8470 dlen);
8471
8472 for (i = 0; i < dlen; i++)
8473 dcode[i] = swab32((__force u32)fwcode[i]);
8474
8475 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
8476 if (rval) {
8477 ql_log(ql_log_fatal, vha, 0x0098,
8478 "-> Failed load firmware fragment %u.\n",
8479 fragment);
8480 return QLA_FUNCTION_FAILED;
8481 }
8482
8483 fwcode += dlen;
8484 risc_addr += dlen;
8485 risc_size -= dlen;
8486 }
8487 }
8488
8489 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8490 return QLA_SUCCESS;
8491
8492 templates = (risc_attr & BIT_9) ? 2 : 1;
8493 ql_dbg(ql_dbg_init, vha, 0x0170, "-> templates = %u\n", templates);
8494 for (j = 0; j < templates; j++, fwdt++) {
8495 vfree(fwdt->template);
8496 fwdt->template = NULL;
8497 fwdt->length = 0;
8498
8499 risc_size = be32_to_cpu(fwcode[2]);
8500 ql_dbg(ql_dbg_init, vha, 0x0171,
8501 "-> fwdt%u template array at %#x (%#x dwords)\n",
8502 j, (uint32_t)((void *)fwcode - (void *)blob->fw->data),
8503 risc_size);
8504 if (!risc_size || !~risc_size) {
8505 ql_dbg(ql_dbg_init, vha, 0x0172,
8506 "-> fwdt%u failed to read array\n", j);
8507 goto failed;
8508 }
8509
8510 /* skip header and ignore checksum */
8511 fwcode += 7;
8512 risc_size -= 8;
8513
8514 ql_dbg(ql_dbg_init, vha, 0x0173,
8515 "-> fwdt%u template allocate template %#x words...\n",
8516 j, risc_size);
8517 fwdt->template = vmalloc(risc_size * sizeof(*dcode));
8518 if (!fwdt->template) {
8519 ql_log(ql_log_warn, vha, 0x0174,
8520 "-> fwdt%u failed allocate template.\n", j);
8521 goto failed;
8522 }
8523
8524 dcode = fwdt->template;
8525 for (i = 0; i < risc_size; i++)
8526 dcode[i] = (__force u32)fwcode[i];
8527
8528 if (!qla27xx_fwdt_template_valid(dcode)) {
8529 ql_log(ql_log_warn, vha, 0x0175,
8530 "-> fwdt%u failed template validate\n", j);
8531 goto failed;
8532 }
8533
8534 dlen = qla27xx_fwdt_template_size(dcode);
8535 ql_dbg(ql_dbg_init, vha, 0x0176,
8536 "-> fwdt%u template size %#lx bytes (%#lx words)\n",
8537 j, dlen, dlen / sizeof(*dcode));
8538 if (dlen > risc_size * sizeof(*dcode)) {
8539 ql_log(ql_log_warn, vha, 0x0177,
8540 "-> fwdt%u template exceeds array (%-lu bytes)\n",
8541 j, dlen - risc_size * sizeof(*dcode));
8542 goto failed;
8543 }
8544
8545 fwdt->length = dlen;
8546 ql_dbg(ql_dbg_init, vha, 0x0178,
8547 "-> fwdt%u loaded template ok\n", j);
8548
8549 fwcode += risc_size + 1;
8550 }
8551
8552 return QLA_SUCCESS;
8553
8554 failed:
8555 vfree(fwdt->template);
8556 fwdt->template = NULL;
8557 fwdt->length = 0;
8558
8559 return QLA_SUCCESS;
8560 }
8561
8562 int
qla24xx_load_risc(scsi_qla_host_t * vha,uint32_t * srisc_addr)8563 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8564 {
8565 int rval;
8566
8567 if (ql2xfwloadbin == 1)
8568 return qla81xx_load_risc(vha, srisc_addr);
8569
8570 /*
8571 * FW Load priority:
8572 * 1) Firmware via request-firmware interface (.bin file).
8573 * 2) Firmware residing in flash.
8574 */
8575 rval = qla24xx_load_risc_blob(vha, srisc_addr);
8576 if (rval == QLA_SUCCESS)
8577 return rval;
8578
8579 return qla24xx_load_risc_flash(vha, srisc_addr,
8580 vha->hw->flt_region_fw);
8581 }
8582
8583 int
qla81xx_load_risc(scsi_qla_host_t * vha,uint32_t * srisc_addr)8584 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8585 {
8586 int rval;
8587 struct qla_hw_data *ha = vha->hw;
8588 struct active_regions active_regions = { };
8589
8590 if (ql2xfwloadbin == 2)
8591 goto try_blob_fw;
8592
8593 /* FW Load priority:
8594 * 1) Firmware residing in flash.
8595 * 2) Firmware via request-firmware interface (.bin file).
8596 * 3) Golden-Firmware residing in flash -- (limited operation).
8597 */
8598
8599 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8600 goto try_primary_fw;
8601
8602 qla27xx_get_active_image(vha, &active_regions);
8603
8604 if (active_regions.global != QLA27XX_SECONDARY_IMAGE)
8605 goto try_primary_fw;
8606
8607 ql_dbg(ql_dbg_init, vha, 0x008b,
8608 "Loading secondary firmware image.\n");
8609 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw_sec);
8610 if (!rval)
8611 return rval;
8612
8613 try_primary_fw:
8614 ql_dbg(ql_dbg_init, vha, 0x008b,
8615 "Loading primary firmware image.\n");
8616 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
8617 if (!rval)
8618 return rval;
8619
8620 try_blob_fw:
8621 rval = qla24xx_load_risc_blob(vha, srisc_addr);
8622 if (!rval || !ha->flt_region_gold_fw)
8623 return rval;
8624
8625 ql_log(ql_log_info, vha, 0x0099,
8626 "Attempting to fallback to golden firmware.\n");
8627 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
8628 if (rval)
8629 return rval;
8630
8631 ql_log(ql_log_info, vha, 0x009a, "Need firmware flash update.\n");
8632 ha->flags.running_gold_fw = 1;
8633 return rval;
8634 }
8635
8636 void
qla2x00_try_to_stop_firmware(scsi_qla_host_t * vha)8637 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
8638 {
8639 int ret, retries;
8640 struct qla_hw_data *ha = vha->hw;
8641
8642 if (ha->flags.pci_channel_io_perm_failure)
8643 return;
8644 if (!IS_FWI2_CAPABLE(ha))
8645 return;
8646 if (!ha->fw_major_version)
8647 return;
8648 if (!ha->flags.fw_started)
8649 return;
8650
8651 ret = qla2x00_stop_firmware(vha);
8652 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
8653 ret != QLA_INVALID_COMMAND && retries ; retries--) {
8654 ha->isp_ops->reset_chip(vha);
8655 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
8656 continue;
8657 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
8658 continue;
8659 ql_log(ql_log_info, vha, 0x8015,
8660 "Attempting retry of stop-firmware command.\n");
8661 ret = qla2x00_stop_firmware(vha);
8662 }
8663
8664 QLA_FW_STOPPED(ha);
8665 ha->flags.fw_init_done = 0;
8666 }
8667
8668 int
qla24xx_configure_vhba(scsi_qla_host_t * vha)8669 qla24xx_configure_vhba(scsi_qla_host_t *vha)
8670 {
8671 int rval = QLA_SUCCESS;
8672 int rval2;
8673 uint16_t mb[MAILBOX_REGISTER_COUNT];
8674 struct qla_hw_data *ha = vha->hw;
8675 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
8676
8677 if (!vha->vp_idx)
8678 return -EINVAL;
8679
8680 rval = qla2x00_fw_ready(base_vha);
8681
8682 if (rval == QLA_SUCCESS) {
8683 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8684 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
8685 }
8686
8687 vha->flags.management_server_logged_in = 0;
8688
8689 /* Login to SNS first */
8690 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
8691 BIT_1);
8692 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
8693 if (rval2 == QLA_MEMORY_ALLOC_FAILED)
8694 ql_dbg(ql_dbg_init, vha, 0x0120,
8695 "Failed SNS login: loop_id=%x, rval2=%d\n",
8696 NPH_SNS, rval2);
8697 else
8698 ql_dbg(ql_dbg_init, vha, 0x0103,
8699 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
8700 "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
8701 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
8702 return (QLA_FUNCTION_FAILED);
8703 }
8704
8705 atomic_set(&vha->loop_down_timer, 0);
8706 atomic_set(&vha->loop_state, LOOP_UP);
8707 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
8708 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
8709 rval = qla2x00_loop_resync(base_vha);
8710
8711 return rval;
8712 }
8713
8714 /* 84XX Support **************************************************************/
8715
8716 static LIST_HEAD(qla_cs84xx_list);
8717 static DEFINE_MUTEX(qla_cs84xx_mutex);
8718
8719 static struct qla_chip_state_84xx *
qla84xx_get_chip(struct scsi_qla_host * vha)8720 qla84xx_get_chip(struct scsi_qla_host *vha)
8721 {
8722 struct qla_chip_state_84xx *cs84xx;
8723 struct qla_hw_data *ha = vha->hw;
8724
8725 mutex_lock(&qla_cs84xx_mutex);
8726
8727 /* Find any shared 84xx chip. */
8728 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
8729 if (cs84xx->bus == ha->pdev->bus) {
8730 kref_get(&cs84xx->kref);
8731 goto done;
8732 }
8733 }
8734
8735 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
8736 if (!cs84xx)
8737 goto done;
8738
8739 kref_init(&cs84xx->kref);
8740 spin_lock_init(&cs84xx->access_lock);
8741 mutex_init(&cs84xx->fw_update_mutex);
8742 cs84xx->bus = ha->pdev->bus;
8743
8744 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
8745 done:
8746 mutex_unlock(&qla_cs84xx_mutex);
8747 return cs84xx;
8748 }
8749
8750 static void
__qla84xx_chip_release(struct kref * kref)8751 __qla84xx_chip_release(struct kref *kref)
8752 {
8753 struct qla_chip_state_84xx *cs84xx =
8754 container_of(kref, struct qla_chip_state_84xx, kref);
8755
8756 mutex_lock(&qla_cs84xx_mutex);
8757 list_del(&cs84xx->list);
8758 mutex_unlock(&qla_cs84xx_mutex);
8759 kfree(cs84xx);
8760 }
8761
8762 void
qla84xx_put_chip(struct scsi_qla_host * vha)8763 qla84xx_put_chip(struct scsi_qla_host *vha)
8764 {
8765 struct qla_hw_data *ha = vha->hw;
8766
8767 if (ha->cs84xx)
8768 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
8769 }
8770
8771 static int
qla84xx_init_chip(scsi_qla_host_t * vha)8772 qla84xx_init_chip(scsi_qla_host_t *vha)
8773 {
8774 int rval;
8775 uint16_t status[2];
8776 struct qla_hw_data *ha = vha->hw;
8777
8778 mutex_lock(&ha->cs84xx->fw_update_mutex);
8779
8780 rval = qla84xx_verify_chip(vha, status);
8781
8782 mutex_unlock(&ha->cs84xx->fw_update_mutex);
8783
8784 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED :
8785 QLA_SUCCESS;
8786 }
8787
8788 /* 81XX Support **************************************************************/
8789
8790 int
qla81xx_nvram_config(scsi_qla_host_t * vha)8791 qla81xx_nvram_config(scsi_qla_host_t *vha)
8792 {
8793 int rval;
8794 struct init_cb_81xx *icb;
8795 struct nvram_81xx *nv;
8796 __le32 *dptr;
8797 uint8_t *dptr1, *dptr2;
8798 uint32_t chksum;
8799 uint16_t cnt;
8800 struct qla_hw_data *ha = vha->hw;
8801 uint32_t faddr;
8802 struct active_regions active_regions = { };
8803
8804 rval = QLA_SUCCESS;
8805 icb = (struct init_cb_81xx *)ha->init_cb;
8806 nv = ha->nvram;
8807
8808 /* Determine NVRAM starting address. */
8809 ha->nvram_size = sizeof(*nv);
8810 ha->vpd_size = FA_NVRAM_VPD_SIZE;
8811 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha))
8812 ha->vpd_size = FA_VPD_SIZE_82XX;
8813
8814 if (IS_QLA28XX(ha) || IS_QLA27XX(ha))
8815 qla28xx_get_aux_images(vha, &active_regions);
8816
8817 /* Get VPD data into cache */
8818 ha->vpd = ha->nvram + VPD_OFFSET;
8819
8820 faddr = ha->flt_region_vpd;
8821 if (IS_QLA28XX(ha)) {
8822 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
8823 faddr = ha->flt_region_vpd_sec;
8824 ql_dbg(ql_dbg_init, vha, 0x0110,
8825 "Loading %s nvram image.\n",
8826 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
8827 "primary" : "secondary");
8828 }
8829 ha->isp_ops->read_optrom(vha, ha->vpd, faddr << 2, ha->vpd_size);
8830
8831 /* Get NVRAM data into cache and calculate checksum. */
8832 faddr = ha->flt_region_nvram;
8833 if (IS_QLA28XX(ha)) {
8834 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
8835 faddr = ha->flt_region_nvram_sec;
8836 }
8837 ql_dbg(ql_dbg_init, vha, 0x0110,
8838 "Loading %s nvram image.\n",
8839 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
8840 "primary" : "secondary");
8841 ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size);
8842
8843 dptr = (__force __le32 *)nv;
8844 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
8845 chksum += le32_to_cpu(*dptr);
8846
8847 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
8848 "Contents of NVRAM:\n");
8849 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
8850 nv, ha->nvram_size);
8851
8852 /* Bad NVRAM data, set defaults parameters. */
8853 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
8854 le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
8855 /* Reset NVRAM data. */
8856 ql_log(ql_log_info, vha, 0x0073,
8857 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
8858 chksum, nv->id, le16_to_cpu(nv->nvram_version));
8859 ql_dump_buffer(ql_dbg_init, vha, 0x0073, nv, sizeof(*nv));
8860 ql_log(ql_log_info, vha, 0x0074,
8861 "Falling back to functioning (yet invalid -- WWPN) "
8862 "defaults.\n");
8863
8864 /*
8865 * Set default initialization control block.
8866 */
8867 memset(nv, 0, ha->nvram_size);
8868 nv->nvram_version = cpu_to_le16(ICB_VERSION);
8869 nv->version = cpu_to_le16(ICB_VERSION);
8870 nv->frame_payload_size = cpu_to_le16(2048);
8871 nv->execution_throttle = cpu_to_le16(0xFFFF);
8872 nv->exchange_count = cpu_to_le16(0);
8873 nv->port_name[0] = 0x21;
8874 nv->port_name[1] = 0x00 + ha->port_no + 1;
8875 nv->port_name[2] = 0x00;
8876 nv->port_name[3] = 0xe0;
8877 nv->port_name[4] = 0x8b;
8878 nv->port_name[5] = 0x1c;
8879 nv->port_name[6] = 0x55;
8880 nv->port_name[7] = 0x86;
8881 nv->node_name[0] = 0x20;
8882 nv->node_name[1] = 0x00;
8883 nv->node_name[2] = 0x00;
8884 nv->node_name[3] = 0xe0;
8885 nv->node_name[4] = 0x8b;
8886 nv->node_name[5] = 0x1c;
8887 nv->node_name[6] = 0x55;
8888 nv->node_name[7] = 0x86;
8889 nv->login_retry_count = cpu_to_le16(8);
8890 nv->interrupt_delay_timer = cpu_to_le16(0);
8891 nv->login_timeout = cpu_to_le16(0);
8892 nv->firmware_options_1 =
8893 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
8894 nv->firmware_options_2 = cpu_to_le32(2 << 4);
8895 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
8896 nv->firmware_options_3 = cpu_to_le32(2 << 13);
8897 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
8898 nv->efi_parameters = cpu_to_le32(0);
8899 nv->reset_delay = 5;
8900 nv->max_luns_per_target = cpu_to_le16(128);
8901 nv->port_down_retry_count = cpu_to_le16(30);
8902 nv->link_down_timeout = cpu_to_le16(180);
8903 nv->enode_mac[0] = 0x00;
8904 nv->enode_mac[1] = 0xC0;
8905 nv->enode_mac[2] = 0xDD;
8906 nv->enode_mac[3] = 0x04;
8907 nv->enode_mac[4] = 0x05;
8908 nv->enode_mac[5] = 0x06 + ha->port_no + 1;
8909
8910 rval = 1;
8911 }
8912
8913 if (IS_T10_PI_CAPABLE(ha))
8914 nv->frame_payload_size &= cpu_to_le16(~7);
8915
8916 qlt_81xx_config_nvram_stage1(vha, nv);
8917
8918 /* Reset Initialization control block */
8919 memset(icb, 0, ha->init_cb_size);
8920
8921 /* Copy 1st segment. */
8922 dptr1 = (uint8_t *)icb;
8923 dptr2 = (uint8_t *)&nv->version;
8924 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
8925 while (cnt--)
8926 *dptr1++ = *dptr2++;
8927
8928 icb->login_retry_count = nv->login_retry_count;
8929
8930 /* Copy 2nd segment. */
8931 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
8932 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
8933 cnt = (uint8_t *)&icb->reserved_5 -
8934 (uint8_t *)&icb->interrupt_delay_timer;
8935 while (cnt--)
8936 *dptr1++ = *dptr2++;
8937
8938 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
8939 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
8940 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
8941 icb->enode_mac[0] = 0x00;
8942 icb->enode_mac[1] = 0xC0;
8943 icb->enode_mac[2] = 0xDD;
8944 icb->enode_mac[3] = 0x04;
8945 icb->enode_mac[4] = 0x05;
8946 icb->enode_mac[5] = 0x06 + ha->port_no + 1;
8947 }
8948
8949 /* Use extended-initialization control block. */
8950 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
8951 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
8952 /*
8953 * Setup driver NVRAM options.
8954 */
8955 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
8956 "QLE8XXX");
8957
8958 qlt_81xx_config_nvram_stage2(vha, icb);
8959
8960 /* Use alternate WWN? */
8961 if (nv->host_p & cpu_to_le32(BIT_15)) {
8962 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
8963 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
8964 }
8965
8966 /* Prepare nodename */
8967 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
8968 /*
8969 * Firmware will apply the following mask if the nodename was
8970 * not provided.
8971 */
8972 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
8973 icb->node_name[0] &= 0xF0;
8974 }
8975
8976 if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) {
8977 if ((nv->enhanced_features & BIT_7) == 0)
8978 ha->flags.scm_supported_a = 1;
8979 }
8980
8981 /* Set host adapter parameters. */
8982 ha->flags.disable_risc_code_load = 0;
8983 ha->flags.enable_lip_reset = 0;
8984 ha->flags.enable_lip_full_login =
8985 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
8986 ha->flags.enable_target_reset =
8987 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
8988 ha->flags.enable_led_scheme = 0;
8989 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
8990
8991 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
8992 (BIT_6 | BIT_5 | BIT_4)) >> 4;
8993
8994 /* save HBA serial number */
8995 ha->serial0 = icb->port_name[5];
8996 ha->serial1 = icb->port_name[6];
8997 ha->serial2 = icb->port_name[7];
8998 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
8999 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
9000
9001 icb->execution_throttle = cpu_to_le16(0xFFFF);
9002
9003 ha->retry_count = le16_to_cpu(nv->login_retry_count);
9004
9005 /* Set minimum login_timeout to 4 seconds. */
9006 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
9007 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
9008 if (le16_to_cpu(nv->login_timeout) < 4)
9009 nv->login_timeout = cpu_to_le16(4);
9010 ha->login_timeout = le16_to_cpu(nv->login_timeout);
9011
9012 /* Set minimum RATOV to 100 tenths of a second. */
9013 ha->r_a_tov = 100;
9014
9015 ha->loop_reset_delay = nv->reset_delay;
9016
9017 /* Link Down Timeout = 0:
9018 *
9019 * When Port Down timer expires we will start returning
9020 * I/O's to OS with "DID_NO_CONNECT".
9021 *
9022 * Link Down Timeout != 0:
9023 *
9024 * The driver waits for the link to come up after link down
9025 * before returning I/Os to OS with "DID_NO_CONNECT".
9026 */
9027 if (le16_to_cpu(nv->link_down_timeout) == 0) {
9028 ha->loop_down_abort_time =
9029 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
9030 } else {
9031 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
9032 ha->loop_down_abort_time =
9033 (LOOP_DOWN_TIME - ha->link_down_timeout);
9034 }
9035
9036 /* Need enough time to try and get the port back. */
9037 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
9038 if (qlport_down_retry)
9039 ha->port_down_retry_count = qlport_down_retry;
9040
9041 /* Set login_retry_count */
9042 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
9043 if (ha->port_down_retry_count ==
9044 le16_to_cpu(nv->port_down_retry_count) &&
9045 ha->port_down_retry_count > 3)
9046 ha->login_retry_count = ha->port_down_retry_count;
9047 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
9048 ha->login_retry_count = ha->port_down_retry_count;
9049 if (ql2xloginretrycount)
9050 ha->login_retry_count = ql2xloginretrycount;
9051
9052 /* if not running MSI-X we need handshaking on interrupts */
9053 if (!vha->hw->flags.msix_enabled &&
9054 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)))
9055 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
9056
9057 /* Enable ZIO. */
9058 if (!vha->flags.init_done) {
9059 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
9060 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
9061 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
9062 le16_to_cpu(icb->interrupt_delay_timer) : 2;
9063 }
9064 icb->firmware_options_2 &= cpu_to_le32(
9065 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
9066 vha->flags.process_response_queue = 0;
9067 if (ha->zio_mode != QLA_ZIO_DISABLED) {
9068 ha->zio_mode = QLA_ZIO_MODE_6;
9069
9070 ql_log(ql_log_info, vha, 0x0075,
9071 "ZIO mode %d enabled; timer delay (%d us).\n",
9072 ha->zio_mode,
9073 ha->zio_timer * 100);
9074
9075 icb->firmware_options_2 |= cpu_to_le32(
9076 (uint32_t)ha->zio_mode);
9077 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
9078 vha->flags.process_response_queue = 1;
9079 }
9080
9081 /* enable RIDA Format2 */
9082 icb->firmware_options_3 |= cpu_to_le32(BIT_0);
9083
9084 /* N2N: driver will initiate Login instead of FW */
9085 icb->firmware_options_3 |= cpu_to_le32(BIT_8);
9086
9087 /* Determine NVMe/FCP priority for target ports */
9088 ha->fc4_type_priority = qla2xxx_get_fc4_priority(vha);
9089
9090 if (rval) {
9091 ql_log(ql_log_warn, vha, 0x0076,
9092 "NVRAM configuration failed.\n");
9093 }
9094 return (rval);
9095 }
9096
9097 int
qla82xx_restart_isp(scsi_qla_host_t * vha)9098 qla82xx_restart_isp(scsi_qla_host_t *vha)
9099 {
9100 int status, rval;
9101 struct qla_hw_data *ha = vha->hw;
9102 struct scsi_qla_host *vp, *tvp;
9103 unsigned long flags;
9104
9105 status = qla2x00_init_rings(vha);
9106 if (!status) {
9107 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
9108 ha->flags.chip_reset_done = 1;
9109
9110 status = qla2x00_fw_ready(vha);
9111 if (!status) {
9112 /* Issue a marker after FW becomes ready. */
9113 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
9114 vha->flags.online = 1;
9115 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
9116 }
9117
9118 /* if no cable then assume it's good */
9119 if ((vha->device_flags & DFLG_NO_CABLE))
9120 status = 0;
9121 }
9122
9123 if (!status) {
9124 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
9125
9126 if (!atomic_read(&vha->loop_down_timer)) {
9127 /*
9128 * Issue marker command only when we are going
9129 * to start the I/O .
9130 */
9131 vha->marker_needed = 1;
9132 }
9133
9134 ha->isp_ops->enable_intrs(ha);
9135
9136 ha->isp_abort_cnt = 0;
9137 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
9138
9139 /* Update the firmware version */
9140 status = qla82xx_check_md_needed(vha);
9141
9142 if (ha->fce) {
9143 ha->flags.fce_enabled = 1;
9144 memset(ha->fce, 0,
9145 fce_calc_size(ha->fce_bufs));
9146 rval = qla2x00_enable_fce_trace(vha,
9147 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
9148 &ha->fce_bufs);
9149 if (rval) {
9150 ql_log(ql_log_warn, vha, 0x8001,
9151 "Unable to reinitialize FCE (%d).\n",
9152 rval);
9153 ha->flags.fce_enabled = 0;
9154 }
9155 }
9156
9157 if (ha->eft) {
9158 memset(ha->eft, 0, EFT_SIZE);
9159 rval = qla2x00_enable_eft_trace(vha,
9160 ha->eft_dma, EFT_NUM_BUFFERS);
9161 if (rval) {
9162 ql_log(ql_log_warn, vha, 0x8010,
9163 "Unable to reinitialize EFT (%d).\n",
9164 rval);
9165 }
9166 }
9167 }
9168
9169 if (!status) {
9170 ql_dbg(ql_dbg_taskm, vha, 0x8011,
9171 "qla82xx_restart_isp succeeded.\n");
9172
9173 spin_lock_irqsave(&ha->vport_slock, flags);
9174 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
9175 if (vp->vp_idx) {
9176 atomic_inc(&vp->vref_count);
9177 spin_unlock_irqrestore(&ha->vport_slock, flags);
9178
9179 qla2x00_vp_abort_isp(vp);
9180
9181 spin_lock_irqsave(&ha->vport_slock, flags);
9182 atomic_dec(&vp->vref_count);
9183 }
9184 }
9185 spin_unlock_irqrestore(&ha->vport_slock, flags);
9186
9187 } else {
9188 ql_log(ql_log_warn, vha, 0x8016,
9189 "qla82xx_restart_isp **** FAILED ****.\n");
9190 }
9191
9192 return status;
9193 }
9194
9195 /*
9196 * qla24xx_get_fcp_prio
9197 * Gets the fcp cmd priority value for the logged in port.
9198 * Looks for a match of the port descriptors within
9199 * each of the fcp prio config entries. If a match is found,
9200 * the tag (priority) value is returned.
9201 *
9202 * Input:
9203 * vha = scsi host structure pointer.
9204 * fcport = port structure pointer.
9205 *
9206 * Return:
9207 * non-zero (if found)
9208 * -1 (if not found)
9209 *
9210 * Context:
9211 * Kernel context
9212 */
9213 static int
qla24xx_get_fcp_prio(scsi_qla_host_t * vha,fc_port_t * fcport)9214 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
9215 {
9216 int i, entries;
9217 uint8_t pid_match, wwn_match;
9218 int priority;
9219 uint32_t pid1, pid2;
9220 uint64_t wwn1, wwn2;
9221 struct qla_fcp_prio_entry *pri_entry;
9222 struct qla_hw_data *ha = vha->hw;
9223
9224 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
9225 return -1;
9226
9227 priority = -1;
9228 entries = ha->fcp_prio_cfg->num_entries;
9229 pri_entry = &ha->fcp_prio_cfg->entry[0];
9230
9231 for (i = 0; i < entries; i++) {
9232 pid_match = wwn_match = 0;
9233
9234 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
9235 pri_entry++;
9236 continue;
9237 }
9238
9239 /* check source pid for a match */
9240 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
9241 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
9242 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
9243 if (pid1 == INVALID_PORT_ID)
9244 pid_match++;
9245 else if (pid1 == pid2)
9246 pid_match++;
9247 }
9248
9249 /* check destination pid for a match */
9250 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
9251 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
9252 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
9253 if (pid1 == INVALID_PORT_ID)
9254 pid_match++;
9255 else if (pid1 == pid2)
9256 pid_match++;
9257 }
9258
9259 /* check source WWN for a match */
9260 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
9261 wwn1 = wwn_to_u64(vha->port_name);
9262 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
9263 if (wwn2 == (uint64_t)-1)
9264 wwn_match++;
9265 else if (wwn1 == wwn2)
9266 wwn_match++;
9267 }
9268
9269 /* check destination WWN for a match */
9270 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
9271 wwn1 = wwn_to_u64(fcport->port_name);
9272 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
9273 if (wwn2 == (uint64_t)-1)
9274 wwn_match++;
9275 else if (wwn1 == wwn2)
9276 wwn_match++;
9277 }
9278
9279 if (pid_match == 2 || wwn_match == 2) {
9280 /* Found a matching entry */
9281 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
9282 priority = pri_entry->tag;
9283 break;
9284 }
9285
9286 pri_entry++;
9287 }
9288
9289 return priority;
9290 }
9291
9292 /*
9293 * qla24xx_update_fcport_fcp_prio
9294 * Activates fcp priority for the logged in fc port
9295 *
9296 * Input:
9297 * vha = scsi host structure pointer.
9298 * fcp = port structure pointer.
9299 *
9300 * Return:
9301 * QLA_SUCCESS or QLA_FUNCTION_FAILED
9302 *
9303 * Context:
9304 * Kernel context.
9305 */
9306 int
qla24xx_update_fcport_fcp_prio(scsi_qla_host_t * vha,fc_port_t * fcport)9307 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
9308 {
9309 int ret;
9310 int priority;
9311 uint16_t mb[5];
9312
9313 if (fcport->port_type != FCT_TARGET ||
9314 fcport->loop_id == FC_NO_LOOP_ID)
9315 return QLA_FUNCTION_FAILED;
9316
9317 priority = qla24xx_get_fcp_prio(vha, fcport);
9318 if (priority < 0)
9319 return QLA_FUNCTION_FAILED;
9320
9321 if (IS_P3P_TYPE(vha->hw)) {
9322 fcport->fcp_prio = priority & 0xf;
9323 return QLA_SUCCESS;
9324 }
9325
9326 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
9327 if (ret == QLA_SUCCESS) {
9328 if (fcport->fcp_prio != priority)
9329 ql_dbg(ql_dbg_user, vha, 0x709e,
9330 "Updated FCP_CMND priority - value=%d loop_id=%d "
9331 "port_id=%02x%02x%02x.\n", priority,
9332 fcport->loop_id, fcport->d_id.b.domain,
9333 fcport->d_id.b.area, fcport->d_id.b.al_pa);
9334 fcport->fcp_prio = priority & 0xf;
9335 } else
9336 ql_dbg(ql_dbg_user, vha, 0x704f,
9337 "Unable to update FCP_CMND priority - ret=0x%x for "
9338 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
9339 fcport->d_id.b.domain, fcport->d_id.b.area,
9340 fcport->d_id.b.al_pa);
9341 return ret;
9342 }
9343
9344 /*
9345 * qla24xx_update_all_fcp_prio
9346 * Activates fcp priority for all the logged in ports
9347 *
9348 * Input:
9349 * ha = adapter block pointer.
9350 *
9351 * Return:
9352 * QLA_SUCCESS or QLA_FUNCTION_FAILED
9353 *
9354 * Context:
9355 * Kernel context.
9356 */
9357 int
qla24xx_update_all_fcp_prio(scsi_qla_host_t * vha)9358 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
9359 {
9360 int ret;
9361 fc_port_t *fcport;
9362
9363 ret = QLA_FUNCTION_FAILED;
9364 /* We need to set priority for all logged in ports */
9365 list_for_each_entry(fcport, &vha->vp_fcports, list)
9366 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
9367
9368 return ret;
9369 }
9370
qla2xxx_create_qpair(struct scsi_qla_host * vha,int qos,int vp_idx,bool startqp)9371 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos,
9372 int vp_idx, bool startqp)
9373 {
9374 int rsp_id = 0;
9375 int req_id = 0;
9376 int i;
9377 struct qla_hw_data *ha = vha->hw;
9378 uint16_t qpair_id = 0;
9379 struct qla_qpair *qpair = NULL;
9380 struct qla_msix_entry *msix;
9381
9382 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) {
9383 ql_log(ql_log_warn, vha, 0x00181,
9384 "FW/Driver is not multi-queue capable.\n");
9385 return NULL;
9386 }
9387
9388 if (ql2xmqsupport || ql2xnvmeenable) {
9389 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
9390 if (qpair == NULL) {
9391 ql_log(ql_log_warn, vha, 0x0182,
9392 "Failed to allocate memory for queue pair.\n");
9393 return NULL;
9394 }
9395
9396 qpair->hw = vha->hw;
9397 qpair->vha = vha;
9398 qpair->qp_lock_ptr = &qpair->qp_lock;
9399 spin_lock_init(&qpair->qp_lock);
9400 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
9401
9402 /* Assign available que pair id */
9403 mutex_lock(&ha->mq_lock);
9404 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs);
9405 if (ha->num_qpairs >= ha->max_qpairs) {
9406 mutex_unlock(&ha->mq_lock);
9407 ql_log(ql_log_warn, vha, 0x0183,
9408 "No resources to create additional q pair.\n");
9409 goto fail_qid_map;
9410 }
9411 ha->num_qpairs++;
9412 set_bit(qpair_id, ha->qpair_qid_map);
9413 ha->queue_pair_map[qpair_id] = qpair;
9414 qpair->id = qpair_id;
9415 qpair->vp_idx = vp_idx;
9416 qpair->fw_started = ha->flags.fw_started;
9417 INIT_LIST_HEAD(&qpair->hints_list);
9418 qpair->chip_reset = ha->base_qpair->chip_reset;
9419 qpair->enable_class_2 = ha->base_qpair->enable_class_2;
9420 qpair->enable_explicit_conf =
9421 ha->base_qpair->enable_explicit_conf;
9422
9423 for (i = 0; i < ha->msix_count; i++) {
9424 msix = &ha->msix_entries[i];
9425 if (msix->in_use)
9426 continue;
9427 qpair->msix = msix;
9428 ql_dbg(ql_dbg_multiq, vha, 0xc00f,
9429 "Vector %x selected for qpair\n", msix->vector);
9430 break;
9431 }
9432 if (!qpair->msix) {
9433 ql_log(ql_log_warn, vha, 0x0184,
9434 "Out of MSI-X vectors!.\n");
9435 goto fail_msix;
9436 }
9437
9438 qpair->msix->in_use = 1;
9439 list_add_tail(&qpair->qp_list_elem, &vha->qp_list);
9440 qpair->pdev = ha->pdev;
9441 if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha))
9442 qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
9443
9444 mutex_unlock(&ha->mq_lock);
9445
9446 /* Create response queue first */
9447 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp);
9448 if (!rsp_id) {
9449 ql_log(ql_log_warn, vha, 0x0185,
9450 "Failed to create response queue.\n");
9451 goto fail_rsp;
9452 }
9453
9454 qpair->rsp = ha->rsp_q_map[rsp_id];
9455
9456 /* Create request queue */
9457 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos,
9458 startqp);
9459 if (!req_id) {
9460 ql_log(ql_log_warn, vha, 0x0186,
9461 "Failed to create request queue.\n");
9462 goto fail_req;
9463 }
9464
9465 qpair->req = ha->req_q_map[req_id];
9466 qpair->rsp->req = qpair->req;
9467 qpair->rsp->qpair = qpair;
9468 /* init qpair to this cpu. Will adjust at run time. */
9469 qla_cpu_update(qpair, raw_smp_processor_id());
9470
9471 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
9472 if (ha->fw_attributes & BIT_4)
9473 qpair->difdix_supported = 1;
9474 }
9475
9476 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
9477 if (!qpair->srb_mempool) {
9478 ql_log(ql_log_warn, vha, 0xd036,
9479 "Failed to create srb mempool for qpair %d\n",
9480 qpair->id);
9481 goto fail_mempool;
9482 }
9483
9484 /* Mark as online */
9485 qpair->online = 1;
9486
9487 if (!vha->flags.qpairs_available)
9488 vha->flags.qpairs_available = 1;
9489
9490 ql_dbg(ql_dbg_multiq, vha, 0xc00d,
9491 "Request/Response queue pair created, id %d\n",
9492 qpair->id);
9493 ql_dbg(ql_dbg_init, vha, 0x0187,
9494 "Request/Response queue pair created, id %d\n",
9495 qpair->id);
9496 }
9497 return qpair;
9498
9499 fail_mempool:
9500 fail_req:
9501 qla25xx_delete_rsp_que(vha, qpair->rsp);
9502 fail_rsp:
9503 mutex_lock(&ha->mq_lock);
9504 qpair->msix->in_use = 0;
9505 list_del(&qpair->qp_list_elem);
9506 if (list_empty(&vha->qp_list))
9507 vha->flags.qpairs_available = 0;
9508 fail_msix:
9509 ha->queue_pair_map[qpair_id] = NULL;
9510 clear_bit(qpair_id, ha->qpair_qid_map);
9511 ha->num_qpairs--;
9512 mutex_unlock(&ha->mq_lock);
9513 fail_qid_map:
9514 kfree(qpair);
9515 return NULL;
9516 }
9517
qla2xxx_delete_qpair(struct scsi_qla_host * vha,struct qla_qpair * qpair)9518 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair)
9519 {
9520 int ret = QLA_FUNCTION_FAILED;
9521 struct qla_hw_data *ha = qpair->hw;
9522
9523 qpair->delete_in_progress = 1;
9524
9525 ret = qla25xx_delete_req_que(vha, qpair->req);
9526 if (ret != QLA_SUCCESS)
9527 goto fail;
9528
9529 ret = qla25xx_delete_rsp_que(vha, qpair->rsp);
9530 if (ret != QLA_SUCCESS)
9531 goto fail;
9532
9533 mutex_lock(&ha->mq_lock);
9534 ha->queue_pair_map[qpair->id] = NULL;
9535 clear_bit(qpair->id, ha->qpair_qid_map);
9536 ha->num_qpairs--;
9537 list_del(&qpair->qp_list_elem);
9538 if (list_empty(&vha->qp_list)) {
9539 vha->flags.qpairs_available = 0;
9540 vha->flags.qpairs_req_created = 0;
9541 vha->flags.qpairs_rsp_created = 0;
9542 }
9543 mempool_destroy(qpair->srb_mempool);
9544 kfree(qpair);
9545 mutex_unlock(&ha->mq_lock);
9546
9547 return QLA_SUCCESS;
9548 fail:
9549 return ret;
9550 }
9551
9552 uint64_t
qla2x00_count_set_bits(uint32_t num)9553 qla2x00_count_set_bits(uint32_t num)
9554 {
9555 /* Brian Kernighan's Algorithm */
9556 u64 count = 0;
9557
9558 while (num) {
9559 num &= (num - 1);
9560 count++;
9561 }
9562 return count;
9563 }
9564
9565 uint64_t
qla2x00_get_num_tgts(scsi_qla_host_t * vha)9566 qla2x00_get_num_tgts(scsi_qla_host_t *vha)
9567 {
9568 fc_port_t *f, *tf;
9569 u64 count = 0;
9570
9571 f = NULL;
9572 tf = NULL;
9573
9574 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) {
9575 if (f->port_type != FCT_TARGET)
9576 continue;
9577 count++;
9578 }
9579 return count;
9580 }
9581
qla2xxx_reset_stats(struct Scsi_Host * host,u32 flags)9582 int qla2xxx_reset_stats(struct Scsi_Host *host, u32 flags)
9583 {
9584 scsi_qla_host_t *vha = shost_priv(host);
9585 fc_port_t *fcport = NULL;
9586 unsigned long int_flags;
9587
9588 if (flags & QLA2XX_HW_ERROR)
9589 vha->hw_err_cnt = 0;
9590 if (flags & QLA2XX_SHT_LNK_DWN)
9591 vha->short_link_down_cnt = 0;
9592 if (flags & QLA2XX_INT_ERR)
9593 vha->interface_err_cnt = 0;
9594 if (flags & QLA2XX_CMD_TIMEOUT)
9595 vha->cmd_timeout_cnt = 0;
9596 if (flags & QLA2XX_RESET_CMD_ERR)
9597 vha->reset_cmd_err_cnt = 0;
9598 if (flags & QLA2XX_TGT_SHT_LNK_DOWN) {
9599 spin_lock_irqsave(&vha->hw->tgt.sess_lock, int_flags);
9600 list_for_each_entry(fcport, &vha->vp_fcports, list) {
9601 fcport->tgt_short_link_down_cnt = 0;
9602 fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
9603 }
9604 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, int_flags);
9605 }
9606 vha->link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
9607 return 0;
9608 }
9609
qla2xxx_start_stats(struct Scsi_Host * host,u32 flags)9610 int qla2xxx_start_stats(struct Scsi_Host *host, u32 flags)
9611 {
9612 return qla2xxx_reset_stats(host, flags);
9613 }
9614
qla2xxx_stop_stats(struct Scsi_Host * host,u32 flags)9615 int qla2xxx_stop_stats(struct Scsi_Host *host, u32 flags)
9616 {
9617 return qla2xxx_reset_stats(host, flags);
9618 }
9619
qla2xxx_get_ini_stats(struct Scsi_Host * host,u32 flags,void * data,u64 size)9620 int qla2xxx_get_ini_stats(struct Scsi_Host *host, u32 flags,
9621 void *data, u64 size)
9622 {
9623 scsi_qla_host_t *vha = shost_priv(host);
9624 struct ql_vnd_host_stats_resp *resp = (struct ql_vnd_host_stats_resp *)data;
9625 struct ql_vnd_stats *rsp_data = &resp->stats;
9626 u64 ini_entry_count = 0;
9627 u64 i = 0;
9628 u64 entry_count = 0;
9629 u64 num_tgt = 0;
9630 u32 tmp_stat_type = 0;
9631 fc_port_t *fcport = NULL;
9632 unsigned long int_flags;
9633
9634 /* Copy stat type to work on it */
9635 tmp_stat_type = flags;
9636
9637 if (tmp_stat_type & BIT_17) {
9638 num_tgt = qla2x00_get_num_tgts(vha);
9639 /* unset BIT_17 */
9640 tmp_stat_type &= ~(1 << 17);
9641 }
9642 ini_entry_count = qla2x00_count_set_bits(tmp_stat_type);
9643
9644 entry_count = ini_entry_count + num_tgt;
9645
9646 rsp_data->entry_count = entry_count;
9647
9648 i = 0;
9649 if (flags & QLA2XX_HW_ERROR) {
9650 rsp_data->entry[i].stat_type = QLA2XX_HW_ERROR;
9651 rsp_data->entry[i].tgt_num = 0x0;
9652 rsp_data->entry[i].cnt = vha->hw_err_cnt;
9653 i++;
9654 }
9655
9656 if (flags & QLA2XX_SHT_LNK_DWN) {
9657 rsp_data->entry[i].stat_type = QLA2XX_SHT_LNK_DWN;
9658 rsp_data->entry[i].tgt_num = 0x0;
9659 rsp_data->entry[i].cnt = vha->short_link_down_cnt;
9660 i++;
9661 }
9662
9663 if (flags & QLA2XX_INT_ERR) {
9664 rsp_data->entry[i].stat_type = QLA2XX_INT_ERR;
9665 rsp_data->entry[i].tgt_num = 0x0;
9666 rsp_data->entry[i].cnt = vha->interface_err_cnt;
9667 i++;
9668 }
9669
9670 if (flags & QLA2XX_CMD_TIMEOUT) {
9671 rsp_data->entry[i].stat_type = QLA2XX_CMD_TIMEOUT;
9672 rsp_data->entry[i].tgt_num = 0x0;
9673 rsp_data->entry[i].cnt = vha->cmd_timeout_cnt;
9674 i++;
9675 }
9676
9677 if (flags & QLA2XX_RESET_CMD_ERR) {
9678 rsp_data->entry[i].stat_type = QLA2XX_RESET_CMD_ERR;
9679 rsp_data->entry[i].tgt_num = 0x0;
9680 rsp_data->entry[i].cnt = vha->reset_cmd_err_cnt;
9681 i++;
9682 }
9683
9684 /* i will continue from previous loop, as target
9685 * entries are after initiator
9686 */
9687 if (flags & QLA2XX_TGT_SHT_LNK_DOWN) {
9688 spin_lock_irqsave(&vha->hw->tgt.sess_lock, int_flags);
9689 list_for_each_entry(fcport, &vha->vp_fcports, list) {
9690 if (fcport->port_type != FCT_TARGET)
9691 continue;
9692 if (!fcport->rport)
9693 continue;
9694 rsp_data->entry[i].stat_type = QLA2XX_TGT_SHT_LNK_DOWN;
9695 rsp_data->entry[i].tgt_num = fcport->rport->number;
9696 rsp_data->entry[i].cnt = fcport->tgt_short_link_down_cnt;
9697 i++;
9698 }
9699 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, int_flags);
9700 }
9701 resp->status = EXT_STATUS_OK;
9702
9703 return 0;
9704 }
9705
qla2xxx_get_tgt_stats(struct Scsi_Host * host,u32 flags,struct fc_rport * rport,void * data,u64 size)9706 int qla2xxx_get_tgt_stats(struct Scsi_Host *host, u32 flags,
9707 struct fc_rport *rport, void *data, u64 size)
9708 {
9709 struct ql_vnd_tgt_stats_resp *tgt_data = data;
9710 fc_port_t *fcport = *(fc_port_t **)rport->dd_data;
9711
9712 tgt_data->status = 0;
9713 tgt_data->stats.entry_count = 1;
9714 tgt_data->stats.entry[0].stat_type = flags;
9715 tgt_data->stats.entry[0].tgt_num = rport->number;
9716 tgt_data->stats.entry[0].cnt = fcport->tgt_short_link_down_cnt;
9717
9718 return 0;
9719 }
9720
qla2xxx_disable_port(struct Scsi_Host * host)9721 int qla2xxx_disable_port(struct Scsi_Host *host)
9722 {
9723 scsi_qla_host_t *vha = shost_priv(host);
9724
9725 vha->hw->flags.port_isolated = 1;
9726
9727 if (qla2x00_isp_reg_stat(vha->hw)) {
9728 ql_log(ql_log_info, vha, 0x9006,
9729 "PCI/Register disconnect, exiting.\n");
9730 qla_pci_set_eeh_busy(vha);
9731 return FAILED;
9732 }
9733 if (qla2x00_chip_is_down(vha))
9734 return 0;
9735
9736 if (vha->flags.online) {
9737 qla2x00_abort_isp_cleanup(vha);
9738 qla2x00_wait_for_sess_deletion(vha);
9739 }
9740
9741 return 0;
9742 }
9743
qla2xxx_enable_port(struct Scsi_Host * host)9744 int qla2xxx_enable_port(struct Scsi_Host *host)
9745 {
9746 scsi_qla_host_t *vha = shost_priv(host);
9747
9748 if (qla2x00_isp_reg_stat(vha->hw)) {
9749 ql_log(ql_log_info, vha, 0x9001,
9750 "PCI/Register disconnect, exiting.\n");
9751 qla_pci_set_eeh_busy(vha);
9752 return FAILED;
9753 }
9754
9755 vha->hw->flags.port_isolated = 0;
9756 /* Set the flag to 1, so that isp_abort can proceed */
9757 vha->flags.online = 1;
9758 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
9759 qla2xxx_wake_dpc(vha);
9760
9761 return 0;
9762 }
9763