1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * linux/arch/arm/mach-pxa/pxa27x.c
4 *
5 * Author: Nicolas Pitre
6 * Created: Nov 05, 2002
7 * Copyright: MontaVista Software Inc.
8 *
9 * Code specific to PXA27x aka Bulverde.
10 */
11 #include <linux/dmaengine.h>
12 #include <linux/dma/pxa-dma.h>
13 #include <linux/gpio.h>
14 #include <linux/gpio-pxa.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/irqchip.h>
19 #include <linux/suspend.h>
20 #include <linux/platform_device.h>
21 #include <linux/syscore_ops.h>
22 #include <linux/io.h>
23 #include <linux/irq.h>
24 #include <linux/platform_data/i2c-pxa.h>
25 #include <linux/platform_data/mmp_dma.h>
26 #include <linux/soc/pxa/cpu.h>
27
28 #include <asm/mach/map.h>
29 #include <asm/irq.h>
30 #include <asm/suspend.h>
31 #include "irqs.h"
32 #include "pxa27x.h"
33 #include "reset.h"
34 #include <linux/platform_data/usb-ohci-pxa27x.h>
35 #include "pm.h"
36 #include "addr-map.h"
37 #include "smemc.h"
38
39 #include "generic.h"
40 #include "devices.h"
41 #include <linux/clk-provider.h>
42 #include <linux/clkdev.h>
43
pxa27x_clear_otgph(void)44 void pxa27x_clear_otgph(void)
45 {
46 if (cpu_is_pxa27x() && (PSSR & PSSR_OTGPH))
47 PSSR |= PSSR_OTGPH;
48 }
49 EXPORT_SYMBOL(pxa27x_clear_otgph);
50
51 static unsigned long ac97_reset_config[] = {
52 GPIO113_AC97_nRESET_GPIO_HIGH,
53 GPIO113_AC97_nRESET,
54 GPIO95_AC97_nRESET_GPIO_HIGH,
55 GPIO95_AC97_nRESET,
56 };
57
pxa27x_configure_ac97reset(int reset_gpio,bool to_gpio)58 void pxa27x_configure_ac97reset(int reset_gpio, bool to_gpio)
59 {
60 /*
61 * This helper function is used to work around a bug in the pxa27x's
62 * ac97 controller during a warm reset. The configuration of the
63 * reset_gpio is changed as follows:
64 * to_gpio == true: configured to generic output gpio and driven high
65 * to_gpio == false: configured to ac97 controller alt fn AC97_nRESET
66 */
67
68 if (reset_gpio == 113)
69 pxa2xx_mfp_config(to_gpio ? &ac97_reset_config[0] :
70 &ac97_reset_config[1], 1);
71
72 if (reset_gpio == 95)
73 pxa2xx_mfp_config(to_gpio ? &ac97_reset_config[2] :
74 &ac97_reset_config[3], 1);
75 }
76 EXPORT_SYMBOL_GPL(pxa27x_configure_ac97reset);
77
78 #ifdef CONFIG_PM
79
80 #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
81 #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
82
83 /*
84 * allow platforms to override default PWRMODE setting used for PM_SUSPEND_MEM
85 */
86 static unsigned int pwrmode = PWRMODE_SLEEP;
87
pxa27x_set_pwrmode(unsigned int mode)88 int pxa27x_set_pwrmode(unsigned int mode)
89 {
90 switch (mode) {
91 case PWRMODE_SLEEP:
92 case PWRMODE_DEEPSLEEP:
93 pwrmode = mode;
94 return 0;
95 }
96
97 return -EINVAL;
98 }
99
100 /*
101 * List of global PXA peripheral registers to preserve.
102 * More ones like CP and general purpose register values are preserved
103 * with the stack pointer in sleep.S.
104 */
105 enum {
106 SLEEP_SAVE_PSTR,
107 SLEEP_SAVE_MDREFR,
108 SLEEP_SAVE_PCFR,
109 SLEEP_SAVE_COUNT
110 };
111
pxa27x_cpu_pm_save(unsigned long * sleep_save)112 void pxa27x_cpu_pm_save(unsigned long *sleep_save)
113 {
114 sleep_save[SLEEP_SAVE_MDREFR] = __raw_readl(MDREFR);
115 SAVE(PCFR);
116
117 SAVE(PSTR);
118 }
119
pxa27x_cpu_pm_restore(unsigned long * sleep_save)120 void pxa27x_cpu_pm_restore(unsigned long *sleep_save)
121 {
122 __raw_writel(sleep_save[SLEEP_SAVE_MDREFR], MDREFR);
123 RESTORE(PCFR);
124
125 PSSR = PSSR_RDH | PSSR_PH;
126
127 RESTORE(PSTR);
128 }
129
pxa27x_cpu_pm_enter(suspend_state_t state)130 void pxa27x_cpu_pm_enter(suspend_state_t state)
131 {
132 extern void pxa_cpu_standby(void);
133 #ifndef CONFIG_IWMMXT
134 u64 acc0;
135
136 asm volatile(".arch_extension xscale\n\t"
137 "mra %Q0, %R0, acc0" : "=r" (acc0));
138 #endif
139
140 /* ensure voltage-change sequencer not initiated, which hangs */
141 PCFR &= ~PCFR_FVC;
142
143 /* Clear edge-detect status register. */
144 PEDR = 0xDF12FE1B;
145
146 /* Clear reset status */
147 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
148
149 switch (state) {
150 case PM_SUSPEND_STANDBY:
151 pxa_cpu_standby();
152 break;
153 case PM_SUSPEND_MEM:
154 cpu_suspend(pwrmode, pxa27x_finish_suspend);
155 #ifndef CONFIG_IWMMXT
156 asm volatile(".arch_extension xscale\n\t"
157 "mar acc0, %Q0, %R0" : "=r" (acc0));
158 #endif
159 break;
160 }
161 }
162
pxa27x_cpu_pm_valid(suspend_state_t state)163 static int pxa27x_cpu_pm_valid(suspend_state_t state)
164 {
165 return state == PM_SUSPEND_MEM || state == PM_SUSPEND_STANDBY;
166 }
167
pxa27x_cpu_pm_prepare(void)168 static int pxa27x_cpu_pm_prepare(void)
169 {
170 /* set resume return address */
171 PSPR = __pa_symbol(cpu_resume);
172 return 0;
173 }
174
pxa27x_cpu_pm_finish(void)175 static void pxa27x_cpu_pm_finish(void)
176 {
177 /* ensure not to come back here if it wasn't intended */
178 PSPR = 0;
179 }
180
181 static struct pxa_cpu_pm_fns pxa27x_cpu_pm_fns = {
182 .save_count = SLEEP_SAVE_COUNT,
183 .save = pxa27x_cpu_pm_save,
184 .restore = pxa27x_cpu_pm_restore,
185 .valid = pxa27x_cpu_pm_valid,
186 .enter = pxa27x_cpu_pm_enter,
187 .prepare = pxa27x_cpu_pm_prepare,
188 .finish = pxa27x_cpu_pm_finish,
189 };
190
pxa27x_init_pm(void)191 static void __init pxa27x_init_pm(void)
192 {
193 pxa_cpu_pm_fns = &pxa27x_cpu_pm_fns;
194 }
195 #else
pxa27x_init_pm(void)196 static inline void pxa27x_init_pm(void) {}
197 #endif
198
199 /* PXA27x: Various gpios can issue wakeup events. This logic only
200 * handles the simple cases, not the WEMUX2 and WEMUX3 options
201 */
pxa27x_set_wake(struct irq_data * d,unsigned int on)202 static int pxa27x_set_wake(struct irq_data *d, unsigned int on)
203 {
204 int gpio = pxa_irq_to_gpio(d->irq);
205 uint32_t mask;
206
207 if (gpio >= 0 && gpio < 128)
208 return gpio_set_wake(gpio, on);
209
210 if (d->irq == IRQ_KEYPAD)
211 return keypad_set_wake(on);
212
213 switch (d->irq) {
214 case IRQ_RTCAlrm:
215 mask = PWER_RTC;
216 break;
217 case IRQ_USB:
218 mask = 1u << 26;
219 break;
220 default:
221 return -EINVAL;
222 }
223
224 if (on)
225 PWER |= mask;
226 else
227 PWER &=~mask;
228
229 return 0;
230 }
231
pxa27x_init_irq(void)232 void __init pxa27x_init_irq(void)
233 {
234 pxa_init_irq(34, pxa27x_set_wake);
235 }
236
237 static int __init
pxa27x_dt_init_irq(struct device_node * node,struct device_node * parent)238 pxa27x_dt_init_irq(struct device_node *node, struct device_node *parent)
239 {
240 pxa_dt_irq_init(pxa27x_set_wake);
241 set_handle_irq(ichp_handle_irq);
242
243 return 0;
244 }
245 IRQCHIP_DECLARE(pxa27x_intc, "marvell,pxa-intc", pxa27x_dt_init_irq);
246
247 static struct map_desc pxa27x_io_desc[] __initdata = {
248 { /* Mem Ctl */
249 .virtual = (unsigned long)SMEMC_VIRT,
250 .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE),
251 .length = SMEMC_SIZE,
252 .type = MT_DEVICE
253 }, { /* UNCACHED_PHYS_0 */
254 .virtual = UNCACHED_PHYS_0,
255 .pfn = __phys_to_pfn(0x00000000),
256 .length = UNCACHED_PHYS_0_SIZE,
257 .type = MT_DEVICE
258 },
259 };
260
pxa27x_map_io(void)261 void __init pxa27x_map_io(void)
262 {
263 pxa_map_io();
264 iotable_init(ARRAY_AND_SIZE(pxa27x_io_desc));
265 pxa27x_get_clk_frequency_khz(1);
266 }
267
268 /*
269 * device registration specific to PXA27x.
270 */
pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data * info)271 void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
272 {
273 local_irq_disable();
274 PCFR |= PCFR_PI2CEN;
275 local_irq_enable();
276 pxa_register_device(&pxa27x_device_i2c_power, info);
277 }
278
279 static struct pxa_gpio_platform_data pxa27x_gpio_info __initdata = {
280 .irq_base = PXA_GPIO_TO_IRQ(0),
281 .gpio_set_wake = gpio_set_wake,
282 };
283
284 static struct platform_device *devices[] __initdata = {
285 &pxa27x_device_udc,
286 &pxa_device_pmu,
287 &pxa_device_i2s,
288 &pxa_device_asoc_ssp1,
289 &pxa_device_asoc_ssp2,
290 &pxa_device_asoc_ssp3,
291 &pxa_device_asoc_platform,
292 &pxa_device_rtc,
293 &pxa27x_device_ssp1,
294 &pxa27x_device_ssp2,
295 &pxa27x_device_ssp3,
296 &pxa27x_device_pwm0,
297 &pxa27x_device_pwm1,
298 };
299
300 static const struct dma_slave_map pxa27x_slave_map[] = {
301 /* PXA25x, PXA27x and PXA3xx common entries */
302 { "pxa2xx-ac97", "pcm_pcm_mic_mono", PDMA_FILTER_PARAM(LOWEST, 8) },
303 { "pxa2xx-ac97", "pcm_pcm_aux_mono_in", PDMA_FILTER_PARAM(LOWEST, 9) },
304 { "pxa2xx-ac97", "pcm_pcm_aux_mono_out",
305 PDMA_FILTER_PARAM(LOWEST, 10) },
306 { "pxa2xx-ac97", "pcm_pcm_stereo_in", PDMA_FILTER_PARAM(LOWEST, 11) },
307 { "pxa2xx-ac97", "pcm_pcm_stereo_out", PDMA_FILTER_PARAM(LOWEST, 12) },
308 { "pxa-ssp-dai.0", "rx", PDMA_FILTER_PARAM(LOWEST, 13) },
309 { "pxa-ssp-dai.0", "tx", PDMA_FILTER_PARAM(LOWEST, 14) },
310 { "pxa-ssp-dai.1", "rx", PDMA_FILTER_PARAM(LOWEST, 15) },
311 { "pxa-ssp-dai.1", "tx", PDMA_FILTER_PARAM(LOWEST, 16) },
312 { "pxa2xx-ir", "rx", PDMA_FILTER_PARAM(LOWEST, 17) },
313 { "pxa2xx-ir", "tx", PDMA_FILTER_PARAM(LOWEST, 18) },
314 { "pxa2xx-mci.0", "rx", PDMA_FILTER_PARAM(LOWEST, 21) },
315 { "pxa2xx-mci.0", "tx", PDMA_FILTER_PARAM(LOWEST, 22) },
316 { "pxa-ssp-dai.2", "rx", PDMA_FILTER_PARAM(LOWEST, 66) },
317 { "pxa-ssp-dai.2", "tx", PDMA_FILTER_PARAM(LOWEST, 67) },
318
319 /* PXA27x specific map */
320 { "pxa2xx-i2s", "rx", PDMA_FILTER_PARAM(LOWEST, 2) },
321 { "pxa2xx-i2s", "tx", PDMA_FILTER_PARAM(LOWEST, 3) },
322 { "pxa27x-camera.0", "CI_Y", PDMA_FILTER_PARAM(HIGHEST, 68) },
323 { "pxa27x-camera.0", "CI_U", PDMA_FILTER_PARAM(HIGHEST, 69) },
324 { "pxa27x-camera.0", "CI_V", PDMA_FILTER_PARAM(HIGHEST, 70) },
325 };
326
327 static struct mmp_dma_platdata pxa27x_dma_pdata = {
328 .dma_channels = 32,
329 .nb_requestors = 75,
330 .slave_map = pxa27x_slave_map,
331 .slave_map_cnt = ARRAY_SIZE(pxa27x_slave_map),
332 };
333
pxa27x_init(void)334 static int __init pxa27x_init(void)
335 {
336 int ret = 0;
337
338 if (cpu_is_pxa27x()) {
339
340 pxa_register_wdt(RCSR);
341
342 pxa27x_init_pm();
343
344 register_syscore_ops(&pxa_irq_syscore_ops);
345 register_syscore_ops(&pxa2xx_mfp_syscore_ops);
346
347 if (!of_have_populated_dt()) {
348 pxa_register_device(&pxa27x_device_gpio,
349 &pxa27x_gpio_info);
350 pxa2xx_set_dmac_info(&pxa27x_dma_pdata);
351 ret = platform_add_devices(devices,
352 ARRAY_SIZE(devices));
353 }
354 }
355
356 return ret;
357 }
358
359 postcore_initcall(pxa27x_init);
360