1 /*
2  *
3  * Common boot and setup code.
4  *
5  * Copyright (C) 2001 PPC64 Team, IBM Corp
6  *
7  *      This program is free software; you can redistribute it and/or
8  *      modify it under the terms of the GNU General Public License
9  *      as published by the Free Software Foundation; either version
10  *      2 of the License, or (at your option) any later version.
11  */
12 
13 #undef DEBUG
14 
15 #include <linux/module.h>
16 #include <linux/string.h>
17 #include <linux/sched.h>
18 #include <linux/init.h>
19 #include <linux/kernel.h>
20 #include <linux/reboot.h>
21 #include <linux/delay.h>
22 #include <linux/initrd.h>
23 #include <linux/seq_file.h>
24 #include <linux/ioport.h>
25 #include <linux/console.h>
26 #include <linux/utsname.h>
27 #include <linux/tty.h>
28 #include <linux/root_dev.h>
29 #include <linux/notifier.h>
30 #include <linux/cpu.h>
31 #include <linux/unistd.h>
32 #include <linux/serial.h>
33 #include <linux/serial_8250.h>
34 #include <linux/bootmem.h>
35 #include <linux/pci.h>
36 #include <linux/lockdep.h>
37 #include <linux/memblock.h>
38 #include <asm/io.h>
39 #include <asm/kdump.h>
40 #include <asm/prom.h>
41 #include <asm/processor.h>
42 #include <asm/pgtable.h>
43 #include <asm/smp.h>
44 #include <asm/elf.h>
45 #include <asm/machdep.h>
46 #include <asm/paca.h>
47 #include <asm/time.h>
48 #include <asm/cputable.h>
49 #include <asm/sections.h>
50 #include <asm/btext.h>
51 #include <asm/nvram.h>
52 #include <asm/setup.h>
53 #include <asm/system.h>
54 #include <asm/rtas.h>
55 #include <asm/iommu.h>
56 #include <asm/serial.h>
57 #include <asm/cache.h>
58 #include <asm/page.h>
59 #include <asm/mmu.h>
60 #include <asm/firmware.h>
61 #include <asm/xmon.h>
62 #include <asm/udbg.h>
63 #include <asm/kexec.h>
64 #include <asm/mmu_context.h>
65 
66 #include "setup.h"
67 
68 #ifdef DEBUG
69 #define DBG(fmt...) udbg_printf(fmt)
70 #else
71 #define DBG(fmt...)
72 #endif
73 
74 int boot_cpuid = 0;
75 u64 ppc64_pft_size;
76 
77 /* Pick defaults since we might want to patch instructions
78  * before we've read this from the device tree.
79  */
80 struct ppc64_caches ppc64_caches = {
81 	.dline_size = 0x40,
82 	.log_dline_size = 6,
83 	.iline_size = 0x40,
84 	.log_iline_size = 6
85 };
86 EXPORT_SYMBOL_GPL(ppc64_caches);
87 
88 /*
89  * These are used in binfmt_elf.c to put aux entries on the stack
90  * for each elf executable being started.
91  */
92 int dcache_bsize;
93 int icache_bsize;
94 int ucache_bsize;
95 
96 #ifdef CONFIG_SMP
97 
98 static char *smt_enabled_cmdline;
99 
100 /* Look for ibm,smt-enabled OF option */
check_smt_enabled(void)101 static void check_smt_enabled(void)
102 {
103 	struct device_node *dn;
104 	const char *smt_option;
105 
106 	/* Default to enabling all threads */
107 	smt_enabled_at_boot = threads_per_core;
108 
109 	/* Allow the command line to overrule the OF option */
110 	if (smt_enabled_cmdline) {
111 		if (!strcmp(smt_enabled_cmdline, "on"))
112 			smt_enabled_at_boot = threads_per_core;
113 		else if (!strcmp(smt_enabled_cmdline, "off"))
114 			smt_enabled_at_boot = 0;
115 		else {
116 			long smt;
117 			int rc;
118 
119 			rc = strict_strtol(smt_enabled_cmdline, 10, &smt);
120 			if (!rc)
121 				smt_enabled_at_boot =
122 					min(threads_per_core, (int)smt);
123 		}
124 	} else {
125 		dn = of_find_node_by_path("/options");
126 		if (dn) {
127 			smt_option = of_get_property(dn, "ibm,smt-enabled",
128 						     NULL);
129 
130 			if (smt_option) {
131 				if (!strcmp(smt_option, "on"))
132 					smt_enabled_at_boot = threads_per_core;
133 				else if (!strcmp(smt_option, "off"))
134 					smt_enabled_at_boot = 0;
135 			}
136 
137 			of_node_put(dn);
138 		}
139 	}
140 }
141 
142 /* Look for smt-enabled= cmdline option */
early_smt_enabled(char * p)143 static int __init early_smt_enabled(char *p)
144 {
145 	smt_enabled_cmdline = p;
146 	return 0;
147 }
148 early_param("smt-enabled", early_smt_enabled);
149 
150 #else
151 #define check_smt_enabled()
152 #endif /* CONFIG_SMP */
153 
154 /*
155  * Early initialization entry point. This is called by head.S
156  * with MMU translation disabled. We rely on the "feature" of
157  * the CPU that ignores the top 2 bits of the address in real
158  * mode so we can access kernel globals normally provided we
159  * only toy with things in the RMO region. From here, we do
160  * some early parsing of the device-tree to setup out MEMBLOCK
161  * data structures, and allocate & initialize the hash table
162  * and segment tables so we can start running with translation
163  * enabled.
164  *
165  * It is this function which will call the probe() callback of
166  * the various platform types and copy the matching one to the
167  * global ppc_md structure. Your platform can eventually do
168  * some very early initializations from the probe() routine, but
169  * this is not recommended, be very careful as, for example, the
170  * device-tree is not accessible via normal means at this point.
171  */
172 
early_setup(unsigned long dt_ptr)173 void __init early_setup(unsigned long dt_ptr)
174 {
175 	/* -------- printk is _NOT_ safe to use here ! ------- */
176 
177 	/* Identify CPU type */
178 	identify_cpu(0, mfspr(SPRN_PVR));
179 
180 	/* Assume we're on cpu 0 for now. Don't write to the paca yet! */
181 	initialise_paca(&boot_paca, 0);
182 	setup_paca(&boot_paca);
183 
184 	/* Initialize lockdep early or else spinlocks will blow */
185 	lockdep_init();
186 
187 	/* -------- printk is now safe to use ------- */
188 
189 	/* Enable early debugging if any specified (see udbg.h) */
190 	udbg_early_init();
191 
192  	DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr);
193 
194 	/*
195 	 * Do early initialization using the flattened device
196 	 * tree, such as retrieving the physical memory map or
197 	 * calculating/retrieving the hash table size.
198 	 */
199 	early_init_devtree(__va(dt_ptr));
200 
201 	/* Now we know the logical id of our boot cpu, setup the paca. */
202 	setup_paca(&paca[boot_cpuid]);
203 
204 	/* Fix up paca fields required for the boot cpu */
205 	get_paca()->cpu_start = 1;
206 
207 	/* Probe the machine type */
208 	probe_machine();
209 
210 	setup_kdump_trampoline();
211 
212 	DBG("Found, Initializing memory management...\n");
213 
214 	/* Initialize the hash table or TLB handling */
215 	early_init_mmu();
216 
217 	DBG(" <- early_setup()\n");
218 }
219 
220 #ifdef CONFIG_SMP
early_setup_secondary(void)221 void early_setup_secondary(void)
222 {
223 	/* Mark interrupts enabled in PACA */
224 	get_paca()->soft_enabled = 0;
225 
226 	/* Initialize the hash table or TLB handling */
227 	early_init_mmu_secondary();
228 }
229 
230 #endif /* CONFIG_SMP */
231 
232 #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
smp_release_cpus(void)233 void smp_release_cpus(void)
234 {
235 	unsigned long *ptr;
236 
237 	DBG(" -> smp_release_cpus()\n");
238 
239 	/* All secondary cpus are spinning on a common spinloop, release them
240 	 * all now so they can start to spin on their individual paca
241 	 * spinloops. For non SMP kernels, the secondary cpus never get out
242 	 * of the common spinloop.
243 	 */
244 
245 	ptr  = (unsigned long *)((unsigned long)&__secondary_hold_spinloop
246 			- PHYSICAL_START);
247 	*ptr = __pa(generic_secondary_smp_init);
248 	mb();
249 
250 	DBG(" <- smp_release_cpus()\n");
251 }
252 #endif /* CONFIG_SMP || CONFIG_KEXEC */
253 
254 /*
255  * Initialize some remaining members of the ppc64_caches and systemcfg
256  * structures
257  * (at least until we get rid of them completely). This is mostly some
258  * cache informations about the CPU that will be used by cache flush
259  * routines and/or provided to userland
260  */
initialize_cache_info(void)261 static void __init initialize_cache_info(void)
262 {
263 	struct device_node *np;
264 	unsigned long num_cpus = 0;
265 
266 	DBG(" -> initialize_cache_info()\n");
267 
268 	for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) {
269 		num_cpus += 1;
270 
271 		/* We're assuming *all* of the CPUs have the same
272 		 * d-cache and i-cache sizes... -Peter
273 		 */
274 
275 		if ( num_cpus == 1 ) {
276 			const u32 *sizep, *lsizep;
277 			u32 size, lsize;
278 
279 			size = 0;
280 			lsize = cur_cpu_spec->dcache_bsize;
281 			sizep = of_get_property(np, "d-cache-size", NULL);
282 			if (sizep != NULL)
283 				size = *sizep;
284 			lsizep = of_get_property(np, "d-cache-block-size", NULL);
285 			/* fallback if block size missing */
286 			if (lsizep == NULL)
287 				lsizep = of_get_property(np, "d-cache-line-size", NULL);
288 			if (lsizep != NULL)
289 				lsize = *lsizep;
290 			if (sizep == 0 || lsizep == 0)
291 				DBG("Argh, can't find dcache properties ! "
292 				    "sizep: %p, lsizep: %p\n", sizep, lsizep);
293 
294 			ppc64_caches.dsize = size;
295 			ppc64_caches.dline_size = lsize;
296 			ppc64_caches.log_dline_size = __ilog2(lsize);
297 			ppc64_caches.dlines_per_page = PAGE_SIZE / lsize;
298 
299 			size = 0;
300 			lsize = cur_cpu_spec->icache_bsize;
301 			sizep = of_get_property(np, "i-cache-size", NULL);
302 			if (sizep != NULL)
303 				size = *sizep;
304 			lsizep = of_get_property(np, "i-cache-block-size", NULL);
305 			if (lsizep == NULL)
306 				lsizep = of_get_property(np, "i-cache-line-size", NULL);
307 			if (lsizep != NULL)
308 				lsize = *lsizep;
309 			if (sizep == 0 || lsizep == 0)
310 				DBG("Argh, can't find icache properties ! "
311 				    "sizep: %p, lsizep: %p\n", sizep, lsizep);
312 
313 			ppc64_caches.isize = size;
314 			ppc64_caches.iline_size = lsize;
315 			ppc64_caches.log_iline_size = __ilog2(lsize);
316 			ppc64_caches.ilines_per_page = PAGE_SIZE / lsize;
317 		}
318 	}
319 
320 	DBG(" <- initialize_cache_info()\n");
321 }
322 
323 
324 /*
325  * Do some initial setup of the system.  The parameters are those which
326  * were passed in from the bootloader.
327  */
setup_system(void)328 void __init setup_system(void)
329 {
330 	DBG(" -> setup_system()\n");
331 
332 	/* Apply the CPUs-specific and firmware specific fixups to kernel
333 	 * text (nop out sections not relevant to this CPU or this firmware)
334 	 */
335 	do_feature_fixups(cur_cpu_spec->cpu_features,
336 			  &__start___ftr_fixup, &__stop___ftr_fixup);
337 	do_feature_fixups(cur_cpu_spec->mmu_features,
338 			  &__start___mmu_ftr_fixup, &__stop___mmu_ftr_fixup);
339 	do_feature_fixups(powerpc_firmware_features,
340 			  &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup);
341 	do_lwsync_fixups(cur_cpu_spec->cpu_features,
342 			 &__start___lwsync_fixup, &__stop___lwsync_fixup);
343 
344 	/*
345 	 * Unflatten the device-tree passed by prom_init or kexec
346 	 */
347 	unflatten_device_tree();
348 
349 	/*
350 	 * Fill the ppc64_caches & systemcfg structures with informations
351  	 * retrieved from the device-tree.
352 	 */
353 	initialize_cache_info();
354 
355 #ifdef CONFIG_PPC_RTAS
356 	/*
357 	 * Initialize RTAS if available
358 	 */
359 	rtas_initialize();
360 #endif /* CONFIG_PPC_RTAS */
361 
362 	/*
363 	 * Check if we have an initrd provided via the device-tree
364 	 */
365 	check_for_initrd();
366 
367 	/*
368 	 * Do some platform specific early initializations, that includes
369 	 * setting up the hash table pointers. It also sets up some interrupt-mapping
370 	 * related options that will be used by finish_device_tree()
371 	 */
372 	if (ppc_md.init_early)
373 		ppc_md.init_early();
374 
375  	/*
376 	 * We can discover serial ports now since the above did setup the
377 	 * hash table management for us, thus ioremap works. We do that early
378 	 * so that further code can be debugged
379 	 */
380 	find_legacy_serial_ports();
381 
382 	/*
383 	 * Register early console
384 	 */
385 	register_early_udbg_console();
386 
387 	/*
388 	 * Initialize xmon
389 	 */
390 	xmon_setup();
391 
392 	smp_setup_cpu_maps();
393 	check_smt_enabled();
394 
395 #ifdef CONFIG_SMP
396 	/* Release secondary cpus out of their spinloops at 0x60 now that
397 	 * we can map physical -> logical CPU ids
398 	 */
399 	smp_release_cpus();
400 #endif
401 
402 	printk("Starting Linux PPC64 %s\n", init_utsname()->version);
403 
404 	printk("-----------------------------------------------------\n");
405 	printk("ppc64_pft_size                = 0x%llx\n", ppc64_pft_size);
406 	printk("physicalMemorySize            = 0x%llx\n", memblock_phys_mem_size());
407 	if (ppc64_caches.dline_size != 0x80)
408 		printk("ppc64_caches.dcache_line_size = 0x%x\n",
409 		       ppc64_caches.dline_size);
410 	if (ppc64_caches.iline_size != 0x80)
411 		printk("ppc64_caches.icache_line_size = 0x%x\n",
412 		       ppc64_caches.iline_size);
413 #ifdef CONFIG_PPC_STD_MMU_64
414 	if (htab_address)
415 		printk("htab_address                  = 0x%p\n", htab_address);
416 	printk("htab_hash_mask                = 0x%lx\n", htab_hash_mask);
417 #endif /* CONFIG_PPC_STD_MMU_64 */
418 	if (PHYSICAL_START > 0)
419 		printk("physical_start                = 0x%llx\n",
420 		       (unsigned long long)PHYSICAL_START);
421 	printk("-----------------------------------------------------\n");
422 
423 	DBG(" <- setup_system()\n");
424 }
425 
slb0_limit(void)426 static u64 slb0_limit(void)
427 {
428 	if (cpu_has_feature(CPU_FTR_1T_SEGMENT)) {
429 		return 1UL << SID_SHIFT_1T;
430 	}
431 	return 1UL << SID_SHIFT;
432 }
433 
irqstack_early_init(void)434 static void __init irqstack_early_init(void)
435 {
436 	u64 limit = slb0_limit();
437 	unsigned int i;
438 
439 	/*
440 	 * Interrupt stacks must be in the first segment since we
441 	 * cannot afford to take SLB misses on them.
442 	 */
443 	for_each_possible_cpu(i) {
444 		softirq_ctx[i] = (struct thread_info *)
445 			__va(memblock_alloc_base(THREAD_SIZE,
446 					    THREAD_SIZE, limit));
447 		hardirq_ctx[i] = (struct thread_info *)
448 			__va(memblock_alloc_base(THREAD_SIZE,
449 					    THREAD_SIZE, limit));
450 	}
451 }
452 
453 #ifdef CONFIG_PPC_BOOK3E
exc_lvl_early_init(void)454 static void __init exc_lvl_early_init(void)
455 {
456 	unsigned int i;
457 
458 	for_each_possible_cpu(i) {
459 		critirq_ctx[i] = (struct thread_info *)
460 			__va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
461 		dbgirq_ctx[i] = (struct thread_info *)
462 			__va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
463 		mcheckirq_ctx[i] = (struct thread_info *)
464 			__va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
465 	}
466 }
467 #else
468 #define exc_lvl_early_init()
469 #endif
470 
471 /*
472  * Stack space used when we detect a bad kernel stack pointer, and
473  * early in SMP boots before relocation is enabled.
474  */
emergency_stack_init(void)475 static void __init emergency_stack_init(void)
476 {
477 	u64 limit;
478 	unsigned int i;
479 
480 	/*
481 	 * Emergency stacks must be under 256MB, we cannot afford to take
482 	 * SLB misses on them. The ABI also requires them to be 128-byte
483 	 * aligned.
484 	 *
485 	 * Since we use these as temporary stacks during secondary CPU
486 	 * bringup, we need to get at them in real mode. This means they
487 	 * must also be within the RMO region.
488 	 */
489 	limit = min(slb0_limit(), ppc64_rma_size);
490 
491 	for_each_possible_cpu(i) {
492 		unsigned long sp;
493 		sp  = memblock_alloc_base(THREAD_SIZE, THREAD_SIZE, limit);
494 		sp += THREAD_SIZE;
495 		paca[i].emergency_sp = __va(sp);
496 	}
497 }
498 
499 /*
500  * Called into from start_kernel this initializes bootmem, which is used
501  * to manage page allocation until mem_init is called.
502  */
setup_arch(char ** cmdline_p)503 void __init setup_arch(char **cmdline_p)
504 {
505 	ppc64_boot_msg(0x12, "Setup Arch");
506 
507 	*cmdline_p = cmd_line;
508 
509 	/*
510 	 * Set cache line size based on type of cpu as a default.
511 	 * Systems with OF can look in the properties on the cpu node(s)
512 	 * for a possibly more accurate value.
513 	 */
514 	dcache_bsize = ppc64_caches.dline_size;
515 	icache_bsize = ppc64_caches.iline_size;
516 
517 	/* reboot on panic */
518 	panic_timeout = 180;
519 
520 	if (ppc_md.panic)
521 		setup_panic();
522 
523 	init_mm.start_code = (unsigned long)_stext;
524 	init_mm.end_code = (unsigned long) _etext;
525 	init_mm.end_data = (unsigned long) _edata;
526 	init_mm.brk = klimit;
527 
528 	irqstack_early_init();
529 	exc_lvl_early_init();
530 	emergency_stack_init();
531 
532 #ifdef CONFIG_PPC_STD_MMU_64
533 	stabs_alloc();
534 #endif
535 	/* set up the bootmem stuff with available memory */
536 	do_init_bootmem();
537 	sparse_init();
538 
539 #ifdef CONFIG_DUMMY_CONSOLE
540 	conswitchp = &dummy_con;
541 #endif
542 
543 	if (ppc_md.setup_arch)
544 		ppc_md.setup_arch();
545 
546 	paging_init();
547 
548 	/* Initialize the MMU context management stuff */
549 	mmu_context_init();
550 
551 	ppc64_boot_msg(0x15, "Setup Done");
552 }
553 
554 
555 /* ToDo: do something useful if ppc_md is not yet setup. */
556 #define PPC64_LINUX_FUNCTION 0x0f000000
557 #define PPC64_IPL_MESSAGE 0xc0000000
558 #define PPC64_TERM_MESSAGE 0xb0000000
559 
ppc64_do_msg(unsigned int src,const char * msg)560 static void ppc64_do_msg(unsigned int src, const char *msg)
561 {
562 	if (ppc_md.progress) {
563 		char buf[128];
564 
565 		sprintf(buf, "%08X\n", src);
566 		ppc_md.progress(buf, 0);
567 		snprintf(buf, 128, "%s", msg);
568 		ppc_md.progress(buf, 0);
569 	}
570 }
571 
572 /* Print a boot progress message. */
ppc64_boot_msg(unsigned int src,const char * msg)573 void ppc64_boot_msg(unsigned int src, const char *msg)
574 {
575 	ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg);
576 	printk("[boot]%04x %s\n", src, msg);
577 }
578 
579 #ifdef CONFIG_SMP
580 #define PCPU_DYN_SIZE		()
581 
pcpu_fc_alloc(unsigned int cpu,size_t size,size_t align)582 static void * __init pcpu_fc_alloc(unsigned int cpu, size_t size, size_t align)
583 {
584 	return __alloc_bootmem_node(NODE_DATA(cpu_to_node(cpu)), size, align,
585 				    __pa(MAX_DMA_ADDRESS));
586 }
587 
pcpu_fc_free(void * ptr,size_t size)588 static void __init pcpu_fc_free(void *ptr, size_t size)
589 {
590 	free_bootmem(__pa(ptr), size);
591 }
592 
pcpu_cpu_distance(unsigned int from,unsigned int to)593 static int pcpu_cpu_distance(unsigned int from, unsigned int to)
594 {
595 	if (cpu_to_node(from) == cpu_to_node(to))
596 		return LOCAL_DISTANCE;
597 	else
598 		return REMOTE_DISTANCE;
599 }
600 
601 unsigned long __per_cpu_offset[NR_CPUS] __read_mostly;
602 EXPORT_SYMBOL(__per_cpu_offset);
603 
setup_per_cpu_areas(void)604 void __init setup_per_cpu_areas(void)
605 {
606 	const size_t dyn_size = PERCPU_MODULE_RESERVE + PERCPU_DYNAMIC_RESERVE;
607 	size_t atom_size;
608 	unsigned long delta;
609 	unsigned int cpu;
610 	int rc;
611 
612 	/*
613 	 * Linear mapping is one of 4K, 1M and 16M.  For 4K, no need
614 	 * to group units.  For larger mappings, use 1M atom which
615 	 * should be large enough to contain a number of units.
616 	 */
617 	if (mmu_linear_psize == MMU_PAGE_4K)
618 		atom_size = PAGE_SIZE;
619 	else
620 		atom_size = 1 << 20;
621 
622 	rc = pcpu_embed_first_chunk(0, dyn_size, atom_size, pcpu_cpu_distance,
623 				    pcpu_fc_alloc, pcpu_fc_free);
624 	if (rc < 0)
625 		panic("cannot initialize percpu area (err=%d)", rc);
626 
627 	delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start;
628 	for_each_possible_cpu(cpu) {
629                 __per_cpu_offset[cpu] = delta + pcpu_unit_offsets[cpu];
630 		paca[cpu].data_offset = __per_cpu_offset[cpu];
631 	}
632 }
633 #endif
634 
635 
636 #ifdef CONFIG_PPC_INDIRECT_IO
637 struct ppc_pci_io ppc_pci_io;
638 EXPORT_SYMBOL(ppc_pci_io);
639 #endif /* CONFIG_PPC_INDIRECT_IO */
640 
641