1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * phylink models the MAC to optional PHY connection, supporting
4 * technologies such as SFP cages where the PHY is hot-pluggable.
5 *
6 * Copyright (C) 2015 Russell King
7 */
8 #include <linux/acpi.h>
9 #include <linux/ethtool.h>
10 #include <linux/export.h>
11 #include <linux/gpio/consumer.h>
12 #include <linux/netdevice.h>
13 #include <linux/of.h>
14 #include <linux/of_mdio.h>
15 #include <linux/phy.h>
16 #include <linux/phy_fixed.h>
17 #include <linux/phylink.h>
18 #include <linux/rtnetlink.h>
19 #include <linux/spinlock.h>
20 #include <linux/timer.h>
21 #include <linux/workqueue.h>
22
23 #include "sfp.h"
24 #include "swphy.h"
25
26 #define SUPPORTED_INTERFACES \
27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \
28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane)
29 #define ADVERTISED_INTERFACES \
30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \
31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane)
32
33 enum {
34 PHYLINK_DISABLE_STOPPED,
35 PHYLINK_DISABLE_LINK,
36 PHYLINK_DISABLE_MAC_WOL,
37 };
38
39 /**
40 * struct phylink - internal data type for phylink
41 */
42 struct phylink {
43 /* private: */
44 struct net_device *netdev;
45 const struct phylink_mac_ops *mac_ops;
46 struct phylink_config *config;
47 struct phylink_pcs *pcs;
48 struct device *dev;
49 unsigned int old_link_state:1;
50
51 unsigned long phylink_disable_state; /* bitmask of disables */
52 struct phy_device *phydev;
53 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */
54 u8 cfg_link_an_mode; /* MLO_AN_xxx */
55 u8 cur_link_an_mode;
56 u8 link_port; /* The current non-phy ethtool port */
57 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
58
59 /* The link configuration settings */
60 struct phylink_link_state link_config;
61
62 /* The current settings */
63 phy_interface_t cur_interface;
64
65 struct gpio_desc *link_gpio;
66 unsigned int link_irq;
67 struct timer_list link_poll;
68 void (*get_fixed_state)(struct net_device *dev,
69 struct phylink_link_state *s);
70
71 struct mutex state_mutex;
72 struct phylink_link_state phy_state;
73 struct work_struct resolve;
74
75 bool mac_link_dropped;
76 bool using_mac_select_pcs;
77
78 struct sfp_bus *sfp_bus;
79 bool sfp_may_have_phy;
80 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces);
81 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);
82 u8 sfp_port;
83 };
84
85 #define phylink_printk(level, pl, fmt, ...) \
86 do { \
87 if ((pl)->config->type == PHYLINK_NETDEV) \
88 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
89 else if ((pl)->config->type == PHYLINK_DEV) \
90 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
91 } while (0)
92
93 #define phylink_err(pl, fmt, ...) \
94 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__)
95 #define phylink_warn(pl, fmt, ...) \
96 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__)
97 #define phylink_info(pl, fmt, ...) \
98 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__)
99 #if defined(CONFIG_DYNAMIC_DEBUG)
100 #define phylink_dbg(pl, fmt, ...) \
101 do { \
102 if ((pl)->config->type == PHYLINK_NETDEV) \
103 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \
104 else if ((pl)->config->type == PHYLINK_DEV) \
105 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \
106 } while (0)
107 #elif defined(DEBUG)
108 #define phylink_dbg(pl, fmt, ...) \
109 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__)
110 #else
111 #define phylink_dbg(pl, fmt, ...) \
112 ({ \
113 if (0) \
114 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \
115 })
116 #endif
117
118 /**
119 * phylink_set_port_modes() - set the port type modes in the ethtool mask
120 * @mask: ethtool link mode mask
121 *
122 * Sets all the port type modes in the ethtool mask. MAC drivers should
123 * use this in their 'validate' callback.
124 */
phylink_set_port_modes(unsigned long * mask)125 void phylink_set_port_modes(unsigned long *mask)
126 {
127 phylink_set(mask, TP);
128 phylink_set(mask, AUI);
129 phylink_set(mask, MII);
130 phylink_set(mask, FIBRE);
131 phylink_set(mask, BNC);
132 phylink_set(mask, Backplane);
133 }
134 EXPORT_SYMBOL_GPL(phylink_set_port_modes);
135
phylink_is_empty_linkmode(const unsigned long * linkmode)136 static int phylink_is_empty_linkmode(const unsigned long *linkmode)
137 {
138 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, };
139
140 phylink_set_port_modes(tmp);
141 phylink_set(tmp, Autoneg);
142 phylink_set(tmp, Pause);
143 phylink_set(tmp, Asym_Pause);
144
145 return linkmode_subset(linkmode, tmp);
146 }
147
phylink_an_mode_str(unsigned int mode)148 static const char *phylink_an_mode_str(unsigned int mode)
149 {
150 static const char *modestr[] = {
151 [MLO_AN_PHY] = "phy",
152 [MLO_AN_FIXED] = "fixed",
153 [MLO_AN_INBAND] = "inband",
154 };
155
156 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
157 }
158
159 /**
160 * phylink_interface_max_speed() - get the maximum speed of a phy interface
161 * @interface: phy interface mode defined by &typedef phy_interface_t
162 *
163 * Determine the maximum speed of a phy interface. This is intended to help
164 * determine the correct speed to pass to the MAC when the phy is performing
165 * rate matching.
166 *
167 * Return: The maximum speed of @interface
168 */
phylink_interface_max_speed(phy_interface_t interface)169 static int phylink_interface_max_speed(phy_interface_t interface)
170 {
171 switch (interface) {
172 case PHY_INTERFACE_MODE_100BASEX:
173 case PHY_INTERFACE_MODE_REVRMII:
174 case PHY_INTERFACE_MODE_RMII:
175 case PHY_INTERFACE_MODE_SMII:
176 case PHY_INTERFACE_MODE_REVMII:
177 case PHY_INTERFACE_MODE_MII:
178 return SPEED_100;
179
180 case PHY_INTERFACE_MODE_TBI:
181 case PHY_INTERFACE_MODE_MOCA:
182 case PHY_INTERFACE_MODE_RTBI:
183 case PHY_INTERFACE_MODE_1000BASEX:
184 case PHY_INTERFACE_MODE_1000BASEKX:
185 case PHY_INTERFACE_MODE_TRGMII:
186 case PHY_INTERFACE_MODE_RGMII_TXID:
187 case PHY_INTERFACE_MODE_RGMII_RXID:
188 case PHY_INTERFACE_MODE_RGMII_ID:
189 case PHY_INTERFACE_MODE_RGMII:
190 case PHY_INTERFACE_MODE_QSGMII:
191 case PHY_INTERFACE_MODE_SGMII:
192 case PHY_INTERFACE_MODE_GMII:
193 return SPEED_1000;
194
195 case PHY_INTERFACE_MODE_2500BASEX:
196 return SPEED_2500;
197
198 case PHY_INTERFACE_MODE_5GBASER:
199 return SPEED_5000;
200
201 case PHY_INTERFACE_MODE_XGMII:
202 case PHY_INTERFACE_MODE_RXAUI:
203 case PHY_INTERFACE_MODE_XAUI:
204 case PHY_INTERFACE_MODE_10GBASER:
205 case PHY_INTERFACE_MODE_10GKR:
206 case PHY_INTERFACE_MODE_USXGMII:
207 case PHY_INTERFACE_MODE_QUSGMII:
208 return SPEED_10000;
209
210 case PHY_INTERFACE_MODE_25GBASER:
211 return SPEED_25000;
212
213 case PHY_INTERFACE_MODE_XLGMII:
214 return SPEED_40000;
215
216 case PHY_INTERFACE_MODE_INTERNAL:
217 case PHY_INTERFACE_MODE_NA:
218 case PHY_INTERFACE_MODE_MAX:
219 /* No idea! Garbage in, unknown out */
220 return SPEED_UNKNOWN;
221 }
222
223 /* If we get here, someone forgot to add an interface mode above */
224 WARN_ON_ONCE(1);
225 return SPEED_UNKNOWN;
226 }
227
228 /**
229 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes
230 * @linkmodes: ethtool linkmode mask (must be already initialised)
231 * @caps: bitmask of MAC capabilities
232 *
233 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are
234 * supported by the @caps. @linkmodes must have been initialised previously.
235 */
phylink_caps_to_linkmodes(unsigned long * linkmodes,unsigned long caps)236 void phylink_caps_to_linkmodes(unsigned long *linkmodes, unsigned long caps)
237 {
238 if (caps & MAC_SYM_PAUSE)
239 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes);
240
241 if (caps & MAC_ASYM_PAUSE)
242 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes);
243
244 if (caps & MAC_10HD)
245 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes);
246
247 if (caps & MAC_10FD) {
248 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes);
249 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes);
250 }
251
252 if (caps & MAC_100HD) {
253 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes);
254 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes);
255 }
256
257 if (caps & MAC_100FD) {
258 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes);
259 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes);
260 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes);
261 }
262
263 if (caps & MAC_1000HD)
264 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes);
265
266 if (caps & MAC_1000FD) {
267 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes);
268 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes);
269 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes);
270 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes);
271 }
272
273 if (caps & MAC_2500FD) {
274 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes);
275 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes);
276 }
277
278 if (caps & MAC_5000FD)
279 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes);
280
281 if (caps & MAC_10000FD) {
282 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes);
283 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes);
284 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes);
285 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes);
286 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes);
287 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes);
288 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes);
289 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes);
290 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes);
291 }
292
293 if (caps & MAC_25000FD) {
294 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes);
295 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes);
296 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes);
297 }
298
299 if (caps & MAC_40000FD) {
300 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes);
301 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes);
302 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes);
303 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes);
304 }
305
306 if (caps & MAC_50000FD) {
307 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes);
308 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes);
309 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes);
310 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes);
311 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes);
312 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes);
313 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
314 linkmodes);
315 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes);
316 }
317
318 if (caps & MAC_56000FD) {
319 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes);
320 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes);
321 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes);
322 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes);
323 }
324
325 if (caps & MAC_100000FD) {
326 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes);
327 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes);
328 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes);
329 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
330 linkmodes);
331 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes);
332 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes);
333 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes);
334 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
335 linkmodes);
336 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes);
337 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes);
338 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes);
339 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
340 linkmodes);
341 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes);
342 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes);
343 }
344
345 if (caps & MAC_200000FD) {
346 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes);
347 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes);
348 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
349 linkmodes);
350 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes);
351 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes);
352 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes);
353 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes);
354 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
355 linkmodes);
356 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes);
357 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes);
358 }
359
360 if (caps & MAC_400000FD) {
361 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes);
362 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes);
363 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT,
364 linkmodes);
365 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes);
366 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes);
367 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes);
368 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes);
369 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
370 linkmodes);
371 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes);
372 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes);
373 }
374 }
375 EXPORT_SYMBOL_GPL(phylink_caps_to_linkmodes);
376
377 static struct {
378 unsigned long mask;
379 int speed;
380 unsigned int duplex;
381 } phylink_caps_params[] = {
382 { MAC_400000FD, SPEED_400000, DUPLEX_FULL },
383 { MAC_200000FD, SPEED_200000, DUPLEX_FULL },
384 { MAC_100000FD, SPEED_100000, DUPLEX_FULL },
385 { MAC_56000FD, SPEED_56000, DUPLEX_FULL },
386 { MAC_50000FD, SPEED_50000, DUPLEX_FULL },
387 { MAC_40000FD, SPEED_40000, DUPLEX_FULL },
388 { MAC_25000FD, SPEED_25000, DUPLEX_FULL },
389 { MAC_20000FD, SPEED_20000, DUPLEX_FULL },
390 { MAC_10000FD, SPEED_10000, DUPLEX_FULL },
391 { MAC_5000FD, SPEED_5000, DUPLEX_FULL },
392 { MAC_2500FD, SPEED_2500, DUPLEX_FULL },
393 { MAC_1000FD, SPEED_1000, DUPLEX_FULL },
394 { MAC_1000HD, SPEED_1000, DUPLEX_HALF },
395 { MAC_100FD, SPEED_100, DUPLEX_FULL },
396 { MAC_100HD, SPEED_100, DUPLEX_HALF },
397 { MAC_10FD, SPEED_10, DUPLEX_FULL },
398 { MAC_10HD, SPEED_10, DUPLEX_HALF },
399 };
400
401 /**
402 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex
403 * @speed: the speed to search for
404 * @duplex: the duplex to search for
405 *
406 * Find the mac capability for a given speed and duplex.
407 *
408 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if
409 * there were no matches.
410 */
phylink_cap_from_speed_duplex(int speed,unsigned int duplex)411 static unsigned long phylink_cap_from_speed_duplex(int speed,
412 unsigned int duplex)
413 {
414 int i;
415
416 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) {
417 if (speed == phylink_caps_params[i].speed &&
418 duplex == phylink_caps_params[i].duplex)
419 return phylink_caps_params[i].mask;
420 }
421
422 return 0;
423 }
424
425 /**
426 * phylink_get_capabilities() - get capabilities for a given MAC
427 * @interface: phy interface mode defined by &typedef phy_interface_t
428 * @mac_capabilities: bitmask of MAC capabilities
429 * @rate_matching: type of rate matching being performed
430 *
431 * Get the MAC capabilities that are supported by the @interface mode and
432 * @mac_capabilities.
433 */
phylink_get_capabilities(phy_interface_t interface,unsigned long mac_capabilities,int rate_matching)434 unsigned long phylink_get_capabilities(phy_interface_t interface,
435 unsigned long mac_capabilities,
436 int rate_matching)
437 {
438 int max_speed = phylink_interface_max_speed(interface);
439 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
440 unsigned long matched_caps = 0;
441
442 switch (interface) {
443 case PHY_INTERFACE_MODE_USXGMII:
444 caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD;
445 fallthrough;
446
447 case PHY_INTERFACE_MODE_RGMII_TXID:
448 case PHY_INTERFACE_MODE_RGMII_RXID:
449 case PHY_INTERFACE_MODE_RGMII_ID:
450 case PHY_INTERFACE_MODE_RGMII:
451 case PHY_INTERFACE_MODE_QSGMII:
452 case PHY_INTERFACE_MODE_QUSGMII:
453 case PHY_INTERFACE_MODE_SGMII:
454 case PHY_INTERFACE_MODE_GMII:
455 caps |= MAC_1000HD | MAC_1000FD;
456 fallthrough;
457
458 case PHY_INTERFACE_MODE_REVRMII:
459 case PHY_INTERFACE_MODE_RMII:
460 case PHY_INTERFACE_MODE_SMII:
461 case PHY_INTERFACE_MODE_REVMII:
462 case PHY_INTERFACE_MODE_MII:
463 caps |= MAC_10HD | MAC_10FD;
464 fallthrough;
465
466 case PHY_INTERFACE_MODE_100BASEX:
467 caps |= MAC_100HD | MAC_100FD;
468 break;
469
470 case PHY_INTERFACE_MODE_TBI:
471 case PHY_INTERFACE_MODE_MOCA:
472 case PHY_INTERFACE_MODE_RTBI:
473 case PHY_INTERFACE_MODE_1000BASEX:
474 caps |= MAC_1000HD;
475 fallthrough;
476 case PHY_INTERFACE_MODE_1000BASEKX:
477 case PHY_INTERFACE_MODE_TRGMII:
478 caps |= MAC_1000FD;
479 break;
480
481 case PHY_INTERFACE_MODE_2500BASEX:
482 caps |= MAC_2500FD;
483 break;
484
485 case PHY_INTERFACE_MODE_5GBASER:
486 caps |= MAC_5000FD;
487 break;
488
489 case PHY_INTERFACE_MODE_XGMII:
490 case PHY_INTERFACE_MODE_RXAUI:
491 case PHY_INTERFACE_MODE_XAUI:
492 case PHY_INTERFACE_MODE_10GBASER:
493 case PHY_INTERFACE_MODE_10GKR:
494 caps |= MAC_10000FD;
495 break;
496
497 case PHY_INTERFACE_MODE_25GBASER:
498 caps |= MAC_25000FD;
499 break;
500
501 case PHY_INTERFACE_MODE_XLGMII:
502 caps |= MAC_40000FD;
503 break;
504
505 case PHY_INTERFACE_MODE_INTERNAL:
506 caps |= ~0;
507 break;
508
509 case PHY_INTERFACE_MODE_NA:
510 case PHY_INTERFACE_MODE_MAX:
511 break;
512 }
513
514 switch (rate_matching) {
515 case RATE_MATCH_OPEN_LOOP:
516 /* TODO */
517 fallthrough;
518 case RATE_MATCH_NONE:
519 matched_caps = 0;
520 break;
521 case RATE_MATCH_PAUSE: {
522 /* The MAC must support asymmetric pause towards the local
523 * device for this. We could allow just symmetric pause, but
524 * then we might have to renegotiate if the link partner
525 * doesn't support pause. This is because there's no way to
526 * accept pause frames without transmitting them if we only
527 * support symmetric pause.
528 */
529 if (!(mac_capabilities & MAC_SYM_PAUSE) ||
530 !(mac_capabilities & MAC_ASYM_PAUSE))
531 break;
532
533 /* We can't adapt if the MAC doesn't support the interface's
534 * max speed at full duplex.
535 */
536 if (mac_capabilities &
537 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) {
538 /* Although a duplex-matching phy might exist, we
539 * conservatively remove these modes because the MAC
540 * will not be aware of the half-duplex nature of the
541 * link.
542 */
543 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
544 matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD);
545 }
546 break;
547 }
548 case RATE_MATCH_CRS:
549 /* The MAC must support half duplex at the interface's max
550 * speed.
551 */
552 if (mac_capabilities &
553 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) {
554 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
555 matched_caps &= mac_capabilities;
556 }
557 break;
558 }
559
560 return (caps & mac_capabilities) | matched_caps;
561 }
562 EXPORT_SYMBOL_GPL(phylink_get_capabilities);
563
564 /**
565 * phylink_generic_validate() - generic validate() callback implementation
566 * @config: a pointer to a &struct phylink_config.
567 * @supported: ethtool bitmask for supported link modes.
568 * @state: a pointer to a &struct phylink_link_state.
569 *
570 * Generic implementation of the validate() callback that MAC drivers can
571 * use when they pass the range of supported interfaces and MAC capabilities.
572 * This makes use of phylink_get_linkmodes().
573 */
phylink_generic_validate(struct phylink_config * config,unsigned long * supported,struct phylink_link_state * state)574 void phylink_generic_validate(struct phylink_config *config,
575 unsigned long *supported,
576 struct phylink_link_state *state)
577 {
578 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
579 unsigned long caps;
580
581 phylink_set_port_modes(mask);
582 phylink_set(mask, Autoneg);
583 caps = phylink_get_capabilities(state->interface,
584 config->mac_capabilities,
585 state->rate_matching);
586 phylink_caps_to_linkmodes(mask, caps);
587
588 linkmode_and(supported, supported, mask);
589 linkmode_and(state->advertising, state->advertising, mask);
590 }
591 EXPORT_SYMBOL_GPL(phylink_generic_validate);
592
phylink_validate_mac_and_pcs(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state)593 static int phylink_validate_mac_and_pcs(struct phylink *pl,
594 unsigned long *supported,
595 struct phylink_link_state *state)
596 {
597 struct phylink_pcs *pcs;
598 int ret;
599
600 /* Get the PCS for this interface mode */
601 if (pl->using_mac_select_pcs) {
602 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
603 if (IS_ERR(pcs))
604 return PTR_ERR(pcs);
605 } else {
606 pcs = pl->pcs;
607 }
608
609 if (pcs) {
610 /* The PCS, if present, must be setup before phylink_create()
611 * has been called. If the ops is not initialised, print an
612 * error and backtrace rather than oopsing the kernel.
613 */
614 if (!pcs->ops) {
615 phylink_err(pl, "interface %s: uninitialised PCS\n",
616 phy_modes(state->interface));
617 dump_stack();
618 return -EINVAL;
619 }
620
621 /* Validate the link parameters with the PCS */
622 if (pcs->ops->pcs_validate) {
623 ret = pcs->ops->pcs_validate(pcs, supported, state);
624 if (ret < 0 || phylink_is_empty_linkmode(supported))
625 return -EINVAL;
626
627 /* Ensure the advertising mask is a subset of the
628 * supported mask.
629 */
630 linkmode_and(state->advertising, state->advertising,
631 supported);
632 }
633 }
634
635 /* Then validate the link parameters with the MAC */
636 pl->mac_ops->validate(pl->config, supported, state);
637
638 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
639 }
640
phylink_validate_mask(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state,const unsigned long * interfaces)641 static int phylink_validate_mask(struct phylink *pl, unsigned long *supported,
642 struct phylink_link_state *state,
643 const unsigned long *interfaces)
644 {
645 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, };
646 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, };
647 __ETHTOOL_DECLARE_LINK_MODE_MASK(s);
648 struct phylink_link_state t;
649 int intf;
650
651 for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) {
652 if (test_bit(intf, interfaces)) {
653 linkmode_copy(s, supported);
654
655 t = *state;
656 t.interface = intf;
657 if (!phylink_validate_mac_and_pcs(pl, s, &t)) {
658 linkmode_or(all_s, all_s, s);
659 linkmode_or(all_adv, all_adv, t.advertising);
660 }
661 }
662 }
663
664 linkmode_copy(supported, all_s);
665 linkmode_copy(state->advertising, all_adv);
666
667 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
668 }
669
phylink_validate(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state)670 static int phylink_validate(struct phylink *pl, unsigned long *supported,
671 struct phylink_link_state *state)
672 {
673 const unsigned long *interfaces = pl->config->supported_interfaces;
674
675 if (!phy_interface_empty(interfaces)) {
676 if (state->interface == PHY_INTERFACE_MODE_NA)
677 return phylink_validate_mask(pl, supported, state,
678 interfaces);
679
680 if (!test_bit(state->interface, interfaces))
681 return -EINVAL;
682 }
683
684 return phylink_validate_mac_and_pcs(pl, supported, state);
685 }
686
phylink_parse_fixedlink(struct phylink * pl,struct fwnode_handle * fwnode)687 static int phylink_parse_fixedlink(struct phylink *pl,
688 struct fwnode_handle *fwnode)
689 {
690 struct fwnode_handle *fixed_node;
691 const struct phy_setting *s;
692 struct gpio_desc *desc;
693 u32 speed;
694 int ret;
695
696 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link");
697 if (fixed_node) {
698 ret = fwnode_property_read_u32(fixed_node, "speed", &speed);
699
700 pl->link_config.speed = speed;
701 pl->link_config.duplex = DUPLEX_HALF;
702
703 if (fwnode_property_read_bool(fixed_node, "full-duplex"))
704 pl->link_config.duplex = DUPLEX_FULL;
705
706 /* We treat the "pause" and "asym-pause" terminology as
707 * defining the link partner's ability.
708 */
709 if (fwnode_property_read_bool(fixed_node, "pause"))
710 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
711 pl->link_config.lp_advertising);
712 if (fwnode_property_read_bool(fixed_node, "asym-pause"))
713 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
714 pl->link_config.lp_advertising);
715
716 if (ret == 0) {
717 desc = fwnode_gpiod_get_index(fixed_node, "link", 0,
718 GPIOD_IN, "?");
719
720 if (!IS_ERR(desc))
721 pl->link_gpio = desc;
722 else if (desc == ERR_PTR(-EPROBE_DEFER))
723 ret = -EPROBE_DEFER;
724 }
725 fwnode_handle_put(fixed_node);
726
727 if (ret)
728 return ret;
729 } else {
730 u32 prop[5];
731
732 ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
733 NULL, 0);
734 if (ret != ARRAY_SIZE(prop)) {
735 phylink_err(pl, "broken fixed-link?\n");
736 return -EINVAL;
737 }
738
739 ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
740 prop, ARRAY_SIZE(prop));
741 if (!ret) {
742 pl->link_config.duplex = prop[1] ?
743 DUPLEX_FULL : DUPLEX_HALF;
744 pl->link_config.speed = prop[2];
745 if (prop[3])
746 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
747 pl->link_config.lp_advertising);
748 if (prop[4])
749 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
750 pl->link_config.lp_advertising);
751 }
752 }
753
754 if (pl->link_config.speed > SPEED_1000 &&
755 pl->link_config.duplex != DUPLEX_FULL)
756 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n",
757 pl->link_config.speed);
758
759 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
760 linkmode_copy(pl->link_config.advertising, pl->supported);
761 phylink_validate(pl, pl->supported, &pl->link_config);
762
763 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex,
764 pl->supported, true);
765 linkmode_zero(pl->supported);
766 phylink_set(pl->supported, MII);
767 phylink_set(pl->supported, Pause);
768 phylink_set(pl->supported, Asym_Pause);
769 phylink_set(pl->supported, Autoneg);
770 if (s) {
771 __set_bit(s->bit, pl->supported);
772 __set_bit(s->bit, pl->link_config.lp_advertising);
773 } else {
774 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n",
775 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half",
776 pl->link_config.speed);
777 }
778
779 linkmode_and(pl->link_config.advertising, pl->link_config.advertising,
780 pl->supported);
781
782 pl->link_config.link = 1;
783 pl->link_config.an_complete = 1;
784
785 return 0;
786 }
787
phylink_parse_mode(struct phylink * pl,struct fwnode_handle * fwnode)788 static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode)
789 {
790 struct fwnode_handle *dn;
791 const char *managed;
792
793 dn = fwnode_get_named_child_node(fwnode, "fixed-link");
794 if (dn || fwnode_property_present(fwnode, "fixed-link"))
795 pl->cfg_link_an_mode = MLO_AN_FIXED;
796 fwnode_handle_put(dn);
797
798 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 &&
799 strcmp(managed, "in-band-status") == 0) ||
800 pl->config->ovr_an_inband) {
801 if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
802 phylink_err(pl,
803 "can't use both fixed-link and in-band-status\n");
804 return -EINVAL;
805 }
806
807 linkmode_zero(pl->supported);
808 phylink_set(pl->supported, MII);
809 phylink_set(pl->supported, Autoneg);
810 phylink_set(pl->supported, Asym_Pause);
811 phylink_set(pl->supported, Pause);
812 pl->link_config.an_enabled = true;
813 pl->cfg_link_an_mode = MLO_AN_INBAND;
814
815 switch (pl->link_config.interface) {
816 case PHY_INTERFACE_MODE_SGMII:
817 case PHY_INTERFACE_MODE_QSGMII:
818 case PHY_INTERFACE_MODE_QUSGMII:
819 case PHY_INTERFACE_MODE_RGMII:
820 case PHY_INTERFACE_MODE_RGMII_ID:
821 case PHY_INTERFACE_MODE_RGMII_RXID:
822 case PHY_INTERFACE_MODE_RGMII_TXID:
823 case PHY_INTERFACE_MODE_RTBI:
824 phylink_set(pl->supported, 10baseT_Half);
825 phylink_set(pl->supported, 10baseT_Full);
826 phylink_set(pl->supported, 100baseT_Half);
827 phylink_set(pl->supported, 100baseT_Full);
828 phylink_set(pl->supported, 1000baseT_Half);
829 phylink_set(pl->supported, 1000baseT_Full);
830 break;
831
832 case PHY_INTERFACE_MODE_1000BASEX:
833 phylink_set(pl->supported, 1000baseX_Full);
834 break;
835
836 case PHY_INTERFACE_MODE_2500BASEX:
837 phylink_set(pl->supported, 2500baseX_Full);
838 break;
839
840 case PHY_INTERFACE_MODE_5GBASER:
841 phylink_set(pl->supported, 5000baseT_Full);
842 break;
843
844 case PHY_INTERFACE_MODE_25GBASER:
845 phylink_set(pl->supported, 25000baseCR_Full);
846 phylink_set(pl->supported, 25000baseKR_Full);
847 phylink_set(pl->supported, 25000baseSR_Full);
848 fallthrough;
849 case PHY_INTERFACE_MODE_USXGMII:
850 case PHY_INTERFACE_MODE_10GKR:
851 case PHY_INTERFACE_MODE_10GBASER:
852 phylink_set(pl->supported, 10baseT_Half);
853 phylink_set(pl->supported, 10baseT_Full);
854 phylink_set(pl->supported, 100baseT_Half);
855 phylink_set(pl->supported, 100baseT_Full);
856 phylink_set(pl->supported, 1000baseT_Half);
857 phylink_set(pl->supported, 1000baseT_Full);
858 phylink_set(pl->supported, 1000baseX_Full);
859 phylink_set(pl->supported, 1000baseKX_Full);
860 phylink_set(pl->supported, 2500baseT_Full);
861 phylink_set(pl->supported, 2500baseX_Full);
862 phylink_set(pl->supported, 5000baseT_Full);
863 phylink_set(pl->supported, 10000baseT_Full);
864 phylink_set(pl->supported, 10000baseKR_Full);
865 phylink_set(pl->supported, 10000baseKX4_Full);
866 phylink_set(pl->supported, 10000baseCR_Full);
867 phylink_set(pl->supported, 10000baseSR_Full);
868 phylink_set(pl->supported, 10000baseLR_Full);
869 phylink_set(pl->supported, 10000baseLRM_Full);
870 phylink_set(pl->supported, 10000baseER_Full);
871 break;
872
873 case PHY_INTERFACE_MODE_XLGMII:
874 phylink_set(pl->supported, 25000baseCR_Full);
875 phylink_set(pl->supported, 25000baseKR_Full);
876 phylink_set(pl->supported, 25000baseSR_Full);
877 phylink_set(pl->supported, 40000baseKR4_Full);
878 phylink_set(pl->supported, 40000baseCR4_Full);
879 phylink_set(pl->supported, 40000baseSR4_Full);
880 phylink_set(pl->supported, 40000baseLR4_Full);
881 phylink_set(pl->supported, 50000baseCR2_Full);
882 phylink_set(pl->supported, 50000baseKR2_Full);
883 phylink_set(pl->supported, 50000baseSR2_Full);
884 phylink_set(pl->supported, 50000baseKR_Full);
885 phylink_set(pl->supported, 50000baseSR_Full);
886 phylink_set(pl->supported, 50000baseCR_Full);
887 phylink_set(pl->supported, 50000baseLR_ER_FR_Full);
888 phylink_set(pl->supported, 50000baseDR_Full);
889 phylink_set(pl->supported, 100000baseKR4_Full);
890 phylink_set(pl->supported, 100000baseSR4_Full);
891 phylink_set(pl->supported, 100000baseCR4_Full);
892 phylink_set(pl->supported, 100000baseLR4_ER4_Full);
893 phylink_set(pl->supported, 100000baseKR2_Full);
894 phylink_set(pl->supported, 100000baseSR2_Full);
895 phylink_set(pl->supported, 100000baseCR2_Full);
896 phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full);
897 phylink_set(pl->supported, 100000baseDR2_Full);
898 break;
899
900 default:
901 phylink_err(pl,
902 "incorrect link mode %s for in-band status\n",
903 phy_modes(pl->link_config.interface));
904 return -EINVAL;
905 }
906
907 linkmode_copy(pl->link_config.advertising, pl->supported);
908
909 if (phylink_validate(pl, pl->supported, &pl->link_config)) {
910 phylink_err(pl,
911 "failed to validate link configuration for in-band status\n");
912 return -EINVAL;
913 }
914
915 /* Check if MAC/PCS also supports Autoneg. */
916 pl->link_config.an_enabled = phylink_test(pl->supported, Autoneg);
917 }
918
919 return 0;
920 }
921
phylink_apply_manual_flow(struct phylink * pl,struct phylink_link_state * state)922 static void phylink_apply_manual_flow(struct phylink *pl,
923 struct phylink_link_state *state)
924 {
925 /* If autoneg is disabled, pause AN is also disabled */
926 if (!state->an_enabled)
927 state->pause &= ~MLO_PAUSE_AN;
928
929 /* Manual configuration of pause modes */
930 if (!(pl->link_config.pause & MLO_PAUSE_AN))
931 state->pause = pl->link_config.pause;
932 }
933
phylink_resolve_flow(struct phylink_link_state * state)934 static void phylink_resolve_flow(struct phylink_link_state *state)
935 {
936 bool tx_pause, rx_pause;
937
938 state->pause = MLO_PAUSE_NONE;
939 if (state->duplex == DUPLEX_FULL) {
940 linkmode_resolve_pause(state->advertising,
941 state->lp_advertising,
942 &tx_pause, &rx_pause);
943 if (tx_pause)
944 state->pause |= MLO_PAUSE_TX;
945 if (rx_pause)
946 state->pause |= MLO_PAUSE_RX;
947 }
948 }
949
phylink_pcs_poll_stop(struct phylink * pl)950 static void phylink_pcs_poll_stop(struct phylink *pl)
951 {
952 if (pl->cfg_link_an_mode == MLO_AN_INBAND)
953 del_timer(&pl->link_poll);
954 }
955
phylink_pcs_poll_start(struct phylink * pl)956 static void phylink_pcs_poll_start(struct phylink *pl)
957 {
958 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND)
959 mod_timer(&pl->link_poll, jiffies + HZ);
960 }
961
phylink_mac_config(struct phylink * pl,const struct phylink_link_state * state)962 static void phylink_mac_config(struct phylink *pl,
963 const struct phylink_link_state *state)
964 {
965 phylink_dbg(pl,
966 "%s: mode=%s/%s/%s/%s/%s adv=%*pb pause=%02x link=%u an=%u\n",
967 __func__, phylink_an_mode_str(pl->cur_link_an_mode),
968 phy_modes(state->interface),
969 phy_speed_to_str(state->speed),
970 phy_duplex_to_str(state->duplex),
971 phy_rate_matching_to_str(state->rate_matching),
972 __ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising,
973 state->pause, state->link, state->an_enabled);
974
975 pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, state);
976 }
977
phylink_mac_pcs_an_restart(struct phylink * pl)978 static void phylink_mac_pcs_an_restart(struct phylink *pl)
979 {
980 if (pl->link_config.an_enabled &&
981 phy_interface_mode_is_8023z(pl->link_config.interface) &&
982 phylink_autoneg_inband(pl->cur_link_an_mode)) {
983 if (pl->pcs)
984 pl->pcs->ops->pcs_an_restart(pl->pcs);
985 else if (pl->config->legacy_pre_march2020)
986 pl->mac_ops->mac_an_restart(pl->config);
987 }
988 }
989
phylink_major_config(struct phylink * pl,bool restart,const struct phylink_link_state * state)990 static void phylink_major_config(struct phylink *pl, bool restart,
991 const struct phylink_link_state *state)
992 {
993 struct phylink_pcs *pcs = NULL;
994 bool pcs_changed = false;
995 int err;
996
997 phylink_dbg(pl, "major config %s\n", phy_modes(state->interface));
998
999 if (pl->using_mac_select_pcs) {
1000 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
1001 if (IS_ERR(pcs)) {
1002 phylink_err(pl,
1003 "mac_select_pcs unexpectedly failed: %pe\n",
1004 pcs);
1005 return;
1006 }
1007
1008 pcs_changed = pcs && pl->pcs != pcs;
1009 }
1010
1011 phylink_pcs_poll_stop(pl);
1012
1013 if (pl->mac_ops->mac_prepare) {
1014 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode,
1015 state->interface);
1016 if (err < 0) {
1017 phylink_err(pl, "mac_prepare failed: %pe\n",
1018 ERR_PTR(err));
1019 return;
1020 }
1021 }
1022
1023 /* If we have a new PCS, switch to the new PCS after preparing the MAC
1024 * for the change.
1025 */
1026 if (pcs_changed)
1027 pl->pcs = pcs;
1028
1029 phylink_mac_config(pl, state);
1030
1031 if (pl->pcs) {
1032 err = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode,
1033 state->interface,
1034 state->advertising,
1035 !!(pl->link_config.pause &
1036 MLO_PAUSE_AN));
1037 if (err < 0)
1038 phylink_err(pl, "pcs_config failed: %pe\n",
1039 ERR_PTR(err));
1040 if (err > 0)
1041 restart = true;
1042 }
1043 if (restart)
1044 phylink_mac_pcs_an_restart(pl);
1045
1046 if (pl->mac_ops->mac_finish) {
1047 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode,
1048 state->interface);
1049 if (err < 0)
1050 phylink_err(pl, "mac_finish failed: %pe\n",
1051 ERR_PTR(err));
1052 }
1053
1054 phylink_pcs_poll_start(pl);
1055 }
1056
1057 /*
1058 * Reconfigure for a change of inband advertisement.
1059 * If we have a separate PCS, we only need to call its pcs_config() method,
1060 * and then restart AN if it indicates something changed. Otherwise, we do
1061 * the full MAC reconfiguration.
1062 */
phylink_change_inband_advert(struct phylink * pl)1063 static int phylink_change_inband_advert(struct phylink *pl)
1064 {
1065 int ret;
1066
1067 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1068 return 0;
1069
1070 if (!pl->pcs && pl->config->legacy_pre_march2020) {
1071 /* Legacy method */
1072 phylink_mac_config(pl, &pl->link_config);
1073 phylink_mac_pcs_an_restart(pl);
1074 return 0;
1075 }
1076
1077 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,
1078 phylink_an_mode_str(pl->cur_link_an_mode),
1079 phy_modes(pl->link_config.interface),
1080 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising,
1081 pl->link_config.pause);
1082
1083 /* Modern PCS-based method; update the advert at the PCS, and
1084 * restart negotiation if the pcs_config() helper indicates that
1085 * the programmed advertisement has changed.
1086 */
1087 ret = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode,
1088 pl->link_config.interface,
1089 pl->link_config.advertising,
1090 !!(pl->link_config.pause &
1091 MLO_PAUSE_AN));
1092 if (ret < 0)
1093 return ret;
1094
1095 if (ret > 0)
1096 phylink_mac_pcs_an_restart(pl);
1097
1098 return 0;
1099 }
1100
phylink_mac_pcs_get_state(struct phylink * pl,struct phylink_link_state * state)1101 static void phylink_mac_pcs_get_state(struct phylink *pl,
1102 struct phylink_link_state *state)
1103 {
1104 linkmode_copy(state->advertising, pl->link_config.advertising);
1105 linkmode_zero(state->lp_advertising);
1106 state->interface = pl->link_config.interface;
1107 state->an_enabled = pl->link_config.an_enabled;
1108 state->rate_matching = pl->link_config.rate_matching;
1109 if (state->an_enabled) {
1110 state->speed = SPEED_UNKNOWN;
1111 state->duplex = DUPLEX_UNKNOWN;
1112 state->pause = MLO_PAUSE_NONE;
1113 } else {
1114 state->speed = pl->link_config.speed;
1115 state->duplex = pl->link_config.duplex;
1116 state->pause = pl->link_config.pause;
1117 }
1118 state->an_complete = 0;
1119 state->link = 1;
1120
1121 if (pl->pcs)
1122 pl->pcs->ops->pcs_get_state(pl->pcs, state);
1123 else if (pl->mac_ops->mac_pcs_get_state &&
1124 pl->config->legacy_pre_march2020)
1125 pl->mac_ops->mac_pcs_get_state(pl->config, state);
1126 else
1127 state->link = 0;
1128 }
1129
1130 /* The fixed state is... fixed except for the link state,
1131 * which may be determined by a GPIO or a callback.
1132 */
phylink_get_fixed_state(struct phylink * pl,struct phylink_link_state * state)1133 static void phylink_get_fixed_state(struct phylink *pl,
1134 struct phylink_link_state *state)
1135 {
1136 *state = pl->link_config;
1137 if (pl->config->get_fixed_state)
1138 pl->config->get_fixed_state(pl->config, state);
1139 else if (pl->link_gpio)
1140 state->link = !!gpiod_get_value_cansleep(pl->link_gpio);
1141
1142 phylink_resolve_flow(state);
1143 }
1144
phylink_mac_initial_config(struct phylink * pl,bool force_restart)1145 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)
1146 {
1147 struct phylink_link_state link_state;
1148
1149 switch (pl->cur_link_an_mode) {
1150 case MLO_AN_PHY:
1151 link_state = pl->phy_state;
1152 break;
1153
1154 case MLO_AN_FIXED:
1155 phylink_get_fixed_state(pl, &link_state);
1156 break;
1157
1158 case MLO_AN_INBAND:
1159 link_state = pl->link_config;
1160 if (link_state.interface == PHY_INTERFACE_MODE_SGMII)
1161 link_state.pause = MLO_PAUSE_NONE;
1162 break;
1163
1164 default: /* can't happen */
1165 return;
1166 }
1167
1168 link_state.link = false;
1169
1170 phylink_apply_manual_flow(pl, &link_state);
1171 phylink_major_config(pl, force_restart, &link_state);
1172 }
1173
phylink_pause_to_str(int pause)1174 static const char *phylink_pause_to_str(int pause)
1175 {
1176 switch (pause & MLO_PAUSE_TXRX_MASK) {
1177 case MLO_PAUSE_TX | MLO_PAUSE_RX:
1178 return "rx/tx";
1179 case MLO_PAUSE_TX:
1180 return "tx";
1181 case MLO_PAUSE_RX:
1182 return "rx";
1183 default:
1184 return "off";
1185 }
1186 }
1187
phylink_link_up(struct phylink * pl,struct phylink_link_state link_state)1188 static void phylink_link_up(struct phylink *pl,
1189 struct phylink_link_state link_state)
1190 {
1191 struct net_device *ndev = pl->netdev;
1192 int speed, duplex;
1193 bool rx_pause;
1194
1195 speed = link_state.speed;
1196 duplex = link_state.duplex;
1197 rx_pause = !!(link_state.pause & MLO_PAUSE_RX);
1198
1199 switch (link_state.rate_matching) {
1200 case RATE_MATCH_PAUSE:
1201 /* The PHY is doing rate matchion from the media rate (in
1202 * the link_state) to the interface speed, and will send
1203 * pause frames to the MAC to limit its transmission speed.
1204 */
1205 speed = phylink_interface_max_speed(link_state.interface);
1206 duplex = DUPLEX_FULL;
1207 rx_pause = true;
1208 break;
1209
1210 case RATE_MATCH_CRS:
1211 /* The PHY is doing rate matchion from the media rate (in
1212 * the link_state) to the interface speed, and will cause
1213 * collisions to the MAC to limit its transmission speed.
1214 */
1215 speed = phylink_interface_max_speed(link_state.interface);
1216 duplex = DUPLEX_HALF;
1217 break;
1218 }
1219
1220 pl->cur_interface = link_state.interface;
1221
1222 if (pl->pcs && pl->pcs->ops->pcs_link_up)
1223 pl->pcs->ops->pcs_link_up(pl->pcs, pl->cur_link_an_mode,
1224 pl->cur_interface, speed, duplex);
1225
1226 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode,
1227 pl->cur_interface, speed, duplex,
1228 !!(link_state.pause & MLO_PAUSE_TX), rx_pause);
1229
1230 if (ndev)
1231 netif_carrier_on(ndev);
1232
1233 phylink_info(pl,
1234 "Link is Up - %s/%s - flow control %s\n",
1235 phy_speed_to_str(link_state.speed),
1236 phy_duplex_to_str(link_state.duplex),
1237 phylink_pause_to_str(link_state.pause));
1238 }
1239
phylink_link_down(struct phylink * pl)1240 static void phylink_link_down(struct phylink *pl)
1241 {
1242 struct net_device *ndev = pl->netdev;
1243
1244 if (ndev)
1245 netif_carrier_off(ndev);
1246 pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode,
1247 pl->cur_interface);
1248 phylink_info(pl, "Link is Down\n");
1249 }
1250
phylink_resolve(struct work_struct * w)1251 static void phylink_resolve(struct work_struct *w)
1252 {
1253 struct phylink *pl = container_of(w, struct phylink, resolve);
1254 struct phylink_link_state link_state;
1255 struct net_device *ndev = pl->netdev;
1256 bool mac_config = false;
1257 bool retrigger = false;
1258 bool cur_link_state;
1259
1260 mutex_lock(&pl->state_mutex);
1261 if (pl->netdev)
1262 cur_link_state = netif_carrier_ok(ndev);
1263 else
1264 cur_link_state = pl->old_link_state;
1265
1266 if (pl->phylink_disable_state) {
1267 pl->mac_link_dropped = false;
1268 link_state.link = false;
1269 } else if (pl->mac_link_dropped) {
1270 link_state.link = false;
1271 retrigger = true;
1272 } else {
1273 switch (pl->cur_link_an_mode) {
1274 case MLO_AN_PHY:
1275 link_state = pl->phy_state;
1276 phylink_apply_manual_flow(pl, &link_state);
1277 mac_config = link_state.link;
1278 break;
1279
1280 case MLO_AN_FIXED:
1281 phylink_get_fixed_state(pl, &link_state);
1282 mac_config = link_state.link;
1283 break;
1284
1285 case MLO_AN_INBAND:
1286 phylink_mac_pcs_get_state(pl, &link_state);
1287
1288 /* The PCS may have a latching link-fail indicator.
1289 * If the link was up, bring the link down and
1290 * re-trigger the resolve. Otherwise, re-read the
1291 * PCS state to get the current status of the link.
1292 */
1293 if (!link_state.link) {
1294 if (cur_link_state)
1295 retrigger = true;
1296 else
1297 phylink_mac_pcs_get_state(pl,
1298 &link_state);
1299 }
1300
1301 /* If we have a phy, the "up" state is the union of
1302 * both the PHY and the MAC
1303 */
1304 if (pl->phydev)
1305 link_state.link &= pl->phy_state.link;
1306
1307 /* Only update if the PHY link is up */
1308 if (pl->phydev && pl->phy_state.link) {
1309 /* If the interface has changed, force a
1310 * link down event if the link isn't already
1311 * down, and re-resolve.
1312 */
1313 if (link_state.interface !=
1314 pl->phy_state.interface) {
1315 retrigger = true;
1316 link_state.link = false;
1317 }
1318 link_state.interface = pl->phy_state.interface;
1319
1320 /* If we are doing rate matching, then the
1321 * link speed/duplex comes from the PHY
1322 */
1323 if (pl->phy_state.rate_matching) {
1324 link_state.rate_matching =
1325 pl->phy_state.rate_matching;
1326 link_state.speed = pl->phy_state.speed;
1327 link_state.duplex =
1328 pl->phy_state.duplex;
1329 }
1330
1331 /* If we have a PHY, we need to update with
1332 * the PHY flow control bits.
1333 */
1334 link_state.pause = pl->phy_state.pause;
1335 mac_config = true;
1336 }
1337 phylink_apply_manual_flow(pl, &link_state);
1338 break;
1339 }
1340 }
1341
1342 if (mac_config) {
1343 if (link_state.interface != pl->link_config.interface) {
1344 /* The interface has changed, force the link down and
1345 * then reconfigure.
1346 */
1347 if (cur_link_state) {
1348 phylink_link_down(pl);
1349 cur_link_state = false;
1350 }
1351 phylink_major_config(pl, false, &link_state);
1352 pl->link_config.interface = link_state.interface;
1353 } else if (!pl->pcs && pl->config->legacy_pre_march2020) {
1354 /* The interface remains unchanged, only the speed,
1355 * duplex or pause settings have changed. Call the
1356 * old mac_config() method to configure the MAC/PCS
1357 * only if we do not have a legacy MAC driver.
1358 */
1359 phylink_mac_config(pl, &link_state);
1360 }
1361 }
1362
1363 if (link_state.link != cur_link_state) {
1364 pl->old_link_state = link_state.link;
1365 if (!link_state.link)
1366 phylink_link_down(pl);
1367 else
1368 phylink_link_up(pl, link_state);
1369 }
1370 if (!link_state.link && retrigger) {
1371 pl->mac_link_dropped = false;
1372 queue_work(system_power_efficient_wq, &pl->resolve);
1373 }
1374 mutex_unlock(&pl->state_mutex);
1375 }
1376
phylink_run_resolve(struct phylink * pl)1377 static void phylink_run_resolve(struct phylink *pl)
1378 {
1379 if (!pl->phylink_disable_state)
1380 queue_work(system_power_efficient_wq, &pl->resolve);
1381 }
1382
phylink_run_resolve_and_disable(struct phylink * pl,int bit)1383 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit)
1384 {
1385 unsigned long state = pl->phylink_disable_state;
1386
1387 set_bit(bit, &pl->phylink_disable_state);
1388 if (state == 0) {
1389 queue_work(system_power_efficient_wq, &pl->resolve);
1390 flush_work(&pl->resolve);
1391 }
1392 }
1393
phylink_enable_and_run_resolve(struct phylink * pl,int bit)1394 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit)
1395 {
1396 clear_bit(bit, &pl->phylink_disable_state);
1397 phylink_run_resolve(pl);
1398 }
1399
phylink_fixed_poll(struct timer_list * t)1400 static void phylink_fixed_poll(struct timer_list *t)
1401 {
1402 struct phylink *pl = container_of(t, struct phylink, link_poll);
1403
1404 mod_timer(t, jiffies + HZ);
1405
1406 phylink_run_resolve(pl);
1407 }
1408
1409 static const struct sfp_upstream_ops sfp_phylink_ops;
1410
phylink_register_sfp(struct phylink * pl,struct fwnode_handle * fwnode)1411 static int phylink_register_sfp(struct phylink *pl,
1412 struct fwnode_handle *fwnode)
1413 {
1414 struct sfp_bus *bus;
1415 int ret;
1416
1417 if (!fwnode)
1418 return 0;
1419
1420 bus = sfp_bus_find_fwnode(fwnode);
1421 if (IS_ERR(bus)) {
1422 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus);
1423 return PTR_ERR(bus);
1424 }
1425
1426 pl->sfp_bus = bus;
1427
1428 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops);
1429 sfp_bus_put(bus);
1430
1431 return ret;
1432 }
1433
1434 /**
1435 * phylink_create() - create a phylink instance
1436 * @config: a pointer to the target &struct phylink_config
1437 * @fwnode: a pointer to a &struct fwnode_handle describing the network
1438 * interface
1439 * @iface: the desired link mode defined by &typedef phy_interface_t
1440 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC.
1441 *
1442 * Create a new phylink instance, and parse the link parameters found in @np.
1443 * This will parse in-band modes, fixed-link or SFP configuration.
1444 *
1445 * Note: the rtnl lock must not be held when calling this function.
1446 *
1447 * Returns a pointer to a &struct phylink, or an error-pointer value. Users
1448 * must use IS_ERR() to check for errors from this function.
1449 */
phylink_create(struct phylink_config * config,struct fwnode_handle * fwnode,phy_interface_t iface,const struct phylink_mac_ops * mac_ops)1450 struct phylink *phylink_create(struct phylink_config *config,
1451 struct fwnode_handle *fwnode,
1452 phy_interface_t iface,
1453 const struct phylink_mac_ops *mac_ops)
1454 {
1455 bool using_mac_select_pcs = false;
1456 struct phylink *pl;
1457 int ret;
1458
1459 if (mac_ops->mac_select_pcs &&
1460 mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) !=
1461 ERR_PTR(-EOPNOTSUPP))
1462 using_mac_select_pcs = true;
1463
1464 /* Validate the supplied configuration */
1465 if (using_mac_select_pcs &&
1466 phy_interface_empty(config->supported_interfaces)) {
1467 dev_err(config->dev,
1468 "phylink: error: empty supported_interfaces but mac_select_pcs() method present\n");
1469 return ERR_PTR(-EINVAL);
1470 }
1471
1472 pl = kzalloc(sizeof(*pl), GFP_KERNEL);
1473 if (!pl)
1474 return ERR_PTR(-ENOMEM);
1475
1476 mutex_init(&pl->state_mutex);
1477 INIT_WORK(&pl->resolve, phylink_resolve);
1478
1479 pl->config = config;
1480 if (config->type == PHYLINK_NETDEV) {
1481 pl->netdev = to_net_dev(config->dev);
1482 } else if (config->type == PHYLINK_DEV) {
1483 pl->dev = config->dev;
1484 } else {
1485 kfree(pl);
1486 return ERR_PTR(-EINVAL);
1487 }
1488
1489 pl->using_mac_select_pcs = using_mac_select_pcs;
1490 pl->phy_state.interface = iface;
1491 pl->link_interface = iface;
1492 if (iface == PHY_INTERFACE_MODE_MOCA)
1493 pl->link_port = PORT_BNC;
1494 else
1495 pl->link_port = PORT_MII;
1496 pl->link_config.interface = iface;
1497 pl->link_config.pause = MLO_PAUSE_AN;
1498 pl->link_config.speed = SPEED_UNKNOWN;
1499 pl->link_config.duplex = DUPLEX_UNKNOWN;
1500 pl->link_config.an_enabled = true;
1501 pl->mac_ops = mac_ops;
1502 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
1503 timer_setup(&pl->link_poll, phylink_fixed_poll, 0);
1504
1505 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
1506 linkmode_copy(pl->link_config.advertising, pl->supported);
1507 phylink_validate(pl, pl->supported, &pl->link_config);
1508
1509 ret = phylink_parse_mode(pl, fwnode);
1510 if (ret < 0) {
1511 kfree(pl);
1512 return ERR_PTR(ret);
1513 }
1514
1515 if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
1516 ret = phylink_parse_fixedlink(pl, fwnode);
1517 if (ret < 0) {
1518 kfree(pl);
1519 return ERR_PTR(ret);
1520 }
1521 }
1522
1523 pl->cur_link_an_mode = pl->cfg_link_an_mode;
1524
1525 ret = phylink_register_sfp(pl, fwnode);
1526 if (ret < 0) {
1527 kfree(pl);
1528 return ERR_PTR(ret);
1529 }
1530
1531 return pl;
1532 }
1533 EXPORT_SYMBOL_GPL(phylink_create);
1534
1535 /**
1536 * phylink_destroy() - cleanup and destroy the phylink instance
1537 * @pl: a pointer to a &struct phylink returned from phylink_create()
1538 *
1539 * Destroy a phylink instance. Any PHY that has been attached must have been
1540 * cleaned up via phylink_disconnect_phy() prior to calling this function.
1541 *
1542 * Note: the rtnl lock must not be held when calling this function.
1543 */
phylink_destroy(struct phylink * pl)1544 void phylink_destroy(struct phylink *pl)
1545 {
1546 sfp_bus_del_upstream(pl->sfp_bus);
1547 if (pl->link_gpio)
1548 gpiod_put(pl->link_gpio);
1549
1550 cancel_work_sync(&pl->resolve);
1551 kfree(pl);
1552 }
1553 EXPORT_SYMBOL_GPL(phylink_destroy);
1554
phylink_phy_change(struct phy_device * phydev,bool up)1555 static void phylink_phy_change(struct phy_device *phydev, bool up)
1556 {
1557 struct phylink *pl = phydev->phylink;
1558 bool tx_pause, rx_pause;
1559
1560 phy_get_pause(phydev, &tx_pause, &rx_pause);
1561
1562 mutex_lock(&pl->state_mutex);
1563 pl->phy_state.speed = phydev->speed;
1564 pl->phy_state.duplex = phydev->duplex;
1565 pl->phy_state.rate_matching = phydev->rate_matching;
1566 pl->phy_state.pause = MLO_PAUSE_NONE;
1567 if (tx_pause)
1568 pl->phy_state.pause |= MLO_PAUSE_TX;
1569 if (rx_pause)
1570 pl->phy_state.pause |= MLO_PAUSE_RX;
1571 pl->phy_state.interface = phydev->interface;
1572 pl->phy_state.link = up;
1573 mutex_unlock(&pl->state_mutex);
1574
1575 phylink_run_resolve(pl);
1576
1577 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down",
1578 phy_modes(phydev->interface),
1579 phy_speed_to_str(phydev->speed),
1580 phy_duplex_to_str(phydev->duplex),
1581 phy_rate_matching_to_str(phydev->rate_matching),
1582 phylink_pause_to_str(pl->phy_state.pause));
1583 }
1584
phylink_bringup_phy(struct phylink * pl,struct phy_device * phy,phy_interface_t interface)1585 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
1586 phy_interface_t interface)
1587 {
1588 struct phylink_link_state config;
1589 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
1590 char *irq_str;
1591 int ret;
1592
1593 /*
1594 * This is the new way of dealing with flow control for PHYs,
1595 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
1596 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
1597 * using our validate call to the MAC, we rely upon the MAC
1598 * clearing the bits from both supported and advertising fields.
1599 */
1600 phy_support_asym_pause(phy);
1601
1602 memset(&config, 0, sizeof(config));
1603 linkmode_copy(supported, phy->supported);
1604 linkmode_copy(config.advertising, phy->advertising);
1605
1606 /* Check whether we would use rate matching for the proposed interface
1607 * mode.
1608 */
1609 config.rate_matching = phy_get_rate_matching(phy, interface);
1610
1611 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R,
1612 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching.
1613 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching
1614 * their Serdes is either unnecessary or not reasonable.
1615 *
1616 * For these which switch interface modes, we really need to know which
1617 * interface modes the PHY supports to properly work out which ethtool
1618 * linkmodes can be supported. For now, as a work-around, we validate
1619 * against all interface modes, which may lead to more ethtool link
1620 * modes being advertised than are actually supported.
1621 */
1622 if (phy->is_c45 && config.rate_matching == RATE_MATCH_NONE &&
1623 interface != PHY_INTERFACE_MODE_RXAUI &&
1624 interface != PHY_INTERFACE_MODE_XAUI &&
1625 interface != PHY_INTERFACE_MODE_USXGMII)
1626 config.interface = PHY_INTERFACE_MODE_NA;
1627 else
1628 config.interface = interface;
1629
1630 ret = phylink_validate(pl, supported, &config);
1631 if (ret) {
1632 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n",
1633 phy_modes(config.interface),
1634 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported,
1635 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising,
1636 ERR_PTR(ret));
1637 return ret;
1638 }
1639
1640 phy->phylink = pl;
1641 phy->phy_link_change = phylink_phy_change;
1642
1643 irq_str = phy_attached_info_irq(phy);
1644 phylink_info(pl,
1645 "PHY [%s] driver [%s] (irq=%s)\n",
1646 dev_name(&phy->mdio.dev), phy->drv->name, irq_str);
1647 kfree(irq_str);
1648
1649 mutex_lock(&phy->lock);
1650 mutex_lock(&pl->state_mutex);
1651 pl->phydev = phy;
1652 pl->phy_state.interface = interface;
1653 pl->phy_state.pause = MLO_PAUSE_NONE;
1654 pl->phy_state.speed = SPEED_UNKNOWN;
1655 pl->phy_state.duplex = DUPLEX_UNKNOWN;
1656 pl->phy_state.rate_matching = RATE_MATCH_NONE;
1657 linkmode_copy(pl->supported, supported);
1658 linkmode_copy(pl->link_config.advertising, config.advertising);
1659
1660 /* Restrict the phy advertisement according to the MAC support. */
1661 linkmode_copy(phy->advertising, config.advertising);
1662 mutex_unlock(&pl->state_mutex);
1663 mutex_unlock(&phy->lock);
1664
1665 phylink_dbg(pl,
1666 "phy: %s setting supported %*pb advertising %*pb\n",
1667 phy_modes(interface),
1668 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported,
1669 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising);
1670
1671 if (phy_interrupt_is_valid(phy))
1672 phy_request_interrupt(phy);
1673
1674 if (pl->config->mac_managed_pm)
1675 phy->mac_managed_pm = true;
1676
1677 return 0;
1678 }
1679
phylink_attach_phy(struct phylink * pl,struct phy_device * phy,phy_interface_t interface)1680 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy,
1681 phy_interface_t interface)
1682 {
1683 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED ||
1684 (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1685 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus)))
1686 return -EINVAL;
1687
1688 if (pl->phydev)
1689 return -EBUSY;
1690
1691 return phy_attach_direct(pl->netdev, phy, 0, interface);
1692 }
1693
1694 /**
1695 * phylink_connect_phy() - connect a PHY to the phylink instance
1696 * @pl: a pointer to a &struct phylink returned from phylink_create()
1697 * @phy: a pointer to a &struct phy_device.
1698 *
1699 * Connect @phy to the phylink instance specified by @pl by calling
1700 * phy_attach_direct(). Configure the @phy according to the MAC driver's
1701 * capabilities, start the PHYLIB state machine and enable any interrupts
1702 * that the PHY supports.
1703 *
1704 * This updates the phylink's ethtool supported and advertising link mode
1705 * masks.
1706 *
1707 * Returns 0 on success or a negative errno.
1708 */
phylink_connect_phy(struct phylink * pl,struct phy_device * phy)1709 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy)
1710 {
1711 int ret;
1712
1713 /* Use PHY device/driver interface */
1714 if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
1715 pl->link_interface = phy->interface;
1716 pl->link_config.interface = pl->link_interface;
1717 }
1718
1719 ret = phylink_attach_phy(pl, phy, pl->link_interface);
1720 if (ret < 0)
1721 return ret;
1722
1723 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface);
1724 if (ret)
1725 phy_detach(phy);
1726
1727 return ret;
1728 }
1729 EXPORT_SYMBOL_GPL(phylink_connect_phy);
1730
1731 /**
1732 * phylink_of_phy_connect() - connect the PHY specified in the DT mode.
1733 * @pl: a pointer to a &struct phylink returned from phylink_create()
1734 * @dn: a pointer to a &struct device_node.
1735 * @flags: PHY-specific flags to communicate to the PHY device driver
1736 *
1737 * Connect the phy specified in the device node @dn to the phylink instance
1738 * specified by @pl. Actions specified in phylink_connect_phy() will be
1739 * performed.
1740 *
1741 * Returns 0 on success or a negative errno.
1742 */
phylink_of_phy_connect(struct phylink * pl,struct device_node * dn,u32 flags)1743 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn,
1744 u32 flags)
1745 {
1746 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags);
1747 }
1748 EXPORT_SYMBOL_GPL(phylink_of_phy_connect);
1749
1750 /**
1751 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode.
1752 * @pl: a pointer to a &struct phylink returned from phylink_create()
1753 * @fwnode: a pointer to a &struct fwnode_handle.
1754 * @flags: PHY-specific flags to communicate to the PHY device driver
1755 *
1756 * Connect the phy specified @fwnode to the phylink instance specified
1757 * by @pl.
1758 *
1759 * Returns 0 on success or a negative errno.
1760 */
phylink_fwnode_phy_connect(struct phylink * pl,struct fwnode_handle * fwnode,u32 flags)1761 int phylink_fwnode_phy_connect(struct phylink *pl,
1762 struct fwnode_handle *fwnode,
1763 u32 flags)
1764 {
1765 struct fwnode_handle *phy_fwnode;
1766 struct phy_device *phy_dev;
1767 int ret;
1768
1769 /* Fixed links and 802.3z are handled without needing a PHY */
1770 if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1771 (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1772 phy_interface_mode_is_8023z(pl->link_interface)))
1773 return 0;
1774
1775 phy_fwnode = fwnode_get_phy_node(fwnode);
1776 if (IS_ERR(phy_fwnode)) {
1777 if (pl->cfg_link_an_mode == MLO_AN_PHY)
1778 return -ENODEV;
1779 return 0;
1780 }
1781
1782 phy_dev = fwnode_phy_find_device(phy_fwnode);
1783 /* We're done with the phy_node handle */
1784 fwnode_handle_put(phy_fwnode);
1785 if (!phy_dev)
1786 return -ENODEV;
1787
1788 /* Use PHY device/driver interface */
1789 if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
1790 pl->link_interface = phy_dev->interface;
1791 pl->link_config.interface = pl->link_interface;
1792 }
1793
1794 ret = phy_attach_direct(pl->netdev, phy_dev, flags,
1795 pl->link_interface);
1796 if (ret) {
1797 phy_device_free(phy_dev);
1798 return ret;
1799 }
1800
1801 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface);
1802 if (ret)
1803 phy_detach(phy_dev);
1804
1805 return ret;
1806 }
1807 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect);
1808
1809 /**
1810 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink
1811 * instance.
1812 * @pl: a pointer to a &struct phylink returned from phylink_create()
1813 *
1814 * Disconnect any current PHY from the phylink instance described by @pl.
1815 */
phylink_disconnect_phy(struct phylink * pl)1816 void phylink_disconnect_phy(struct phylink *pl)
1817 {
1818 struct phy_device *phy;
1819
1820 ASSERT_RTNL();
1821
1822 phy = pl->phydev;
1823 if (phy) {
1824 mutex_lock(&phy->lock);
1825 mutex_lock(&pl->state_mutex);
1826 pl->phydev = NULL;
1827 mutex_unlock(&pl->state_mutex);
1828 mutex_unlock(&phy->lock);
1829 flush_work(&pl->resolve);
1830
1831 phy_disconnect(phy);
1832 }
1833 }
1834 EXPORT_SYMBOL_GPL(phylink_disconnect_phy);
1835
1836 /**
1837 * phylink_mac_change() - notify phylink of a change in MAC state
1838 * @pl: a pointer to a &struct phylink returned from phylink_create()
1839 * @up: indicates whether the link is currently up.
1840 *
1841 * The MAC driver should call this driver when the state of its link
1842 * changes (eg, link failure, new negotiation results, etc.)
1843 */
phylink_mac_change(struct phylink * pl,bool up)1844 void phylink_mac_change(struct phylink *pl, bool up)
1845 {
1846 if (!up)
1847 pl->mac_link_dropped = true;
1848 phylink_run_resolve(pl);
1849 phylink_dbg(pl, "mac link %s\n", up ? "up" : "down");
1850 }
1851 EXPORT_SYMBOL_GPL(phylink_mac_change);
1852
phylink_link_handler(int irq,void * data)1853 static irqreturn_t phylink_link_handler(int irq, void *data)
1854 {
1855 struct phylink *pl = data;
1856
1857 phylink_run_resolve(pl);
1858
1859 return IRQ_HANDLED;
1860 }
1861
1862 /**
1863 * phylink_start() - start a phylink instance
1864 * @pl: a pointer to a &struct phylink returned from phylink_create()
1865 *
1866 * Start the phylink instance specified by @pl, configuring the MAC for the
1867 * desired link mode(s) and negotiation style. This should be called from the
1868 * network device driver's &struct net_device_ops ndo_open() method.
1869 */
phylink_start(struct phylink * pl)1870 void phylink_start(struct phylink *pl)
1871 {
1872 bool poll = false;
1873
1874 ASSERT_RTNL();
1875
1876 phylink_info(pl, "configuring for %s/%s link mode\n",
1877 phylink_an_mode_str(pl->cur_link_an_mode),
1878 phy_modes(pl->link_config.interface));
1879
1880 /* Always set the carrier off */
1881 if (pl->netdev)
1882 netif_carrier_off(pl->netdev);
1883
1884 /* Apply the link configuration to the MAC when starting. This allows
1885 * a fixed-link to start with the correct parameters, and also
1886 * ensures that we set the appropriate advertisement for Serdes links.
1887 *
1888 * Restart autonegotiation if using 802.3z to ensure that the link
1889 * parameters are properly negotiated. This is necessary for DSA
1890 * switches using 802.3z negotiation to ensure they see our modes.
1891 */
1892 phylink_mac_initial_config(pl, true);
1893
1894 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED);
1895
1896 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) {
1897 int irq = gpiod_to_irq(pl->link_gpio);
1898
1899 if (irq > 0) {
1900 if (!request_irq(irq, phylink_link_handler,
1901 IRQF_TRIGGER_RISING |
1902 IRQF_TRIGGER_FALLING,
1903 "netdev link", pl))
1904 pl->link_irq = irq;
1905 else
1906 irq = 0;
1907 }
1908 if (irq <= 0)
1909 poll = true;
1910 }
1911
1912 switch (pl->cfg_link_an_mode) {
1913 case MLO_AN_FIXED:
1914 poll |= pl->config->poll_fixed_state;
1915 break;
1916 case MLO_AN_INBAND:
1917 if (pl->pcs)
1918 poll |= pl->pcs->poll;
1919 break;
1920 }
1921 if (poll)
1922 mod_timer(&pl->link_poll, jiffies + HZ);
1923 if (pl->phydev)
1924 phy_start(pl->phydev);
1925 if (pl->sfp_bus)
1926 sfp_upstream_start(pl->sfp_bus);
1927 }
1928 EXPORT_SYMBOL_GPL(phylink_start);
1929
1930 /**
1931 * phylink_stop() - stop a phylink instance
1932 * @pl: a pointer to a &struct phylink returned from phylink_create()
1933 *
1934 * Stop the phylink instance specified by @pl. This should be called from the
1935 * network device driver's &struct net_device_ops ndo_stop() method. The
1936 * network device's carrier state should not be changed prior to calling this
1937 * function.
1938 *
1939 * This will synchronously bring down the link if the link is not already
1940 * down (in other words, it will trigger a mac_link_down() method call.)
1941 */
phylink_stop(struct phylink * pl)1942 void phylink_stop(struct phylink *pl)
1943 {
1944 ASSERT_RTNL();
1945
1946 if (pl->sfp_bus)
1947 sfp_upstream_stop(pl->sfp_bus);
1948 if (pl->phydev)
1949 phy_stop(pl->phydev);
1950 del_timer_sync(&pl->link_poll);
1951 if (pl->link_irq) {
1952 free_irq(pl->link_irq, pl);
1953 pl->link_irq = 0;
1954 }
1955
1956 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED);
1957 }
1958 EXPORT_SYMBOL_GPL(phylink_stop);
1959
1960 /**
1961 * phylink_suspend() - handle a network device suspend event
1962 * @pl: a pointer to a &struct phylink returned from phylink_create()
1963 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan
1964 *
1965 * Handle a network device suspend event. There are several cases:
1966 *
1967 * - If Wake-on-Lan is not active, we can bring down the link between
1968 * the MAC and PHY by calling phylink_stop().
1969 * - If Wake-on-Lan is active, and being handled only by the PHY, we
1970 * can also bring down the link between the MAC and PHY.
1971 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC
1972 * still needs to receive packets, so we can not bring the link down.
1973 */
phylink_suspend(struct phylink * pl,bool mac_wol)1974 void phylink_suspend(struct phylink *pl, bool mac_wol)
1975 {
1976 ASSERT_RTNL();
1977
1978 if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) {
1979 /* Wake-on-Lan enabled, MAC handling */
1980 mutex_lock(&pl->state_mutex);
1981
1982 /* Stop the resolver bringing the link up */
1983 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state);
1984
1985 /* Disable the carrier, to prevent transmit timeouts,
1986 * but one would hope all packets have been sent. This
1987 * also means phylink_resolve() will do nothing.
1988 */
1989 if (pl->netdev)
1990 netif_carrier_off(pl->netdev);
1991 else
1992 pl->old_link_state = false;
1993
1994 /* We do not call mac_link_down() here as we want the
1995 * link to remain up to receive the WoL packets.
1996 */
1997 mutex_unlock(&pl->state_mutex);
1998 } else {
1999 phylink_stop(pl);
2000 }
2001 }
2002 EXPORT_SYMBOL_GPL(phylink_suspend);
2003
2004 /**
2005 * phylink_resume() - handle a network device resume event
2006 * @pl: a pointer to a &struct phylink returned from phylink_create()
2007 *
2008 * Undo the effects of phylink_suspend(), returning the link to an
2009 * operational state.
2010 */
phylink_resume(struct phylink * pl)2011 void phylink_resume(struct phylink *pl)
2012 {
2013 ASSERT_RTNL();
2014
2015 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) {
2016 /* Wake-on-Lan enabled, MAC handling */
2017
2018 /* Call mac_link_down() so we keep the overall state balanced.
2019 * Do this under the state_mutex lock for consistency. This
2020 * will cause a "Link Down" message to be printed during
2021 * resume, which is harmless - the true link state will be
2022 * printed when we run a resolve.
2023 */
2024 mutex_lock(&pl->state_mutex);
2025 phylink_link_down(pl);
2026 mutex_unlock(&pl->state_mutex);
2027
2028 /* Re-apply the link parameters so that all the settings get
2029 * restored to the MAC.
2030 */
2031 phylink_mac_initial_config(pl, true);
2032
2033 /* Re-enable and re-resolve the link parameters */
2034 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL);
2035 } else {
2036 phylink_start(pl);
2037 }
2038 }
2039 EXPORT_SYMBOL_GPL(phylink_resume);
2040
2041 /**
2042 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY
2043 * @pl: a pointer to a &struct phylink returned from phylink_create()
2044 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters
2045 *
2046 * Read the wake on lan parameters from the PHY attached to the phylink
2047 * instance specified by @pl. If no PHY is currently attached, report no
2048 * support for wake on lan.
2049 */
phylink_ethtool_get_wol(struct phylink * pl,struct ethtool_wolinfo * wol)2050 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2051 {
2052 ASSERT_RTNL();
2053
2054 wol->supported = 0;
2055 wol->wolopts = 0;
2056
2057 if (pl->phydev)
2058 phy_ethtool_get_wol(pl->phydev, wol);
2059 }
2060 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol);
2061
2062 /**
2063 * phylink_ethtool_set_wol() - set wake on lan parameters
2064 * @pl: a pointer to a &struct phylink returned from phylink_create()
2065 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters
2066 *
2067 * Set the wake on lan parameters for the PHY attached to the phylink
2068 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP
2069 * error.
2070 *
2071 * Returns zero on success or negative errno code.
2072 */
phylink_ethtool_set_wol(struct phylink * pl,struct ethtool_wolinfo * wol)2073 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2074 {
2075 int ret = -EOPNOTSUPP;
2076
2077 ASSERT_RTNL();
2078
2079 if (pl->phydev)
2080 ret = phy_ethtool_set_wol(pl->phydev, wol);
2081
2082 return ret;
2083 }
2084 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol);
2085
phylink_merge_link_mode(unsigned long * dst,const unsigned long * b)2086 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b)
2087 {
2088 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask);
2089
2090 linkmode_zero(mask);
2091 phylink_set_port_modes(mask);
2092
2093 linkmode_and(dst, dst, mask);
2094 linkmode_or(dst, dst, b);
2095 }
2096
phylink_get_ksettings(const struct phylink_link_state * state,struct ethtool_link_ksettings * kset)2097 static void phylink_get_ksettings(const struct phylink_link_state *state,
2098 struct ethtool_link_ksettings *kset)
2099 {
2100 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising);
2101 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising);
2102 if (kset->base.rate_matching == RATE_MATCH_NONE) {
2103 kset->base.speed = state->speed;
2104 kset->base.duplex = state->duplex;
2105 }
2106 kset->base.autoneg = state->an_enabled ? AUTONEG_ENABLE :
2107 AUTONEG_DISABLE;
2108 }
2109
2110 /**
2111 * phylink_ethtool_ksettings_get() - get the current link settings
2112 * @pl: a pointer to a &struct phylink returned from phylink_create()
2113 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings
2114 *
2115 * Read the current link settings for the phylink instance specified by @pl.
2116 * This will be the link settings read from the MAC, PHY or fixed link
2117 * settings depending on the current negotiation mode.
2118 */
phylink_ethtool_ksettings_get(struct phylink * pl,struct ethtool_link_ksettings * kset)2119 int phylink_ethtool_ksettings_get(struct phylink *pl,
2120 struct ethtool_link_ksettings *kset)
2121 {
2122 struct phylink_link_state link_state;
2123
2124 ASSERT_RTNL();
2125
2126 if (pl->phydev)
2127 phy_ethtool_ksettings_get(pl->phydev, kset);
2128 else
2129 kset->base.port = pl->link_port;
2130
2131 linkmode_copy(kset->link_modes.supported, pl->supported);
2132
2133 switch (pl->cur_link_an_mode) {
2134 case MLO_AN_FIXED:
2135 /* We are using fixed settings. Report these as the
2136 * current link settings - and note that these also
2137 * represent the supported speeds/duplex/pause modes.
2138 */
2139 phylink_get_fixed_state(pl, &link_state);
2140 phylink_get_ksettings(&link_state, kset);
2141 break;
2142
2143 case MLO_AN_INBAND:
2144 /* If there is a phy attached, then use the reported
2145 * settings from the phy with no modification.
2146 */
2147 if (pl->phydev)
2148 break;
2149
2150 phylink_mac_pcs_get_state(pl, &link_state);
2151
2152 /* The MAC is reporting the link results from its own PCS
2153 * layer via in-band status. Report these as the current
2154 * link settings.
2155 */
2156 phylink_get_ksettings(&link_state, kset);
2157 break;
2158 }
2159
2160 return 0;
2161 }
2162 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);
2163
2164 /**
2165 * phylink_ethtool_ksettings_set() - set the link settings
2166 * @pl: a pointer to a &struct phylink returned from phylink_create()
2167 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes
2168 */
phylink_ethtool_ksettings_set(struct phylink * pl,const struct ethtool_link_ksettings * kset)2169 int phylink_ethtool_ksettings_set(struct phylink *pl,
2170 const struct ethtool_link_ksettings *kset)
2171 {
2172 __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2173 struct phylink_link_state config;
2174 const struct phy_setting *s;
2175
2176 ASSERT_RTNL();
2177
2178 if (pl->phydev) {
2179 /* We can rely on phylib for this update; we also do not need
2180 * to update the pl->link_config settings:
2181 * - the configuration returned via ksettings_get() will come
2182 * from phylib whenever a PHY is present.
2183 * - link_config.interface will be updated by the PHY calling
2184 * back via phylink_phy_change() and a subsequent resolve.
2185 * - initial link configuration for PHY mode comes from the
2186 * last phy state updated via phylink_phy_change().
2187 * - other configuration changes (e.g. pause modes) are
2188 * performed directly via phylib.
2189 * - if in in-band mode with a PHY, the link configuration
2190 * is passed on the link from the PHY, and all of
2191 * link_config.{speed,duplex,an_enabled,pause} are not used.
2192 * - the only possible use would be link_config.advertising
2193 * pause modes when in 1000base-X mode with a PHY, but in
2194 * the presence of a PHY, this should not be changed as that
2195 * should be determined from the media side advertisement.
2196 */
2197 return phy_ethtool_ksettings_set(pl->phydev, kset);
2198 }
2199
2200 config = pl->link_config;
2201
2202 /* Mask out unsupported advertisements */
2203 linkmode_and(config.advertising, kset->link_modes.advertising,
2204 pl->supported);
2205
2206 /* FIXME: should we reject autoneg if phy/mac does not support it? */
2207 switch (kset->base.autoneg) {
2208 case AUTONEG_DISABLE:
2209 /* Autonegotiation disabled, select a suitable speed and
2210 * duplex.
2211 */
2212 s = phy_lookup_setting(kset->base.speed, kset->base.duplex,
2213 pl->supported, false);
2214 if (!s)
2215 return -EINVAL;
2216
2217 /* If we have a fixed link, refuse to change link parameters.
2218 * If the link parameters match, accept them but do nothing.
2219 */
2220 if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2221 if (s->speed != pl->link_config.speed ||
2222 s->duplex != pl->link_config.duplex)
2223 return -EINVAL;
2224 return 0;
2225 }
2226
2227 config.speed = s->speed;
2228 config.duplex = s->duplex;
2229 break;
2230
2231 case AUTONEG_ENABLE:
2232 /* If we have a fixed link, allow autonegotiation (since that
2233 * is our default case) but do not allow the advertisement to
2234 * be changed. If the advertisement matches, simply return.
2235 */
2236 if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2237 if (!linkmode_equal(config.advertising,
2238 pl->link_config.advertising))
2239 return -EINVAL;
2240 return 0;
2241 }
2242
2243 config.speed = SPEED_UNKNOWN;
2244 config.duplex = DUPLEX_UNKNOWN;
2245 break;
2246
2247 default:
2248 return -EINVAL;
2249 }
2250
2251 /* We have ruled out the case with a PHY attached, and the
2252 * fixed-link cases. All that is left are in-band links.
2253 */
2254 config.an_enabled = kset->base.autoneg == AUTONEG_ENABLE;
2255 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising,
2256 config.an_enabled);
2257
2258 /* If this link is with an SFP, ensure that changes to advertised modes
2259 * also cause the associated interface to be selected such that the
2260 * link can be configured correctly.
2261 */
2262 if (pl->sfp_bus) {
2263 config.interface = sfp_select_interface(pl->sfp_bus,
2264 config.advertising);
2265 if (config.interface == PHY_INTERFACE_MODE_NA) {
2266 phylink_err(pl,
2267 "selection of interface failed, advertisement %*pb\n",
2268 __ETHTOOL_LINK_MODE_MASK_NBITS,
2269 config.advertising);
2270 return -EINVAL;
2271 }
2272
2273 /* Revalidate with the selected interface */
2274 linkmode_copy(support, pl->supported);
2275 if (phylink_validate(pl, support, &config)) {
2276 phylink_err(pl, "validation of %s/%s with support %*pb failed\n",
2277 phylink_an_mode_str(pl->cur_link_an_mode),
2278 phy_modes(config.interface),
2279 __ETHTOOL_LINK_MODE_MASK_NBITS, support);
2280 return -EINVAL;
2281 }
2282 } else {
2283 /* Validate without changing the current supported mask. */
2284 linkmode_copy(support, pl->supported);
2285 if (phylink_validate(pl, support, &config))
2286 return -EINVAL;
2287 }
2288
2289 /* If autonegotiation is enabled, we must have an advertisement */
2290 if (config.an_enabled && phylink_is_empty_linkmode(config.advertising))
2291 return -EINVAL;
2292
2293 mutex_lock(&pl->state_mutex);
2294 pl->link_config.speed = config.speed;
2295 pl->link_config.duplex = config.duplex;
2296 pl->link_config.an_enabled = config.an_enabled;
2297
2298 if (pl->link_config.interface != config.interface) {
2299 /* The interface changed, e.g. 1000base-X <-> 2500base-X */
2300 /* We need to force the link down, then change the interface */
2301 if (pl->old_link_state) {
2302 phylink_link_down(pl);
2303 pl->old_link_state = false;
2304 }
2305 if (!test_bit(PHYLINK_DISABLE_STOPPED,
2306 &pl->phylink_disable_state))
2307 phylink_major_config(pl, false, &config);
2308 pl->link_config.interface = config.interface;
2309 linkmode_copy(pl->link_config.advertising, config.advertising);
2310 } else if (!linkmode_equal(pl->link_config.advertising,
2311 config.advertising)) {
2312 linkmode_copy(pl->link_config.advertising, config.advertising);
2313 phylink_change_inband_advert(pl);
2314 }
2315 mutex_unlock(&pl->state_mutex);
2316
2317 return 0;
2318 }
2319 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set);
2320
2321 /**
2322 * phylink_ethtool_nway_reset() - restart negotiation
2323 * @pl: a pointer to a &struct phylink returned from phylink_create()
2324 *
2325 * Restart negotiation for the phylink instance specified by @pl. This will
2326 * cause any attached phy to restart negotiation with the link partner, and
2327 * if the MAC is in a BaseX mode, the MAC will also be requested to restart
2328 * negotiation.
2329 *
2330 * Returns zero on success, or negative error code.
2331 */
phylink_ethtool_nway_reset(struct phylink * pl)2332 int phylink_ethtool_nway_reset(struct phylink *pl)
2333 {
2334 int ret = 0;
2335
2336 ASSERT_RTNL();
2337
2338 if (pl->phydev)
2339 ret = phy_restart_aneg(pl->phydev);
2340 phylink_mac_pcs_an_restart(pl);
2341
2342 return ret;
2343 }
2344 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset);
2345
2346 /**
2347 * phylink_ethtool_get_pauseparam() - get the current pause parameters
2348 * @pl: a pointer to a &struct phylink returned from phylink_create()
2349 * @pause: a pointer to a &struct ethtool_pauseparam
2350 */
phylink_ethtool_get_pauseparam(struct phylink * pl,struct ethtool_pauseparam * pause)2351 void phylink_ethtool_get_pauseparam(struct phylink *pl,
2352 struct ethtool_pauseparam *pause)
2353 {
2354 ASSERT_RTNL();
2355
2356 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN);
2357 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX);
2358 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX);
2359 }
2360 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam);
2361
2362 /**
2363 * phylink_ethtool_set_pauseparam() - set the current pause parameters
2364 * @pl: a pointer to a &struct phylink returned from phylink_create()
2365 * @pause: a pointer to a &struct ethtool_pauseparam
2366 */
phylink_ethtool_set_pauseparam(struct phylink * pl,struct ethtool_pauseparam * pause)2367 int phylink_ethtool_set_pauseparam(struct phylink *pl,
2368 struct ethtool_pauseparam *pause)
2369 {
2370 struct phylink_link_state *config = &pl->link_config;
2371 bool manual_changed;
2372 int pause_state;
2373
2374 ASSERT_RTNL();
2375
2376 if (pl->cur_link_an_mode == MLO_AN_FIXED)
2377 return -EOPNOTSUPP;
2378
2379 if (!phylink_test(pl->supported, Pause) &&
2380 !phylink_test(pl->supported, Asym_Pause))
2381 return -EOPNOTSUPP;
2382
2383 if (!phylink_test(pl->supported, Asym_Pause) &&
2384 pause->rx_pause != pause->tx_pause)
2385 return -EINVAL;
2386
2387 pause_state = 0;
2388 if (pause->autoneg)
2389 pause_state |= MLO_PAUSE_AN;
2390 if (pause->rx_pause)
2391 pause_state |= MLO_PAUSE_RX;
2392 if (pause->tx_pause)
2393 pause_state |= MLO_PAUSE_TX;
2394
2395 mutex_lock(&pl->state_mutex);
2396 /*
2397 * See the comments for linkmode_set_pause(), wrt the deficiencies
2398 * with the current implementation. A solution to this issue would
2399 * be:
2400 * ethtool Local device
2401 * rx tx Pause AsymDir
2402 * 0 0 0 0
2403 * 1 0 1 1
2404 * 0 1 0 1
2405 * 1 1 1 1
2406 * and then use the ethtool rx/tx enablement status to mask the
2407 * rx/tx pause resolution.
2408 */
2409 linkmode_set_pause(config->advertising, pause->tx_pause,
2410 pause->rx_pause);
2411
2412 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN ||
2413 (!(pause_state & MLO_PAUSE_AN) &&
2414 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK);
2415
2416 config->pause = pause_state;
2417
2418 /* Update our in-band advertisement, triggering a renegotiation if
2419 * the advertisement changed.
2420 */
2421 if (!pl->phydev)
2422 phylink_change_inband_advert(pl);
2423
2424 mutex_unlock(&pl->state_mutex);
2425
2426 /* If we have a PHY, a change of the pause frame advertisement will
2427 * cause phylib to renegotiate (if AN is enabled) which will in turn
2428 * call our phylink_phy_change() and trigger a resolve. Note that
2429 * we can't hold our state mutex while calling phy_set_asym_pause().
2430 */
2431 if (pl->phydev)
2432 phy_set_asym_pause(pl->phydev, pause->rx_pause,
2433 pause->tx_pause);
2434
2435 /* If the manual pause settings changed, make sure we trigger a
2436 * resolve to update their state; we can not guarantee that the
2437 * link will cycle.
2438 */
2439 if (manual_changed) {
2440 pl->mac_link_dropped = true;
2441 phylink_run_resolve(pl);
2442 }
2443
2444 return 0;
2445 }
2446 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam);
2447
2448 /**
2449 * phylink_get_eee_err() - read the energy efficient ethernet error
2450 * counter
2451 * @pl: a pointer to a &struct phylink returned from phylink_create().
2452 *
2453 * Read the Energy Efficient Ethernet error counter from the PHY associated
2454 * with the phylink instance specified by @pl.
2455 *
2456 * Returns positive error counter value, or negative error code.
2457 */
phylink_get_eee_err(struct phylink * pl)2458 int phylink_get_eee_err(struct phylink *pl)
2459 {
2460 int ret = 0;
2461
2462 ASSERT_RTNL();
2463
2464 if (pl->phydev)
2465 ret = phy_get_eee_err(pl->phydev);
2466
2467 return ret;
2468 }
2469 EXPORT_SYMBOL_GPL(phylink_get_eee_err);
2470
2471 /**
2472 * phylink_init_eee() - init and check the EEE features
2473 * @pl: a pointer to a &struct phylink returned from phylink_create()
2474 * @clk_stop_enable: allow PHY to stop receive clock
2475 *
2476 * Must be called either with RTNL held or within mac_link_up()
2477 */
phylink_init_eee(struct phylink * pl,bool clk_stop_enable)2478 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable)
2479 {
2480 int ret = -EOPNOTSUPP;
2481
2482 if (pl->phydev)
2483 ret = phy_init_eee(pl->phydev, clk_stop_enable);
2484
2485 return ret;
2486 }
2487 EXPORT_SYMBOL_GPL(phylink_init_eee);
2488
2489 /**
2490 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters
2491 * @pl: a pointer to a &struct phylink returned from phylink_create()
2492 * @eee: a pointer to a &struct ethtool_eee for the read parameters
2493 */
phylink_ethtool_get_eee(struct phylink * pl,struct ethtool_eee * eee)2494 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee)
2495 {
2496 int ret = -EOPNOTSUPP;
2497
2498 ASSERT_RTNL();
2499
2500 if (pl->phydev)
2501 ret = phy_ethtool_get_eee(pl->phydev, eee);
2502
2503 return ret;
2504 }
2505 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee);
2506
2507 /**
2508 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters
2509 * @pl: a pointer to a &struct phylink returned from phylink_create()
2510 * @eee: a pointer to a &struct ethtool_eee for the desired parameters
2511 */
phylink_ethtool_set_eee(struct phylink * pl,struct ethtool_eee * eee)2512 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee)
2513 {
2514 int ret = -EOPNOTSUPP;
2515
2516 ASSERT_RTNL();
2517
2518 if (pl->phydev)
2519 ret = phy_ethtool_set_eee(pl->phydev, eee);
2520
2521 return ret;
2522 }
2523 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee);
2524
2525 /* This emulates MII registers for a fixed-mode phy operating as per the
2526 * passed in state. "aneg" defines if we report negotiation is possible.
2527 *
2528 * FIXME: should deal with negotiation state too.
2529 */
phylink_mii_emul_read(unsigned int reg,struct phylink_link_state * state)2530 static int phylink_mii_emul_read(unsigned int reg,
2531 struct phylink_link_state *state)
2532 {
2533 struct fixed_phy_status fs;
2534 unsigned long *lpa = state->lp_advertising;
2535 int val;
2536
2537 fs.link = state->link;
2538 fs.speed = state->speed;
2539 fs.duplex = state->duplex;
2540 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa);
2541 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa);
2542
2543 val = swphy_read_reg(reg, &fs);
2544 if (reg == MII_BMSR) {
2545 if (!state->an_complete)
2546 val &= ~BMSR_ANEGCOMPLETE;
2547 }
2548 return val;
2549 }
2550
phylink_phy_read(struct phylink * pl,unsigned int phy_id,unsigned int reg)2551 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id,
2552 unsigned int reg)
2553 {
2554 struct phy_device *phydev = pl->phydev;
2555 int prtad, devad;
2556
2557 if (mdio_phy_id_is_c45(phy_id)) {
2558 prtad = mdio_phy_id_prtad(phy_id);
2559 devad = mdio_phy_id_devad(phy_id);
2560 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2561 reg);
2562 }
2563
2564 if (phydev->is_c45) {
2565 switch (reg) {
2566 case MII_BMCR:
2567 case MII_BMSR:
2568 case MII_PHYSID1:
2569 case MII_PHYSID2:
2570 devad = __ffs(phydev->c45_ids.mmds_present);
2571 break;
2572 case MII_ADVERTISE:
2573 case MII_LPA:
2574 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2575 return -EINVAL;
2576 devad = MDIO_MMD_AN;
2577 if (reg == MII_ADVERTISE)
2578 reg = MDIO_AN_ADVERTISE;
2579 else
2580 reg = MDIO_AN_LPA;
2581 break;
2582 default:
2583 return -EINVAL;
2584 }
2585 prtad = phy_id;
2586 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2587 reg);
2588 }
2589
2590 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg);
2591 }
2592
phylink_phy_write(struct phylink * pl,unsigned int phy_id,unsigned int reg,unsigned int val)2593 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id,
2594 unsigned int reg, unsigned int val)
2595 {
2596 struct phy_device *phydev = pl->phydev;
2597 int prtad, devad;
2598
2599 if (mdio_phy_id_is_c45(phy_id)) {
2600 prtad = mdio_phy_id_prtad(phy_id);
2601 devad = mdio_phy_id_devad(phy_id);
2602 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad,
2603 reg, val);
2604 }
2605
2606 if (phydev->is_c45) {
2607 switch (reg) {
2608 case MII_BMCR:
2609 case MII_BMSR:
2610 case MII_PHYSID1:
2611 case MII_PHYSID2:
2612 devad = __ffs(phydev->c45_ids.mmds_present);
2613 break;
2614 case MII_ADVERTISE:
2615 case MII_LPA:
2616 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2617 return -EINVAL;
2618 devad = MDIO_MMD_AN;
2619 if (reg == MII_ADVERTISE)
2620 reg = MDIO_AN_ADVERTISE;
2621 else
2622 reg = MDIO_AN_LPA;
2623 break;
2624 default:
2625 return -EINVAL;
2626 }
2627 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad,
2628 reg, val);
2629 }
2630
2631 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val);
2632 }
2633
phylink_mii_read(struct phylink * pl,unsigned int phy_id,unsigned int reg)2634 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id,
2635 unsigned int reg)
2636 {
2637 struct phylink_link_state state;
2638 int val = 0xffff;
2639
2640 switch (pl->cur_link_an_mode) {
2641 case MLO_AN_FIXED:
2642 if (phy_id == 0) {
2643 phylink_get_fixed_state(pl, &state);
2644 val = phylink_mii_emul_read(reg, &state);
2645 }
2646 break;
2647
2648 case MLO_AN_PHY:
2649 return -EOPNOTSUPP;
2650
2651 case MLO_AN_INBAND:
2652 if (phy_id == 0) {
2653 phylink_mac_pcs_get_state(pl, &state);
2654 val = phylink_mii_emul_read(reg, &state);
2655 }
2656 break;
2657 }
2658
2659 return val & 0xffff;
2660 }
2661
phylink_mii_write(struct phylink * pl,unsigned int phy_id,unsigned int reg,unsigned int val)2662 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,
2663 unsigned int reg, unsigned int val)
2664 {
2665 switch (pl->cur_link_an_mode) {
2666 case MLO_AN_FIXED:
2667 break;
2668
2669 case MLO_AN_PHY:
2670 return -EOPNOTSUPP;
2671
2672 case MLO_AN_INBAND:
2673 break;
2674 }
2675
2676 return 0;
2677 }
2678
2679 /**
2680 * phylink_mii_ioctl() - generic mii ioctl interface
2681 * @pl: a pointer to a &struct phylink returned from phylink_create()
2682 * @ifr: a pointer to a &struct ifreq for socket ioctls
2683 * @cmd: ioctl cmd to execute
2684 *
2685 * Perform the specified MII ioctl on the PHY attached to the phylink instance
2686 * specified by @pl. If no PHY is attached, emulate the presence of the PHY.
2687 *
2688 * Returns: zero on success or negative error code.
2689 *
2690 * %SIOCGMIIPHY:
2691 * read register from the current PHY.
2692 * %SIOCGMIIREG:
2693 * read register from the specified PHY.
2694 * %SIOCSMIIREG:
2695 * set a register on the specified PHY.
2696 */
phylink_mii_ioctl(struct phylink * pl,struct ifreq * ifr,int cmd)2697 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd)
2698 {
2699 struct mii_ioctl_data *mii = if_mii(ifr);
2700 int ret;
2701
2702 ASSERT_RTNL();
2703
2704 if (pl->phydev) {
2705 /* PHYs only exist for MLO_AN_PHY and SGMII */
2706 switch (cmd) {
2707 case SIOCGMIIPHY:
2708 mii->phy_id = pl->phydev->mdio.addr;
2709 fallthrough;
2710
2711 case SIOCGMIIREG:
2712 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num);
2713 if (ret >= 0) {
2714 mii->val_out = ret;
2715 ret = 0;
2716 }
2717 break;
2718
2719 case SIOCSMIIREG:
2720 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num,
2721 mii->val_in);
2722 break;
2723
2724 default:
2725 ret = phy_mii_ioctl(pl->phydev, ifr, cmd);
2726 break;
2727 }
2728 } else {
2729 switch (cmd) {
2730 case SIOCGMIIPHY:
2731 mii->phy_id = 0;
2732 fallthrough;
2733
2734 case SIOCGMIIREG:
2735 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num);
2736 if (ret >= 0) {
2737 mii->val_out = ret;
2738 ret = 0;
2739 }
2740 break;
2741
2742 case SIOCSMIIREG:
2743 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num,
2744 mii->val_in);
2745 break;
2746
2747 default:
2748 ret = -EOPNOTSUPP;
2749 break;
2750 }
2751 }
2752
2753 return ret;
2754 }
2755 EXPORT_SYMBOL_GPL(phylink_mii_ioctl);
2756
2757 /**
2758 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both
2759 * link partners
2760 * @pl: a pointer to a &struct phylink returned from phylink_create()
2761 * @sync: perform action synchronously
2762 *
2763 * If we have a PHY that is not part of a SFP module, then set the speed
2764 * as described in the phy_speed_down() function. Please see this function
2765 * for a description of the @sync parameter.
2766 *
2767 * Returns zero if there is no PHY, otherwise as per phy_speed_down().
2768 */
phylink_speed_down(struct phylink * pl,bool sync)2769 int phylink_speed_down(struct phylink *pl, bool sync)
2770 {
2771 int ret = 0;
2772
2773 ASSERT_RTNL();
2774
2775 if (!pl->sfp_bus && pl->phydev)
2776 ret = phy_speed_down(pl->phydev, sync);
2777
2778 return ret;
2779 }
2780 EXPORT_SYMBOL_GPL(phylink_speed_down);
2781
2782 /**
2783 * phylink_speed_up() - restore the advertised speeds prior to the call to
2784 * phylink_speed_down()
2785 * @pl: a pointer to a &struct phylink returned from phylink_create()
2786 *
2787 * If we have a PHY that is not part of a SFP module, then restore the
2788 * PHY speeds as per phy_speed_up().
2789 *
2790 * Returns zero if there is no PHY, otherwise as per phy_speed_up().
2791 */
phylink_speed_up(struct phylink * pl)2792 int phylink_speed_up(struct phylink *pl)
2793 {
2794 int ret = 0;
2795
2796 ASSERT_RTNL();
2797
2798 if (!pl->sfp_bus && pl->phydev)
2799 ret = phy_speed_up(pl->phydev);
2800
2801 return ret;
2802 }
2803 EXPORT_SYMBOL_GPL(phylink_speed_up);
2804
phylink_sfp_attach(void * upstream,struct sfp_bus * bus)2805 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus)
2806 {
2807 struct phylink *pl = upstream;
2808
2809 pl->netdev->sfp_bus = bus;
2810 }
2811
phylink_sfp_detach(void * upstream,struct sfp_bus * bus)2812 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus)
2813 {
2814 struct phylink *pl = upstream;
2815
2816 pl->netdev->sfp_bus = NULL;
2817 }
2818
2819 static const phy_interface_t phylink_sfp_interface_preference[] = {
2820 PHY_INTERFACE_MODE_25GBASER,
2821 PHY_INTERFACE_MODE_USXGMII,
2822 PHY_INTERFACE_MODE_10GBASER,
2823 PHY_INTERFACE_MODE_5GBASER,
2824 PHY_INTERFACE_MODE_2500BASEX,
2825 PHY_INTERFACE_MODE_SGMII,
2826 PHY_INTERFACE_MODE_1000BASEX,
2827 PHY_INTERFACE_MODE_100BASEX,
2828 };
2829
2830 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces);
2831
phylink_choose_sfp_interface(struct phylink * pl,const unsigned long * intf)2832 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl,
2833 const unsigned long *intf)
2834 {
2835 phy_interface_t interface;
2836 size_t i;
2837
2838 interface = PHY_INTERFACE_MODE_NA;
2839 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++)
2840 if (test_bit(phylink_sfp_interface_preference[i], intf)) {
2841 interface = phylink_sfp_interface_preference[i];
2842 break;
2843 }
2844
2845 return interface;
2846 }
2847
phylink_sfp_set_config(struct phylink * pl,u8 mode,unsigned long * supported,struct phylink_link_state * state)2848 static void phylink_sfp_set_config(struct phylink *pl, u8 mode,
2849 unsigned long *supported,
2850 struct phylink_link_state *state)
2851 {
2852 bool changed = false;
2853
2854 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",
2855 phylink_an_mode_str(mode), phy_modes(state->interface),
2856 __ETHTOOL_LINK_MODE_MASK_NBITS, supported);
2857
2858 if (!linkmode_equal(pl->supported, supported)) {
2859 linkmode_copy(pl->supported, supported);
2860 changed = true;
2861 }
2862
2863 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) {
2864 linkmode_copy(pl->link_config.advertising, state->advertising);
2865 changed = true;
2866 }
2867
2868 if (pl->cur_link_an_mode != mode ||
2869 pl->link_config.interface != state->interface) {
2870 pl->cur_link_an_mode = mode;
2871 pl->link_config.interface = state->interface;
2872
2873 changed = true;
2874
2875 phylink_info(pl, "switched to %s/%s link mode\n",
2876 phylink_an_mode_str(mode),
2877 phy_modes(state->interface));
2878 }
2879
2880 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED,
2881 &pl->phylink_disable_state))
2882 phylink_mac_initial_config(pl, false);
2883 }
2884
phylink_sfp_config_phy(struct phylink * pl,u8 mode,struct phy_device * phy)2885 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode,
2886 struct phy_device *phy)
2887 {
2888 __ETHTOOL_DECLARE_LINK_MODE_MASK(support1);
2889 __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2890 struct phylink_link_state config;
2891 phy_interface_t iface;
2892 int ret;
2893
2894 linkmode_copy(support, phy->supported);
2895
2896 memset(&config, 0, sizeof(config));
2897 linkmode_copy(config.advertising, phy->advertising);
2898 config.interface = PHY_INTERFACE_MODE_NA;
2899 config.speed = SPEED_UNKNOWN;
2900 config.duplex = DUPLEX_UNKNOWN;
2901 config.pause = MLO_PAUSE_AN;
2902 config.an_enabled = pl->link_config.an_enabled;
2903
2904 /* Ignore errors if we're expecting a PHY to attach later */
2905 ret = phylink_validate(pl, support, &config);
2906 if (ret) {
2907 phylink_err(pl, "validation with support %*pb failed: %pe\n",
2908 __ETHTOOL_LINK_MODE_MASK_NBITS, support,
2909 ERR_PTR(ret));
2910 return ret;
2911 }
2912
2913 iface = sfp_select_interface(pl->sfp_bus, config.advertising);
2914 if (iface == PHY_INTERFACE_MODE_NA) {
2915 phylink_err(pl,
2916 "selection of interface failed, advertisement %*pb\n",
2917 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising);
2918 return -EINVAL;
2919 }
2920
2921 config.interface = iface;
2922 linkmode_copy(support1, support);
2923 ret = phylink_validate(pl, support1, &config);
2924 if (ret) {
2925 phylink_err(pl,
2926 "validation of %s/%s with support %*pb failed: %pe\n",
2927 phylink_an_mode_str(mode),
2928 phy_modes(config.interface),
2929 __ETHTOOL_LINK_MODE_MASK_NBITS, support,
2930 ERR_PTR(ret));
2931 return ret;
2932 }
2933
2934 pl->link_port = pl->sfp_port;
2935
2936 phylink_sfp_set_config(pl, mode, support, &config);
2937
2938 return 0;
2939 }
2940
phylink_sfp_config_optical(struct phylink * pl)2941 static int phylink_sfp_config_optical(struct phylink *pl)
2942 {
2943 __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2944 DECLARE_PHY_INTERFACE_MASK(interfaces);
2945 struct phylink_link_state config;
2946 phy_interface_t interface;
2947 int ret;
2948
2949 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n",
2950 (int)PHY_INTERFACE_MODE_MAX,
2951 pl->config->supported_interfaces,
2952 (int)PHY_INTERFACE_MODE_MAX,
2953 pl->sfp_interfaces);
2954
2955 /* Find the union of the supported interfaces by the PCS/MAC and
2956 * the SFP module.
2957 */
2958 phy_interface_and(interfaces, pl->config->supported_interfaces,
2959 pl->sfp_interfaces);
2960 if (phy_interface_empty(interfaces)) {
2961 phylink_err(pl, "unsupported SFP module: no common interface modes\n");
2962 return -EINVAL;
2963 }
2964
2965 memset(&config, 0, sizeof(config));
2966 linkmode_copy(support, pl->sfp_support);
2967 linkmode_copy(config.advertising, pl->sfp_support);
2968 config.speed = SPEED_UNKNOWN;
2969 config.duplex = DUPLEX_UNKNOWN;
2970 config.pause = MLO_PAUSE_AN;
2971 config.an_enabled = true;
2972
2973 /* For all the interfaces that are supported, reduce the sfp_support
2974 * mask to only those link modes that can be supported.
2975 */
2976 ret = phylink_validate_mask(pl, pl->sfp_support, &config, interfaces);
2977 if (ret) {
2978 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n",
2979 __ETHTOOL_LINK_MODE_MASK_NBITS, support);
2980 return ret;
2981 }
2982
2983 interface = phylink_choose_sfp_interface(pl, interfaces);
2984 if (interface == PHY_INTERFACE_MODE_NA) {
2985 phylink_err(pl, "failed to select SFP interface\n");
2986 return -EINVAL;
2987 }
2988
2989 phylink_dbg(pl, "optical SFP: chosen %s interface\n",
2990 phy_modes(interface));
2991
2992 config.interface = interface;
2993
2994 /* Ignore errors if we're expecting a PHY to attach later */
2995 ret = phylink_validate(pl, support, &config);
2996 if (ret) {
2997 phylink_err(pl, "validation with support %*pb failed: %pe\n",
2998 __ETHTOOL_LINK_MODE_MASK_NBITS, support,
2999 ERR_PTR(ret));
3000 return ret;
3001 }
3002
3003 pl->link_port = pl->sfp_port;
3004
3005 phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config);
3006
3007 return 0;
3008 }
3009
phylink_sfp_module_insert(void * upstream,const struct sfp_eeprom_id * id)3010 static int phylink_sfp_module_insert(void *upstream,
3011 const struct sfp_eeprom_id *id)
3012 {
3013 struct phylink *pl = upstream;
3014
3015 ASSERT_RTNL();
3016
3017 linkmode_zero(pl->sfp_support);
3018 phy_interface_zero(pl->sfp_interfaces);
3019 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces);
3020 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support);
3021
3022 /* If this module may have a PHY connecting later, defer until later */
3023 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id);
3024 if (pl->sfp_may_have_phy)
3025 return 0;
3026
3027 return phylink_sfp_config_optical(pl);
3028 }
3029
phylink_sfp_module_start(void * upstream)3030 static int phylink_sfp_module_start(void *upstream)
3031 {
3032 struct phylink *pl = upstream;
3033
3034 /* If this SFP module has a PHY, start the PHY now. */
3035 if (pl->phydev) {
3036 phy_start(pl->phydev);
3037 return 0;
3038 }
3039
3040 /* If the module may have a PHY but we didn't detect one we
3041 * need to configure the MAC here.
3042 */
3043 if (!pl->sfp_may_have_phy)
3044 return 0;
3045
3046 return phylink_sfp_config_optical(pl);
3047 }
3048
phylink_sfp_module_stop(void * upstream)3049 static void phylink_sfp_module_stop(void *upstream)
3050 {
3051 struct phylink *pl = upstream;
3052
3053 /* If this SFP module has a PHY, stop it. */
3054 if (pl->phydev)
3055 phy_stop(pl->phydev);
3056 }
3057
phylink_sfp_link_down(void * upstream)3058 static void phylink_sfp_link_down(void *upstream)
3059 {
3060 struct phylink *pl = upstream;
3061
3062 ASSERT_RTNL();
3063
3064 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK);
3065 }
3066
phylink_sfp_link_up(void * upstream)3067 static void phylink_sfp_link_up(void *upstream)
3068 {
3069 struct phylink *pl = upstream;
3070
3071 ASSERT_RTNL();
3072
3073 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK);
3074 }
3075
3076 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII
3077 * or 802.3z control word, so inband will not work.
3078 */
phylink_phy_no_inband(struct phy_device * phy)3079 static bool phylink_phy_no_inband(struct phy_device *phy)
3080 {
3081 return phy->is_c45 &&
3082 (phy->c45_ids.device_ids[1] & 0xfffffff0) == 0xae025150;
3083 }
3084
phylink_sfp_connect_phy(void * upstream,struct phy_device * phy)3085 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
3086 {
3087 struct phylink *pl = upstream;
3088 phy_interface_t interface;
3089 u8 mode;
3090 int ret;
3091
3092 /*
3093 * This is the new way of dealing with flow control for PHYs,
3094 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
3095 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
3096 * using our validate call to the MAC, we rely upon the MAC
3097 * clearing the bits from both supported and advertising fields.
3098 */
3099 phy_support_asym_pause(phy);
3100
3101 if (phylink_phy_no_inband(phy))
3102 mode = MLO_AN_PHY;
3103 else
3104 mode = MLO_AN_INBAND;
3105
3106 /* Set the PHY's host supported interfaces */
3107 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces,
3108 pl->config->supported_interfaces);
3109
3110 /* Do the initial configuration */
3111 ret = phylink_sfp_config_phy(pl, mode, phy);
3112 if (ret < 0)
3113 return ret;
3114
3115 interface = pl->link_config.interface;
3116 ret = phylink_attach_phy(pl, phy, interface);
3117 if (ret < 0)
3118 return ret;
3119
3120 ret = phylink_bringup_phy(pl, phy, interface);
3121 if (ret)
3122 phy_detach(phy);
3123
3124 return ret;
3125 }
3126
phylink_sfp_disconnect_phy(void * upstream)3127 static void phylink_sfp_disconnect_phy(void *upstream)
3128 {
3129 phylink_disconnect_phy(upstream);
3130 }
3131
3132 static const struct sfp_upstream_ops sfp_phylink_ops = {
3133 .attach = phylink_sfp_attach,
3134 .detach = phylink_sfp_detach,
3135 .module_insert = phylink_sfp_module_insert,
3136 .module_start = phylink_sfp_module_start,
3137 .module_stop = phylink_sfp_module_stop,
3138 .link_up = phylink_sfp_link_up,
3139 .link_down = phylink_sfp_link_down,
3140 .connect_phy = phylink_sfp_connect_phy,
3141 .disconnect_phy = phylink_sfp_disconnect_phy,
3142 };
3143
3144 /* Helpers for MAC drivers */
3145
phylink_decode_c37_word(struct phylink_link_state * state,uint16_t config_reg,int speed)3146 static void phylink_decode_c37_word(struct phylink_link_state *state,
3147 uint16_t config_reg, int speed)
3148 {
3149 bool tx_pause, rx_pause;
3150 int fd_bit;
3151
3152 if (speed == SPEED_2500)
3153 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT;
3154 else
3155 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT;
3156
3157 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit);
3158
3159 if (linkmode_test_bit(fd_bit, state->advertising) &&
3160 linkmode_test_bit(fd_bit, state->lp_advertising)) {
3161 state->speed = speed;
3162 state->duplex = DUPLEX_FULL;
3163 } else {
3164 /* negotiation failure */
3165 state->link = false;
3166 }
3167
3168 linkmode_resolve_pause(state->advertising, state->lp_advertising,
3169 &tx_pause, &rx_pause);
3170
3171 if (tx_pause)
3172 state->pause |= MLO_PAUSE_TX;
3173 if (rx_pause)
3174 state->pause |= MLO_PAUSE_RX;
3175 }
3176
phylink_decode_sgmii_word(struct phylink_link_state * state,uint16_t config_reg)3177 static void phylink_decode_sgmii_word(struct phylink_link_state *state,
3178 uint16_t config_reg)
3179 {
3180 if (!(config_reg & LPA_SGMII_LINK)) {
3181 state->link = false;
3182 return;
3183 }
3184
3185 switch (config_reg & LPA_SGMII_SPD_MASK) {
3186 case LPA_SGMII_10:
3187 state->speed = SPEED_10;
3188 break;
3189 case LPA_SGMII_100:
3190 state->speed = SPEED_100;
3191 break;
3192 case LPA_SGMII_1000:
3193 state->speed = SPEED_1000;
3194 break;
3195 default:
3196 state->link = false;
3197 return;
3198 }
3199 if (config_reg & LPA_SGMII_FULL_DUPLEX)
3200 state->duplex = DUPLEX_FULL;
3201 else
3202 state->duplex = DUPLEX_HALF;
3203 }
3204
3205 /**
3206 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS
3207 * @state: a pointer to a struct phylink_link_state.
3208 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word
3209 *
3210 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation
3211 * code word. Decode the USXGMII code word and populate the corresponding fields
3212 * (speed, duplex) into the phylink_link_state structure.
3213 */
phylink_decode_usxgmii_word(struct phylink_link_state * state,uint16_t lpa)3214 void phylink_decode_usxgmii_word(struct phylink_link_state *state,
3215 uint16_t lpa)
3216 {
3217 switch (lpa & MDIO_USXGMII_SPD_MASK) {
3218 case MDIO_USXGMII_10:
3219 state->speed = SPEED_10;
3220 break;
3221 case MDIO_USXGMII_100:
3222 state->speed = SPEED_100;
3223 break;
3224 case MDIO_USXGMII_1000:
3225 state->speed = SPEED_1000;
3226 break;
3227 case MDIO_USXGMII_2500:
3228 state->speed = SPEED_2500;
3229 break;
3230 case MDIO_USXGMII_5000:
3231 state->speed = SPEED_5000;
3232 break;
3233 case MDIO_USXGMII_10G:
3234 state->speed = SPEED_10000;
3235 break;
3236 default:
3237 state->link = false;
3238 return;
3239 }
3240
3241 if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3242 state->duplex = DUPLEX_FULL;
3243 else
3244 state->duplex = DUPLEX_HALF;
3245 }
3246 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word);
3247
3248 /**
3249 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers
3250 * @state: a pointer to a &struct phylink_link_state.
3251 * @bmsr: The value of the %MII_BMSR register
3252 * @lpa: The value of the %MII_LPA register
3253 *
3254 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3255 * clause 37 negotiation and/or SGMII control.
3256 *
3257 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into
3258 * the phylink @state structure. This is suitable to be used for implementing
3259 * the mac_pcs_get_state() member of the struct phylink_mac_ops structure if
3260 * accessing @bmsr and @lpa cannot be done with MDIO directly.
3261 */
phylink_mii_c22_pcs_decode_state(struct phylink_link_state * state,u16 bmsr,u16 lpa)3262 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state,
3263 u16 bmsr, u16 lpa)
3264 {
3265 state->link = !!(bmsr & BMSR_LSTATUS);
3266 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
3267 /* If there is no link or autonegotiation is disabled, the LP advertisement
3268 * data is not meaningful, so don't go any further.
3269 */
3270 if (!state->link || !state->an_enabled)
3271 return;
3272
3273 switch (state->interface) {
3274 case PHY_INTERFACE_MODE_1000BASEX:
3275 phylink_decode_c37_word(state, lpa, SPEED_1000);
3276 break;
3277
3278 case PHY_INTERFACE_MODE_2500BASEX:
3279 phylink_decode_c37_word(state, lpa, SPEED_2500);
3280 break;
3281
3282 case PHY_INTERFACE_MODE_SGMII:
3283 case PHY_INTERFACE_MODE_QSGMII:
3284 case PHY_INTERFACE_MODE_QUSGMII:
3285 phylink_decode_sgmii_word(state, lpa);
3286 break;
3287
3288 default:
3289 state->link = false;
3290 break;
3291 }
3292 }
3293 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state);
3294
3295 /**
3296 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state
3297 * @pcs: a pointer to a &struct mdio_device.
3298 * @state: a pointer to a &struct phylink_link_state.
3299 *
3300 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3301 * clause 37 negotiation and/or SGMII control.
3302 *
3303 * Read the MAC PCS state from the MII device configured in @config and
3304 * parse the Clause 37 or Cisco SGMII link partner negotiation word into
3305 * the phylink @state structure. This is suitable to be directly plugged
3306 * into the mac_pcs_get_state() member of the struct phylink_mac_ops
3307 * structure.
3308 */
phylink_mii_c22_pcs_get_state(struct mdio_device * pcs,struct phylink_link_state * state)3309 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs,
3310 struct phylink_link_state *state)
3311 {
3312 int bmsr, lpa;
3313
3314 bmsr = mdiodev_read(pcs, MII_BMSR);
3315 lpa = mdiodev_read(pcs, MII_LPA);
3316 if (bmsr < 0 || lpa < 0) {
3317 state->link = false;
3318 return;
3319 }
3320
3321 phylink_mii_c22_pcs_decode_state(state, bmsr, lpa);
3322 }
3323 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state);
3324
3325 /**
3326 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS
3327 * advertisement
3328 * @interface: the PHY interface mode being configured
3329 * @advertising: the ethtool advertisement mask
3330 *
3331 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3332 * clause 37 negotiation and/or SGMII control.
3333 *
3334 * Encode the clause 37 PCS advertisement as specified by @interface and
3335 * @advertising.
3336 *
3337 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed.
3338 */
phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,const unsigned long * advertising)3339 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,
3340 const unsigned long *advertising)
3341 {
3342 u16 adv;
3343
3344 switch (interface) {
3345 case PHY_INTERFACE_MODE_1000BASEX:
3346 case PHY_INTERFACE_MODE_2500BASEX:
3347 adv = ADVERTISE_1000XFULL;
3348 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
3349 advertising))
3350 adv |= ADVERTISE_1000XPAUSE;
3351 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
3352 advertising))
3353 adv |= ADVERTISE_1000XPSE_ASYM;
3354 return adv;
3355 case PHY_INTERFACE_MODE_SGMII:
3356 case PHY_INTERFACE_MODE_QSGMII:
3357 return 0x0001;
3358 default:
3359 /* Nothing to do for other modes */
3360 return -EINVAL;
3361 }
3362 }
3363 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement);
3364
3365 /**
3366 * phylink_mii_c22_pcs_config() - configure clause 22 PCS
3367 * @pcs: a pointer to a &struct mdio_device.
3368 * @mode: link autonegotiation mode
3369 * @interface: the PHY interface mode being configured
3370 * @advertising: the ethtool advertisement mask
3371 *
3372 * Configure a Clause 22 PCS PHY with the appropriate negotiation
3373 * parameters for the @mode, @interface and @advertising parameters.
3374 * Returns negative error number on failure, zero if the advertisement
3375 * has not changed, or positive if there is a change.
3376 */
phylink_mii_c22_pcs_config(struct mdio_device * pcs,unsigned int mode,phy_interface_t interface,const unsigned long * advertising)3377 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, unsigned int mode,
3378 phy_interface_t interface,
3379 const unsigned long *advertising)
3380 {
3381 bool changed = 0;
3382 u16 bmcr;
3383 int ret, adv;
3384
3385 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);
3386 if (adv >= 0) {
3387 ret = mdiobus_modify_changed(pcs->bus, pcs->addr,
3388 MII_ADVERTISE, 0xffff, adv);
3389 if (ret < 0)
3390 return ret;
3391 changed = ret;
3392 }
3393
3394 /* Ensure ISOLATE bit is disabled */
3395 if (mode == MLO_AN_INBAND &&
3396 (interface == PHY_INTERFACE_MODE_SGMII ||
3397 interface == PHY_INTERFACE_MODE_QSGMII ||
3398 linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, advertising)))
3399 bmcr = BMCR_ANENABLE;
3400 else
3401 bmcr = 0;
3402
3403 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr);
3404 if (ret < 0)
3405 return ret;
3406
3407 return changed;
3408 }
3409 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config);
3410
3411 /**
3412 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation
3413 * @pcs: a pointer to a &struct mdio_device.
3414 *
3415 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3416 * clause 37 negotiation.
3417 *
3418 * Restart the clause 37 negotiation with the link partner. This is
3419 * suitable to be directly plugged into the mac_pcs_get_state() member
3420 * of the struct phylink_mac_ops structure.
3421 */
phylink_mii_c22_pcs_an_restart(struct mdio_device * pcs)3422 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs)
3423 {
3424 int val = mdiodev_read(pcs, MII_BMCR);
3425
3426 if (val >= 0) {
3427 val |= BMCR_ANRESTART;
3428
3429 mdiodev_write(pcs, MII_BMCR, val);
3430 }
3431 }
3432 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart);
3433
phylink_mii_c45_pcs_get_state(struct mdio_device * pcs,struct phylink_link_state * state)3434 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs,
3435 struct phylink_link_state *state)
3436 {
3437 struct mii_bus *bus = pcs->bus;
3438 int addr = pcs->addr;
3439 int stat;
3440
3441 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1);
3442 if (stat < 0) {
3443 state->link = false;
3444 return;
3445 }
3446
3447 state->link = !!(stat & MDIO_STAT1_LSTATUS);
3448 if (!state->link)
3449 return;
3450
3451 switch (state->interface) {
3452 case PHY_INTERFACE_MODE_10GBASER:
3453 state->speed = SPEED_10000;
3454 state->duplex = DUPLEX_FULL;
3455 break;
3456
3457 default:
3458 break;
3459 }
3460 }
3461 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state);
3462
phylink_init(void)3463 static int __init phylink_init(void)
3464 {
3465 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i)
3466 __set_bit(phylink_sfp_interface_preference[i],
3467 phylink_sfp_interfaces);
3468
3469 return 0;
3470 }
3471
3472 module_init(phylink_init);
3473
3474 MODULE_LICENSE("GPL v2");
3475