1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * Copyright 2015-2017 Google, Inc
4  */
5 
6 #ifndef __LINUX_USB_PD_H
7 #define __LINUX_USB_PD_H
8 
9 #include <linux/kernel.h>
10 #include <linux/types.h>
11 #include <linux/usb/typec.h>
12 
13 /* USB PD Messages */
14 enum pd_ctrl_msg_type {
15 	/* 0 Reserved */
16 	PD_CTRL_GOOD_CRC = 1,
17 	PD_CTRL_GOTO_MIN = 2,
18 	PD_CTRL_ACCEPT = 3,
19 	PD_CTRL_REJECT = 4,
20 	PD_CTRL_PING = 5,
21 	PD_CTRL_PS_RDY = 6,
22 	PD_CTRL_GET_SOURCE_CAP = 7,
23 	PD_CTRL_GET_SINK_CAP = 8,
24 	PD_CTRL_DR_SWAP = 9,
25 	PD_CTRL_PR_SWAP = 10,
26 	PD_CTRL_VCONN_SWAP = 11,
27 	PD_CTRL_WAIT = 12,
28 	PD_CTRL_SOFT_RESET = 13,
29 	/* 14-15 Reserved */
30 	PD_CTRL_NOT_SUPP = 16,
31 	PD_CTRL_GET_SOURCE_CAP_EXT = 17,
32 	PD_CTRL_GET_STATUS = 18,
33 	PD_CTRL_FR_SWAP = 19,
34 	PD_CTRL_GET_PPS_STATUS = 20,
35 	PD_CTRL_GET_COUNTRY_CODES = 21,
36 	/* 22-31 Reserved */
37 };
38 
39 enum pd_data_msg_type {
40 	/* 0 Reserved */
41 	PD_DATA_SOURCE_CAP = 1,
42 	PD_DATA_REQUEST = 2,
43 	PD_DATA_BIST = 3,
44 	PD_DATA_SINK_CAP = 4,
45 	PD_DATA_BATT_STATUS = 5,
46 	PD_DATA_ALERT = 6,
47 	PD_DATA_GET_COUNTRY_INFO = 7,
48 	PD_DATA_ENTER_USB = 8,
49 	/* 9-14 Reserved */
50 	PD_DATA_VENDOR_DEF = 15,
51 	/* 16-31 Reserved */
52 };
53 
54 enum pd_ext_msg_type {
55 	/* 0 Reserved */
56 	PD_EXT_SOURCE_CAP_EXT = 1,
57 	PD_EXT_STATUS = 2,
58 	PD_EXT_GET_BATT_CAP = 3,
59 	PD_EXT_GET_BATT_STATUS = 4,
60 	PD_EXT_BATT_CAP = 5,
61 	PD_EXT_GET_MANUFACTURER_INFO = 6,
62 	PD_EXT_MANUFACTURER_INFO = 7,
63 	PD_EXT_SECURITY_REQUEST = 8,
64 	PD_EXT_SECURITY_RESPONSE = 9,
65 	PD_EXT_FW_UPDATE_REQUEST = 10,
66 	PD_EXT_FW_UPDATE_RESPONSE = 11,
67 	PD_EXT_PPS_STATUS = 12,
68 	PD_EXT_COUNTRY_INFO = 13,
69 	PD_EXT_COUNTRY_CODES = 14,
70 	/* 15-31 Reserved */
71 };
72 
73 #define PD_REV10	0x0
74 #define PD_REV20	0x1
75 #define PD_REV30	0x2
76 #define PD_MAX_REV	PD_REV30
77 
78 #define PD_HEADER_EXT_HDR	BIT(15)
79 #define PD_HEADER_CNT_SHIFT	12
80 #define PD_HEADER_CNT_MASK	0x7
81 #define PD_HEADER_ID_SHIFT	9
82 #define PD_HEADER_ID_MASK	0x7
83 #define PD_HEADER_PWR_ROLE	BIT(8)
84 #define PD_HEADER_REV_SHIFT	6
85 #define PD_HEADER_REV_MASK	0x3
86 #define PD_HEADER_DATA_ROLE	BIT(5)
87 #define PD_HEADER_TYPE_SHIFT	0
88 #define PD_HEADER_TYPE_MASK	0x1f
89 
90 #define PD_HEADER(type, pwr, data, rev, id, cnt, ext_hdr)		\
91 	((((type) & PD_HEADER_TYPE_MASK) << PD_HEADER_TYPE_SHIFT) |	\
92 	 ((pwr) == TYPEC_SOURCE ? PD_HEADER_PWR_ROLE : 0) |		\
93 	 ((data) == TYPEC_HOST ? PD_HEADER_DATA_ROLE : 0) |		\
94 	 (rev << PD_HEADER_REV_SHIFT) |					\
95 	 (((id) & PD_HEADER_ID_MASK) << PD_HEADER_ID_SHIFT) |		\
96 	 (((cnt) & PD_HEADER_CNT_MASK) << PD_HEADER_CNT_SHIFT) |	\
97 	 ((ext_hdr) ? PD_HEADER_EXT_HDR : 0))
98 
99 #define PD_HEADER_LE(type, pwr, data, rev, id, cnt) \
100 	cpu_to_le16(PD_HEADER((type), (pwr), (data), (rev), (id), (cnt), (0)))
101 
pd_header_cnt(u16 header)102 static inline unsigned int pd_header_cnt(u16 header)
103 {
104 	return (header >> PD_HEADER_CNT_SHIFT) & PD_HEADER_CNT_MASK;
105 }
106 
pd_header_cnt_le(__le16 header)107 static inline unsigned int pd_header_cnt_le(__le16 header)
108 {
109 	return pd_header_cnt(le16_to_cpu(header));
110 }
111 
pd_header_type(u16 header)112 static inline unsigned int pd_header_type(u16 header)
113 {
114 	return (header >> PD_HEADER_TYPE_SHIFT) & PD_HEADER_TYPE_MASK;
115 }
116 
pd_header_type_le(__le16 header)117 static inline unsigned int pd_header_type_le(__le16 header)
118 {
119 	return pd_header_type(le16_to_cpu(header));
120 }
121 
pd_header_msgid(u16 header)122 static inline unsigned int pd_header_msgid(u16 header)
123 {
124 	return (header >> PD_HEADER_ID_SHIFT) & PD_HEADER_ID_MASK;
125 }
126 
pd_header_msgid_le(__le16 header)127 static inline unsigned int pd_header_msgid_le(__le16 header)
128 {
129 	return pd_header_msgid(le16_to_cpu(header));
130 }
131 
pd_header_rev(u16 header)132 static inline unsigned int pd_header_rev(u16 header)
133 {
134 	return (header >> PD_HEADER_REV_SHIFT) & PD_HEADER_REV_MASK;
135 }
136 
pd_header_rev_le(__le16 header)137 static inline unsigned int pd_header_rev_le(__le16 header)
138 {
139 	return pd_header_rev(le16_to_cpu(header));
140 }
141 
142 #define PD_EXT_HDR_CHUNKED		BIT(15)
143 #define PD_EXT_HDR_CHUNK_NUM_SHIFT	11
144 #define PD_EXT_HDR_CHUNK_NUM_MASK	0xf
145 #define PD_EXT_HDR_REQ_CHUNK		BIT(10)
146 #define PD_EXT_HDR_DATA_SIZE_SHIFT	0
147 #define PD_EXT_HDR_DATA_SIZE_MASK	0x1ff
148 
149 #define PD_EXT_HDR(data_size, req_chunk, chunk_num, chunked)				\
150 	((((data_size) & PD_EXT_HDR_DATA_SIZE_MASK) << PD_EXT_HDR_DATA_SIZE_SHIFT) |	\
151 	 ((req_chunk) ? PD_EXT_HDR_REQ_CHUNK : 0) |					\
152 	 (((chunk_num) & PD_EXT_HDR_CHUNK_NUM_MASK) << PD_EXT_HDR_CHUNK_NUM_SHIFT) |	\
153 	 ((chunked) ? PD_EXT_HDR_CHUNKED : 0))
154 
155 #define PD_EXT_HDR_LE(data_size, req_chunk, chunk_num, chunked) \
156 	cpu_to_le16(PD_EXT_HDR((data_size), (req_chunk), (chunk_num), (chunked)))
157 
pd_ext_header_chunk_num(u16 ext_header)158 static inline unsigned int pd_ext_header_chunk_num(u16 ext_header)
159 {
160 	return (ext_header >> PD_EXT_HDR_CHUNK_NUM_SHIFT) &
161 		PD_EXT_HDR_CHUNK_NUM_MASK;
162 }
163 
pd_ext_header_data_size(u16 ext_header)164 static inline unsigned int pd_ext_header_data_size(u16 ext_header)
165 {
166 	return (ext_header >> PD_EXT_HDR_DATA_SIZE_SHIFT) &
167 		PD_EXT_HDR_DATA_SIZE_MASK;
168 }
169 
pd_ext_header_data_size_le(__le16 ext_header)170 static inline unsigned int pd_ext_header_data_size_le(__le16 ext_header)
171 {
172 	return pd_ext_header_data_size(le16_to_cpu(ext_header));
173 }
174 
175 #define PD_MAX_PAYLOAD		7
176 #define PD_EXT_MAX_CHUNK_DATA	26
177 
178 /**
179   * struct pd_chunked_ext_message_data - PD chunked extended message data as
180   *					 seen on wire
181   * @header:    PD extended message header
182   * @data:      PD extended message data
183   */
184 struct pd_chunked_ext_message_data {
185 	__le16 header;
186 	u8 data[PD_EXT_MAX_CHUNK_DATA];
187 } __packed;
188 
189 /**
190   * struct pd_message - PD message as seen on wire
191   * @header:    PD message header
192   * @payload:   PD message payload
193   * @ext_msg:   PD message chunked extended message data
194   */
195 struct pd_message {
196 	__le16 header;
197 	union {
198 		__le32 payload[PD_MAX_PAYLOAD];
199 		struct pd_chunked_ext_message_data ext_msg;
200 	};
201 } __packed;
202 
203 /* PDO: Power Data Object */
204 #define PDO_MAX_OBJECTS		7
205 
206 enum pd_pdo_type {
207 	PDO_TYPE_FIXED = 0,
208 	PDO_TYPE_BATT = 1,
209 	PDO_TYPE_VAR = 2,
210 	PDO_TYPE_APDO = 3,
211 };
212 
213 #define PDO_TYPE_SHIFT		30
214 #define PDO_TYPE_MASK		0x3
215 
216 #define PDO_TYPE(t)	((t) << PDO_TYPE_SHIFT)
217 
218 #define PDO_VOLT_MASK		0x3ff
219 #define PDO_CURR_MASK		0x3ff
220 #define PDO_PWR_MASK		0x3ff
221 
222 #define PDO_FIXED_DUAL_ROLE		BIT(29)	/* Power role swap supported */
223 #define PDO_FIXED_SUSPEND		BIT(28) /* USB Suspend supported (Source) */
224 #define PDO_FIXED_HIGHER_CAP		BIT(28) /* Requires more than vSafe5V (Sink) */
225 #define PDO_FIXED_EXTPOWER		BIT(27) /* Externally powered */
226 #define PDO_FIXED_USB_COMM		BIT(26) /* USB communications capable */
227 #define PDO_FIXED_DATA_SWAP		BIT(25) /* Data role swap supported */
228 #define PDO_FIXED_UNCHUNK_EXT		BIT(24) /* Unchunked Extended Message supported (Source) */
229 #define PDO_FIXED_FRS_CURR_MASK		(BIT(24) | BIT(23)) /* FR_Swap Current (Sink) */
230 #define PDO_FIXED_FRS_CURR_SHIFT	23
231 #define PDO_FIXED_VOLT_SHIFT		10	/* 50mV units */
232 #define PDO_FIXED_CURR_SHIFT		0	/* 10mA units */
233 
234 #define PDO_FIXED_VOLT(mv)	((((mv) / 50) & PDO_VOLT_MASK) << PDO_FIXED_VOLT_SHIFT)
235 #define PDO_FIXED_CURR(ma)	((((ma) / 10) & PDO_CURR_MASK) << PDO_FIXED_CURR_SHIFT)
236 
237 #define PDO_FIXED(mv, ma, flags)			\
238 	(PDO_TYPE(PDO_TYPE_FIXED) | (flags) |		\
239 	 PDO_FIXED_VOLT(mv) | PDO_FIXED_CURR(ma))
240 
241 #define VSAFE5V 5000 /* mv units */
242 
243 #define PDO_BATT_MAX_VOLT_SHIFT	20	/* 50mV units */
244 #define PDO_BATT_MIN_VOLT_SHIFT	10	/* 50mV units */
245 #define PDO_BATT_MAX_PWR_SHIFT	0	/* 250mW units */
246 
247 #define PDO_BATT_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MIN_VOLT_SHIFT)
248 #define PDO_BATT_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MAX_VOLT_SHIFT)
249 #define PDO_BATT_MAX_POWER(mw) ((((mw) / 250) & PDO_PWR_MASK) << PDO_BATT_MAX_PWR_SHIFT)
250 
251 #define PDO_BATT(min_mv, max_mv, max_mw)			\
252 	(PDO_TYPE(PDO_TYPE_BATT) | PDO_BATT_MIN_VOLT(min_mv) |	\
253 	 PDO_BATT_MAX_VOLT(max_mv) | PDO_BATT_MAX_POWER(max_mw))
254 
255 #define PDO_VAR_MAX_VOLT_SHIFT	20	/* 50mV units */
256 #define PDO_VAR_MIN_VOLT_SHIFT	10	/* 50mV units */
257 #define PDO_VAR_MAX_CURR_SHIFT	0	/* 10mA units */
258 
259 #define PDO_VAR_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MIN_VOLT_SHIFT)
260 #define PDO_VAR_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MAX_VOLT_SHIFT)
261 #define PDO_VAR_MAX_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_VAR_MAX_CURR_SHIFT)
262 
263 #define PDO_VAR(min_mv, max_mv, max_ma)				\
264 	(PDO_TYPE(PDO_TYPE_VAR) | PDO_VAR_MIN_VOLT(min_mv) |	\
265 	 PDO_VAR_MAX_VOLT(max_mv) | PDO_VAR_MAX_CURR(max_ma))
266 
267 enum pd_apdo_type {
268 	APDO_TYPE_PPS = 0,
269 };
270 
271 #define PDO_APDO_TYPE_SHIFT	28	/* Only valid value currently is 0x0 - PPS */
272 #define PDO_APDO_TYPE_MASK	0x3
273 
274 #define PDO_APDO_TYPE(t)	((t) << PDO_APDO_TYPE_SHIFT)
275 
276 #define PDO_PPS_APDO_MAX_VOLT_SHIFT	17	/* 100mV units */
277 #define PDO_PPS_APDO_MIN_VOLT_SHIFT	8	/* 100mV units */
278 #define PDO_PPS_APDO_MAX_CURR_SHIFT	0	/* 50mA units */
279 
280 #define PDO_PPS_APDO_VOLT_MASK	0xff
281 #define PDO_PPS_APDO_CURR_MASK	0x7f
282 
283 #define PDO_PPS_APDO_MIN_VOLT(mv)	\
284 	((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MIN_VOLT_SHIFT)
285 #define PDO_PPS_APDO_MAX_VOLT(mv)	\
286 	((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MAX_VOLT_SHIFT)
287 #define PDO_PPS_APDO_MAX_CURR(ma)	\
288 	((((ma) / 50) & PDO_PPS_APDO_CURR_MASK) << PDO_PPS_APDO_MAX_CURR_SHIFT)
289 
290 #define PDO_PPS_APDO(min_mv, max_mv, max_ma)				\
291 	(PDO_TYPE(PDO_TYPE_APDO) | PDO_APDO_TYPE(APDO_TYPE_PPS) |	\
292 	PDO_PPS_APDO_MIN_VOLT(min_mv) | PDO_PPS_APDO_MAX_VOLT(max_mv) |	\
293 	PDO_PPS_APDO_MAX_CURR(max_ma))
294 
pdo_type(u32 pdo)295 static inline enum pd_pdo_type pdo_type(u32 pdo)
296 {
297 	return (pdo >> PDO_TYPE_SHIFT) & PDO_TYPE_MASK;
298 }
299 
pdo_fixed_voltage(u32 pdo)300 static inline unsigned int pdo_fixed_voltage(u32 pdo)
301 {
302 	return ((pdo >> PDO_FIXED_VOLT_SHIFT) & PDO_VOLT_MASK) * 50;
303 }
304 
pdo_min_voltage(u32 pdo)305 static inline unsigned int pdo_min_voltage(u32 pdo)
306 {
307 	return ((pdo >> PDO_VAR_MIN_VOLT_SHIFT) & PDO_VOLT_MASK) * 50;
308 }
309 
pdo_max_voltage(u32 pdo)310 static inline unsigned int pdo_max_voltage(u32 pdo)
311 {
312 	return ((pdo >> PDO_VAR_MAX_VOLT_SHIFT) & PDO_VOLT_MASK) * 50;
313 }
314 
pdo_max_current(u32 pdo)315 static inline unsigned int pdo_max_current(u32 pdo)
316 {
317 	return ((pdo >> PDO_VAR_MAX_CURR_SHIFT) & PDO_CURR_MASK) * 10;
318 }
319 
pdo_max_power(u32 pdo)320 static inline unsigned int pdo_max_power(u32 pdo)
321 {
322 	return ((pdo >> PDO_BATT_MAX_PWR_SHIFT) & PDO_PWR_MASK) * 250;
323 }
324 
pdo_apdo_type(u32 pdo)325 static inline enum pd_apdo_type pdo_apdo_type(u32 pdo)
326 {
327 	return (pdo >> PDO_APDO_TYPE_SHIFT) & PDO_APDO_TYPE_MASK;
328 }
329 
pdo_pps_apdo_min_voltage(u32 pdo)330 static inline unsigned int pdo_pps_apdo_min_voltage(u32 pdo)
331 {
332 	return ((pdo >> PDO_PPS_APDO_MIN_VOLT_SHIFT) &
333 		PDO_PPS_APDO_VOLT_MASK) * 100;
334 }
335 
pdo_pps_apdo_max_voltage(u32 pdo)336 static inline unsigned int pdo_pps_apdo_max_voltage(u32 pdo)
337 {
338 	return ((pdo >> PDO_PPS_APDO_MAX_VOLT_SHIFT) &
339 		PDO_PPS_APDO_VOLT_MASK) * 100;
340 }
341 
pdo_pps_apdo_max_current(u32 pdo)342 static inline unsigned int pdo_pps_apdo_max_current(u32 pdo)
343 {
344 	return ((pdo >> PDO_PPS_APDO_MAX_CURR_SHIFT) &
345 		PDO_PPS_APDO_CURR_MASK) * 50;
346 }
347 
348 /* RDO: Request Data Object */
349 #define RDO_OBJ_POS_SHIFT	28
350 #define RDO_OBJ_POS_MASK	0x7
351 #define RDO_GIVE_BACK		BIT(27)	/* Supports reduced operating current */
352 #define RDO_CAP_MISMATCH	BIT(26) /* Not satisfied by source caps */
353 #define RDO_USB_COMM		BIT(25) /* USB communications capable */
354 #define RDO_NO_SUSPEND		BIT(24) /* USB Suspend not supported */
355 
356 #define RDO_PWR_MASK			0x3ff
357 #define RDO_CURR_MASK			0x3ff
358 
359 #define RDO_FIXED_OP_CURR_SHIFT		10
360 #define RDO_FIXED_MAX_CURR_SHIFT	0
361 
362 #define RDO_OBJ(idx) (((idx) & RDO_OBJ_POS_MASK) << RDO_OBJ_POS_SHIFT)
363 
364 #define PDO_FIXED_OP_CURR(ma) ((((ma) / 10) & RDO_CURR_MASK) << RDO_FIXED_OP_CURR_SHIFT)
365 #define PDO_FIXED_MAX_CURR(ma) ((((ma) / 10) & RDO_CURR_MASK) << RDO_FIXED_MAX_CURR_SHIFT)
366 
367 #define RDO_FIXED(idx, op_ma, max_ma, flags)			\
368 	(RDO_OBJ(idx) | (flags) |				\
369 	 PDO_FIXED_OP_CURR(op_ma) | PDO_FIXED_MAX_CURR(max_ma))
370 
371 #define RDO_BATT_OP_PWR_SHIFT		10	/* 250mW units */
372 #define RDO_BATT_MAX_PWR_SHIFT		0	/* 250mW units */
373 
374 #define RDO_BATT_OP_PWR(mw) ((((mw) / 250) & RDO_PWR_MASK) << RDO_BATT_OP_PWR_SHIFT)
375 #define RDO_BATT_MAX_PWR(mw) ((((mw) / 250) & RDO_PWR_MASK) << RDO_BATT_MAX_PWR_SHIFT)
376 
377 #define RDO_BATT(idx, op_mw, max_mw, flags)			\
378 	(RDO_OBJ(idx) | (flags) |				\
379 	 RDO_BATT_OP_PWR(op_mw) | RDO_BATT_MAX_PWR(max_mw))
380 
381 #define RDO_PROG_VOLT_MASK	0x7ff
382 #define RDO_PROG_CURR_MASK	0x7f
383 
384 #define RDO_PROG_VOLT_SHIFT	9
385 #define RDO_PROG_CURR_SHIFT	0
386 
387 #define RDO_PROG_VOLT_MV_STEP	20
388 #define RDO_PROG_CURR_MA_STEP	50
389 
390 #define PDO_PROG_OUT_VOLT(mv)	\
391 	((((mv) / RDO_PROG_VOLT_MV_STEP) & RDO_PROG_VOLT_MASK) << RDO_PROG_VOLT_SHIFT)
392 #define PDO_PROG_OP_CURR(ma)	\
393 	((((ma) / RDO_PROG_CURR_MA_STEP) & RDO_PROG_CURR_MASK) << RDO_PROG_CURR_SHIFT)
394 
395 #define RDO_PROG(idx, out_mv, op_ma, flags)			\
396 	(RDO_OBJ(idx) | (flags) |				\
397 	 PDO_PROG_OUT_VOLT(out_mv) | PDO_PROG_OP_CURR(op_ma))
398 
rdo_index(u32 rdo)399 static inline unsigned int rdo_index(u32 rdo)
400 {
401 	return (rdo >> RDO_OBJ_POS_SHIFT) & RDO_OBJ_POS_MASK;
402 }
403 
rdo_op_current(u32 rdo)404 static inline unsigned int rdo_op_current(u32 rdo)
405 {
406 	return ((rdo >> RDO_FIXED_OP_CURR_SHIFT) & RDO_CURR_MASK) * 10;
407 }
408 
rdo_max_current(u32 rdo)409 static inline unsigned int rdo_max_current(u32 rdo)
410 {
411 	return ((rdo >> RDO_FIXED_MAX_CURR_SHIFT) &
412 		RDO_CURR_MASK) * 10;
413 }
414 
rdo_op_power(u32 rdo)415 static inline unsigned int rdo_op_power(u32 rdo)
416 {
417 	return ((rdo >> RDO_BATT_OP_PWR_SHIFT) & RDO_PWR_MASK) * 250;
418 }
419 
rdo_max_power(u32 rdo)420 static inline unsigned int rdo_max_power(u32 rdo)
421 {
422 	return ((rdo >> RDO_BATT_MAX_PWR_SHIFT) & RDO_PWR_MASK) * 250;
423 }
424 
425 /* Enter_USB Data Object */
426 #define EUDO_USB_MODE_MASK		GENMASK(30, 28)
427 #define EUDO_USB_MODE_SHIFT		28
428 #define   EUDO_USB_MODE_USB2		0
429 #define   EUDO_USB_MODE_USB3		1
430 #define   EUDO_USB_MODE_USB4		2
431 #define EUDO_USB4_DRD			BIT(26)
432 #define EUDO_USB3_DRD			BIT(25)
433 #define EUDO_CABLE_SPEED_MASK		GENMASK(23, 21)
434 #define EUDO_CABLE_SPEED_SHIFT		21
435 #define   EUDO_CABLE_SPEED_USB2		0
436 #define   EUDO_CABLE_SPEED_USB3_GEN1	1
437 #define   EUDO_CABLE_SPEED_USB4_GEN2	2
438 #define   EUDO_CABLE_SPEED_USB4_GEN3	3
439 #define EUDO_CABLE_TYPE_MASK		GENMASK(20, 19)
440 #define EUDO_CABLE_TYPE_SHIFT		19
441 #define   EUDO_CABLE_TYPE_PASSIVE	0
442 #define   EUDO_CABLE_TYPE_RE_TIMER	1
443 #define   EUDO_CABLE_TYPE_RE_DRIVER	2
444 #define   EUDO_CABLE_TYPE_OPTICAL	3
445 #define EUDO_CABLE_CURRENT_MASK		GENMASK(18, 17)
446 #define EUDO_CABLE_CURRENT_SHIFT	17
447 #define   EUDO_CABLE_CURRENT_NOTSUPP	0
448 #define   EUDO_CABLE_CURRENT_3A		2
449 #define   EUDO_CABLE_CURRENT_5A		3
450 #define EUDO_PCIE_SUPPORT		BIT(16)
451 #define EUDO_DP_SUPPORT			BIT(15)
452 #define EUDO_TBT_SUPPORT		BIT(14)
453 #define EUDO_HOST_PRESENT		BIT(13)
454 
455 /* USB PD timers and counters */
456 #define PD_T_NO_RESPONSE	5000	/* 4.5 - 5.5 seconds */
457 #define PD_T_DB_DETECT		10000	/* 10 - 15 seconds */
458 #define PD_T_SEND_SOURCE_CAP	150	/* 100 - 200 ms */
459 #define PD_T_SENDER_RESPONSE	60	/* 24 - 30 ms, relaxed */
460 #define PD_T_RECEIVER_RESPONSE	15	/* 15ms max */
461 #define PD_T_SOURCE_ACTIVITY	45
462 #define PD_T_SINK_ACTIVITY	135
463 #define PD_T_SINK_WAIT_CAP	310	/* 310 - 620 ms */
464 #define PD_T_PS_TRANSITION	500
465 #define PD_T_SRC_TRANSITION	35
466 #define PD_T_DRP_SNK		40
467 #define PD_T_DRP_SRC		30
468 #define PD_T_PS_SOURCE_OFF	920
469 #define PD_T_PS_SOURCE_ON	480
470 #define PD_T_PS_SOURCE_ON_PRS	450	/* 390 - 480ms */
471 #define PD_T_PS_HARD_RESET	30
472 #define PD_T_SRC_RECOVER	760
473 #define PD_T_SRC_RECOVER_MAX	1000
474 #define PD_T_SRC_TURN_ON	275
475 #define PD_T_SAFE_0V		650
476 #define PD_T_VCONN_SOURCE_ON	100
477 #define PD_T_SINK_REQUEST	100	/* 100 ms minimum */
478 #define PD_T_ERROR_RECOVERY	100	/* minimum 25 is insufficient */
479 #define PD_T_SRCSWAPSTDBY	625	/* Maximum of 650ms */
480 #define PD_T_NEWSRC		250	/* Maximum of 275ms */
481 #define PD_T_SWAP_SRC_START	20	/* Minimum of 20ms */
482 #define PD_T_BIST_CONT_MODE	50	/* 30 - 60 ms */
483 #define PD_T_SINK_TX		16	/* 16 - 20 ms */
484 #define PD_T_CHUNK_NOT_SUPP	42	/* 40 - 50 ms */
485 
486 #define PD_T_DRP_TRY		100	/* 75 - 150 ms */
487 #define PD_T_DRP_TRYWAIT	600	/* 400 - 800 ms */
488 
489 #define PD_T_CC_DEBOUNCE	200	/* 100 - 200 ms */
490 #define PD_T_PD_DEBOUNCE	20	/* 10 - 20 ms */
491 #define PD_T_TRY_CC_DEBOUNCE	15	/* 10 - 20 ms */
492 
493 #define PD_N_CAPS_COUNT		(PD_T_NO_RESPONSE / PD_T_SEND_SOURCE_CAP)
494 #define PD_N_HARD_RESET_COUNT	2
495 
496 #define PD_P_SNK_STDBY_MW	2500	/* 2500 mW */
497 
498 #endif /* __LINUX_USB_PD_H */
499