1 /* 2 * Copyright 2012-14 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef DC_STREAM_H_ 27 #define DC_STREAM_H_ 28 29 #include "dc_types.h" 30 #include "grph_object_defs.h" 31 32 /******************************************************************************* 33 * Stream Interfaces 34 ******************************************************************************/ 35 struct timing_sync_info { 36 int group_id; 37 int group_size; 38 bool master; 39 }; 40 41 struct dc_stream_status { 42 int primary_otg_inst; 43 int stream_enc_inst; 44 int plane_count; 45 int audio_inst; 46 struct timing_sync_info timing_sync_info; 47 struct dc_plane_state *plane_states[MAX_SURFACE_NUM]; 48 bool is_abm_supported; 49 }; 50 51 enum hubp_dmdata_mode { 52 DMDATA_SW_MODE, 53 DMDATA_HW_MODE 54 }; 55 56 struct dc_dmdata_attributes { 57 /* Specifies whether dynamic meta data will be updated by software 58 * or has to be fetched by hardware (DMA mode) 59 */ 60 enum hubp_dmdata_mode dmdata_mode; 61 /* Specifies if current dynamic meta data is to be used only for the current frame */ 62 bool dmdata_repeat; 63 /* Specifies the size of Dynamic Metadata surface in byte. Size of 0 means no Dynamic metadata is fetched */ 64 uint32_t dmdata_size; 65 /* Specifies if a new dynamic meta data should be fetched for an upcoming frame */ 66 bool dmdata_updated; 67 /* If hardware mode is used, the base address where DMDATA surface is located */ 68 PHYSICAL_ADDRESS_LOC address; 69 /* Specifies whether QOS level will be provided by TTU or it will come from DMDATA_QOS_LEVEL */ 70 bool dmdata_qos_mode; 71 /* If qos_mode = 1, this is the QOS value to be used: */ 72 uint32_t dmdata_qos_level; 73 /* Specifies the value in unit of REFCLK cycles to be added to the 74 * current time to produce the Amortized deadline for Dynamic Metadata chunk request 75 */ 76 uint32_t dmdata_dl_delta; 77 /* An unbounded array of uint32s, represents software dmdata to be loaded */ 78 uint32_t *dmdata_sw_data; 79 }; 80 81 struct dc_writeback_info { 82 bool wb_enabled; 83 int dwb_pipe_inst; 84 struct dc_dwb_params dwb_params; 85 struct mcif_buf_params mcif_buf_params; 86 struct mcif_warmup_params mcif_warmup_params; 87 /* the plane that is the input to TOP_MUX for MPCC that is the DWB source */ 88 struct dc_plane_state *writeback_source_plane; 89 /* source MPCC instance. for use by internally by dc */ 90 int mpcc_inst; 91 }; 92 93 struct dc_writeback_update { 94 unsigned int num_wb_info; 95 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 96 }; 97 98 enum vertical_interrupt_ref_point { 99 START_V_UPDATE = 0, 100 START_V_SYNC, 101 INVALID_POINT 102 103 //For now, only v_update interrupt is used. 104 //START_V_BLANK, 105 //START_V_ACTIVE 106 }; 107 108 struct periodic_interrupt_config { 109 enum vertical_interrupt_ref_point ref_point; 110 int lines_offset; 111 }; 112 113 struct dc_mst_stream_bw_update { 114 bool is_increase; // is bandwidth reduced or increased 115 uint32_t mst_stream_bw; // new mst bandwidth in kbps 116 }; 117 118 union stream_update_flags { 119 struct { 120 uint32_t scaling:1; 121 uint32_t out_tf:1; 122 uint32_t out_csc:1; 123 uint32_t abm_level:1; 124 uint32_t dpms_off:1; 125 uint32_t gamut_remap:1; 126 uint32_t wb_update:1; 127 uint32_t dsc_changed : 1; 128 uint32_t mst_bw : 1; 129 uint32_t crtc_timing_adjust : 1; 130 } bits; 131 132 uint32_t raw; 133 }; 134 135 struct test_pattern { 136 enum dp_test_pattern type; 137 enum dp_test_pattern_color_space color_space; 138 struct link_training_settings const *p_link_settings; 139 unsigned char const *p_custom_pattern; 140 unsigned int cust_pattern_size; 141 }; 142 143 #define SUBVP_DRR_MARGIN_US 500 // 500us for DRR margin (SubVP + DRR) 144 145 enum mall_stream_type { 146 SUBVP_NONE, // subvp not in use 147 SUBVP_MAIN, // subvp in use, this stream is main stream 148 SUBVP_PHANTOM, // subvp in use, this stream is a phantom stream 149 }; 150 151 struct mall_stream_config { 152 /* MALL stream config to indicate if the stream is phantom or not. 153 * We will use a phantom stream to indicate that the pipe is phantom. 154 */ 155 enum mall_stream_type type; 156 struct dc_stream_state *paired_stream; // master / slave stream 157 }; 158 159 struct dc_stream_state { 160 // sink is deprecated, new code should not reference 161 // this pointer 162 struct dc_sink *sink; 163 164 struct dc_link *link; 165 /* For dynamic link encoder assignment, update the link encoder assigned to 166 * a stream via the volatile dc_state rather than the static dc_link. 167 */ 168 struct link_encoder *link_enc; 169 struct dc_panel_patch sink_patches; 170 union display_content_support content_support; 171 struct dc_crtc_timing timing; 172 struct dc_crtc_timing_adjust adjust; 173 struct dc_info_packet vrr_infopacket; 174 struct dc_info_packet vsc_infopacket; 175 struct dc_info_packet vsp_infopacket; 176 struct dc_info_packet hfvsif_infopacket; 177 struct dc_info_packet vtem_infopacket; 178 uint8_t dsc_packed_pps[128]; 179 struct rect src; /* composition area */ 180 struct rect dst; /* stream addressable area */ 181 182 struct audio_info audio_info; 183 184 struct dc_info_packet hdr_static_metadata; 185 PHYSICAL_ADDRESS_LOC dmdata_address; 186 bool use_dynamic_meta; 187 188 struct dc_transfer_func *out_transfer_func; 189 struct colorspace_transform gamut_remap_matrix; 190 struct dc_csc_transform csc_color_matrix; 191 192 enum dc_color_space output_color_space; 193 enum dc_dither_option dither_option; 194 195 enum view_3d_format view_format; 196 197 bool use_vsc_sdp_for_colorimetry; 198 bool ignore_msa_timing_param; 199 200 bool allow_freesync; 201 bool vrr_active_variable; 202 bool freesync_on_desktop; 203 204 bool converter_disable_audio; 205 uint8_t qs_bit; 206 uint8_t qy_bit; 207 208 /* TODO: custom INFO packets */ 209 /* TODO: ABM info (DMCU) */ 210 /* TODO: CEA VIC */ 211 212 /* DMCU info */ 213 unsigned int abm_level; 214 215 struct periodic_interrupt_config periodic_interrupt; 216 217 /* from core_stream struct */ 218 struct dc_context *ctx; 219 220 /* used by DCP and FMT */ 221 struct bit_depth_reduction_params bit_depth_params; 222 struct clamping_and_pixel_encoding_params clamping; 223 224 int phy_pix_clk; 225 enum signal_type signal; 226 bool dpms_off; 227 228 void *dm_stream_context; 229 230 struct dc_cursor_attributes cursor_attributes; 231 struct dc_cursor_position cursor_position; 232 uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode 233 234 /* from stream struct */ 235 struct kref refcount; 236 237 struct crtc_trigger_info triggered_crtc_reset; 238 239 /* writeback */ 240 unsigned int num_wb_info; 241 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 242 const struct dc_transfer_func *func_shaper; 243 const struct dc_3dlut *lut3d_func; 244 /* Computed state bits */ 245 bool mode_changed : 1; 246 247 /* Output from DC when stream state is committed or altered 248 * DC may only access these values during: 249 * dc_commit_state, dc_commit_state_no_check, dc_commit_streams 250 * values may not change outside of those calls 251 */ 252 struct { 253 // For interrupt management, some hardware instance 254 // offsets need to be exposed to DM 255 uint8_t otg_offset; 256 } out; 257 258 bool apply_edp_fast_boot_optimization; 259 bool apply_seamless_boot_optimization; 260 uint32_t apply_boot_odm_mode; 261 262 uint32_t stream_id; 263 264 struct test_pattern test_pattern; 265 union stream_update_flags update_flags; 266 267 bool has_non_synchronizable_pclk; 268 bool vblank_synchronized; 269 struct mall_stream_config mall_stream_config; 270 }; 271 272 #define ABM_LEVEL_IMMEDIATE_DISABLE 255 273 274 struct dc_stream_update { 275 struct dc_stream_state *stream; 276 277 struct rect src; 278 struct rect dst; 279 struct dc_transfer_func *out_transfer_func; 280 struct dc_info_packet *hdr_static_metadata; 281 unsigned int *abm_level; 282 283 struct periodic_interrupt_config *periodic_interrupt; 284 285 struct dc_info_packet *vrr_infopacket; 286 struct dc_info_packet *vsc_infopacket; 287 struct dc_info_packet *vsp_infopacket; 288 struct dc_info_packet *hfvsif_infopacket; 289 struct dc_info_packet *vtem_infopacket; 290 bool *dpms_off; 291 bool integer_scaling_update; 292 bool *allow_freesync; 293 bool *vrr_active_variable; 294 295 struct colorspace_transform *gamut_remap; 296 enum dc_color_space *output_color_space; 297 enum dc_dither_option *dither_option; 298 299 struct dc_csc_transform *output_csc_transform; 300 301 struct dc_writeback_update *wb_update; 302 struct dc_dsc_config *dsc_config; 303 struct dc_mst_stream_bw_update *mst_bw_update; 304 struct dc_transfer_func *func_shaper; 305 struct dc_3dlut *lut3d_func; 306 307 struct test_pattern *pending_test_pattern; 308 struct dc_crtc_timing_adjust *crtc_timing_adjust; 309 }; 310 311 bool dc_is_stream_unchanged( 312 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 313 bool dc_is_stream_scaling_unchanged( 314 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 315 316 /* 317 * Setup stream attributes if no stream updates are provided 318 * there will be no impact on the stream parameters 319 * 320 * Set up surface attributes and associate to a stream 321 * The surfaces parameter is an absolute set of all surface active for the stream. 322 * If no surfaces are provided, the stream will be blanked; no memory read. 323 * Any flip related attribute changes must be done through this interface. 324 * 325 * After this call: 326 * Surfaces attributes are programmed and configured to be composed into stream. 327 * This does not trigger a flip. No surface address is programmed. 328 * 329 */ 330 bool dc_update_planes_and_stream(struct dc *dc, 331 struct dc_surface_update *surface_updates, int surface_count, 332 struct dc_stream_state *dc_stream, 333 struct dc_stream_update *stream_update); 334 335 /* 336 * Set up surface attributes and associate to a stream 337 * The surfaces parameter is an absolute set of all surface active for the stream. 338 * If no surfaces are provided, the stream will be blanked; no memory read. 339 * Any flip related attribute changes must be done through this interface. 340 * 341 * After this call: 342 * Surfaces attributes are programmed and configured to be composed into stream. 343 * This does not trigger a flip. No surface address is programmed. 344 */ 345 void dc_commit_updates_for_stream(struct dc *dc, 346 struct dc_surface_update *srf_updates, 347 int surface_count, 348 struct dc_stream_state *stream, 349 struct dc_stream_update *stream_update, 350 struct dc_state *state); 351 /* 352 * Log the current stream state. 353 */ 354 void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream); 355 356 uint8_t dc_get_current_stream_count(struct dc *dc); 357 struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i); 358 359 /* 360 * Return the current frame counter. 361 */ 362 uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream); 363 364 /* 365 * Send dp sdp message. 366 */ 367 bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream, 368 const uint8_t *custom_sdp_message, 369 unsigned int sdp_message_size); 370 371 /* TODO: Return parsed values rather than direct register read 372 * This has a dependency on the caller (amdgpu_display_get_crtc_scanoutpos) 373 * being refactored properly to be dce-specific 374 */ 375 bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream, 376 uint32_t *v_blank_start, 377 uint32_t *v_blank_end, 378 uint32_t *h_position, 379 uint32_t *v_position); 380 381 enum dc_status dc_add_stream_to_ctx( 382 struct dc *dc, 383 struct dc_state *new_ctx, 384 struct dc_stream_state *stream); 385 386 enum dc_status dc_remove_stream_from_ctx( 387 struct dc *dc, 388 struct dc_state *new_ctx, 389 struct dc_stream_state *stream); 390 391 392 bool dc_add_plane_to_context( 393 const struct dc *dc, 394 struct dc_stream_state *stream, 395 struct dc_plane_state *plane_state, 396 struct dc_state *context); 397 398 bool dc_remove_plane_from_context( 399 const struct dc *dc, 400 struct dc_stream_state *stream, 401 struct dc_plane_state *plane_state, 402 struct dc_state *context); 403 404 bool dc_rem_all_planes_for_stream( 405 const struct dc *dc, 406 struct dc_stream_state *stream, 407 struct dc_state *context); 408 409 bool dc_add_all_planes_for_stream( 410 const struct dc *dc, 411 struct dc_stream_state *stream, 412 struct dc_plane_state * const *plane_states, 413 int plane_count, 414 struct dc_state *context); 415 416 bool dc_stream_add_writeback(struct dc *dc, 417 struct dc_stream_state *stream, 418 struct dc_writeback_info *wb_info); 419 420 bool dc_stream_remove_writeback(struct dc *dc, 421 struct dc_stream_state *stream, 422 uint32_t dwb_pipe_inst); 423 424 enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc, 425 struct dc_state *state, 426 struct dc_stream_state *stream); 427 428 bool dc_stream_warmup_writeback(struct dc *dc, 429 int num_dwb, 430 struct dc_writeback_info *wb_info); 431 432 bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream); 433 434 bool dc_stream_set_dynamic_metadata(struct dc *dc, 435 struct dc_stream_state *stream, 436 struct dc_dmdata_attributes *dmdata_attr); 437 438 enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream); 439 440 /* 441 * Set up streams and links associated to drive sinks 442 * The streams parameter is an absolute set of all active streams. 443 * 444 * After this call: 445 * Phy, Encoder, Timing Generator are programmed and enabled. 446 * New streams are enabled with blank stream; no memory read. 447 */ 448 /* 449 * Enable stereo when commit_streams is not required, 450 * for example, frame alternate. 451 */ 452 void dc_enable_stereo( 453 struct dc *dc, 454 struct dc_state *context, 455 struct dc_stream_state *streams[], 456 uint8_t stream_count); 457 458 /* Triggers multi-stream synchronization. */ 459 void dc_trigger_sync(struct dc *dc, struct dc_state *context); 460 461 enum surface_update_type dc_check_update_surfaces_for_stream( 462 struct dc *dc, 463 struct dc_surface_update *updates, 464 int surface_count, 465 struct dc_stream_update *stream_update, 466 const struct dc_stream_status *stream_status); 467 468 /** 469 * Create a new default stream for the requested sink 470 */ 471 struct dc_stream_state *dc_create_stream_for_sink(struct dc_sink *dc_sink); 472 473 struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream); 474 475 void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink); 476 477 void dc_stream_retain(struct dc_stream_state *dc_stream); 478 void dc_stream_release(struct dc_stream_state *dc_stream); 479 480 struct dc_stream_status *dc_stream_get_status_from_state( 481 struct dc_state *state, 482 struct dc_stream_state *stream); 483 struct dc_stream_status *dc_stream_get_status( 484 struct dc_stream_state *dc_stream); 485 486 #ifndef TRIM_FSFT 487 bool dc_optimize_timing_for_fsft( 488 struct dc_stream_state *pStream, 489 unsigned int max_input_rate_in_khz); 490 #endif 491 492 /******************************************************************************* 493 * Cursor interfaces - To manages the cursor within a stream 494 ******************************************************************************/ 495 /* TODO: Deprecated once we switch to dc_set_cursor_position */ 496 bool dc_stream_set_cursor_attributes( 497 struct dc_stream_state *stream, 498 const struct dc_cursor_attributes *attributes); 499 500 bool dc_stream_set_cursor_position( 501 struct dc_stream_state *stream, 502 const struct dc_cursor_position *position); 503 504 505 bool dc_stream_adjust_vmin_vmax(struct dc *dc, 506 struct dc_stream_state *stream, 507 struct dc_crtc_timing_adjust *adjust); 508 509 bool dc_stream_get_last_used_drr_vtotal(struct dc *dc, 510 struct dc_stream_state *stream, 511 uint32_t *refresh_rate); 512 513 bool dc_stream_get_crtc_position(struct dc *dc, 514 struct dc_stream_state **stream, 515 int num_streams, 516 unsigned int *v_pos, 517 unsigned int *nom_v_pos); 518 519 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY) 520 bool dc_stream_forward_dmcu_crc_window(struct dc *dc, struct dc_stream_state *stream, 521 struct crc_params *crc_window); 522 bool dc_stream_stop_dmcu_crc_win_update(struct dc *dc, 523 struct dc_stream_state *stream); 524 #endif 525 526 bool dc_stream_configure_crc(struct dc *dc, 527 struct dc_stream_state *stream, 528 struct crc_params *crc_window, 529 bool enable, 530 bool continuous); 531 532 bool dc_stream_get_crc(struct dc *dc, 533 struct dc_stream_state *stream, 534 uint32_t *r_cr, 535 uint32_t *g_y, 536 uint32_t *b_cb); 537 538 void dc_stream_set_static_screen_params(struct dc *dc, 539 struct dc_stream_state **stream, 540 int num_streams, 541 const struct dc_static_screen_params *params); 542 543 void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream, 544 enum dc_dynamic_expansion option); 545 546 void dc_stream_set_dither_option(struct dc_stream_state *stream, 547 enum dc_dither_option option); 548 549 bool dc_stream_set_gamut_remap(struct dc *dc, 550 const struct dc_stream_state *stream); 551 552 bool dc_stream_program_csc_matrix(struct dc *dc, 553 struct dc_stream_state *stream); 554 555 bool dc_stream_get_crtc_position(struct dc *dc, 556 struct dc_stream_state **stream, 557 int num_streams, 558 unsigned int *v_pos, 559 unsigned int *nom_v_pos); 560 561 struct pipe_ctx *dc_stream_get_pipe_ctx(struct dc_stream_state *stream); 562 563 void dc_dmub_update_dirty_rect(struct dc *dc, 564 int surface_count, 565 struct dc_stream_state *stream, 566 struct dc_surface_update *srf_updates, 567 struct dc_state *context); 568 #endif /* DC_STREAM_H_ */ 569