1 // SPDX-License-Identifier: GPL-2.0
2 /* Marvell RVU Ethernet driver
3 *
4 * Copyright (C) 2020 Marvell.
5 *
6 */
7
8 #include <linux/pci.h>
9 #include <linux/ethtool.h>
10 #include <linux/stddef.h>
11 #include <linux/etherdevice.h>
12 #include <linux/log2.h>
13 #include <linux/net_tstamp.h>
14 #include <linux/linkmode.h>
15
16 #include "otx2_common.h"
17 #include "otx2_ptp.h"
18
19 #define DRV_NAME "rvu-nicpf"
20 #define DRV_VF_NAME "rvu-nicvf"
21
22 struct otx2_stat {
23 char name[ETH_GSTRING_LEN];
24 unsigned int index;
25 };
26
27 /* HW device stats */
28 #define OTX2_DEV_STAT(stat) { \
29 .name = #stat, \
30 .index = offsetof(struct otx2_dev_stats, stat) / sizeof(u64), \
31 }
32
33 enum link_mode {
34 OTX2_MODE_SUPPORTED,
35 OTX2_MODE_ADVERTISED
36 };
37
38 static const struct otx2_stat otx2_dev_stats[] = {
39 OTX2_DEV_STAT(rx_ucast_frames),
40 OTX2_DEV_STAT(rx_bcast_frames),
41 OTX2_DEV_STAT(rx_mcast_frames),
42
43 OTX2_DEV_STAT(tx_ucast_frames),
44 OTX2_DEV_STAT(tx_bcast_frames),
45 OTX2_DEV_STAT(tx_mcast_frames),
46 };
47
48 /* Driver level stats */
49 #define OTX2_DRV_STAT(stat) { \
50 .name = #stat, \
51 .index = offsetof(struct otx2_drv_stats, stat) / sizeof(atomic_t), \
52 }
53
54 static const struct otx2_stat otx2_drv_stats[] = {
55 OTX2_DRV_STAT(rx_fcs_errs),
56 OTX2_DRV_STAT(rx_oversize_errs),
57 OTX2_DRV_STAT(rx_undersize_errs),
58 OTX2_DRV_STAT(rx_csum_errs),
59 OTX2_DRV_STAT(rx_len_errs),
60 OTX2_DRV_STAT(rx_other_errs),
61 };
62
63 static const struct otx2_stat otx2_queue_stats[] = {
64 { "bytes", 0 },
65 { "frames", 1 },
66 };
67
68 static const unsigned int otx2_n_dev_stats = ARRAY_SIZE(otx2_dev_stats);
69 static const unsigned int otx2_n_drv_stats = ARRAY_SIZE(otx2_drv_stats);
70 static const unsigned int otx2_n_queue_stats = ARRAY_SIZE(otx2_queue_stats);
71
72 static struct cgx_fw_data *otx2_get_fwdata(struct otx2_nic *pfvf);
73
otx2_get_drvinfo(struct net_device * netdev,struct ethtool_drvinfo * info)74 static void otx2_get_drvinfo(struct net_device *netdev,
75 struct ethtool_drvinfo *info)
76 {
77 struct otx2_nic *pfvf = netdev_priv(netdev);
78
79 strscpy(info->driver, DRV_NAME, sizeof(info->driver));
80 strscpy(info->bus_info, pci_name(pfvf->pdev), sizeof(info->bus_info));
81 }
82
otx2_get_qset_strings(struct otx2_nic * pfvf,u8 ** data,int qset)83 static void otx2_get_qset_strings(struct otx2_nic *pfvf, u8 **data, int qset)
84 {
85 int start_qidx = qset * pfvf->hw.rx_queues;
86 int qidx, stats;
87
88 for (qidx = 0; qidx < pfvf->hw.rx_queues; qidx++) {
89 for (stats = 0; stats < otx2_n_queue_stats; stats++) {
90 sprintf(*data, "rxq%d: %s", qidx + start_qidx,
91 otx2_queue_stats[stats].name);
92 *data += ETH_GSTRING_LEN;
93 }
94 }
95 for (qidx = 0; qidx < pfvf->hw.tx_queues; qidx++) {
96 for (stats = 0; stats < otx2_n_queue_stats; stats++) {
97 sprintf(*data, "txq%d: %s", qidx + start_qidx,
98 otx2_queue_stats[stats].name);
99 *data += ETH_GSTRING_LEN;
100 }
101 }
102 }
103
otx2_get_strings(struct net_device * netdev,u32 sset,u8 * data)104 static void otx2_get_strings(struct net_device *netdev, u32 sset, u8 *data)
105 {
106 struct otx2_nic *pfvf = netdev_priv(netdev);
107 int stats;
108
109 if (sset != ETH_SS_STATS)
110 return;
111
112 for (stats = 0; stats < otx2_n_dev_stats; stats++) {
113 memcpy(data, otx2_dev_stats[stats].name, ETH_GSTRING_LEN);
114 data += ETH_GSTRING_LEN;
115 }
116
117 for (stats = 0; stats < otx2_n_drv_stats; stats++) {
118 memcpy(data, otx2_drv_stats[stats].name, ETH_GSTRING_LEN);
119 data += ETH_GSTRING_LEN;
120 }
121
122 otx2_get_qset_strings(pfvf, &data, 0);
123
124 if (!test_bit(CN10K_RPM, &pfvf->hw.cap_flag)) {
125 for (stats = 0; stats < CGX_RX_STATS_COUNT; stats++) {
126 sprintf(data, "cgx_rxstat%d: ", stats);
127 data += ETH_GSTRING_LEN;
128 }
129
130 for (stats = 0; stats < CGX_TX_STATS_COUNT; stats++) {
131 sprintf(data, "cgx_txstat%d: ", stats);
132 data += ETH_GSTRING_LEN;
133 }
134 }
135
136 strcpy(data, "reset_count");
137 data += ETH_GSTRING_LEN;
138 sprintf(data, "Fec Corrected Errors: ");
139 data += ETH_GSTRING_LEN;
140 sprintf(data, "Fec Uncorrected Errors: ");
141 data += ETH_GSTRING_LEN;
142 }
143
otx2_get_qset_stats(struct otx2_nic * pfvf,struct ethtool_stats * stats,u64 ** data)144 static void otx2_get_qset_stats(struct otx2_nic *pfvf,
145 struct ethtool_stats *stats, u64 **data)
146 {
147 int stat, qidx;
148
149 if (!pfvf)
150 return;
151 for (qidx = 0; qidx < pfvf->hw.rx_queues; qidx++) {
152 if (!otx2_update_rq_stats(pfvf, qidx)) {
153 for (stat = 0; stat < otx2_n_queue_stats; stat++)
154 *((*data)++) = 0;
155 continue;
156 }
157 for (stat = 0; stat < otx2_n_queue_stats; stat++)
158 *((*data)++) = ((u64 *)&pfvf->qset.rq[qidx].stats)
159 [otx2_queue_stats[stat].index];
160 }
161
162 for (qidx = 0; qidx < pfvf->hw.tx_queues; qidx++) {
163 if (!otx2_update_sq_stats(pfvf, qidx)) {
164 for (stat = 0; stat < otx2_n_queue_stats; stat++)
165 *((*data)++) = 0;
166 continue;
167 }
168 for (stat = 0; stat < otx2_n_queue_stats; stat++)
169 *((*data)++) = ((u64 *)&pfvf->qset.sq[qidx].stats)
170 [otx2_queue_stats[stat].index];
171 }
172 }
173
otx2_get_phy_fec_stats(struct otx2_nic * pfvf)174 static int otx2_get_phy_fec_stats(struct otx2_nic *pfvf)
175 {
176 struct msg_req *req;
177 int rc = -ENOMEM;
178
179 mutex_lock(&pfvf->mbox.lock);
180 req = otx2_mbox_alloc_msg_cgx_get_phy_fec_stats(&pfvf->mbox);
181 if (!req)
182 goto end;
183
184 if (!otx2_sync_mbox_msg(&pfvf->mbox))
185 rc = 0;
186 end:
187 mutex_unlock(&pfvf->mbox.lock);
188 return rc;
189 }
190
191 /* Get device and per queue statistics */
otx2_get_ethtool_stats(struct net_device * netdev,struct ethtool_stats * stats,u64 * data)192 static void otx2_get_ethtool_stats(struct net_device *netdev,
193 struct ethtool_stats *stats, u64 *data)
194 {
195 struct otx2_nic *pfvf = netdev_priv(netdev);
196 u64 fec_corr_blks, fec_uncorr_blks;
197 struct cgx_fw_data *rsp;
198 int stat;
199
200 otx2_get_dev_stats(pfvf);
201 for (stat = 0; stat < otx2_n_dev_stats; stat++)
202 *(data++) = ((u64 *)&pfvf->hw.dev_stats)
203 [otx2_dev_stats[stat].index];
204
205 for (stat = 0; stat < otx2_n_drv_stats; stat++)
206 *(data++) = atomic_read(&((atomic_t *)&pfvf->hw.drv_stats)
207 [otx2_drv_stats[stat].index]);
208
209 otx2_get_qset_stats(pfvf, stats, &data);
210
211 if (!test_bit(CN10K_RPM, &pfvf->hw.cap_flag)) {
212 otx2_update_lmac_stats(pfvf);
213 for (stat = 0; stat < CGX_RX_STATS_COUNT; stat++)
214 *(data++) = pfvf->hw.cgx_rx_stats[stat];
215 for (stat = 0; stat < CGX_TX_STATS_COUNT; stat++)
216 *(data++) = pfvf->hw.cgx_tx_stats[stat];
217 }
218
219 *(data++) = pfvf->reset_count;
220
221 fec_corr_blks = pfvf->hw.cgx_fec_corr_blks;
222 fec_uncorr_blks = pfvf->hw.cgx_fec_uncorr_blks;
223
224 rsp = otx2_get_fwdata(pfvf);
225 if (!IS_ERR(rsp) && rsp->fwdata.phy.misc.has_fec_stats &&
226 !otx2_get_phy_fec_stats(pfvf)) {
227 /* Fetch fwdata again because it's been recently populated with
228 * latest PHY FEC stats.
229 */
230 rsp = otx2_get_fwdata(pfvf);
231 if (!IS_ERR(rsp)) {
232 struct fec_stats_s *p = &rsp->fwdata.phy.fec_stats;
233
234 if (pfvf->linfo.fec == OTX2_FEC_BASER) {
235 fec_corr_blks = p->brfec_corr_blks;
236 fec_uncorr_blks = p->brfec_uncorr_blks;
237 } else {
238 fec_corr_blks = p->rsfec_corr_cws;
239 fec_uncorr_blks = p->rsfec_uncorr_cws;
240 }
241 }
242 }
243
244 *(data++) = fec_corr_blks;
245 *(data++) = fec_uncorr_blks;
246 }
247
otx2_get_sset_count(struct net_device * netdev,int sset)248 static int otx2_get_sset_count(struct net_device *netdev, int sset)
249 {
250 struct otx2_nic *pfvf = netdev_priv(netdev);
251 int qstats_count, mac_stats = 0;
252
253 if (sset != ETH_SS_STATS)
254 return -EINVAL;
255
256 qstats_count = otx2_n_queue_stats *
257 (pfvf->hw.rx_queues + pfvf->hw.tx_queues);
258 if (!test_bit(CN10K_RPM, &pfvf->hw.cap_flag))
259 mac_stats = CGX_RX_STATS_COUNT + CGX_TX_STATS_COUNT;
260 otx2_update_lmac_fec_stats(pfvf);
261
262 return otx2_n_dev_stats + otx2_n_drv_stats + qstats_count +
263 mac_stats + OTX2_FEC_STATS_CNT + 1;
264 }
265
266 /* Get no of queues device supports and current queue count */
otx2_get_channels(struct net_device * dev,struct ethtool_channels * channel)267 static void otx2_get_channels(struct net_device *dev,
268 struct ethtool_channels *channel)
269 {
270 struct otx2_nic *pfvf = netdev_priv(dev);
271
272 channel->max_rx = pfvf->hw.max_queues;
273 channel->max_tx = pfvf->hw.max_queues;
274
275 channel->rx_count = pfvf->hw.rx_queues;
276 channel->tx_count = pfvf->hw.tx_queues;
277 }
278
279 /* Set no of Tx, Rx queues to be used */
otx2_set_channels(struct net_device * dev,struct ethtool_channels * channel)280 static int otx2_set_channels(struct net_device *dev,
281 struct ethtool_channels *channel)
282 {
283 struct otx2_nic *pfvf = netdev_priv(dev);
284 bool if_up = netif_running(dev);
285 int err = 0;
286
287 if (!channel->rx_count || !channel->tx_count)
288 return -EINVAL;
289
290 if (bitmap_weight(&pfvf->rq_bmap, pfvf->hw.rx_queues) > 1) {
291 netdev_err(dev,
292 "Receive queues are in use by TC police action\n");
293 return -EINVAL;
294 }
295
296 if (if_up)
297 dev->netdev_ops->ndo_stop(dev);
298
299 err = otx2_set_real_num_queues(dev, channel->tx_count,
300 channel->rx_count);
301 if (err)
302 return err;
303
304 pfvf->hw.rx_queues = channel->rx_count;
305 pfvf->hw.tx_queues = channel->tx_count;
306 pfvf->qset.cq_cnt = pfvf->hw.tx_queues + pfvf->hw.rx_queues;
307
308 if (if_up)
309 err = dev->netdev_ops->ndo_open(dev);
310
311 netdev_info(dev, "Setting num Tx rings to %d, Rx rings to %d success\n",
312 pfvf->hw.tx_queues, pfvf->hw.rx_queues);
313
314 return err;
315 }
316
otx2_get_pauseparam(struct net_device * netdev,struct ethtool_pauseparam * pause)317 static void otx2_get_pauseparam(struct net_device *netdev,
318 struct ethtool_pauseparam *pause)
319 {
320 struct otx2_nic *pfvf = netdev_priv(netdev);
321 struct cgx_pause_frm_cfg *req, *rsp;
322
323 if (is_otx2_lbkvf(pfvf->pdev))
324 return;
325
326 req = otx2_mbox_alloc_msg_cgx_cfg_pause_frm(&pfvf->mbox);
327 if (!req)
328 return;
329
330 if (!otx2_sync_mbox_msg(&pfvf->mbox)) {
331 rsp = (struct cgx_pause_frm_cfg *)
332 otx2_mbox_get_rsp(&pfvf->mbox.mbox, 0, &req->hdr);
333 pause->rx_pause = rsp->rx_pause;
334 pause->tx_pause = rsp->tx_pause;
335 }
336 }
337
otx2_set_pauseparam(struct net_device * netdev,struct ethtool_pauseparam * pause)338 static int otx2_set_pauseparam(struct net_device *netdev,
339 struct ethtool_pauseparam *pause)
340 {
341 struct otx2_nic *pfvf = netdev_priv(netdev);
342
343 if (pause->autoneg)
344 return -EOPNOTSUPP;
345
346 if (is_otx2_lbkvf(pfvf->pdev))
347 return -EOPNOTSUPP;
348
349 if (pause->rx_pause)
350 pfvf->flags |= OTX2_FLAG_RX_PAUSE_ENABLED;
351 else
352 pfvf->flags &= ~OTX2_FLAG_RX_PAUSE_ENABLED;
353
354 if (pause->tx_pause)
355 pfvf->flags |= OTX2_FLAG_TX_PAUSE_ENABLED;
356 else
357 pfvf->flags &= ~OTX2_FLAG_TX_PAUSE_ENABLED;
358
359 return otx2_config_pause_frm(pfvf);
360 }
361
otx2_get_ringparam(struct net_device * netdev,struct ethtool_ringparam * ring,struct kernel_ethtool_ringparam * kernel_ring,struct netlink_ext_ack * extack)362 static void otx2_get_ringparam(struct net_device *netdev,
363 struct ethtool_ringparam *ring,
364 struct kernel_ethtool_ringparam *kernel_ring,
365 struct netlink_ext_ack *extack)
366 {
367 struct otx2_nic *pfvf = netdev_priv(netdev);
368 struct otx2_qset *qs = &pfvf->qset;
369
370 ring->rx_max_pending = Q_COUNT(Q_SIZE_MAX);
371 ring->rx_pending = qs->rqe_cnt ? qs->rqe_cnt : Q_COUNT(Q_SIZE_256);
372 ring->tx_max_pending = Q_COUNT(Q_SIZE_MAX);
373 ring->tx_pending = qs->sqe_cnt ? qs->sqe_cnt : Q_COUNT(Q_SIZE_4K);
374 kernel_ring->rx_buf_len = pfvf->hw.rbuf_len;
375 kernel_ring->cqe_size = pfvf->hw.xqe_size;
376 }
377
otx2_set_ringparam(struct net_device * netdev,struct ethtool_ringparam * ring,struct kernel_ethtool_ringparam * kernel_ring,struct netlink_ext_ack * extack)378 static int otx2_set_ringparam(struct net_device *netdev,
379 struct ethtool_ringparam *ring,
380 struct kernel_ethtool_ringparam *kernel_ring,
381 struct netlink_ext_ack *extack)
382 {
383 struct otx2_nic *pfvf = netdev_priv(netdev);
384 u32 rx_buf_len = kernel_ring->rx_buf_len;
385 u32 old_rx_buf_len = pfvf->hw.rbuf_len;
386 u32 xqe_size = kernel_ring->cqe_size;
387 bool if_up = netif_running(netdev);
388 struct otx2_qset *qs = &pfvf->qset;
389 u32 rx_count, tx_count;
390
391 if (ring->rx_mini_pending || ring->rx_jumbo_pending)
392 return -EINVAL;
393
394 /* Hardware supports max size of 32k for a receive buffer
395 * and 1536 is typical ethernet frame size.
396 */
397 if (rx_buf_len && (rx_buf_len < 1536 || rx_buf_len > 32768)) {
398 netdev_err(netdev,
399 "Receive buffer range is 1536 - 32768");
400 return -EINVAL;
401 }
402
403 if (xqe_size != 128 && xqe_size != 512) {
404 netdev_err(netdev,
405 "Completion event size must be 128 or 512");
406 return -EINVAL;
407 }
408
409 /* Permitted lengths are 16 64 256 1K 4K 16K 64K 256K 1M */
410 rx_count = ring->rx_pending;
411 /* On some silicon variants a skid or reserved CQEs are
412 * needed to avoid CQ overflow.
413 */
414 if (rx_count < pfvf->hw.rq_skid)
415 rx_count = pfvf->hw.rq_skid;
416 rx_count = Q_COUNT(Q_SIZE(rx_count, 3));
417
418 /* Due pipelining impact minimum 2000 unused SQ CQE's
419 * need to be maintained to avoid CQ overflow, hence the
420 * minimum 4K size.
421 */
422 tx_count = clamp_t(u32, ring->tx_pending,
423 Q_COUNT(Q_SIZE_4K), Q_COUNT(Q_SIZE_MAX));
424 tx_count = Q_COUNT(Q_SIZE(tx_count, 3));
425
426 if (tx_count == qs->sqe_cnt && rx_count == qs->rqe_cnt &&
427 rx_buf_len == old_rx_buf_len && xqe_size == pfvf->hw.xqe_size)
428 return 0;
429
430 if (if_up)
431 netdev->netdev_ops->ndo_stop(netdev);
432
433 /* Assigned to the nearest possible exponent. */
434 qs->sqe_cnt = tx_count;
435 qs->rqe_cnt = rx_count;
436
437 pfvf->hw.rbuf_len = rx_buf_len;
438 pfvf->hw.xqe_size = xqe_size;
439
440 if (if_up)
441 return netdev->netdev_ops->ndo_open(netdev);
442
443 return 0;
444 }
445
otx2_get_coalesce(struct net_device * netdev,struct ethtool_coalesce * cmd,struct kernel_ethtool_coalesce * kernel_coal,struct netlink_ext_ack * extack)446 static int otx2_get_coalesce(struct net_device *netdev,
447 struct ethtool_coalesce *cmd,
448 struct kernel_ethtool_coalesce *kernel_coal,
449 struct netlink_ext_ack *extack)
450 {
451 struct otx2_nic *pfvf = netdev_priv(netdev);
452 struct otx2_hw *hw = &pfvf->hw;
453
454 cmd->rx_coalesce_usecs = hw->cq_time_wait;
455 cmd->rx_max_coalesced_frames = hw->cq_ecount_wait;
456 cmd->tx_coalesce_usecs = hw->cq_time_wait;
457 cmd->tx_max_coalesced_frames = hw->cq_ecount_wait;
458 if ((pfvf->flags & OTX2_FLAG_ADPTV_INT_COAL_ENABLED) ==
459 OTX2_FLAG_ADPTV_INT_COAL_ENABLED) {
460 cmd->use_adaptive_rx_coalesce = 1;
461 cmd->use_adaptive_tx_coalesce = 1;
462 } else {
463 cmd->use_adaptive_rx_coalesce = 0;
464 cmd->use_adaptive_tx_coalesce = 0;
465 }
466
467 return 0;
468 }
469
otx2_set_coalesce(struct net_device * netdev,struct ethtool_coalesce * ec,struct kernel_ethtool_coalesce * kernel_coal,struct netlink_ext_ack * extack)470 static int otx2_set_coalesce(struct net_device *netdev,
471 struct ethtool_coalesce *ec,
472 struct kernel_ethtool_coalesce *kernel_coal,
473 struct netlink_ext_ack *extack)
474 {
475 struct otx2_nic *pfvf = netdev_priv(netdev);
476 struct otx2_hw *hw = &pfvf->hw;
477 u8 priv_coalesce_status;
478 int qidx;
479
480 if (!ec->rx_max_coalesced_frames || !ec->tx_max_coalesced_frames)
481 return 0;
482
483 if (ec->use_adaptive_rx_coalesce != ec->use_adaptive_tx_coalesce) {
484 netdev_err(netdev,
485 "adaptive-rx should be same as adaptive-tx");
486 return -EINVAL;
487 }
488
489 /* Check and update coalesce status */
490 if ((pfvf->flags & OTX2_FLAG_ADPTV_INT_COAL_ENABLED) ==
491 OTX2_FLAG_ADPTV_INT_COAL_ENABLED) {
492 priv_coalesce_status = 1;
493 if (!ec->use_adaptive_rx_coalesce)
494 pfvf->flags &= ~OTX2_FLAG_ADPTV_INT_COAL_ENABLED;
495 } else {
496 priv_coalesce_status = 0;
497 if (ec->use_adaptive_rx_coalesce)
498 pfvf->flags |= OTX2_FLAG_ADPTV_INT_COAL_ENABLED;
499 }
500
501 /* 'cq_time_wait' is 8bit and is in multiple of 100ns,
502 * so clamp the user given value to the range of 1 to 25usec.
503 */
504 ec->rx_coalesce_usecs = clamp_t(u32, ec->rx_coalesce_usecs,
505 1, CQ_TIMER_THRESH_MAX);
506 ec->tx_coalesce_usecs = clamp_t(u32, ec->tx_coalesce_usecs,
507 1, CQ_TIMER_THRESH_MAX);
508
509 /* Rx and Tx are mapped to same CQ, check which one
510 * is changed, if both then choose the min.
511 */
512 if (hw->cq_time_wait == ec->rx_coalesce_usecs)
513 hw->cq_time_wait = ec->tx_coalesce_usecs;
514 else if (hw->cq_time_wait == ec->tx_coalesce_usecs)
515 hw->cq_time_wait = ec->rx_coalesce_usecs;
516 else
517 hw->cq_time_wait = min_t(u8, ec->rx_coalesce_usecs,
518 ec->tx_coalesce_usecs);
519
520 /* Max ecount_wait supported is 16bit,
521 * so clamp the user given value to the range of 1 to 64k.
522 */
523 ec->rx_max_coalesced_frames = clamp_t(u32, ec->rx_max_coalesced_frames,
524 1, NAPI_POLL_WEIGHT);
525 ec->tx_max_coalesced_frames = clamp_t(u32, ec->tx_max_coalesced_frames,
526 1, NAPI_POLL_WEIGHT);
527
528 /* Rx and Tx are mapped to same CQ, check which one
529 * is changed, if both then choose the min.
530 */
531 if (hw->cq_ecount_wait == ec->rx_max_coalesced_frames)
532 hw->cq_ecount_wait = ec->tx_max_coalesced_frames;
533 else if (hw->cq_ecount_wait == ec->tx_max_coalesced_frames)
534 hw->cq_ecount_wait = ec->rx_max_coalesced_frames;
535 else
536 hw->cq_ecount_wait = min_t(u16, ec->rx_max_coalesced_frames,
537 ec->tx_max_coalesced_frames);
538
539 /* Reset 'cq_time_wait' and 'cq_ecount_wait' to
540 * default values if coalesce status changed from
541 * 'on' to 'off'.
542 */
543 if (priv_coalesce_status &&
544 ((pfvf->flags & OTX2_FLAG_ADPTV_INT_COAL_ENABLED) !=
545 OTX2_FLAG_ADPTV_INT_COAL_ENABLED)) {
546 hw->cq_time_wait = CQ_TIMER_THRESH_DEFAULT;
547 hw->cq_ecount_wait = CQ_CQE_THRESH_DEFAULT;
548 }
549
550 if (netif_running(netdev)) {
551 for (qidx = 0; qidx < pfvf->hw.cint_cnt; qidx++)
552 otx2_config_irq_coalescing(pfvf, qidx);
553 }
554
555 return 0;
556 }
557
otx2_get_rss_hash_opts(struct otx2_nic * pfvf,struct ethtool_rxnfc * nfc)558 static int otx2_get_rss_hash_opts(struct otx2_nic *pfvf,
559 struct ethtool_rxnfc *nfc)
560 {
561 struct otx2_rss_info *rss = &pfvf->hw.rss_info;
562
563 if (!(rss->flowkey_cfg &
564 (NIX_FLOW_KEY_TYPE_IPV4 | NIX_FLOW_KEY_TYPE_IPV6)))
565 return 0;
566
567 /* Mimimum is IPv4 and IPv6, SIP/DIP */
568 nfc->data = RXH_IP_SRC | RXH_IP_DST;
569 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_VLAN)
570 nfc->data |= RXH_VLAN;
571
572 switch (nfc->flow_type) {
573 case TCP_V4_FLOW:
574 case TCP_V6_FLOW:
575 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_TCP)
576 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
577 break;
578 case UDP_V4_FLOW:
579 case UDP_V6_FLOW:
580 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_UDP)
581 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
582 break;
583 case SCTP_V4_FLOW:
584 case SCTP_V6_FLOW:
585 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_SCTP)
586 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
587 break;
588 case AH_ESP_V4_FLOW:
589 case AH_ESP_V6_FLOW:
590 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_ESP)
591 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
592 break;
593 case AH_V4_FLOW:
594 case ESP_V4_FLOW:
595 case IPV4_FLOW:
596 break;
597 case AH_V6_FLOW:
598 case ESP_V6_FLOW:
599 case IPV6_FLOW:
600 break;
601 default:
602 return -EINVAL;
603 }
604
605 return 0;
606 }
607
otx2_set_rss_hash_opts(struct otx2_nic * pfvf,struct ethtool_rxnfc * nfc)608 static int otx2_set_rss_hash_opts(struct otx2_nic *pfvf,
609 struct ethtool_rxnfc *nfc)
610 {
611 struct otx2_rss_info *rss = &pfvf->hw.rss_info;
612 u32 rxh_l4 = RXH_L4_B_0_1 | RXH_L4_B_2_3;
613 u32 rss_cfg = rss->flowkey_cfg;
614
615 if (!rss->enable) {
616 netdev_err(pfvf->netdev,
617 "RSS is disabled, cannot change settings\n");
618 return -EIO;
619 }
620
621 /* Mimimum is IPv4 and IPv6, SIP/DIP */
622 if (!(nfc->data & RXH_IP_SRC) || !(nfc->data & RXH_IP_DST))
623 return -EINVAL;
624
625 if (nfc->data & RXH_VLAN)
626 rss_cfg |= NIX_FLOW_KEY_TYPE_VLAN;
627 else
628 rss_cfg &= ~NIX_FLOW_KEY_TYPE_VLAN;
629
630 switch (nfc->flow_type) {
631 case TCP_V4_FLOW:
632 case TCP_V6_FLOW:
633 /* Different config for v4 and v6 is not supported.
634 * Both of them have to be either 4-tuple or 2-tuple.
635 */
636 switch (nfc->data & rxh_l4) {
637 case 0:
638 rss_cfg &= ~NIX_FLOW_KEY_TYPE_TCP;
639 break;
640 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
641 rss_cfg |= NIX_FLOW_KEY_TYPE_TCP;
642 break;
643 default:
644 return -EINVAL;
645 }
646 break;
647 case UDP_V4_FLOW:
648 case UDP_V6_FLOW:
649 switch (nfc->data & rxh_l4) {
650 case 0:
651 rss_cfg &= ~NIX_FLOW_KEY_TYPE_UDP;
652 break;
653 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
654 rss_cfg |= NIX_FLOW_KEY_TYPE_UDP;
655 break;
656 default:
657 return -EINVAL;
658 }
659 break;
660 case SCTP_V4_FLOW:
661 case SCTP_V6_FLOW:
662 switch (nfc->data & rxh_l4) {
663 case 0:
664 rss_cfg &= ~NIX_FLOW_KEY_TYPE_SCTP;
665 break;
666 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
667 rss_cfg |= NIX_FLOW_KEY_TYPE_SCTP;
668 break;
669 default:
670 return -EINVAL;
671 }
672 break;
673 case AH_ESP_V4_FLOW:
674 case AH_ESP_V6_FLOW:
675 switch (nfc->data & rxh_l4) {
676 case 0:
677 rss_cfg &= ~(NIX_FLOW_KEY_TYPE_ESP |
678 NIX_FLOW_KEY_TYPE_AH);
679 rss_cfg |= NIX_FLOW_KEY_TYPE_VLAN |
680 NIX_FLOW_KEY_TYPE_IPV4_PROTO;
681 break;
682 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
683 /* If VLAN hashing is also requested for ESP then do not
684 * allow because of hardware 40 bytes flow key limit.
685 */
686 if (rss_cfg & NIX_FLOW_KEY_TYPE_VLAN) {
687 netdev_err(pfvf->netdev,
688 "RSS hash of ESP or AH with VLAN is not supported\n");
689 return -EOPNOTSUPP;
690 }
691
692 rss_cfg |= NIX_FLOW_KEY_TYPE_ESP | NIX_FLOW_KEY_TYPE_AH;
693 /* Disable IPv4 proto hashing since IPv6 SA+DA(32 bytes)
694 * and ESP SPI+sequence(8 bytes) uses hardware maximum
695 * limit of 40 byte flow key.
696 */
697 rss_cfg &= ~NIX_FLOW_KEY_TYPE_IPV4_PROTO;
698 break;
699 default:
700 return -EINVAL;
701 }
702 break;
703 case IPV4_FLOW:
704 case IPV6_FLOW:
705 rss_cfg = NIX_FLOW_KEY_TYPE_IPV4 | NIX_FLOW_KEY_TYPE_IPV6;
706 break;
707 default:
708 return -EINVAL;
709 }
710
711 rss->flowkey_cfg = rss_cfg;
712 otx2_set_flowkey_cfg(pfvf);
713 return 0;
714 }
715
otx2_get_rxnfc(struct net_device * dev,struct ethtool_rxnfc * nfc,u32 * rules)716 static int otx2_get_rxnfc(struct net_device *dev,
717 struct ethtool_rxnfc *nfc, u32 *rules)
718 {
719 bool ntuple = !!(dev->features & NETIF_F_NTUPLE);
720 struct otx2_nic *pfvf = netdev_priv(dev);
721 int ret = -EOPNOTSUPP;
722
723 switch (nfc->cmd) {
724 case ETHTOOL_GRXRINGS:
725 nfc->data = pfvf->hw.rx_queues;
726 ret = 0;
727 break;
728 case ETHTOOL_GRXCLSRLCNT:
729 if (netif_running(dev) && ntuple) {
730 nfc->rule_cnt = pfvf->flow_cfg->nr_flows;
731 ret = 0;
732 }
733 break;
734 case ETHTOOL_GRXCLSRULE:
735 if (netif_running(dev) && ntuple)
736 ret = otx2_get_flow(pfvf, nfc, nfc->fs.location);
737 break;
738 case ETHTOOL_GRXCLSRLALL:
739 if (netif_running(dev) && ntuple)
740 ret = otx2_get_all_flows(pfvf, nfc, rules);
741 break;
742 case ETHTOOL_GRXFH:
743 return otx2_get_rss_hash_opts(pfvf, nfc);
744 default:
745 break;
746 }
747 return ret;
748 }
749
otx2_set_rxnfc(struct net_device * dev,struct ethtool_rxnfc * nfc)750 static int otx2_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *nfc)
751 {
752 bool ntuple = !!(dev->features & NETIF_F_NTUPLE);
753 struct otx2_nic *pfvf = netdev_priv(dev);
754 int ret = -EOPNOTSUPP;
755
756 switch (nfc->cmd) {
757 case ETHTOOL_SRXFH:
758 ret = otx2_set_rss_hash_opts(pfvf, nfc);
759 break;
760 case ETHTOOL_SRXCLSRLINS:
761 if (netif_running(dev) && ntuple)
762 ret = otx2_add_flow(pfvf, nfc);
763 break;
764 case ETHTOOL_SRXCLSRLDEL:
765 if (netif_running(dev) && ntuple)
766 ret = otx2_remove_flow(pfvf, nfc->fs.location);
767 break;
768 default:
769 break;
770 }
771
772 return ret;
773 }
774
otx2_get_rxfh_key_size(struct net_device * netdev)775 static u32 otx2_get_rxfh_key_size(struct net_device *netdev)
776 {
777 struct otx2_nic *pfvf = netdev_priv(netdev);
778 struct otx2_rss_info *rss;
779
780 rss = &pfvf->hw.rss_info;
781
782 return sizeof(rss->key);
783 }
784
otx2_get_rxfh_indir_size(struct net_device * dev)785 static u32 otx2_get_rxfh_indir_size(struct net_device *dev)
786 {
787 return MAX_RSS_INDIR_TBL_SIZE;
788 }
789
otx2_rss_ctx_delete(struct otx2_nic * pfvf,int ctx_id)790 static int otx2_rss_ctx_delete(struct otx2_nic *pfvf, int ctx_id)
791 {
792 struct otx2_rss_info *rss = &pfvf->hw.rss_info;
793
794 otx2_rss_ctx_flow_del(pfvf, ctx_id);
795 kfree(rss->rss_ctx[ctx_id]);
796 rss->rss_ctx[ctx_id] = NULL;
797
798 return 0;
799 }
800
otx2_rss_ctx_create(struct otx2_nic * pfvf,u32 * rss_context)801 static int otx2_rss_ctx_create(struct otx2_nic *pfvf,
802 u32 *rss_context)
803 {
804 struct otx2_rss_info *rss = &pfvf->hw.rss_info;
805 u8 ctx;
806
807 for (ctx = 0; ctx < MAX_RSS_GROUPS; ctx++) {
808 if (!rss->rss_ctx[ctx])
809 break;
810 }
811 if (ctx == MAX_RSS_GROUPS)
812 return -EINVAL;
813
814 rss->rss_ctx[ctx] = kzalloc(sizeof(*rss->rss_ctx[ctx]), GFP_KERNEL);
815 if (!rss->rss_ctx[ctx])
816 return -ENOMEM;
817 *rss_context = ctx;
818
819 return 0;
820 }
821
822 /* RSS context configuration */
otx2_set_rxfh_context(struct net_device * dev,const u32 * indir,const u8 * hkey,const u8 hfunc,u32 * rss_context,bool delete)823 static int otx2_set_rxfh_context(struct net_device *dev, const u32 *indir,
824 const u8 *hkey, const u8 hfunc,
825 u32 *rss_context, bool delete)
826 {
827 struct otx2_nic *pfvf = netdev_priv(dev);
828 struct otx2_rss_ctx *rss_ctx;
829 struct otx2_rss_info *rss;
830 int ret, idx;
831
832 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
833 return -EOPNOTSUPP;
834
835 if (*rss_context != ETH_RXFH_CONTEXT_ALLOC &&
836 *rss_context >= MAX_RSS_GROUPS)
837 return -EINVAL;
838
839 rss = &pfvf->hw.rss_info;
840
841 if (!rss->enable) {
842 netdev_err(dev, "RSS is disabled, cannot change settings\n");
843 return -EIO;
844 }
845
846 if (hkey) {
847 memcpy(rss->key, hkey, sizeof(rss->key));
848 otx2_set_rss_key(pfvf);
849 }
850 if (delete)
851 return otx2_rss_ctx_delete(pfvf, *rss_context);
852
853 if (*rss_context == ETH_RXFH_CONTEXT_ALLOC) {
854 ret = otx2_rss_ctx_create(pfvf, rss_context);
855 if (ret)
856 return ret;
857 }
858 if (indir) {
859 rss_ctx = rss->rss_ctx[*rss_context];
860 for (idx = 0; idx < rss->rss_size; idx++)
861 rss_ctx->ind_tbl[idx] = indir[idx];
862 }
863 otx2_set_rss_table(pfvf, *rss_context);
864
865 return 0;
866 }
867
otx2_get_rxfh_context(struct net_device * dev,u32 * indir,u8 * hkey,u8 * hfunc,u32 rss_context)868 static int otx2_get_rxfh_context(struct net_device *dev, u32 *indir,
869 u8 *hkey, u8 *hfunc, u32 rss_context)
870 {
871 struct otx2_nic *pfvf = netdev_priv(dev);
872 struct otx2_rss_ctx *rss_ctx;
873 struct otx2_rss_info *rss;
874 int idx, rx_queues;
875
876 rss = &pfvf->hw.rss_info;
877
878 if (hfunc)
879 *hfunc = ETH_RSS_HASH_TOP;
880
881 if (!indir)
882 return 0;
883
884 if (!rss->enable && rss_context == DEFAULT_RSS_CONTEXT_GROUP) {
885 rx_queues = pfvf->hw.rx_queues;
886 for (idx = 0; idx < MAX_RSS_INDIR_TBL_SIZE; idx++)
887 indir[idx] = ethtool_rxfh_indir_default(idx, rx_queues);
888 return 0;
889 }
890 if (rss_context >= MAX_RSS_GROUPS)
891 return -ENOENT;
892
893 rss_ctx = rss->rss_ctx[rss_context];
894 if (!rss_ctx)
895 return -ENOENT;
896
897 if (indir) {
898 for (idx = 0; idx < rss->rss_size; idx++)
899 indir[idx] = rss_ctx->ind_tbl[idx];
900 }
901 if (hkey)
902 memcpy(hkey, rss->key, sizeof(rss->key));
903
904 return 0;
905 }
906
907 /* Get RSS configuration */
otx2_get_rxfh(struct net_device * dev,u32 * indir,u8 * hkey,u8 * hfunc)908 static int otx2_get_rxfh(struct net_device *dev, u32 *indir,
909 u8 *hkey, u8 *hfunc)
910 {
911 return otx2_get_rxfh_context(dev, indir, hkey, hfunc,
912 DEFAULT_RSS_CONTEXT_GROUP);
913 }
914
915 /* Configure RSS table and hash key */
otx2_set_rxfh(struct net_device * dev,const u32 * indir,const u8 * hkey,const u8 hfunc)916 static int otx2_set_rxfh(struct net_device *dev, const u32 *indir,
917 const u8 *hkey, const u8 hfunc)
918 {
919
920 u32 rss_context = DEFAULT_RSS_CONTEXT_GROUP;
921
922 return otx2_set_rxfh_context(dev, indir, hkey, hfunc, &rss_context, 0);
923 }
924
otx2_get_msglevel(struct net_device * netdev)925 static u32 otx2_get_msglevel(struct net_device *netdev)
926 {
927 struct otx2_nic *pfvf = netdev_priv(netdev);
928
929 return pfvf->msg_enable;
930 }
931
otx2_set_msglevel(struct net_device * netdev,u32 val)932 static void otx2_set_msglevel(struct net_device *netdev, u32 val)
933 {
934 struct otx2_nic *pfvf = netdev_priv(netdev);
935
936 pfvf->msg_enable = val;
937 }
938
otx2_get_link(struct net_device * netdev)939 static u32 otx2_get_link(struct net_device *netdev)
940 {
941 struct otx2_nic *pfvf = netdev_priv(netdev);
942
943 /* LBK link is internal and always UP */
944 if (is_otx2_lbkvf(pfvf->pdev))
945 return 1;
946 return pfvf->linfo.link_up;
947 }
948
otx2_get_ts_info(struct net_device * netdev,struct ethtool_ts_info * info)949 static int otx2_get_ts_info(struct net_device *netdev,
950 struct ethtool_ts_info *info)
951 {
952 struct otx2_nic *pfvf = netdev_priv(netdev);
953
954 if (!pfvf->ptp)
955 return ethtool_op_get_ts_info(netdev, info);
956
957 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
958 SOF_TIMESTAMPING_RX_SOFTWARE |
959 SOF_TIMESTAMPING_SOFTWARE |
960 SOF_TIMESTAMPING_TX_HARDWARE |
961 SOF_TIMESTAMPING_RX_HARDWARE |
962 SOF_TIMESTAMPING_RAW_HARDWARE;
963
964 info->phc_index = otx2_ptp_clock_index(pfvf);
965
966 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);
967 if (test_bit(CN10K_PTP_ONESTEP, &pfvf->hw.cap_flag))
968 info->tx_types |= BIT(HWTSTAMP_TX_ONESTEP_SYNC);
969
970 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
971 BIT(HWTSTAMP_FILTER_ALL);
972
973 return 0;
974 }
975
otx2_get_fwdata(struct otx2_nic * pfvf)976 static struct cgx_fw_data *otx2_get_fwdata(struct otx2_nic *pfvf)
977 {
978 struct cgx_fw_data *rsp = NULL;
979 struct msg_req *req;
980 int err = 0;
981
982 mutex_lock(&pfvf->mbox.lock);
983 req = otx2_mbox_alloc_msg_cgx_get_aux_link_info(&pfvf->mbox);
984 if (!req) {
985 mutex_unlock(&pfvf->mbox.lock);
986 return ERR_PTR(-ENOMEM);
987 }
988
989 err = otx2_sync_mbox_msg(&pfvf->mbox);
990 if (!err) {
991 rsp = (struct cgx_fw_data *)
992 otx2_mbox_get_rsp(&pfvf->mbox.mbox, 0, &req->hdr);
993 } else {
994 rsp = ERR_PTR(err);
995 }
996
997 mutex_unlock(&pfvf->mbox.lock);
998 return rsp;
999 }
1000
otx2_get_fecparam(struct net_device * netdev,struct ethtool_fecparam * fecparam)1001 static int otx2_get_fecparam(struct net_device *netdev,
1002 struct ethtool_fecparam *fecparam)
1003 {
1004 struct otx2_nic *pfvf = netdev_priv(netdev);
1005 struct cgx_fw_data *rsp;
1006 const int fec[] = {
1007 ETHTOOL_FEC_OFF,
1008 ETHTOOL_FEC_BASER,
1009 ETHTOOL_FEC_RS,
1010 ETHTOOL_FEC_BASER | ETHTOOL_FEC_RS};
1011 #define FEC_MAX_INDEX 4
1012 if (pfvf->linfo.fec < FEC_MAX_INDEX)
1013 fecparam->active_fec = fec[pfvf->linfo.fec];
1014
1015 rsp = otx2_get_fwdata(pfvf);
1016 if (IS_ERR(rsp))
1017 return PTR_ERR(rsp);
1018
1019 if (rsp->fwdata.supported_fec < FEC_MAX_INDEX) {
1020 if (!rsp->fwdata.supported_fec)
1021 fecparam->fec = ETHTOOL_FEC_NONE;
1022 else
1023 fecparam->fec = fec[rsp->fwdata.supported_fec];
1024 }
1025 return 0;
1026 }
1027
otx2_set_fecparam(struct net_device * netdev,struct ethtool_fecparam * fecparam)1028 static int otx2_set_fecparam(struct net_device *netdev,
1029 struct ethtool_fecparam *fecparam)
1030 {
1031 struct otx2_nic *pfvf = netdev_priv(netdev);
1032 struct mbox *mbox = &pfvf->mbox;
1033 struct fec_mode *req, *rsp;
1034 int err = 0, fec = 0;
1035
1036 switch (fecparam->fec) {
1037 /* Firmware does not support AUTO mode consider it as FEC_OFF */
1038 case ETHTOOL_FEC_OFF:
1039 case ETHTOOL_FEC_AUTO:
1040 fec = OTX2_FEC_OFF;
1041 break;
1042 case ETHTOOL_FEC_RS:
1043 fec = OTX2_FEC_RS;
1044 break;
1045 case ETHTOOL_FEC_BASER:
1046 fec = OTX2_FEC_BASER;
1047 break;
1048 default:
1049 netdev_warn(pfvf->netdev, "Unsupported FEC mode: %d",
1050 fecparam->fec);
1051 return -EINVAL;
1052 }
1053
1054 if (fec == pfvf->linfo.fec)
1055 return 0;
1056
1057 mutex_lock(&mbox->lock);
1058 req = otx2_mbox_alloc_msg_cgx_set_fec_param(&pfvf->mbox);
1059 if (!req) {
1060 err = -ENOMEM;
1061 goto end;
1062 }
1063 req->fec = fec;
1064 err = otx2_sync_mbox_msg(&pfvf->mbox);
1065 if (err)
1066 goto end;
1067
1068 rsp = (struct fec_mode *)otx2_mbox_get_rsp(&pfvf->mbox.mbox,
1069 0, &req->hdr);
1070 if (rsp->fec >= 0)
1071 pfvf->linfo.fec = rsp->fec;
1072 else
1073 err = rsp->fec;
1074 end:
1075 mutex_unlock(&mbox->lock);
1076 return err;
1077 }
1078
otx2_get_fec_info(u64 index,int req_mode,struct ethtool_link_ksettings * link_ksettings)1079 static void otx2_get_fec_info(u64 index, int req_mode,
1080 struct ethtool_link_ksettings *link_ksettings)
1081 {
1082 __ETHTOOL_DECLARE_LINK_MODE_MASK(otx2_fec_modes) = { 0, };
1083
1084 switch (index) {
1085 case OTX2_FEC_NONE:
1086 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT,
1087 otx2_fec_modes);
1088 break;
1089 case OTX2_FEC_BASER:
1090 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT,
1091 otx2_fec_modes);
1092 break;
1093 case OTX2_FEC_RS:
1094 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT,
1095 otx2_fec_modes);
1096 break;
1097 case OTX2_FEC_BASER | OTX2_FEC_RS:
1098 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT,
1099 otx2_fec_modes);
1100 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT,
1101 otx2_fec_modes);
1102 break;
1103 }
1104
1105 /* Add fec modes to existing modes */
1106 if (req_mode == OTX2_MODE_ADVERTISED)
1107 linkmode_or(link_ksettings->link_modes.advertising,
1108 link_ksettings->link_modes.advertising,
1109 otx2_fec_modes);
1110 else
1111 linkmode_or(link_ksettings->link_modes.supported,
1112 link_ksettings->link_modes.supported,
1113 otx2_fec_modes);
1114 }
1115
otx2_get_link_mode_info(u64 link_mode_bmap,bool req_mode,struct ethtool_link_ksettings * link_ksettings)1116 static void otx2_get_link_mode_info(u64 link_mode_bmap,
1117 bool req_mode,
1118 struct ethtool_link_ksettings
1119 *link_ksettings)
1120 {
1121 __ETHTOOL_DECLARE_LINK_MODE_MASK(otx2_link_modes) = { 0, };
1122 const int otx2_sgmii_features[6] = {
1123 ETHTOOL_LINK_MODE_10baseT_Half_BIT,
1124 ETHTOOL_LINK_MODE_10baseT_Full_BIT,
1125 ETHTOOL_LINK_MODE_100baseT_Half_BIT,
1126 ETHTOOL_LINK_MODE_100baseT_Full_BIT,
1127 ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
1128 ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1129 };
1130 /* CGX link modes to Ethtool link mode mapping */
1131 const int cgx_link_mode[27] = {
1132 0, /* SGMII Mode */
1133 ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
1134 ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1135 ETHTOOL_LINK_MODE_10000baseSR_Full_BIT,
1136 ETHTOOL_LINK_MODE_10000baseLR_Full_BIT,
1137 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
1138 0,
1139 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1140 0,
1141 0,
1142 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
1143 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
1144 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
1145 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
1146 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
1147 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
1148 0,
1149 ETHTOOL_LINK_MODE_50000baseSR_Full_BIT,
1150 0,
1151 ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
1152 ETHTOOL_LINK_MODE_50000baseCR_Full_BIT,
1153 ETHTOOL_LINK_MODE_50000baseKR_Full_BIT,
1154 0,
1155 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
1156 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
1157 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
1158 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT
1159 };
1160 u8 bit;
1161
1162 for_each_set_bit(bit, (unsigned long *)&link_mode_bmap, 27) {
1163 /* SGMII mode is set */
1164 if (bit == 0)
1165 linkmode_set_bit_array(otx2_sgmii_features,
1166 ARRAY_SIZE(otx2_sgmii_features),
1167 otx2_link_modes);
1168 else
1169 linkmode_set_bit(cgx_link_mode[bit], otx2_link_modes);
1170 }
1171
1172 if (req_mode == OTX2_MODE_ADVERTISED)
1173 linkmode_copy(link_ksettings->link_modes.advertising,
1174 otx2_link_modes);
1175 else
1176 linkmode_copy(link_ksettings->link_modes.supported,
1177 otx2_link_modes);
1178 }
1179
otx2_get_link_ksettings(struct net_device * netdev,struct ethtool_link_ksettings * cmd)1180 static int otx2_get_link_ksettings(struct net_device *netdev,
1181 struct ethtool_link_ksettings *cmd)
1182 {
1183 struct otx2_nic *pfvf = netdev_priv(netdev);
1184 struct cgx_fw_data *rsp = NULL;
1185
1186 cmd->base.duplex = pfvf->linfo.full_duplex;
1187 cmd->base.speed = pfvf->linfo.speed;
1188 cmd->base.autoneg = pfvf->linfo.an;
1189
1190 rsp = otx2_get_fwdata(pfvf);
1191 if (IS_ERR(rsp))
1192 return PTR_ERR(rsp);
1193
1194 if (rsp->fwdata.supported_an)
1195 ethtool_link_ksettings_add_link_mode(cmd,
1196 supported,
1197 Autoneg);
1198
1199 otx2_get_link_mode_info(rsp->fwdata.advertised_link_modes,
1200 OTX2_MODE_ADVERTISED, cmd);
1201 otx2_get_fec_info(rsp->fwdata.advertised_fec,
1202 OTX2_MODE_ADVERTISED, cmd);
1203 otx2_get_link_mode_info(rsp->fwdata.supported_link_modes,
1204 OTX2_MODE_SUPPORTED, cmd);
1205 otx2_get_fec_info(rsp->fwdata.supported_fec,
1206 OTX2_MODE_SUPPORTED, cmd);
1207 return 0;
1208 }
1209
otx2_get_advertised_mode(const struct ethtool_link_ksettings * cmd,u64 * mode)1210 static void otx2_get_advertised_mode(const struct ethtool_link_ksettings *cmd,
1211 u64 *mode)
1212 {
1213 u32 bit_pos;
1214
1215 /* Firmware does not support requesting multiple advertised modes
1216 * return first set bit
1217 */
1218 bit_pos = find_first_bit(cmd->link_modes.advertising,
1219 __ETHTOOL_LINK_MODE_MASK_NBITS);
1220 if (bit_pos != __ETHTOOL_LINK_MODE_MASK_NBITS)
1221 *mode = bit_pos;
1222 }
1223
otx2_set_link_ksettings(struct net_device * netdev,const struct ethtool_link_ksettings * cmd)1224 static int otx2_set_link_ksettings(struct net_device *netdev,
1225 const struct ethtool_link_ksettings *cmd)
1226 {
1227 struct otx2_nic *pf = netdev_priv(netdev);
1228 struct ethtool_link_ksettings cur_ks;
1229 struct cgx_set_link_mode_req *req;
1230 struct mbox *mbox = &pf->mbox;
1231 int err = 0;
1232
1233 memset(&cur_ks, 0, sizeof(struct ethtool_link_ksettings));
1234
1235 if (!ethtool_validate_speed(cmd->base.speed) ||
1236 !ethtool_validate_duplex(cmd->base.duplex))
1237 return -EINVAL;
1238
1239 if (cmd->base.autoneg != AUTONEG_ENABLE &&
1240 cmd->base.autoneg != AUTONEG_DISABLE)
1241 return -EINVAL;
1242
1243 otx2_get_link_ksettings(netdev, &cur_ks);
1244
1245 /* Check requested modes against supported modes by hardware */
1246 if (!linkmode_subset(cmd->link_modes.advertising,
1247 cur_ks.link_modes.supported))
1248 return -EINVAL;
1249
1250 mutex_lock(&mbox->lock);
1251 req = otx2_mbox_alloc_msg_cgx_set_link_mode(&pf->mbox);
1252 if (!req) {
1253 err = -ENOMEM;
1254 goto end;
1255 }
1256
1257 req->args.speed = cmd->base.speed;
1258 /* firmware expects 1 for half duplex and 0 for full duplex
1259 * hence inverting
1260 */
1261 req->args.duplex = cmd->base.duplex ^ 0x1;
1262 req->args.an = cmd->base.autoneg;
1263 otx2_get_advertised_mode(cmd, &req->args.mode);
1264
1265 err = otx2_sync_mbox_msg(&pf->mbox);
1266 end:
1267 mutex_unlock(&mbox->lock);
1268 return err;
1269 }
1270
1271 static const struct ethtool_ops otx2_ethtool_ops = {
1272 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
1273 ETHTOOL_COALESCE_MAX_FRAMES |
1274 ETHTOOL_COALESCE_USE_ADAPTIVE,
1275 .supported_ring_params = ETHTOOL_RING_USE_RX_BUF_LEN |
1276 ETHTOOL_RING_USE_CQE_SIZE,
1277 .get_link = otx2_get_link,
1278 .get_drvinfo = otx2_get_drvinfo,
1279 .get_strings = otx2_get_strings,
1280 .get_ethtool_stats = otx2_get_ethtool_stats,
1281 .get_sset_count = otx2_get_sset_count,
1282 .set_channels = otx2_set_channels,
1283 .get_channels = otx2_get_channels,
1284 .get_ringparam = otx2_get_ringparam,
1285 .set_ringparam = otx2_set_ringparam,
1286 .get_coalesce = otx2_get_coalesce,
1287 .set_coalesce = otx2_set_coalesce,
1288 .get_rxnfc = otx2_get_rxnfc,
1289 .set_rxnfc = otx2_set_rxnfc,
1290 .get_rxfh_key_size = otx2_get_rxfh_key_size,
1291 .get_rxfh_indir_size = otx2_get_rxfh_indir_size,
1292 .get_rxfh = otx2_get_rxfh,
1293 .set_rxfh = otx2_set_rxfh,
1294 .get_rxfh_context = otx2_get_rxfh_context,
1295 .set_rxfh_context = otx2_set_rxfh_context,
1296 .get_msglevel = otx2_get_msglevel,
1297 .set_msglevel = otx2_set_msglevel,
1298 .get_pauseparam = otx2_get_pauseparam,
1299 .set_pauseparam = otx2_set_pauseparam,
1300 .get_ts_info = otx2_get_ts_info,
1301 .get_fecparam = otx2_get_fecparam,
1302 .set_fecparam = otx2_set_fecparam,
1303 .get_link_ksettings = otx2_get_link_ksettings,
1304 .set_link_ksettings = otx2_set_link_ksettings,
1305 };
1306
otx2_set_ethtool_ops(struct net_device * netdev)1307 void otx2_set_ethtool_ops(struct net_device *netdev)
1308 {
1309 netdev->ethtool_ops = &otx2_ethtool_ops;
1310 }
1311
1312 /* VF's ethtool APIs */
otx2vf_get_drvinfo(struct net_device * netdev,struct ethtool_drvinfo * info)1313 static void otx2vf_get_drvinfo(struct net_device *netdev,
1314 struct ethtool_drvinfo *info)
1315 {
1316 struct otx2_nic *vf = netdev_priv(netdev);
1317
1318 strscpy(info->driver, DRV_VF_NAME, sizeof(info->driver));
1319 strscpy(info->bus_info, pci_name(vf->pdev), sizeof(info->bus_info));
1320 }
1321
otx2vf_get_strings(struct net_device * netdev,u32 sset,u8 * data)1322 static void otx2vf_get_strings(struct net_device *netdev, u32 sset, u8 *data)
1323 {
1324 struct otx2_nic *vf = netdev_priv(netdev);
1325 int stats;
1326
1327 if (sset != ETH_SS_STATS)
1328 return;
1329
1330 for (stats = 0; stats < otx2_n_dev_stats; stats++) {
1331 memcpy(data, otx2_dev_stats[stats].name, ETH_GSTRING_LEN);
1332 data += ETH_GSTRING_LEN;
1333 }
1334
1335 for (stats = 0; stats < otx2_n_drv_stats; stats++) {
1336 memcpy(data, otx2_drv_stats[stats].name, ETH_GSTRING_LEN);
1337 data += ETH_GSTRING_LEN;
1338 }
1339
1340 otx2_get_qset_strings(vf, &data, 0);
1341
1342 strcpy(data, "reset_count");
1343 data += ETH_GSTRING_LEN;
1344 }
1345
otx2vf_get_ethtool_stats(struct net_device * netdev,struct ethtool_stats * stats,u64 * data)1346 static void otx2vf_get_ethtool_stats(struct net_device *netdev,
1347 struct ethtool_stats *stats, u64 *data)
1348 {
1349 struct otx2_nic *vf = netdev_priv(netdev);
1350 int stat;
1351
1352 otx2_get_dev_stats(vf);
1353 for (stat = 0; stat < otx2_n_dev_stats; stat++)
1354 *(data++) = ((u64 *)&vf->hw.dev_stats)
1355 [otx2_dev_stats[stat].index];
1356
1357 for (stat = 0; stat < otx2_n_drv_stats; stat++)
1358 *(data++) = atomic_read(&((atomic_t *)&vf->hw.drv_stats)
1359 [otx2_drv_stats[stat].index]);
1360
1361 otx2_get_qset_stats(vf, stats, &data);
1362 *(data++) = vf->reset_count;
1363 }
1364
otx2vf_get_sset_count(struct net_device * netdev,int sset)1365 static int otx2vf_get_sset_count(struct net_device *netdev, int sset)
1366 {
1367 struct otx2_nic *vf = netdev_priv(netdev);
1368 int qstats_count;
1369
1370 if (sset != ETH_SS_STATS)
1371 return -EINVAL;
1372
1373 qstats_count = otx2_n_queue_stats *
1374 (vf->hw.rx_queues + vf->hw.tx_queues);
1375
1376 return otx2_n_dev_stats + otx2_n_drv_stats + qstats_count + 1;
1377 }
1378
otx2vf_get_link_ksettings(struct net_device * netdev,struct ethtool_link_ksettings * cmd)1379 static int otx2vf_get_link_ksettings(struct net_device *netdev,
1380 struct ethtool_link_ksettings *cmd)
1381 {
1382 struct otx2_nic *pfvf = netdev_priv(netdev);
1383
1384 if (is_otx2_lbkvf(pfvf->pdev)) {
1385 cmd->base.duplex = DUPLEX_FULL;
1386 cmd->base.speed = SPEED_100000;
1387 } else {
1388 return otx2_get_link_ksettings(netdev, cmd);
1389 }
1390 return 0;
1391 }
1392
1393 static const struct ethtool_ops otx2vf_ethtool_ops = {
1394 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
1395 ETHTOOL_COALESCE_MAX_FRAMES |
1396 ETHTOOL_COALESCE_USE_ADAPTIVE,
1397 .supported_ring_params = ETHTOOL_RING_USE_RX_BUF_LEN |
1398 ETHTOOL_RING_USE_CQE_SIZE,
1399 .get_link = otx2_get_link,
1400 .get_drvinfo = otx2vf_get_drvinfo,
1401 .get_strings = otx2vf_get_strings,
1402 .get_ethtool_stats = otx2vf_get_ethtool_stats,
1403 .get_sset_count = otx2vf_get_sset_count,
1404 .set_channels = otx2_set_channels,
1405 .get_channels = otx2_get_channels,
1406 .get_rxnfc = otx2_get_rxnfc,
1407 .set_rxnfc = otx2_set_rxnfc,
1408 .get_rxfh_key_size = otx2_get_rxfh_key_size,
1409 .get_rxfh_indir_size = otx2_get_rxfh_indir_size,
1410 .get_rxfh = otx2_get_rxfh,
1411 .set_rxfh = otx2_set_rxfh,
1412 .get_rxfh_context = otx2_get_rxfh_context,
1413 .set_rxfh_context = otx2_set_rxfh_context,
1414 .get_ringparam = otx2_get_ringparam,
1415 .set_ringparam = otx2_set_ringparam,
1416 .get_coalesce = otx2_get_coalesce,
1417 .set_coalesce = otx2_set_coalesce,
1418 .get_msglevel = otx2_get_msglevel,
1419 .set_msglevel = otx2_set_msglevel,
1420 .get_pauseparam = otx2_get_pauseparam,
1421 .set_pauseparam = otx2_set_pauseparam,
1422 .get_link_ksettings = otx2vf_get_link_ksettings,
1423 .get_ts_info = otx2_get_ts_info,
1424 };
1425
otx2vf_set_ethtool_ops(struct net_device * netdev)1426 void otx2vf_set_ethtool_ops(struct net_device *netdev)
1427 {
1428 netdev->ethtool_ops = &otx2vf_ethtool_ops;
1429 }
1430 EXPORT_SYMBOL(otx2vf_set_ethtool_ops);
1431