1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * OMAP2+ common Power & Reset Management (PRM) IP block functions
4  *
5  * Copyright (C) 2011 Texas Instruments, Inc.
6  * Tero Kristo <t-kristo@ti.com>
7  *
8  * For historical purposes, the API used to configure the PRM
9  * interrupt handler refers to it as the "PRCM interrupt."  The
10  * underlying registers are located in the PRM on OMAP3/4.
11  *
12  * XXX This code should eventually be moved to a PRM driver.
13  */
14 
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/init.h>
18 #include <linux/io.h>
19 #include <linux/irq.h>
20 #include <linux/interrupt.h>
21 #include <linux/slab.h>
22 #include <linux/of.h>
23 #include <linux/of_address.h>
24 #include <linux/clk-provider.h>
25 #include <linux/clk/ti.h>
26 
27 #include "soc.h"
28 #include "prm2xxx_3xxx.h"
29 #include "prm2xxx.h"
30 #include "prm3xxx.h"
31 #include "prm33xx.h"
32 #include "prm44xx.h"
33 #include "prm54xx.h"
34 #include "prm7xx.h"
35 #include "prcm43xx.h"
36 #include "common.h"
37 #include "clock.h"
38 #include "cm.h"
39 #include "control.h"
40 
41 /*
42  * OMAP_PRCM_MAX_NR_PENDING_REG: maximum number of PRM_IRQ*_MPU regs
43  * XXX this is technically not needed, since
44  * omap_prcm_register_chain_handler() could allocate this based on the
45  * actual amount of memory needed for the SoC
46  */
47 #define OMAP_PRCM_MAX_NR_PENDING_REG		2
48 
49 /*
50  * prcm_irq_chips: an array of all of the "generic IRQ chips" in use
51  * by the PRCM interrupt handler code.  There will be one 'chip' per
52  * PRM_{IRQSTATUS,IRQENABLE}_MPU register pair.  (So OMAP3 will have
53  * one "chip" and OMAP4 will have two.)
54  */
55 static struct irq_chip_generic **prcm_irq_chips;
56 
57 /*
58  * prcm_irq_setup: the PRCM IRQ parameters for the hardware the code
59  * is currently running on.  Defined and passed by initialization code
60  * that calls omap_prcm_register_chain_handler().
61  */
62 static struct omap_prcm_irq_setup *prcm_irq_setup;
63 
64 /* prm_base: base virtual address of the PRM IP block */
65 struct omap_domain_base prm_base;
66 
67 u16 prm_features;
68 
69 /*
70  * prm_ll_data: function pointers to SoC-specific implementations of
71  * common PRM functions
72  */
73 static struct prm_ll_data null_prm_ll_data;
74 static struct prm_ll_data *prm_ll_data = &null_prm_ll_data;
75 
76 /* Private functions */
77 
78 /*
79  * Move priority events from events to priority_events array
80  */
omap_prcm_events_filter_priority(unsigned long * events,unsigned long * priority_events)81 static void omap_prcm_events_filter_priority(unsigned long *events,
82 	unsigned long *priority_events)
83 {
84 	int i;
85 
86 	for (i = 0; i < prcm_irq_setup->nr_regs; i++) {
87 		priority_events[i] =
88 			events[i] & prcm_irq_setup->priority_mask[i];
89 		events[i] ^= priority_events[i];
90 	}
91 }
92 
93 /*
94  * PRCM Interrupt Handler
95  *
96  * This is a common handler for the OMAP PRCM interrupts. Pending
97  * interrupts are detected by a call to prcm_pending_events and
98  * dispatched accordingly. Clearing of the wakeup events should be
99  * done by the SoC specific individual handlers.
100  */
omap_prcm_irq_handler(struct irq_desc * desc)101 static void omap_prcm_irq_handler(struct irq_desc *desc)
102 {
103 	unsigned long pending[OMAP_PRCM_MAX_NR_PENDING_REG];
104 	unsigned long priority_pending[OMAP_PRCM_MAX_NR_PENDING_REG];
105 	struct irq_chip *chip = irq_desc_get_chip(desc);
106 	unsigned int virtirq;
107 	int nr_irq = prcm_irq_setup->nr_regs * 32;
108 
109 	/*
110 	 * If we are suspended, mask all interrupts from PRCM level,
111 	 * this does not ack them, and they will be pending until we
112 	 * re-enable the interrupts, at which point the
113 	 * omap_prcm_irq_handler will be executed again.  The
114 	 * _save_and_clear_irqen() function must ensure that the PRM
115 	 * write to disable all IRQs has reached the PRM before
116 	 * returning, or spurious PRCM interrupts may occur during
117 	 * suspend.
118 	 */
119 	if (prcm_irq_setup->suspended) {
120 		prcm_irq_setup->save_and_clear_irqen(prcm_irq_setup->saved_mask);
121 		prcm_irq_setup->suspend_save_flag = true;
122 	}
123 
124 	/*
125 	 * Loop until all pending irqs are handled, since
126 	 * generic_handle_irq() can cause new irqs to come
127 	 */
128 	while (!prcm_irq_setup->suspended) {
129 		prcm_irq_setup->read_pending_irqs(pending);
130 
131 		/* No bit set, then all IRQs are handled */
132 		if (find_first_bit(pending, nr_irq) >= nr_irq)
133 			break;
134 
135 		omap_prcm_events_filter_priority(pending, priority_pending);
136 
137 		/*
138 		 * Loop on all currently pending irqs so that new irqs
139 		 * cannot starve previously pending irqs
140 		 */
141 
142 		/* Serve priority events first */
143 		for_each_set_bit(virtirq, priority_pending, nr_irq)
144 			generic_handle_irq(prcm_irq_setup->base_irq + virtirq);
145 
146 		/* Serve normal events next */
147 		for_each_set_bit(virtirq, pending, nr_irq)
148 			generic_handle_irq(prcm_irq_setup->base_irq + virtirq);
149 	}
150 	if (chip->irq_ack)
151 		chip->irq_ack(&desc->irq_data);
152 	if (chip->irq_eoi)
153 		chip->irq_eoi(&desc->irq_data);
154 	chip->irq_unmask(&desc->irq_data);
155 
156 	prcm_irq_setup->ocp_barrier(); /* avoid spurious IRQs */
157 }
158 
159 /* Public functions */
160 
161 /**
162  * omap_prcm_event_to_irq - given a PRCM event name, returns the
163  * corresponding IRQ on which the handler should be registered
164  * @name: name of the PRCM interrupt bit to look up - see struct omap_prcm_irq
165  *
166  * Returns the Linux internal IRQ ID corresponding to @name upon success,
167  * or -ENOENT upon failure.
168  */
omap_prcm_event_to_irq(const char * name)169 int omap_prcm_event_to_irq(const char *name)
170 {
171 	int i;
172 
173 	if (!prcm_irq_setup || !name)
174 		return -ENOENT;
175 
176 	for (i = 0; i < prcm_irq_setup->nr_irqs; i++)
177 		if (!strcmp(prcm_irq_setup->irqs[i].name, name))
178 			return prcm_irq_setup->base_irq +
179 				prcm_irq_setup->irqs[i].offset;
180 
181 	return -ENOENT;
182 }
183 
184 /**
185  * omap_prcm_irq_cleanup - reverses memory allocated and other steps
186  * done by omap_prcm_register_chain_handler()
187  *
188  * No return value.
189  */
omap_prcm_irq_cleanup(void)190 static void omap_prcm_irq_cleanup(void)
191 {
192 	unsigned int irq;
193 	int i;
194 
195 	if (!prcm_irq_setup) {
196 		pr_err("PRCM: IRQ handler not initialized; cannot cleanup\n");
197 		return;
198 	}
199 
200 	if (prcm_irq_chips) {
201 		for (i = 0; i < prcm_irq_setup->nr_regs; i++) {
202 			if (prcm_irq_chips[i])
203 				irq_remove_generic_chip(prcm_irq_chips[i],
204 					0xffffffff, 0, 0);
205 			prcm_irq_chips[i] = NULL;
206 		}
207 		kfree(prcm_irq_chips);
208 		prcm_irq_chips = NULL;
209 	}
210 
211 	kfree(prcm_irq_setup->saved_mask);
212 	prcm_irq_setup->saved_mask = NULL;
213 
214 	kfree(prcm_irq_setup->priority_mask);
215 	prcm_irq_setup->priority_mask = NULL;
216 
217 	irq = prcm_irq_setup->irq;
218 	irq_set_chained_handler(irq, NULL);
219 
220 	if (prcm_irq_setup->base_irq > 0)
221 		irq_free_descs(prcm_irq_setup->base_irq,
222 			prcm_irq_setup->nr_regs * 32);
223 	prcm_irq_setup->base_irq = 0;
224 }
225 
omap_prcm_irq_prepare(void)226 void omap_prcm_irq_prepare(void)
227 {
228 	prcm_irq_setup->suspended = true;
229 }
230 
omap_prcm_irq_complete(void)231 void omap_prcm_irq_complete(void)
232 {
233 	prcm_irq_setup->suspended = false;
234 
235 	/* If we have not saved the masks, do not attempt to restore */
236 	if (!prcm_irq_setup->suspend_save_flag)
237 		return;
238 
239 	prcm_irq_setup->suspend_save_flag = false;
240 
241 	/*
242 	 * Re-enable all masked PRCM irq sources, this causes the PRCM
243 	 * interrupt to fire immediately if the events were masked
244 	 * previously in the chain handler
245 	 */
246 	prcm_irq_setup->restore_irqen(prcm_irq_setup->saved_mask);
247 }
248 
249 /**
250  * omap_prcm_register_chain_handler - initializes the prcm chained interrupt
251  * handler based on provided parameters
252  * @irq_setup: hardware data about the underlying PRM/PRCM
253  *
254  * Set up the PRCM chained interrupt handler on the PRCM IRQ.  Sets up
255  * one generic IRQ chip per PRM interrupt status/enable register pair.
256  * Returns 0 upon success, -EINVAL if called twice or if invalid
257  * arguments are passed, or -ENOMEM on any other error.
258  */
omap_prcm_register_chain_handler(struct omap_prcm_irq_setup * irq_setup)259 int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup)
260 {
261 	int nr_regs;
262 	u32 mask[OMAP_PRCM_MAX_NR_PENDING_REG];
263 	int offset, i, irq;
264 	struct irq_chip_generic *gc;
265 	struct irq_chip_type *ct;
266 
267 	if (!irq_setup)
268 		return -EINVAL;
269 
270 	nr_regs = irq_setup->nr_regs;
271 
272 	if (prcm_irq_setup) {
273 		pr_err("PRCM: already initialized; won't reinitialize\n");
274 		return -EINVAL;
275 	}
276 
277 	if (nr_regs > OMAP_PRCM_MAX_NR_PENDING_REG) {
278 		pr_err("PRCM: nr_regs too large\n");
279 		return -EINVAL;
280 	}
281 
282 	prcm_irq_setup = irq_setup;
283 
284 	prcm_irq_chips = kcalloc(nr_regs, sizeof(void *), GFP_KERNEL);
285 	prcm_irq_setup->saved_mask = kcalloc(nr_regs, sizeof(u32),
286 					     GFP_KERNEL);
287 	prcm_irq_setup->priority_mask = kcalloc(nr_regs, sizeof(u32),
288 						GFP_KERNEL);
289 
290 	if (!prcm_irq_chips || !prcm_irq_setup->saved_mask ||
291 	    !prcm_irq_setup->priority_mask)
292 		goto err;
293 
294 	memset(mask, 0, sizeof(mask));
295 
296 	for (i = 0; i < irq_setup->nr_irqs; i++) {
297 		offset = irq_setup->irqs[i].offset;
298 		mask[offset >> 5] |= 1 << (offset & 0x1f);
299 		if (irq_setup->irqs[i].priority)
300 			irq_setup->priority_mask[offset >> 5] |=
301 				1 << (offset & 0x1f);
302 	}
303 
304 	irq = irq_setup->irq;
305 	irq_set_chained_handler(irq, omap_prcm_irq_handler);
306 
307 	irq_setup->base_irq = irq_alloc_descs(-1, 0, irq_setup->nr_regs * 32,
308 		0);
309 
310 	if (irq_setup->base_irq < 0) {
311 		pr_err("PRCM: failed to allocate irq descs: %d\n",
312 			irq_setup->base_irq);
313 		goto err;
314 	}
315 
316 	for (i = 0; i < irq_setup->nr_regs; i++) {
317 		gc = irq_alloc_generic_chip("PRCM", 1,
318 			irq_setup->base_irq + i * 32, prm_base.va,
319 			handle_level_irq);
320 
321 		if (!gc) {
322 			pr_err("PRCM: failed to allocate generic chip\n");
323 			goto err;
324 		}
325 		ct = gc->chip_types;
326 		ct->chip.irq_ack = irq_gc_ack_set_bit;
327 		ct->chip.irq_mask = irq_gc_mask_clr_bit;
328 		ct->chip.irq_unmask = irq_gc_mask_set_bit;
329 
330 		ct->regs.ack = irq_setup->ack + i * 4;
331 		ct->regs.mask = irq_setup->mask + i * 4;
332 
333 		irq_setup_generic_chip(gc, mask[i], 0, IRQ_NOREQUEST, 0);
334 		prcm_irq_chips[i] = gc;
335 	}
336 
337 	irq = omap_prcm_event_to_irq("io");
338 	omap_pcs_legacy_init(irq, irq_setup->reconfigure_io_chain);
339 
340 	return 0;
341 
342 err:
343 	omap_prcm_irq_cleanup();
344 	return -ENOMEM;
345 }
346 
347 /**
348  * prm_was_any_context_lost_old - was device context lost? (old API)
349  * @part: PRM partition ID (e.g., OMAP4430_PRM_PARTITION)
350  * @inst: PRM instance offset (e.g., OMAP4430_PRM_MPU_INST)
351  * @idx: CONTEXT register offset
352  *
353  * Return 1 if any bits were set in the *_CONTEXT_* register
354  * identified by (@part, @inst, @idx), which means that some context
355  * was lost for that module; otherwise, return 0.  XXX Deprecated;
356  * callers need to use a less-SoC-dependent way to identify hardware
357  * IP blocks.
358  */
prm_was_any_context_lost_old(u8 part,s16 inst,u16 idx)359 bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx)
360 {
361 	bool ret = true;
362 
363 	if (prm_ll_data->was_any_context_lost_old)
364 		ret = prm_ll_data->was_any_context_lost_old(part, inst, idx);
365 	else
366 		WARN_ONCE(1, "prm: %s: no mapping function defined\n",
367 			  __func__);
368 
369 	return ret;
370 }
371 
372 /**
373  * prm_clear_context_lost_flags_old - clear context loss flags (old API)
374  * @part: PRM partition ID (e.g., OMAP4430_PRM_PARTITION)
375  * @inst: PRM instance offset (e.g., OMAP4430_PRM_MPU_INST)
376  * @idx: CONTEXT register offset
377  *
378  * Clear hardware context loss bits for the module identified by
379  * (@part, @inst, @idx).  No return value.  XXX Deprecated; callers
380  * need to use a less-SoC-dependent way to identify hardware IP
381  * blocks.
382  */
prm_clear_context_loss_flags_old(u8 part,s16 inst,u16 idx)383 void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx)
384 {
385 	if (prm_ll_data->clear_context_loss_flags_old)
386 		prm_ll_data->clear_context_loss_flags_old(part, inst, idx);
387 	else
388 		WARN_ONCE(1, "prm: %s: no mapping function defined\n",
389 			  __func__);
390 }
391 
392 /**
393  * omap_prm_assert_hardreset - assert hardreset for an IP block
394  * @shift: register bit shift corresponding to the reset line
395  * @part: PRM partition
396  * @prm_mod: PRM submodule base or instance offset
397  * @offset: register offset
398  *
399  * Asserts a hardware reset line for an IP block.
400  */
omap_prm_assert_hardreset(u8 shift,u8 part,s16 prm_mod,u16 offset)401 int omap_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset)
402 {
403 	if (!prm_ll_data->assert_hardreset) {
404 		WARN_ONCE(1, "prm: %s: no mapping function defined\n",
405 			  __func__);
406 		return -EINVAL;
407 	}
408 
409 	return prm_ll_data->assert_hardreset(shift, part, prm_mod, offset);
410 }
411 
412 /**
413  * omap_prm_deassert_hardreset - deassert hardreset for an IP block
414  * @shift: register bit shift corresponding to the reset line
415  * @st_shift: reset status bit shift corresponding to the reset line
416  * @part: PRM partition
417  * @prm_mod: PRM submodule base or instance offset
418  * @offset: register offset
419  * @st_offset: status register offset
420  *
421  * Deasserts a hardware reset line for an IP block.
422  */
omap_prm_deassert_hardreset(u8 shift,u8 st_shift,u8 part,s16 prm_mod,u16 offset,u16 st_offset)423 int omap_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 prm_mod,
424 				u16 offset, u16 st_offset)
425 {
426 	if (!prm_ll_data->deassert_hardreset) {
427 		WARN_ONCE(1, "prm: %s: no mapping function defined\n",
428 			  __func__);
429 		return -EINVAL;
430 	}
431 
432 	return prm_ll_data->deassert_hardreset(shift, st_shift, part, prm_mod,
433 					       offset, st_offset);
434 }
435 
436 /**
437  * omap_prm_is_hardreset_asserted - check the hardreset status for an IP block
438  * @shift: register bit shift corresponding to the reset line
439  * @part: PRM partition
440  * @prm_mod: PRM submodule base or instance offset
441  * @offset: register offset
442  *
443  * Checks if a hardware reset line for an IP block is enabled or not.
444  */
omap_prm_is_hardreset_asserted(u8 shift,u8 part,s16 prm_mod,u16 offset)445 int omap_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset)
446 {
447 	if (!prm_ll_data->is_hardreset_asserted) {
448 		WARN_ONCE(1, "prm: %s: no mapping function defined\n",
449 			  __func__);
450 		return -EINVAL;
451 	}
452 
453 	return prm_ll_data->is_hardreset_asserted(shift, part, prm_mod, offset);
454 }
455 
456 /**
457  * omap_prm_reset_system - trigger global SW reset
458  *
459  * Triggers SoC specific global warm reset to reboot the device.
460  */
omap_prm_reset_system(void)461 void omap_prm_reset_system(void)
462 {
463 	if (!prm_ll_data->reset_system) {
464 		WARN_ONCE(1, "prm: %s: no mapping function defined\n",
465 			  __func__);
466 		return;
467 	}
468 
469 	prm_ll_data->reset_system();
470 
471 	while (1) {
472 		cpu_relax();
473 		wfe();
474 	}
475 }
476 
477 /**
478  * omap_prm_clear_mod_irqs - clear wake-up events from PRCM interrupt
479  * @module: PRM module to clear wakeups from
480  * @regs: register to clear
481  * @wkst_mask: wkst bits to clear
482  *
483  * Clears any wakeup events for the module and register set defined.
484  * Uses SoC specific implementation to do the actual wakeup status
485  * clearing.
486  */
omap_prm_clear_mod_irqs(s16 module,u8 regs,u32 wkst_mask)487 int omap_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask)
488 {
489 	if (!prm_ll_data->clear_mod_irqs) {
490 		WARN_ONCE(1, "prm: %s: no mapping function defined\n",
491 			  __func__);
492 		return -EINVAL;
493 	}
494 
495 	return prm_ll_data->clear_mod_irqs(module, regs, wkst_mask);
496 }
497 
498 /**
499  * omap_prm_vp_check_txdone - check voltage processor TX done status
500  *
501  * Checks if voltage processor transmission has been completed.
502  * Returns non-zero if a transmission has completed, 0 otherwise.
503  */
omap_prm_vp_check_txdone(u8 vp_id)504 u32 omap_prm_vp_check_txdone(u8 vp_id)
505 {
506 	if (!prm_ll_data->vp_check_txdone) {
507 		WARN_ONCE(1, "prm: %s: no mapping function defined\n",
508 			  __func__);
509 		return 0;
510 	}
511 
512 	return prm_ll_data->vp_check_txdone(vp_id);
513 }
514 
515 /**
516  * omap_prm_vp_clear_txdone - clears voltage processor TX done status
517  *
518  * Clears the status bit for completed voltage processor transmission
519  * returned by prm_vp_check_txdone.
520  */
omap_prm_vp_clear_txdone(u8 vp_id)521 void omap_prm_vp_clear_txdone(u8 vp_id)
522 {
523 	if (!prm_ll_data->vp_clear_txdone) {
524 		WARN_ONCE(1, "prm: %s: no mapping function defined\n",
525 			  __func__);
526 		return;
527 	}
528 
529 	prm_ll_data->vp_clear_txdone(vp_id);
530 }
531 
532 /**
533  * prm_register - register per-SoC low-level data with the PRM
534  * @pld: low-level per-SoC OMAP PRM data & function pointers to register
535  *
536  * Register per-SoC low-level OMAP PRM data and function pointers with
537  * the OMAP PRM common interface.  The caller must keep the data
538  * pointed to by @pld valid until it calls prm_unregister() and
539  * it returns successfully.  Returns 0 upon success, -EINVAL if @pld
540  * is NULL, or -EEXIST if prm_register() has already been called
541  * without an intervening prm_unregister().
542  */
prm_register(struct prm_ll_data * pld)543 int prm_register(struct prm_ll_data *pld)
544 {
545 	if (!pld)
546 		return -EINVAL;
547 
548 	if (prm_ll_data != &null_prm_ll_data)
549 		return -EEXIST;
550 
551 	prm_ll_data = pld;
552 
553 	return 0;
554 }
555 
556 /**
557  * prm_unregister - unregister per-SoC low-level data & function pointers
558  * @pld: low-level per-SoC OMAP PRM data & function pointers to unregister
559  *
560  * Unregister per-SoC low-level OMAP PRM data and function pointers
561  * that were previously registered with prm_register().  The
562  * caller may not destroy any of the data pointed to by @pld until
563  * this function returns successfully.  Returns 0 upon success, or
564  * -EINVAL if @pld is NULL or if @pld does not match the struct
565  * prm_ll_data * previously registered by prm_register().
566  */
prm_unregister(struct prm_ll_data * pld)567 int prm_unregister(struct prm_ll_data *pld)
568 {
569 	if (!pld || prm_ll_data != pld)
570 		return -EINVAL;
571 
572 	prm_ll_data = &null_prm_ll_data;
573 
574 	return 0;
575 }
576 
577 #ifdef CONFIG_ARCH_OMAP2
578 static struct omap_prcm_init_data omap2_prm_data __initdata = {
579 	.index = TI_CLKM_PRM,
580 	.init = omap2xxx_prm_init,
581 };
582 #endif
583 
584 #ifdef CONFIG_ARCH_OMAP3
585 static struct omap_prcm_init_data omap3_prm_data __initdata = {
586 	.index = TI_CLKM_PRM,
587 	.init = omap3xxx_prm_init,
588 
589 	/*
590 	 * IVA2 offset is a negative value, must offset the prm_base
591 	 * address by this to get it to positive
592 	 */
593 	.offset = -OMAP3430_IVA2_MOD,
594 };
595 #endif
596 
597 #if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_TI81XX)
598 static struct omap_prcm_init_data am3_prm_data __initdata = {
599 	.index = TI_CLKM_PRM,
600 	.init = am33xx_prm_init,
601 };
602 #endif
603 
604 #ifdef CONFIG_SOC_TI81XX
605 static struct omap_prcm_init_data dm814_pllss_data __initdata = {
606 	.index = TI_CLKM_PLLSS,
607 	.init = am33xx_prm_init,
608 };
609 #endif
610 
611 #ifdef CONFIG_ARCH_OMAP4
612 static struct omap_prcm_init_data omap4_prm_data __initdata = {
613 	.index = TI_CLKM_PRM,
614 	.init = omap44xx_prm_init,
615 	.device_inst_offset = OMAP4430_PRM_DEVICE_INST,
616 	.flags = PRM_HAS_IO_WAKEUP | PRM_HAS_VOLTAGE,
617 };
618 #endif
619 
620 #ifdef CONFIG_SOC_OMAP5
621 static struct omap_prcm_init_data omap5_prm_data __initdata = {
622 	.index = TI_CLKM_PRM,
623 	.init = omap44xx_prm_init,
624 	.device_inst_offset = OMAP54XX_PRM_DEVICE_INST,
625 	.flags = PRM_HAS_IO_WAKEUP | PRM_HAS_VOLTAGE,
626 };
627 #endif
628 
629 #ifdef CONFIG_SOC_DRA7XX
630 static struct omap_prcm_init_data dra7_prm_data __initdata = {
631 	.index = TI_CLKM_PRM,
632 	.init = omap44xx_prm_init,
633 	.device_inst_offset = DRA7XX_PRM_DEVICE_INST,
634 	.flags = PRM_HAS_IO_WAKEUP,
635 };
636 #endif
637 
638 #ifdef CONFIG_SOC_AM43XX
639 static struct omap_prcm_init_data am4_prm_data __initdata = {
640 	.index = TI_CLKM_PRM,
641 	.init = omap44xx_prm_init,
642 	.device_inst_offset = AM43XX_PRM_DEVICE_INST,
643 	.flags = PRM_HAS_IO_WAKEUP,
644 };
645 #endif
646 
647 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
648 static struct omap_prcm_init_data scrm_data __initdata = {
649 	.index = TI_CLKM_SCRM,
650 };
651 #endif
652 
653 static const struct of_device_id omap_prcm_dt_match_table[] __initconst = {
654 #ifdef CONFIG_SOC_AM33XX
655 	{ .compatible = "ti,am3-prcm", .data = &am3_prm_data },
656 #endif
657 #ifdef CONFIG_SOC_AM43XX
658 	{ .compatible = "ti,am4-prcm", .data = &am4_prm_data },
659 #endif
660 #ifdef CONFIG_SOC_TI81XX
661 	{ .compatible = "ti,dm814-prcm", .data = &am3_prm_data },
662 	{ .compatible = "ti,dm814-pllss", .data = &dm814_pllss_data },
663 	{ .compatible = "ti,dm816-prcm", .data = &am3_prm_data },
664 #endif
665 #ifdef CONFIG_ARCH_OMAP2
666 	{ .compatible = "ti,omap2-prcm", .data = &omap2_prm_data },
667 #endif
668 #ifdef CONFIG_ARCH_OMAP3
669 	{ .compatible = "ti,omap3-prm", .data = &omap3_prm_data },
670 #endif
671 #ifdef CONFIG_ARCH_OMAP4
672 	{ .compatible = "ti,omap4-prm", .data = &omap4_prm_data },
673 	{ .compatible = "ti,omap4-scrm", .data = &scrm_data },
674 #endif
675 #ifdef CONFIG_SOC_OMAP5
676 	{ .compatible = "ti,omap5-prm", .data = &omap5_prm_data },
677 	{ .compatible = "ti,omap5-scrm", .data = &scrm_data },
678 #endif
679 #ifdef CONFIG_SOC_DRA7XX
680 	{ .compatible = "ti,dra7-prm", .data = &dra7_prm_data },
681 #endif
682 	{ }
683 };
684 
685 /**
686  * omap2_prm_base_init - initialize iomappings for the PRM driver
687  *
688  * Detects and initializes the iomappings for the PRM driver, based
689  * on the DT data. Returns 0 in success, negative error value
690  * otherwise.
691  */
omap2_prm_base_init(void)692 static int __init omap2_prm_base_init(void)
693 {
694 	struct device_node *np;
695 	const struct of_device_id *match;
696 	struct omap_prcm_init_data *data;
697 	struct resource res;
698 	int ret;
699 
700 	for_each_matching_node_and_match(np, omap_prcm_dt_match_table, &match) {
701 		data = (struct omap_prcm_init_data *)match->data;
702 
703 		ret = of_address_to_resource(np, 0, &res);
704 		if (ret) {
705 			of_node_put(np);
706 			return ret;
707 		}
708 
709 		data->mem = ioremap(res.start, resource_size(&res));
710 
711 		if (data->index == TI_CLKM_PRM) {
712 			prm_base.va = data->mem + data->offset;
713 			prm_base.pa = res.start + data->offset;
714 		}
715 
716 		data->np = np;
717 
718 		if (data->init)
719 			data->init(data);
720 	}
721 
722 	return 0;
723 }
724 
omap2_prcm_base_init(void)725 int __init omap2_prcm_base_init(void)
726 {
727 	int ret;
728 
729 	ret = omap2_prm_base_init();
730 	if (ret)
731 		return ret;
732 
733 	return omap2_cm_base_init();
734 }
735 
736 /**
737  * omap_prcm_init - low level init for the PRCM drivers
738  *
739  * Initializes the low level clock infrastructure for PRCM drivers.
740  * Returns 0 in success, negative error value in failure.
741  */
omap_prcm_init(void)742 int __init omap_prcm_init(void)
743 {
744 	struct device_node *np;
745 	const struct of_device_id *match;
746 	const struct omap_prcm_init_data *data;
747 	int ret;
748 
749 	for_each_matching_node_and_match(np, omap_prcm_dt_match_table, &match) {
750 		data = match->data;
751 
752 		ret = omap2_clk_provider_init(np, data->index, NULL, data->mem);
753 		if (ret) {
754 			of_node_put(np);
755 			return ret;
756 		}
757 	}
758 
759 	omap_cm_init();
760 
761 	return 0;
762 }
763 
prm_late_init(void)764 static int __init prm_late_init(void)
765 {
766 	if (prm_ll_data->late_init)
767 		return prm_ll_data->late_init();
768 	return 0;
769 }
770 subsys_initcall(prm_late_init);
771