1 /*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Copyright (C) 2011 Texas Instruments, Inc.
6 *
7 * Paul Walmsley, Benoît Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
27 *
28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | (__raw_{read,write}l, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128 #undef DEBUG
129
130 #include <linux/kernel.h>
131 #include <linux/errno.h>
132 #include <linux/io.h>
133 #include <linux/clk.h>
134 #include <linux/delay.h>
135 #include <linux/err.h>
136 #include <linux/list.h>
137 #include <linux/mutex.h>
138 #include <linux/spinlock.h>
139 #include <linux/slab.h>
140
141 #include "common.h"
142 #include <plat/cpu.h>
143 #include "clockdomain.h"
144 #include "powerdomain.h"
145 #include <plat/clock.h>
146 #include <plat/omap_hwmod.h>
147 #include <plat/prcm.h>
148
149 #include "cm2xxx_3xxx.h"
150 #include "cminst44xx.h"
151 #include "prm2xxx_3xxx.h"
152 #include "prm44xx.h"
153 #include "prminst44xx.h"
154 #include "mux.h"
155
156 /* Maximum microseconds to wait for OMAP module to softreset */
157 #define MAX_MODULE_SOFTRESET_WAIT 10000
158
159 /* Name of the OMAP hwmod for the MPU */
160 #define MPU_INITIATOR_NAME "mpu"
161
162 /* omap_hwmod_list contains all registered struct omap_hwmods */
163 static LIST_HEAD(omap_hwmod_list);
164
165 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
166 static struct omap_hwmod *mpu_oh;
167
168
169 /* Private functions */
170
171 /**
172 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
173 * @oh: struct omap_hwmod *
174 *
175 * Load the current value of the hwmod OCP_SYSCONFIG register into the
176 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
177 * OCP_SYSCONFIG register or 0 upon success.
178 */
_update_sysc_cache(struct omap_hwmod * oh)179 static int _update_sysc_cache(struct omap_hwmod *oh)
180 {
181 if (!oh->class->sysc) {
182 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
183 return -EINVAL;
184 }
185
186 /* XXX ensure module interface clock is up */
187
188 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
189
190 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
191 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
192
193 return 0;
194 }
195
196 /**
197 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
198 * @v: OCP_SYSCONFIG value to write
199 * @oh: struct omap_hwmod *
200 *
201 * Write @v into the module class' OCP_SYSCONFIG register, if it has
202 * one. No return value.
203 */
_write_sysconfig(u32 v,struct omap_hwmod * oh)204 static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
205 {
206 if (!oh->class->sysc) {
207 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
208 return;
209 }
210
211 /* XXX ensure module interface clock is up */
212
213 /* Module might have lost context, always update cache and register */
214 oh->_sysc_cache = v;
215 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
216 }
217
218 /**
219 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
220 * @oh: struct omap_hwmod *
221 * @standbymode: MIDLEMODE field bits
222 * @v: pointer to register contents to modify
223 *
224 * Update the master standby mode bits in @v to be @standbymode for
225 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
226 * upon error or 0 upon success.
227 */
_set_master_standbymode(struct omap_hwmod * oh,u8 standbymode,u32 * v)228 static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
229 u32 *v)
230 {
231 u32 mstandby_mask;
232 u8 mstandby_shift;
233
234 if (!oh->class->sysc ||
235 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
236 return -EINVAL;
237
238 if (!oh->class->sysc->sysc_fields) {
239 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
240 return -EINVAL;
241 }
242
243 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
244 mstandby_mask = (0x3 << mstandby_shift);
245
246 *v &= ~mstandby_mask;
247 *v |= __ffs(standbymode) << mstandby_shift;
248
249 return 0;
250 }
251
252 /**
253 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
254 * @oh: struct omap_hwmod *
255 * @idlemode: SIDLEMODE field bits
256 * @v: pointer to register contents to modify
257 *
258 * Update the slave idle mode bits in @v to be @idlemode for the @oh
259 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
260 * or 0 upon success.
261 */
_set_slave_idlemode(struct omap_hwmod * oh,u8 idlemode,u32 * v)262 static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
263 {
264 u32 sidle_mask;
265 u8 sidle_shift;
266
267 if (!oh->class->sysc ||
268 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
269 return -EINVAL;
270
271 if (!oh->class->sysc->sysc_fields) {
272 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
273 return -EINVAL;
274 }
275
276 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
277 sidle_mask = (0x3 << sidle_shift);
278
279 *v &= ~sidle_mask;
280 *v |= __ffs(idlemode) << sidle_shift;
281
282 return 0;
283 }
284
285 /**
286 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
287 * @oh: struct omap_hwmod *
288 * @clockact: CLOCKACTIVITY field bits
289 * @v: pointer to register contents to modify
290 *
291 * Update the clockactivity mode bits in @v to be @clockact for the
292 * @oh hwmod. Used for additional powersaving on some modules. Does
293 * not write to the hardware. Returns -EINVAL upon error or 0 upon
294 * success.
295 */
_set_clockactivity(struct omap_hwmod * oh,u8 clockact,u32 * v)296 static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
297 {
298 u32 clkact_mask;
299 u8 clkact_shift;
300
301 if (!oh->class->sysc ||
302 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
303 return -EINVAL;
304
305 if (!oh->class->sysc->sysc_fields) {
306 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
307 return -EINVAL;
308 }
309
310 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
311 clkact_mask = (0x3 << clkact_shift);
312
313 *v &= ~clkact_mask;
314 *v |= clockact << clkact_shift;
315
316 return 0;
317 }
318
319 /**
320 * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
321 * @oh: struct omap_hwmod *
322 * @v: pointer to register contents to modify
323 *
324 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
325 * error or 0 upon success.
326 */
_set_softreset(struct omap_hwmod * oh,u32 * v)327 static int _set_softreset(struct omap_hwmod *oh, u32 *v)
328 {
329 u32 softrst_mask;
330
331 if (!oh->class->sysc ||
332 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
333 return -EINVAL;
334
335 if (!oh->class->sysc->sysc_fields) {
336 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
337 return -EINVAL;
338 }
339
340 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
341
342 *v |= softrst_mask;
343
344 return 0;
345 }
346
347 /**
348 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
349 * @oh: struct omap_hwmod *
350 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
351 * @v: pointer to register contents to modify
352 *
353 * Update the module autoidle bit in @v to be @autoidle for the @oh
354 * hwmod. The autoidle bit controls whether the module can gate
355 * internal clocks automatically when it isn't doing anything; the
356 * exact function of this bit varies on a per-module basis. This
357 * function does not write to the hardware. Returns -EINVAL upon
358 * error or 0 upon success.
359 */
_set_module_autoidle(struct omap_hwmod * oh,u8 autoidle,u32 * v)360 static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
361 u32 *v)
362 {
363 u32 autoidle_mask;
364 u8 autoidle_shift;
365
366 if (!oh->class->sysc ||
367 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
368 return -EINVAL;
369
370 if (!oh->class->sysc->sysc_fields) {
371 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
372 return -EINVAL;
373 }
374
375 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
376 autoidle_mask = (0x1 << autoidle_shift);
377
378 *v &= ~autoidle_mask;
379 *v |= autoidle << autoidle_shift;
380
381 return 0;
382 }
383
384 /**
385 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
386 * @oh: struct omap_hwmod *
387 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
388 *
389 * Set or clear the I/O pad wakeup flag in the mux entries for the
390 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
391 * in memory. If the hwmod is currently idled, and the new idle
392 * values don't match the previous ones, this function will also
393 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
394 * currently idled, this function won't touch the hardware: the new
395 * mux settings are written to the SCM PADCTRL registers when the
396 * hwmod is idled. No return value.
397 */
_set_idle_ioring_wakeup(struct omap_hwmod * oh,bool set_wake)398 static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
399 {
400 struct omap_device_pad *pad;
401 bool change = false;
402 u16 prev_idle;
403 int j;
404
405 if (!oh->mux || !oh->mux->enabled)
406 return;
407
408 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
409 pad = oh->mux->pads_dynamic[j];
410
411 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
412 continue;
413
414 prev_idle = pad->idle;
415
416 if (set_wake)
417 pad->idle |= OMAP_WAKEUP_EN;
418 else
419 pad->idle &= ~OMAP_WAKEUP_EN;
420
421 if (prev_idle != pad->idle)
422 change = true;
423 }
424
425 if (change && oh->_state == _HWMOD_STATE_IDLE)
426 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
427 }
428
429 /**
430 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
431 * @oh: struct omap_hwmod *
432 *
433 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
434 * upon error or 0 upon success.
435 */
_enable_wakeup(struct omap_hwmod * oh,u32 * v)436 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
437 {
438 if (!oh->class->sysc ||
439 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
440 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
441 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
442 return -EINVAL;
443
444 if (!oh->class->sysc->sysc_fields) {
445 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
446 return -EINVAL;
447 }
448
449 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
450 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
451
452 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
453 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
454 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
455 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
456
457 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
458
459 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
460
461 return 0;
462 }
463
464 /**
465 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
466 * @oh: struct omap_hwmod *
467 *
468 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
469 * upon error or 0 upon success.
470 */
_disable_wakeup(struct omap_hwmod * oh,u32 * v)471 static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
472 {
473 if (!oh->class->sysc ||
474 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
475 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
476 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
477 return -EINVAL;
478
479 if (!oh->class->sysc->sysc_fields) {
480 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
481 return -EINVAL;
482 }
483
484 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
485 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
486
487 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
488 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
489 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
490 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
491
492 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
493
494 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
495
496 return 0;
497 }
498
499 /**
500 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
501 * @oh: struct omap_hwmod *
502 *
503 * Prevent the hardware module @oh from entering idle while the
504 * hardare module initiator @init_oh is active. Useful when a module
505 * will be accessed by a particular initiator (e.g., if a module will
506 * be accessed by the IVA, there should be a sleepdep between the IVA
507 * initiator and the module). Only applies to modules in smart-idle
508 * mode. If the clockdomain is marked as not needing autodeps, return
509 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
510 * passes along clkdm_add_sleepdep() value upon success.
511 */
_add_initiator_dep(struct omap_hwmod * oh,struct omap_hwmod * init_oh)512 static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
513 {
514 if (!oh->_clk)
515 return -EINVAL;
516
517 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
518 return 0;
519
520 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
521 }
522
523 /**
524 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
525 * @oh: struct omap_hwmod *
526 *
527 * Allow the hardware module @oh to enter idle while the hardare
528 * module initiator @init_oh is active. Useful when a module will not
529 * be accessed by a particular initiator (e.g., if a module will not
530 * be accessed by the IVA, there should be no sleepdep between the IVA
531 * initiator and the module). Only applies to modules in smart-idle
532 * mode. If the clockdomain is marked as not needing autodeps, return
533 * 0 without doing anything. Returns -EINVAL upon error or passes
534 * along clkdm_del_sleepdep() value upon success.
535 */
_del_initiator_dep(struct omap_hwmod * oh,struct omap_hwmod * init_oh)536 static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
537 {
538 if (!oh->_clk)
539 return -EINVAL;
540
541 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
542 return 0;
543
544 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
545 }
546
547 /**
548 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
549 * @oh: struct omap_hwmod *
550 *
551 * Called from _init_clocks(). Populates the @oh _clk (main
552 * functional clock pointer) if a main_clk is present. Returns 0 on
553 * success or -EINVAL on error.
554 */
_init_main_clk(struct omap_hwmod * oh)555 static int _init_main_clk(struct omap_hwmod *oh)
556 {
557 int ret = 0;
558
559 if (!oh->main_clk)
560 return 0;
561
562 oh->_clk = omap_clk_get_by_name(oh->main_clk);
563 if (!oh->_clk) {
564 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
565 oh->name, oh->main_clk);
566 return -EINVAL;
567 }
568
569 if (!oh->_clk->clkdm)
570 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
571 oh->main_clk, oh->_clk->name);
572
573 return ret;
574 }
575
576 /**
577 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
578 * @oh: struct omap_hwmod *
579 *
580 * Called from _init_clocks(). Populates the @oh OCP slave interface
581 * clock pointers. Returns 0 on success or -EINVAL on error.
582 */
_init_interface_clks(struct omap_hwmod * oh)583 static int _init_interface_clks(struct omap_hwmod *oh)
584 {
585 struct clk *c;
586 int i;
587 int ret = 0;
588
589 if (oh->slaves_cnt == 0)
590 return 0;
591
592 for (i = 0; i < oh->slaves_cnt; i++) {
593 struct omap_hwmod_ocp_if *os = oh->slaves[i];
594
595 if (!os->clk)
596 continue;
597
598 c = omap_clk_get_by_name(os->clk);
599 if (!c) {
600 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
601 oh->name, os->clk);
602 ret = -EINVAL;
603 }
604 os->_clk = c;
605 }
606
607 return ret;
608 }
609
610 /**
611 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
612 * @oh: struct omap_hwmod *
613 *
614 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
615 * clock pointers. Returns 0 on success or -EINVAL on error.
616 */
_init_opt_clks(struct omap_hwmod * oh)617 static int _init_opt_clks(struct omap_hwmod *oh)
618 {
619 struct omap_hwmod_opt_clk *oc;
620 struct clk *c;
621 int i;
622 int ret = 0;
623
624 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
625 c = omap_clk_get_by_name(oc->clk);
626 if (!c) {
627 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
628 oh->name, oc->clk);
629 ret = -EINVAL;
630 }
631 oc->_clk = c;
632 }
633
634 return ret;
635 }
636
637 /**
638 * _enable_clocks - enable hwmod main clock and interface clocks
639 * @oh: struct omap_hwmod *
640 *
641 * Enables all clocks necessary for register reads and writes to succeed
642 * on the hwmod @oh. Returns 0.
643 */
_enable_clocks(struct omap_hwmod * oh)644 static int _enable_clocks(struct omap_hwmod *oh)
645 {
646 int i;
647
648 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
649
650 if (oh->_clk)
651 clk_enable(oh->_clk);
652
653 if (oh->slaves_cnt > 0) {
654 for (i = 0; i < oh->slaves_cnt; i++) {
655 struct omap_hwmod_ocp_if *os = oh->slaves[i];
656 struct clk *c = os->_clk;
657
658 if (c && (os->flags & OCPIF_SWSUP_IDLE))
659 clk_enable(c);
660 }
661 }
662
663 /* The opt clocks are controlled by the device driver. */
664
665 return 0;
666 }
667
668 /**
669 * _disable_clocks - disable hwmod main clock and interface clocks
670 * @oh: struct omap_hwmod *
671 *
672 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
673 */
_disable_clocks(struct omap_hwmod * oh)674 static int _disable_clocks(struct omap_hwmod *oh)
675 {
676 int i;
677
678 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
679
680 if (oh->_clk)
681 clk_disable(oh->_clk);
682
683 if (oh->slaves_cnt > 0) {
684 for (i = 0; i < oh->slaves_cnt; i++) {
685 struct omap_hwmod_ocp_if *os = oh->slaves[i];
686 struct clk *c = os->_clk;
687
688 if (c && (os->flags & OCPIF_SWSUP_IDLE))
689 clk_disable(c);
690 }
691 }
692
693 /* The opt clocks are controlled by the device driver. */
694
695 return 0;
696 }
697
_enable_optional_clocks(struct omap_hwmod * oh)698 static void _enable_optional_clocks(struct omap_hwmod *oh)
699 {
700 struct omap_hwmod_opt_clk *oc;
701 int i;
702
703 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
704
705 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
706 if (oc->_clk) {
707 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
708 oc->_clk->name);
709 clk_enable(oc->_clk);
710 }
711 }
712
_disable_optional_clocks(struct omap_hwmod * oh)713 static void _disable_optional_clocks(struct omap_hwmod *oh)
714 {
715 struct omap_hwmod_opt_clk *oc;
716 int i;
717
718 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
719
720 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
721 if (oc->_clk) {
722 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
723 oc->_clk->name);
724 clk_disable(oc->_clk);
725 }
726 }
727
728 /**
729 * _enable_module - enable CLKCTRL modulemode on OMAP4
730 * @oh: struct omap_hwmod *
731 *
732 * Enables the PRCM module mode related to the hwmod @oh.
733 * No return value.
734 */
_enable_module(struct omap_hwmod * oh)735 static void _enable_module(struct omap_hwmod *oh)
736 {
737 /* The module mode does not exist prior OMAP4 */
738 if (cpu_is_omap24xx() || cpu_is_omap34xx())
739 return;
740
741 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
742 return;
743
744 pr_debug("omap_hwmod: %s: _enable_module: %d\n",
745 oh->name, oh->prcm.omap4.modulemode);
746
747 omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
748 oh->clkdm->prcm_partition,
749 oh->clkdm->cm_inst,
750 oh->clkdm->clkdm_offs,
751 oh->prcm.omap4.clkctrl_offs);
752 }
753
754 /**
755 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
756 * @oh: struct omap_hwmod *
757 *
758 * Wait for a module @oh to enter slave idle. Returns 0 if the module
759 * does not have an IDLEST bit or if the module successfully enters
760 * slave idle; otherwise, pass along the return value of the
761 * appropriate *_cm*_wait_module_idle() function.
762 */
_omap4_wait_target_disable(struct omap_hwmod * oh)763 static int _omap4_wait_target_disable(struct omap_hwmod *oh)
764 {
765 if (!cpu_is_omap44xx())
766 return 0;
767
768 if (!oh)
769 return -EINVAL;
770
771 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
772 return 0;
773
774 if (oh->flags & HWMOD_NO_IDLEST)
775 return 0;
776
777 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
778 oh->clkdm->cm_inst,
779 oh->clkdm->clkdm_offs,
780 oh->prcm.omap4.clkctrl_offs);
781 }
782
783 /**
784 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
785 * @oh: struct omap_hwmod *
786 *
787 * Disable the PRCM module mode related to the hwmod @oh.
788 * Return EINVAL if the modulemode is not supported and 0 in case of success.
789 */
_omap4_disable_module(struct omap_hwmod * oh)790 static int _omap4_disable_module(struct omap_hwmod *oh)
791 {
792 int v;
793
794 /* The module mode does not exist prior OMAP4 */
795 if (!cpu_is_omap44xx())
796 return -EINVAL;
797
798 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
799 return -EINVAL;
800
801 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
802
803 omap4_cminst_module_disable(oh->clkdm->prcm_partition,
804 oh->clkdm->cm_inst,
805 oh->clkdm->clkdm_offs,
806 oh->prcm.omap4.clkctrl_offs);
807
808 v = _omap4_wait_target_disable(oh);
809 if (v)
810 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
811 oh->name);
812
813 return 0;
814 }
815
816 /**
817 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
818 * @oh: struct omap_hwmod *oh
819 *
820 * Count and return the number of MPU IRQs associated with the hwmod
821 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
822 * NULL.
823 */
_count_mpu_irqs(struct omap_hwmod * oh)824 static int _count_mpu_irqs(struct omap_hwmod *oh)
825 {
826 struct omap_hwmod_irq_info *ohii;
827 int i = 0;
828
829 if (!oh || !oh->mpu_irqs)
830 return 0;
831
832 do {
833 ohii = &oh->mpu_irqs[i++];
834 } while (ohii->irq != -1);
835
836 return i-1;
837 }
838
839 /**
840 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
841 * @oh: struct omap_hwmod *oh
842 *
843 * Count and return the number of SDMA request lines associated with
844 * the hwmod @oh. Used to allocate struct resource data. Returns 0
845 * if @oh is NULL.
846 */
_count_sdma_reqs(struct omap_hwmod * oh)847 static int _count_sdma_reqs(struct omap_hwmod *oh)
848 {
849 struct omap_hwmod_dma_info *ohdi;
850 int i = 0;
851
852 if (!oh || !oh->sdma_reqs)
853 return 0;
854
855 do {
856 ohdi = &oh->sdma_reqs[i++];
857 } while (ohdi->dma_req != -1);
858
859 return i-1;
860 }
861
862 /**
863 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
864 * @oh: struct omap_hwmod *oh
865 *
866 * Count and return the number of address space ranges associated with
867 * the hwmod @oh. Used to allocate struct resource data. Returns 0
868 * if @oh is NULL.
869 */
_count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if * os)870 static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
871 {
872 struct omap_hwmod_addr_space *mem;
873 int i = 0;
874
875 if (!os || !os->addr)
876 return 0;
877
878 do {
879 mem = &os->addr[i++];
880 } while (mem->pa_start != mem->pa_end);
881
882 return i-1;
883 }
884
885 /**
886 * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
887 * @oh: struct omap_hwmod *
888 *
889 * Returns the array index of the OCP slave port that the MPU
890 * addresses the device on, or -EINVAL upon error or not found.
891 */
_find_mpu_port_index(struct omap_hwmod * oh)892 static int __init _find_mpu_port_index(struct omap_hwmod *oh)
893 {
894 int i;
895 int found = 0;
896
897 if (!oh || oh->slaves_cnt == 0)
898 return -EINVAL;
899
900 for (i = 0; i < oh->slaves_cnt; i++) {
901 struct omap_hwmod_ocp_if *os = oh->slaves[i];
902
903 if (os->user & OCP_USER_MPU) {
904 found = 1;
905 break;
906 }
907 }
908
909 if (found)
910 pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
911 oh->name, i);
912 else
913 pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
914 oh->name);
915
916 return (found) ? i : -EINVAL;
917 }
918
919 /**
920 * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
921 * @oh: struct omap_hwmod *
922 *
923 * Return the virtual address of the base of the register target of
924 * device @oh, or NULL on error.
925 */
_find_mpu_rt_base(struct omap_hwmod * oh,u8 index)926 static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
927 {
928 struct omap_hwmod_ocp_if *os;
929 struct omap_hwmod_addr_space *mem;
930 int i = 0, found = 0;
931 void __iomem *va_start;
932
933 if (!oh || oh->slaves_cnt == 0)
934 return NULL;
935
936 os = oh->slaves[index];
937
938 if (!os->addr)
939 return NULL;
940
941 do {
942 mem = &os->addr[i++];
943 if (mem->flags & ADDR_TYPE_RT)
944 found = 1;
945 } while (!found && mem->pa_start != mem->pa_end);
946
947 if (found) {
948 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
949 if (!va_start) {
950 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
951 return NULL;
952 }
953 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
954 oh->name, va_start);
955 } else {
956 pr_debug("omap_hwmod: %s: no MPU register target found\n",
957 oh->name);
958 }
959
960 return (found) ? va_start : NULL;
961 }
962
963 /**
964 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
965 * @oh: struct omap_hwmod *
966 *
967 * If module is marked as SWSUP_SIDLE, force the module out of slave
968 * idle; otherwise, configure it for smart-idle. If module is marked
969 * as SWSUP_MSUSPEND, force the module out of master standby;
970 * otherwise, configure it for smart-standby. No return value.
971 */
_enable_sysc(struct omap_hwmod * oh)972 static void _enable_sysc(struct omap_hwmod *oh)
973 {
974 u8 idlemode, sf;
975 u32 v;
976
977 if (!oh->class->sysc)
978 return;
979
980 v = oh->_sysc_cache;
981 sf = oh->class->sysc->sysc_flags;
982
983 if (sf & SYSC_HAS_SIDLEMODE) {
984 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
985 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
986 _set_slave_idlemode(oh, idlemode, &v);
987 }
988
989 if (sf & SYSC_HAS_MIDLEMODE) {
990 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
991 idlemode = HWMOD_IDLEMODE_NO;
992 } else {
993 if (sf & SYSC_HAS_ENAWAKEUP)
994 _enable_wakeup(oh, &v);
995 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
996 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
997 else
998 idlemode = HWMOD_IDLEMODE_SMART;
999 }
1000 _set_master_standbymode(oh, idlemode, &v);
1001 }
1002
1003 /*
1004 * XXX The clock framework should handle this, by
1005 * calling into this code. But this must wait until the
1006 * clock structures are tagged with omap_hwmod entries
1007 */
1008 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1009 (sf & SYSC_HAS_CLOCKACTIVITY))
1010 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
1011
1012 /* If slave is in SMARTIDLE, also enable wakeup */
1013 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1014 _enable_wakeup(oh, &v);
1015
1016 _write_sysconfig(v, oh);
1017
1018 /*
1019 * Set the autoidle bit only after setting the smartidle bit
1020 * Setting this will not have any impact on the other modules.
1021 */
1022 if (sf & SYSC_HAS_AUTOIDLE) {
1023 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1024 0 : 1;
1025 _set_module_autoidle(oh, idlemode, &v);
1026 _write_sysconfig(v, oh);
1027 }
1028 }
1029
1030 /**
1031 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1032 * @oh: struct omap_hwmod *
1033 *
1034 * If module is marked as SWSUP_SIDLE, force the module into slave
1035 * idle; otherwise, configure it for smart-idle. If module is marked
1036 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1037 * configure it for smart-standby. No return value.
1038 */
_idle_sysc(struct omap_hwmod * oh)1039 static void _idle_sysc(struct omap_hwmod *oh)
1040 {
1041 u8 idlemode, sf;
1042 u32 v;
1043
1044 if (!oh->class->sysc)
1045 return;
1046
1047 v = oh->_sysc_cache;
1048 sf = oh->class->sysc->sysc_flags;
1049
1050 if (sf & SYSC_HAS_SIDLEMODE) {
1051 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1052 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
1053 _set_slave_idlemode(oh, idlemode, &v);
1054 }
1055
1056 if (sf & SYSC_HAS_MIDLEMODE) {
1057 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1058 idlemode = HWMOD_IDLEMODE_FORCE;
1059 } else {
1060 if (sf & SYSC_HAS_ENAWAKEUP)
1061 _enable_wakeup(oh, &v);
1062 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1063 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1064 else
1065 idlemode = HWMOD_IDLEMODE_SMART;
1066 }
1067 _set_master_standbymode(oh, idlemode, &v);
1068 }
1069
1070 /* If slave is in SMARTIDLE, also enable wakeup */
1071 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1072 _enable_wakeup(oh, &v);
1073
1074 _write_sysconfig(v, oh);
1075 }
1076
1077 /**
1078 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1079 * @oh: struct omap_hwmod *
1080 *
1081 * Force the module into slave idle and master suspend. No return
1082 * value.
1083 */
_shutdown_sysc(struct omap_hwmod * oh)1084 static void _shutdown_sysc(struct omap_hwmod *oh)
1085 {
1086 u32 v;
1087 u8 sf;
1088
1089 if (!oh->class->sysc)
1090 return;
1091
1092 v = oh->_sysc_cache;
1093 sf = oh->class->sysc->sysc_flags;
1094
1095 if (sf & SYSC_HAS_SIDLEMODE)
1096 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1097
1098 if (sf & SYSC_HAS_MIDLEMODE)
1099 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1100
1101 if (sf & SYSC_HAS_AUTOIDLE)
1102 _set_module_autoidle(oh, 1, &v);
1103
1104 _write_sysconfig(v, oh);
1105 }
1106
1107 /**
1108 * _lookup - find an omap_hwmod by name
1109 * @name: find an omap_hwmod by name
1110 *
1111 * Return a pointer to an omap_hwmod by name, or NULL if not found.
1112 */
_lookup(const char * name)1113 static struct omap_hwmod *_lookup(const char *name)
1114 {
1115 struct omap_hwmod *oh, *temp_oh;
1116
1117 oh = NULL;
1118
1119 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1120 if (!strcmp(name, temp_oh->name)) {
1121 oh = temp_oh;
1122 break;
1123 }
1124 }
1125
1126 return oh;
1127 }
1128 /**
1129 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1130 * @oh: struct omap_hwmod *
1131 *
1132 * Convert a clockdomain name stored in a struct omap_hwmod into a
1133 * clockdomain pointer, and save it into the struct omap_hwmod.
1134 * return -EINVAL if clkdm_name does not exist or if the lookup failed.
1135 */
_init_clkdm(struct omap_hwmod * oh)1136 static int _init_clkdm(struct omap_hwmod *oh)
1137 {
1138 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1139 return 0;
1140
1141 if (!oh->clkdm_name) {
1142 pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
1143 return -EINVAL;
1144 }
1145
1146 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1147 if (!oh->clkdm) {
1148 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
1149 oh->name, oh->clkdm_name);
1150 return -EINVAL;
1151 }
1152
1153 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1154 oh->name, oh->clkdm_name);
1155
1156 return 0;
1157 }
1158
1159 /**
1160 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1161 * well the clockdomain.
1162 * @oh: struct omap_hwmod *
1163 * @data: not used; pass NULL
1164 *
1165 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1166 * Resolves all clock names embedded in the hwmod. Returns 0 on
1167 * success, or a negative error code on failure.
1168 */
_init_clocks(struct omap_hwmod * oh,void * data)1169 static int _init_clocks(struct omap_hwmod *oh, void *data)
1170 {
1171 int ret = 0;
1172
1173 if (oh->_state != _HWMOD_STATE_REGISTERED)
1174 return 0;
1175
1176 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1177
1178 ret |= _init_main_clk(oh);
1179 ret |= _init_interface_clks(oh);
1180 ret |= _init_opt_clks(oh);
1181 ret |= _init_clkdm(oh);
1182
1183 if (!ret)
1184 oh->_state = _HWMOD_STATE_CLKS_INITED;
1185 else
1186 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1187
1188 return ret;
1189 }
1190
1191 /**
1192 * _wait_target_ready - wait for a module to leave slave idle
1193 * @oh: struct omap_hwmod *
1194 *
1195 * Wait for a module @oh to leave slave idle. Returns 0 if the module
1196 * does not have an IDLEST bit or if the module successfully leaves
1197 * slave idle; otherwise, pass along the return value of the
1198 * appropriate *_cm*_wait_module_ready() function.
1199 */
_wait_target_ready(struct omap_hwmod * oh)1200 static int _wait_target_ready(struct omap_hwmod *oh)
1201 {
1202 struct omap_hwmod_ocp_if *os;
1203 int ret;
1204
1205 if (!oh)
1206 return -EINVAL;
1207
1208 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1209 return 0;
1210
1211 os = oh->slaves[oh->_mpu_port_index];
1212
1213 if (oh->flags & HWMOD_NO_IDLEST)
1214 return 0;
1215
1216 /* XXX check module SIDLEMODE */
1217
1218 /* XXX check clock enable states */
1219
1220 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1221 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
1222 oh->prcm.omap2.idlest_reg_id,
1223 oh->prcm.omap2.idlest_idle_bit);
1224 } else if (cpu_is_omap44xx()) {
1225 if (!oh->clkdm)
1226 return -EINVAL;
1227
1228 ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
1229 oh->clkdm->cm_inst,
1230 oh->clkdm->clkdm_offs,
1231 oh->prcm.omap4.clkctrl_offs);
1232 } else {
1233 BUG();
1234 };
1235
1236 return ret;
1237 }
1238
1239 /**
1240 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1241 * @oh: struct omap_hwmod *
1242 * @name: name of the reset line in the context of this hwmod
1243 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1244 *
1245 * Return the bit position of the reset line that match the
1246 * input name. Return -ENOENT if not found.
1247 */
_lookup_hardreset(struct omap_hwmod * oh,const char * name,struct omap_hwmod_rst_info * ohri)1248 static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1249 struct omap_hwmod_rst_info *ohri)
1250 {
1251 int i;
1252
1253 for (i = 0; i < oh->rst_lines_cnt; i++) {
1254 const char *rst_line = oh->rst_lines[i].name;
1255 if (!strcmp(rst_line, name)) {
1256 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1257 ohri->st_shift = oh->rst_lines[i].st_shift;
1258 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1259 oh->name, __func__, rst_line, ohri->rst_shift,
1260 ohri->st_shift);
1261
1262 return 0;
1263 }
1264 }
1265
1266 return -ENOENT;
1267 }
1268
1269 /**
1270 * _assert_hardreset - assert the HW reset line of submodules
1271 * contained in the hwmod module.
1272 * @oh: struct omap_hwmod *
1273 * @name: name of the reset line to lookup and assert
1274 *
1275 * Some IP like dsp, ipu or iva contain processor that require
1276 * an HW reset line to be assert / deassert in order to enable fully
1277 * the IP.
1278 */
_assert_hardreset(struct omap_hwmod * oh,const char * name)1279 static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1280 {
1281 struct omap_hwmod_rst_info ohri;
1282 u8 ret;
1283
1284 if (!oh)
1285 return -EINVAL;
1286
1287 ret = _lookup_hardreset(oh, name, &ohri);
1288 if (IS_ERR_VALUE(ret))
1289 return ret;
1290
1291 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1292 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
1293 ohri.rst_shift);
1294 else if (cpu_is_omap44xx())
1295 return omap4_prminst_assert_hardreset(ohri.rst_shift,
1296 oh->clkdm->pwrdm.ptr->prcm_partition,
1297 oh->clkdm->pwrdm.ptr->prcm_offs,
1298 oh->prcm.omap4.rstctrl_offs);
1299 else
1300 return -EINVAL;
1301 }
1302
1303 /**
1304 * _deassert_hardreset - deassert the HW reset line of submodules contained
1305 * in the hwmod module.
1306 * @oh: struct omap_hwmod *
1307 * @name: name of the reset line to look up and deassert
1308 *
1309 * Some IP like dsp, ipu or iva contain processor that require
1310 * an HW reset line to be assert / deassert in order to enable fully
1311 * the IP.
1312 */
_deassert_hardreset(struct omap_hwmod * oh,const char * name)1313 static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1314 {
1315 struct omap_hwmod_rst_info ohri;
1316 int ret;
1317
1318 if (!oh)
1319 return -EINVAL;
1320
1321 ret = _lookup_hardreset(oh, name, &ohri);
1322 if (IS_ERR_VALUE(ret))
1323 return ret;
1324
1325 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1326 ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1327 ohri.rst_shift,
1328 ohri.st_shift);
1329 } else if (cpu_is_omap44xx()) {
1330 if (ohri.st_shift)
1331 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
1332 oh->name, name);
1333 ret = omap4_prminst_deassert_hardreset(ohri.rst_shift,
1334 oh->clkdm->pwrdm.ptr->prcm_partition,
1335 oh->clkdm->pwrdm.ptr->prcm_offs,
1336 oh->prcm.omap4.rstctrl_offs);
1337 } else {
1338 return -EINVAL;
1339 }
1340
1341 if (ret == -EBUSY)
1342 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1343
1344 return ret;
1345 }
1346
1347 /**
1348 * _read_hardreset - read the HW reset line state of submodules
1349 * contained in the hwmod module
1350 * @oh: struct omap_hwmod *
1351 * @name: name of the reset line to look up and read
1352 *
1353 * Return the state of the reset line.
1354 */
_read_hardreset(struct omap_hwmod * oh,const char * name)1355 static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1356 {
1357 struct omap_hwmod_rst_info ohri;
1358 u8 ret;
1359
1360 if (!oh)
1361 return -EINVAL;
1362
1363 ret = _lookup_hardreset(oh, name, &ohri);
1364 if (IS_ERR_VALUE(ret))
1365 return ret;
1366
1367 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1368 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
1369 ohri.st_shift);
1370 } else if (cpu_is_omap44xx()) {
1371 return omap4_prminst_is_hardreset_asserted(ohri.rst_shift,
1372 oh->clkdm->pwrdm.ptr->prcm_partition,
1373 oh->clkdm->pwrdm.ptr->prcm_offs,
1374 oh->prcm.omap4.rstctrl_offs);
1375 } else {
1376 return -EINVAL;
1377 }
1378 }
1379
1380 /**
1381 * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
1382 * @oh: struct omap_hwmod *
1383 * @v: pointer to register contents to modify
1384 *
1385 * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
1386 * error or 0 upon success.
1387 */
_clear_softreset(struct omap_hwmod * oh,u32 * v)1388 static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
1389 {
1390 u32 softrst_mask;
1391
1392 if (!oh->class->sysc ||
1393 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1394 return -EINVAL;
1395
1396 if (!oh->class->sysc->sysc_fields) {
1397 WARN(1,
1398 "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
1399 oh->name);
1400 return -EINVAL;
1401 }
1402
1403 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
1404
1405 *v &= ~softrst_mask;
1406
1407 return 0;
1408 }
1409
1410 /**
1411 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1412 * @oh: struct omap_hwmod *
1413 *
1414 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1415 * enabled for this to work. Returns -EINVAL if the hwmod cannot be
1416 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1417 * the module did not reset in time, or 0 upon success.
1418 *
1419 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1420 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1421 * use the SYSCONFIG softreset bit to provide the status.
1422 *
1423 * Note that some IP like McBSP do have reset control but don't have
1424 * reset status.
1425 */
_ocp_softreset(struct omap_hwmod * oh)1426 static int _ocp_softreset(struct omap_hwmod *oh)
1427 {
1428 u32 v, softrst_mask;
1429 int c = 0;
1430 int ret = 0;
1431
1432 if (!oh->class->sysc ||
1433 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1434 return -EINVAL;
1435
1436 /* clocks must be on for this operation */
1437 if (oh->_state != _HWMOD_STATE_ENABLED) {
1438 pr_warning("omap_hwmod: %s: reset can only be entered from "
1439 "enabled state\n", oh->name);
1440 return -EINVAL;
1441 }
1442
1443 /* For some modules, all optionnal clocks need to be enabled as well */
1444 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1445 _enable_optional_clocks(oh);
1446
1447 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1448
1449 v = oh->_sysc_cache;
1450 ret = _set_softreset(oh, &v);
1451 if (ret)
1452 goto dis_opt_clks;
1453
1454 _write_sysconfig(v, oh);
1455 ret = _clear_softreset(oh, &v);
1456 if (ret)
1457 goto dis_opt_clks;
1458
1459 _write_sysconfig(v, oh);
1460
1461 if (oh->class->sysc->srst_udelay)
1462 udelay(oh->class->sysc->srst_udelay);
1463
1464 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
1465 omap_test_timeout((omap_hwmod_read(oh,
1466 oh->class->sysc->syss_offs)
1467 & SYSS_RESETDONE_MASK),
1468 MAX_MODULE_SOFTRESET_WAIT, c);
1469 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
1470 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
1471 omap_test_timeout(!(omap_hwmod_read(oh,
1472 oh->class->sysc->sysc_offs)
1473 & softrst_mask),
1474 MAX_MODULE_SOFTRESET_WAIT, c);
1475 }
1476
1477 if (c == MAX_MODULE_SOFTRESET_WAIT)
1478 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1479 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1480 else
1481 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1482
1483 /*
1484 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1485 * _wait_target_ready() or _reset()
1486 */
1487
1488 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1489
1490 dis_opt_clks:
1491 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1492 _disable_optional_clocks(oh);
1493
1494 return ret;
1495 }
1496
1497 /**
1498 * _reset - reset an omap_hwmod
1499 * @oh: struct omap_hwmod *
1500 *
1501 * Resets an omap_hwmod @oh. The default software reset mechanism for
1502 * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
1503 * bit. However, some hwmods cannot be reset via this method: some
1504 * are not targets and therefore have no OCP header registers to
1505 * access; others (like the IVA) have idiosyncratic reset sequences.
1506 * So for these relatively rare cases, custom reset code can be
1507 * supplied in the struct omap_hwmod_class .reset function pointer.
1508 * Passes along the return value from either _reset() or the custom
1509 * reset function - these must return -EINVAL if the hwmod cannot be
1510 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1511 * the module did not reset in time, or 0 upon success.
1512 */
_reset(struct omap_hwmod * oh)1513 static int _reset(struct omap_hwmod *oh)
1514 {
1515 int ret;
1516
1517 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1518
1519 ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
1520
1521 if (oh->class->sysc) {
1522 _update_sysc_cache(oh);
1523 _enable_sysc(oh);
1524 }
1525
1526 return ret;
1527 }
1528
1529 /**
1530 * _enable - enable an omap_hwmod
1531 * @oh: struct omap_hwmod *
1532 *
1533 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
1534 * register target. Returns -EINVAL if the hwmod is in the wrong
1535 * state or passes along the return value of _wait_target_ready().
1536 */
_enable(struct omap_hwmod * oh)1537 static int _enable(struct omap_hwmod *oh)
1538 {
1539 int r;
1540 int hwsup = 0;
1541
1542 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1543
1544 /*
1545 * hwmods with HWMOD_INIT_NO_IDLE flag set are left
1546 * in enabled state at init.
1547 * Now that someone is really trying to enable them,
1548 * just ensure that the hwmod mux is set.
1549 */
1550 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1551 /*
1552 * If the caller has mux data populated, do the mux'ing
1553 * which wouldn't have been done as part of the _enable()
1554 * done during setup.
1555 */
1556 if (oh->mux)
1557 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1558
1559 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1560 return 0;
1561 }
1562
1563 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1564 oh->_state != _HWMOD_STATE_IDLE &&
1565 oh->_state != _HWMOD_STATE_DISABLED) {
1566 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1567 oh->name);
1568 return -EINVAL;
1569 }
1570
1571
1572 /*
1573 * If an IP contains only one HW reset line, then de-assert it in order
1574 * to allow the module state transition. Otherwise the PRCM will return
1575 * Intransition status, and the init will failed.
1576 */
1577 if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
1578 oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
1579 _deassert_hardreset(oh, oh->rst_lines[0].name);
1580
1581 /* Mux pins for device runtime if populated */
1582 if (oh->mux && (!oh->mux->enabled ||
1583 ((oh->_state == _HWMOD_STATE_IDLE) &&
1584 oh->mux->pads_dynamic)))
1585 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1586
1587 _add_initiator_dep(oh, mpu_oh);
1588
1589 if (oh->clkdm) {
1590 /*
1591 * A clockdomain must be in SW_SUP before enabling
1592 * completely the module. The clockdomain can be set
1593 * in HW_AUTO only when the module become ready.
1594 */
1595 hwsup = clkdm_in_hwsup(oh->clkdm);
1596 r = clkdm_hwmod_enable(oh->clkdm, oh);
1597 if (r) {
1598 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1599 oh->name, oh->clkdm->name, r);
1600 return r;
1601 }
1602 }
1603
1604 _enable_clocks(oh);
1605 _enable_module(oh);
1606
1607 r = _wait_target_ready(oh);
1608 if (!r) {
1609 /*
1610 * Set the clockdomain to HW_AUTO only if the target is ready,
1611 * assuming that the previous state was HW_AUTO
1612 */
1613 if (oh->clkdm && hwsup)
1614 clkdm_allow_idle(oh->clkdm);
1615
1616 oh->_state = _HWMOD_STATE_ENABLED;
1617
1618 /* Access the sysconfig only if the target is ready */
1619 if (oh->class->sysc) {
1620 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1621 _update_sysc_cache(oh);
1622 _enable_sysc(oh);
1623 }
1624 } else {
1625 _disable_clocks(oh);
1626 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1627 oh->name, r);
1628
1629 if (oh->clkdm)
1630 clkdm_hwmod_disable(oh->clkdm, oh);
1631 }
1632
1633 return r;
1634 }
1635
1636 /**
1637 * _idle - idle an omap_hwmod
1638 * @oh: struct omap_hwmod *
1639 *
1640 * Idles an omap_hwmod @oh. This should be called once the hwmod has
1641 * no further work. Returns -EINVAL if the hwmod is in the wrong
1642 * state or returns 0.
1643 */
_idle(struct omap_hwmod * oh)1644 static int _idle(struct omap_hwmod *oh)
1645 {
1646 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1647
1648 if (oh->_state != _HWMOD_STATE_ENABLED) {
1649 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
1650 oh->name);
1651 return -EINVAL;
1652 }
1653
1654 if (oh->class->sysc)
1655 _idle_sysc(oh);
1656 _del_initiator_dep(oh, mpu_oh);
1657
1658 _omap4_disable_module(oh);
1659
1660 /*
1661 * The module must be in idle mode before disabling any parents
1662 * clocks. Otherwise, the parent clock might be disabled before
1663 * the module transition is done, and thus will prevent the
1664 * transition to complete properly.
1665 */
1666 _disable_clocks(oh);
1667 if (oh->clkdm)
1668 clkdm_hwmod_disable(oh->clkdm, oh);
1669
1670 /* Mux pins for device idle if populated */
1671 if (oh->mux && oh->mux->pads_dynamic)
1672 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
1673
1674 oh->_state = _HWMOD_STATE_IDLE;
1675
1676 return 0;
1677 }
1678
1679 /**
1680 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
1681 * @oh: struct omap_hwmod *
1682 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
1683 *
1684 * Sets the IP block's OCP autoidle bit in hardware, and updates our
1685 * local copy. Intended to be used by drivers that require
1686 * direct manipulation of the AUTOIDLE bits.
1687 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
1688 * along the return value from _set_module_autoidle().
1689 *
1690 * Any users of this function should be scrutinized carefully.
1691 */
omap_hwmod_set_ocp_autoidle(struct omap_hwmod * oh,u8 autoidle)1692 int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
1693 {
1694 u32 v;
1695 int retval = 0;
1696 unsigned long flags;
1697
1698 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
1699 return -EINVAL;
1700
1701 spin_lock_irqsave(&oh->_lock, flags);
1702
1703 v = oh->_sysc_cache;
1704
1705 retval = _set_module_autoidle(oh, autoidle, &v);
1706
1707 if (!retval)
1708 _write_sysconfig(v, oh);
1709
1710 spin_unlock_irqrestore(&oh->_lock, flags);
1711
1712 return retval;
1713 }
1714
1715 /**
1716 * _shutdown - shutdown an omap_hwmod
1717 * @oh: struct omap_hwmod *
1718 *
1719 * Shut down an omap_hwmod @oh. This should be called when the driver
1720 * used for the hwmod is removed or unloaded or if the driver is not
1721 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1722 * state or returns 0.
1723 */
_shutdown(struct omap_hwmod * oh)1724 static int _shutdown(struct omap_hwmod *oh)
1725 {
1726 int ret;
1727 u8 prev_state;
1728
1729 if (oh->_state != _HWMOD_STATE_IDLE &&
1730 oh->_state != _HWMOD_STATE_ENABLED) {
1731 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
1732 oh->name);
1733 return -EINVAL;
1734 }
1735
1736 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1737
1738 if (oh->class->pre_shutdown) {
1739 prev_state = oh->_state;
1740 if (oh->_state == _HWMOD_STATE_IDLE)
1741 _enable(oh);
1742 ret = oh->class->pre_shutdown(oh);
1743 if (ret) {
1744 if (prev_state == _HWMOD_STATE_IDLE)
1745 _idle(oh);
1746 return ret;
1747 }
1748 }
1749
1750 if (oh->class->sysc) {
1751 if (oh->_state == _HWMOD_STATE_IDLE)
1752 _enable(oh);
1753 _shutdown_sysc(oh);
1754 }
1755
1756 /* clocks and deps are already disabled in idle */
1757 if (oh->_state == _HWMOD_STATE_ENABLED) {
1758 _del_initiator_dep(oh, mpu_oh);
1759 /* XXX what about the other system initiators here? dma, dsp */
1760 _omap4_disable_module(oh);
1761 _disable_clocks(oh);
1762 if (oh->clkdm)
1763 clkdm_hwmod_disable(oh->clkdm, oh);
1764 }
1765 /* XXX Should this code also force-disable the optional clocks? */
1766
1767 /*
1768 * If an IP contains only one HW reset line, then assert it
1769 * after disabling the clocks and before shutting down the IP.
1770 */
1771 if (oh->rst_lines_cnt == 1)
1772 _assert_hardreset(oh, oh->rst_lines[0].name);
1773
1774 /* Mux pins to safe mode or use populated off mode values */
1775 if (oh->mux)
1776 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
1777
1778 oh->_state = _HWMOD_STATE_DISABLED;
1779
1780 return 0;
1781 }
1782
1783 /**
1784 * _setup - do initial configuration of omap_hwmod
1785 * @oh: struct omap_hwmod *
1786 *
1787 * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
1788 * OCP_SYSCONFIG register. Returns 0.
1789 */
_setup(struct omap_hwmod * oh,void * data)1790 static int _setup(struct omap_hwmod *oh, void *data)
1791 {
1792 int i, r;
1793 u8 postsetup_state;
1794
1795 if (oh->_state != _HWMOD_STATE_CLKS_INITED)
1796 return 0;
1797
1798 /* Set iclk autoidle mode */
1799 if (oh->slaves_cnt > 0) {
1800 for (i = 0; i < oh->slaves_cnt; i++) {
1801 struct omap_hwmod_ocp_if *os = oh->slaves[i];
1802 struct clk *c = os->_clk;
1803
1804 if (!c)
1805 continue;
1806
1807 if (os->flags & OCPIF_SWSUP_IDLE) {
1808 /* XXX omap_iclk_deny_idle(c); */
1809 } else {
1810 /* XXX omap_iclk_allow_idle(c); */
1811 clk_enable(c);
1812 }
1813 }
1814 }
1815
1816 oh->_state = _HWMOD_STATE_INITIALIZED;
1817
1818 /*
1819 * In the case of hwmod with hardreset that should not be
1820 * de-assert at boot time, we have to keep the module
1821 * initialized, because we cannot enable it properly with the
1822 * reset asserted. Exit without warning because that behavior is
1823 * expected.
1824 */
1825 if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
1826 return 0;
1827
1828 r = _enable(oh);
1829 if (r) {
1830 pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
1831 oh->name, oh->_state);
1832 return 0;
1833 }
1834
1835 if (!(oh->flags & HWMOD_INIT_NO_RESET))
1836 _reset(oh);
1837
1838 postsetup_state = oh->_postsetup_state;
1839 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
1840 postsetup_state = _HWMOD_STATE_ENABLED;
1841
1842 /*
1843 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
1844 * it should be set by the core code as a runtime flag during startup
1845 */
1846 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
1847 (postsetup_state == _HWMOD_STATE_IDLE)) {
1848 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
1849 postsetup_state = _HWMOD_STATE_ENABLED;
1850 }
1851
1852 if (postsetup_state == _HWMOD_STATE_IDLE)
1853 _idle(oh);
1854 else if (postsetup_state == _HWMOD_STATE_DISABLED)
1855 _shutdown(oh);
1856 else if (postsetup_state != _HWMOD_STATE_ENABLED)
1857 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
1858 oh->name, postsetup_state);
1859
1860 return 0;
1861 }
1862
1863 /**
1864 * _register - register a struct omap_hwmod
1865 * @oh: struct omap_hwmod *
1866 *
1867 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
1868 * already has been registered by the same name; -EINVAL if the
1869 * omap_hwmod is in the wrong state, if @oh is NULL, if the
1870 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
1871 * name, or if the omap_hwmod's class is missing a name; or 0 upon
1872 * success.
1873 *
1874 * XXX The data should be copied into bootmem, so the original data
1875 * should be marked __initdata and freed after init. This would allow
1876 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
1877 * that the copy process would be relatively complex due to the large number
1878 * of substructures.
1879 */
_register(struct omap_hwmod * oh)1880 static int __init _register(struct omap_hwmod *oh)
1881 {
1882 int ms_id;
1883
1884 if (!oh || !oh->name || !oh->class || !oh->class->name ||
1885 (oh->_state != _HWMOD_STATE_UNKNOWN))
1886 return -EINVAL;
1887
1888 pr_debug("omap_hwmod: %s: registering\n", oh->name);
1889
1890 if (_lookup(oh->name))
1891 return -EEXIST;
1892
1893 ms_id = _find_mpu_port_index(oh);
1894 if (!IS_ERR_VALUE(ms_id))
1895 oh->_mpu_port_index = ms_id;
1896 else
1897 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1898
1899 list_add_tail(&oh->node, &omap_hwmod_list);
1900
1901 spin_lock_init(&oh->_lock);
1902
1903 oh->_state = _HWMOD_STATE_REGISTERED;
1904
1905 /*
1906 * XXX Rather than doing a strcmp(), this should test a flag
1907 * set in the hwmod data, inserted by the autogenerator code.
1908 */
1909 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
1910 mpu_oh = oh;
1911
1912 return 0;
1913 }
1914
1915
1916 /* Public functions */
1917
omap_hwmod_read(struct omap_hwmod * oh,u16 reg_offs)1918 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
1919 {
1920 if (oh->flags & HWMOD_16BIT_REG)
1921 return __raw_readw(oh->_mpu_rt_va + reg_offs);
1922 else
1923 return __raw_readl(oh->_mpu_rt_va + reg_offs);
1924 }
1925
omap_hwmod_write(u32 v,struct omap_hwmod * oh,u16 reg_offs)1926 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
1927 {
1928 if (oh->flags & HWMOD_16BIT_REG)
1929 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
1930 else
1931 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
1932 }
1933
1934 /**
1935 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
1936 * @oh: struct omap_hwmod *
1937 *
1938 * This is a public function exposed to drivers. Some drivers may need to do
1939 * some settings before and after resetting the device. Those drivers after
1940 * doing the necessary settings could use this function to start a reset by
1941 * setting the SYSCONFIG.SOFTRESET bit.
1942 */
omap_hwmod_softreset(struct omap_hwmod * oh)1943 int omap_hwmod_softreset(struct omap_hwmod *oh)
1944 {
1945 u32 v;
1946 int ret;
1947
1948 if (!oh || !(oh->_sysc_cache))
1949 return -EINVAL;
1950
1951 v = oh->_sysc_cache;
1952 ret = _set_softreset(oh, &v);
1953 if (ret)
1954 goto error;
1955 _write_sysconfig(v, oh);
1956
1957 ret = _clear_softreset(oh, &v);
1958 if (ret)
1959 goto error;
1960 _write_sysconfig(v, oh);
1961
1962 error:
1963 return ret;
1964 }
1965
1966 /**
1967 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
1968 * @oh: struct omap_hwmod *
1969 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
1970 *
1971 * Sets the IP block's OCP slave idlemode in hardware, and updates our
1972 * local copy. Intended to be used by drivers that have some erratum
1973 * that requires direct manipulation of the SIDLEMODE bits. Returns
1974 * -EINVAL if @oh is null, or passes along the return value from
1975 * _set_slave_idlemode().
1976 *
1977 * XXX Does this function have any current users? If not, we should
1978 * remove it; it is better to let the rest of the hwmod code handle this.
1979 * Any users of this function should be scrutinized carefully.
1980 */
omap_hwmod_set_slave_idlemode(struct omap_hwmod * oh,u8 idlemode)1981 int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
1982 {
1983 u32 v;
1984 int retval = 0;
1985
1986 if (!oh)
1987 return -EINVAL;
1988
1989 v = oh->_sysc_cache;
1990
1991 retval = _set_slave_idlemode(oh, idlemode, &v);
1992 if (!retval)
1993 _write_sysconfig(v, oh);
1994
1995 return retval;
1996 }
1997
1998 /**
1999 * omap_hwmod_lookup - look up a registered omap_hwmod by name
2000 * @name: name of the omap_hwmod to look up
2001 *
2002 * Given a @name of an omap_hwmod, return a pointer to the registered
2003 * struct omap_hwmod *, or NULL upon error.
2004 */
omap_hwmod_lookup(const char * name)2005 struct omap_hwmod *omap_hwmod_lookup(const char *name)
2006 {
2007 struct omap_hwmod *oh;
2008
2009 if (!name)
2010 return NULL;
2011
2012 oh = _lookup(name);
2013
2014 return oh;
2015 }
2016
2017 /**
2018 * omap_hwmod_for_each - call function for each registered omap_hwmod
2019 * @fn: pointer to a callback function
2020 * @data: void * data to pass to callback function
2021 *
2022 * Call @fn for each registered omap_hwmod, passing @data to each
2023 * function. @fn must return 0 for success or any other value for
2024 * failure. If @fn returns non-zero, the iteration across omap_hwmods
2025 * will stop and the non-zero return value will be passed to the
2026 * caller of omap_hwmod_for_each(). @fn is called with
2027 * omap_hwmod_for_each() held.
2028 */
omap_hwmod_for_each(int (* fn)(struct omap_hwmod * oh,void * data),void * data)2029 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
2030 void *data)
2031 {
2032 struct omap_hwmod *temp_oh;
2033 int ret = 0;
2034
2035 if (!fn)
2036 return -EINVAL;
2037
2038 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
2039 ret = (*fn)(temp_oh, data);
2040 if (ret)
2041 break;
2042 }
2043
2044 return ret;
2045 }
2046
2047 /**
2048 * omap_hwmod_register - register an array of hwmods
2049 * @ohs: pointer to an array of omap_hwmods to register
2050 *
2051 * Intended to be called early in boot before the clock framework is
2052 * initialized. If @ohs is not null, will register all omap_hwmods
2053 * listed in @ohs that are valid for this chip. Returns 0.
2054 */
omap_hwmod_register(struct omap_hwmod ** ohs)2055 int __init omap_hwmod_register(struct omap_hwmod **ohs)
2056 {
2057 int r, i;
2058
2059 if (!ohs)
2060 return 0;
2061
2062 i = 0;
2063 do {
2064 r = _register(ohs[i]);
2065 WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
2066 r);
2067 } while (ohs[++i]);
2068
2069 return 0;
2070 }
2071
2072 /*
2073 * _populate_mpu_rt_base - populate the virtual address for a hwmod
2074 *
2075 * Must be called only from omap_hwmod_setup_*() so ioremap works properly.
2076 * Assumes the caller takes care of locking if needed.
2077 */
_populate_mpu_rt_base(struct omap_hwmod * oh,void * data)2078 static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
2079 {
2080 if (oh->_state != _HWMOD_STATE_REGISTERED)
2081 return 0;
2082
2083 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2084 return 0;
2085
2086 oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
2087
2088 return 0;
2089 }
2090
2091 /**
2092 * omap_hwmod_setup_one - set up a single hwmod
2093 * @oh_name: const char * name of the already-registered hwmod to set up
2094 *
2095 * Must be called after omap2_clk_init(). Resolves the struct clk
2096 * names to struct clk pointers for each registered omap_hwmod. Also
2097 * calls _setup() on each hwmod. Returns -EINVAL upon error or 0 upon
2098 * success.
2099 */
omap_hwmod_setup_one(const char * oh_name)2100 int __init omap_hwmod_setup_one(const char *oh_name)
2101 {
2102 struct omap_hwmod *oh;
2103 int r;
2104
2105 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
2106
2107 if (!mpu_oh) {
2108 pr_err("omap_hwmod: %s: cannot setup_one: MPU initiator hwmod %s not yet registered\n",
2109 oh_name, MPU_INITIATOR_NAME);
2110 return -EINVAL;
2111 }
2112
2113 oh = _lookup(oh_name);
2114 if (!oh) {
2115 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
2116 return -EINVAL;
2117 }
2118
2119 if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
2120 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
2121
2122 r = _populate_mpu_rt_base(oh, NULL);
2123 if (IS_ERR_VALUE(r)) {
2124 WARN(1, "omap_hwmod: %s: couldn't set mpu_rt_base\n", oh_name);
2125 return -EINVAL;
2126 }
2127
2128 r = _init_clocks(oh, NULL);
2129 if (IS_ERR_VALUE(r)) {
2130 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh_name);
2131 return -EINVAL;
2132 }
2133
2134 _setup(oh, NULL);
2135
2136 return 0;
2137 }
2138
2139 /**
2140 * omap_hwmod_setup - do some post-clock framework initialization
2141 *
2142 * Must be called after omap2_clk_init(). Resolves the struct clk names
2143 * to struct clk pointers for each registered omap_hwmod. Also calls
2144 * _setup() on each hwmod. Returns 0 upon success.
2145 */
omap_hwmod_setup_all(void)2146 static int __init omap_hwmod_setup_all(void)
2147 {
2148 int r;
2149
2150 if (!mpu_oh) {
2151 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
2152 __func__, MPU_INITIATOR_NAME);
2153 return -EINVAL;
2154 }
2155
2156 r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);
2157
2158 r = omap_hwmod_for_each(_init_clocks, NULL);
2159 WARN(IS_ERR_VALUE(r),
2160 "omap_hwmod: %s: _init_clocks failed\n", __func__);
2161
2162 omap_hwmod_for_each(_setup, NULL);
2163
2164 return 0;
2165 }
2166 core_initcall(omap_hwmod_setup_all);
2167
2168 /**
2169 * omap_hwmod_enable - enable an omap_hwmod
2170 * @oh: struct omap_hwmod *
2171 *
2172 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
2173 * Returns -EINVAL on error or passes along the return value from _enable().
2174 */
omap_hwmod_enable(struct omap_hwmod * oh)2175 int omap_hwmod_enable(struct omap_hwmod *oh)
2176 {
2177 int r;
2178 unsigned long flags;
2179
2180 if (!oh)
2181 return -EINVAL;
2182
2183 spin_lock_irqsave(&oh->_lock, flags);
2184 r = _enable(oh);
2185 spin_unlock_irqrestore(&oh->_lock, flags);
2186
2187 return r;
2188 }
2189
2190 /**
2191 * omap_hwmod_idle - idle an omap_hwmod
2192 * @oh: struct omap_hwmod *
2193 *
2194 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
2195 * Returns -EINVAL on error or passes along the return value from _idle().
2196 */
omap_hwmod_idle(struct omap_hwmod * oh)2197 int omap_hwmod_idle(struct omap_hwmod *oh)
2198 {
2199 unsigned long flags;
2200
2201 if (!oh)
2202 return -EINVAL;
2203
2204 spin_lock_irqsave(&oh->_lock, flags);
2205 _idle(oh);
2206 spin_unlock_irqrestore(&oh->_lock, flags);
2207
2208 return 0;
2209 }
2210
2211 /**
2212 * omap_hwmod_shutdown - shutdown an omap_hwmod
2213 * @oh: struct omap_hwmod *
2214 *
2215 * Shutdown an omap_hwmod @oh. Intended to be called by
2216 * omap_device_shutdown(). Returns -EINVAL on error or passes along
2217 * the return value from _shutdown().
2218 */
omap_hwmod_shutdown(struct omap_hwmod * oh)2219 int omap_hwmod_shutdown(struct omap_hwmod *oh)
2220 {
2221 unsigned long flags;
2222
2223 if (!oh)
2224 return -EINVAL;
2225
2226 spin_lock_irqsave(&oh->_lock, flags);
2227 _shutdown(oh);
2228 spin_unlock_irqrestore(&oh->_lock, flags);
2229
2230 return 0;
2231 }
2232
2233 /**
2234 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
2235 * @oh: struct omap_hwmod *oh
2236 *
2237 * Intended to be called by the omap_device code.
2238 */
omap_hwmod_enable_clocks(struct omap_hwmod * oh)2239 int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
2240 {
2241 unsigned long flags;
2242
2243 spin_lock_irqsave(&oh->_lock, flags);
2244 _enable_clocks(oh);
2245 spin_unlock_irqrestore(&oh->_lock, flags);
2246
2247 return 0;
2248 }
2249
2250 /**
2251 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
2252 * @oh: struct omap_hwmod *oh
2253 *
2254 * Intended to be called by the omap_device code.
2255 */
omap_hwmod_disable_clocks(struct omap_hwmod * oh)2256 int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
2257 {
2258 unsigned long flags;
2259
2260 spin_lock_irqsave(&oh->_lock, flags);
2261 _disable_clocks(oh);
2262 spin_unlock_irqrestore(&oh->_lock, flags);
2263
2264 return 0;
2265 }
2266
2267 /**
2268 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
2269 * @oh: struct omap_hwmod *oh
2270 *
2271 * Intended to be called by drivers and core code when all posted
2272 * writes to a device must complete before continuing further
2273 * execution (for example, after clearing some device IRQSTATUS
2274 * register bits)
2275 *
2276 * XXX what about targets with multiple OCP threads?
2277 */
omap_hwmod_ocp_barrier(struct omap_hwmod * oh)2278 void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
2279 {
2280 BUG_ON(!oh);
2281
2282 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
2283 WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
2284 oh->name);
2285 return;
2286 }
2287
2288 /*
2289 * Forces posted writes to complete on the OCP thread handling
2290 * register writes
2291 */
2292 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
2293 }
2294
2295 /**
2296 * omap_hwmod_reset - reset the hwmod
2297 * @oh: struct omap_hwmod *
2298 *
2299 * Under some conditions, a driver may wish to reset the entire device.
2300 * Called from omap_device code. Returns -EINVAL on error or passes along
2301 * the return value from _reset().
2302 */
omap_hwmod_reset(struct omap_hwmod * oh)2303 int omap_hwmod_reset(struct omap_hwmod *oh)
2304 {
2305 int r;
2306 unsigned long flags;
2307
2308 if (!oh)
2309 return -EINVAL;
2310
2311 spin_lock_irqsave(&oh->_lock, flags);
2312 r = _reset(oh);
2313 spin_unlock_irqrestore(&oh->_lock, flags);
2314
2315 return r;
2316 }
2317
2318 /**
2319 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
2320 * @oh: struct omap_hwmod *
2321 * @res: pointer to the first element of an array of struct resource to fill
2322 *
2323 * Count the number of struct resource array elements necessary to
2324 * contain omap_hwmod @oh resources. Intended to be called by code
2325 * that registers omap_devices. Intended to be used to determine the
2326 * size of a dynamically-allocated struct resource array, before
2327 * calling omap_hwmod_fill_resources(). Returns the number of struct
2328 * resource array elements needed.
2329 *
2330 * XXX This code is not optimized. It could attempt to merge adjacent
2331 * resource IDs.
2332 *
2333 */
omap_hwmod_count_resources(struct omap_hwmod * oh)2334 int omap_hwmod_count_resources(struct omap_hwmod *oh)
2335 {
2336 int ret, i;
2337
2338 ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
2339
2340 for (i = 0; i < oh->slaves_cnt; i++)
2341 ret += _count_ocp_if_addr_spaces(oh->slaves[i]);
2342
2343 return ret;
2344 }
2345
2346 /**
2347 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
2348 * @oh: struct omap_hwmod *
2349 * @res: pointer to the first element of an array of struct resource to fill
2350 *
2351 * Fill the struct resource array @res with resource data from the
2352 * omap_hwmod @oh. Intended to be called by code that registers
2353 * omap_devices. See also omap_hwmod_count_resources(). Returns the
2354 * number of array elements filled.
2355 */
omap_hwmod_fill_resources(struct omap_hwmod * oh,struct resource * res)2356 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
2357 {
2358 int i, j, mpu_irqs_cnt, sdma_reqs_cnt;
2359 int r = 0;
2360
2361 /* For each IRQ, DMA, memory area, fill in array.*/
2362
2363 mpu_irqs_cnt = _count_mpu_irqs(oh);
2364 for (i = 0; i < mpu_irqs_cnt; i++) {
2365 (res + r)->name = (oh->mpu_irqs + i)->name;
2366 (res + r)->start = (oh->mpu_irqs + i)->irq;
2367 (res + r)->end = (oh->mpu_irqs + i)->irq;
2368 (res + r)->flags = IORESOURCE_IRQ;
2369 r++;
2370 }
2371
2372 sdma_reqs_cnt = _count_sdma_reqs(oh);
2373 for (i = 0; i < sdma_reqs_cnt; i++) {
2374 (res + r)->name = (oh->sdma_reqs + i)->name;
2375 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
2376 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
2377 (res + r)->flags = IORESOURCE_DMA;
2378 r++;
2379 }
2380
2381 for (i = 0; i < oh->slaves_cnt; i++) {
2382 struct omap_hwmod_ocp_if *os;
2383 int addr_cnt;
2384
2385 os = oh->slaves[i];
2386 addr_cnt = _count_ocp_if_addr_spaces(os);
2387
2388 for (j = 0; j < addr_cnt; j++) {
2389 (res + r)->name = (os->addr + j)->name;
2390 (res + r)->start = (os->addr + j)->pa_start;
2391 (res + r)->end = (os->addr + j)->pa_end;
2392 (res + r)->flags = IORESOURCE_MEM;
2393 r++;
2394 }
2395 }
2396
2397 return r;
2398 }
2399
2400 /**
2401 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
2402 * @oh: struct omap_hwmod *
2403 *
2404 * Return the powerdomain pointer associated with the OMAP module
2405 * @oh's main clock. If @oh does not have a main clk, return the
2406 * powerdomain associated with the interface clock associated with the
2407 * module's MPU port. (XXX Perhaps this should use the SDMA port
2408 * instead?) Returns NULL on error, or a struct powerdomain * on
2409 * success.
2410 */
omap_hwmod_get_pwrdm(struct omap_hwmod * oh)2411 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
2412 {
2413 struct clk *c;
2414
2415 if (!oh)
2416 return NULL;
2417
2418 if (oh->_clk) {
2419 c = oh->_clk;
2420 } else {
2421 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2422 return NULL;
2423 c = oh->slaves[oh->_mpu_port_index]->_clk;
2424 }
2425
2426 if (!c->clkdm)
2427 return NULL;
2428
2429 return c->clkdm->pwrdm.ptr;
2430
2431 }
2432
2433 /**
2434 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
2435 * @oh: struct omap_hwmod *
2436 *
2437 * Returns the virtual address corresponding to the beginning of the
2438 * module's register target, in the address range that is intended to
2439 * be used by the MPU. Returns the virtual address upon success or NULL
2440 * upon error.
2441 */
omap_hwmod_get_mpu_rt_va(struct omap_hwmod * oh)2442 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
2443 {
2444 if (!oh)
2445 return NULL;
2446
2447 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2448 return NULL;
2449
2450 if (oh->_state == _HWMOD_STATE_UNKNOWN)
2451 return NULL;
2452
2453 return oh->_mpu_rt_va;
2454 }
2455
2456 /**
2457 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
2458 * @oh: struct omap_hwmod *
2459 * @init_oh: struct omap_hwmod * (initiator)
2460 *
2461 * Add a sleep dependency between the initiator @init_oh and @oh.
2462 * Intended to be called by DSP/Bridge code via platform_data for the
2463 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2464 * code needs to add/del initiator dependencies dynamically
2465 * before/after accessing a device. Returns the return value from
2466 * _add_initiator_dep().
2467 *
2468 * XXX Keep a usecount in the clockdomain code
2469 */
omap_hwmod_add_initiator_dep(struct omap_hwmod * oh,struct omap_hwmod * init_oh)2470 int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
2471 struct omap_hwmod *init_oh)
2472 {
2473 return _add_initiator_dep(oh, init_oh);
2474 }
2475
2476 /*
2477 * XXX what about functions for drivers to save/restore ocp_sysconfig
2478 * for context save/restore operations?
2479 */
2480
2481 /**
2482 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
2483 * @oh: struct omap_hwmod *
2484 * @init_oh: struct omap_hwmod * (initiator)
2485 *
2486 * Remove a sleep dependency between the initiator @init_oh and @oh.
2487 * Intended to be called by DSP/Bridge code via platform_data for the
2488 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2489 * code needs to add/del initiator dependencies dynamically
2490 * before/after accessing a device. Returns the return value from
2491 * _del_initiator_dep().
2492 *
2493 * XXX Keep a usecount in the clockdomain code
2494 */
omap_hwmod_del_initiator_dep(struct omap_hwmod * oh,struct omap_hwmod * init_oh)2495 int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
2496 struct omap_hwmod *init_oh)
2497 {
2498 return _del_initiator_dep(oh, init_oh);
2499 }
2500
2501 /**
2502 * omap_hwmod_enable_wakeup - allow device to wake up the system
2503 * @oh: struct omap_hwmod *
2504 *
2505 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2506 * send wakeups to the PRCM, and enable I/O ring wakeup events for
2507 * this IP block if it has dynamic mux entries. Eventually this
2508 * should set PRCM wakeup registers to cause the PRCM to receive
2509 * wakeup events from the module. Does not set any wakeup routing
2510 * registers beyond this point - if the module is to wake up any other
2511 * module or subsystem, that must be set separately. Called by
2512 * omap_device code. Returns -EINVAL on error or 0 upon success.
2513 */
omap_hwmod_enable_wakeup(struct omap_hwmod * oh)2514 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
2515 {
2516 unsigned long flags;
2517 u32 v;
2518
2519 spin_lock_irqsave(&oh->_lock, flags);
2520
2521 if (oh->class->sysc &&
2522 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
2523 v = oh->_sysc_cache;
2524 _enable_wakeup(oh, &v);
2525 _write_sysconfig(v, oh);
2526 }
2527
2528 _set_idle_ioring_wakeup(oh, true);
2529 spin_unlock_irqrestore(&oh->_lock, flags);
2530
2531 return 0;
2532 }
2533
2534 /**
2535 * omap_hwmod_disable_wakeup - prevent device from waking the system
2536 * @oh: struct omap_hwmod *
2537 *
2538 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2539 * from sending wakeups to the PRCM, and disable I/O ring wakeup
2540 * events for this IP block if it has dynamic mux entries. Eventually
2541 * this should clear PRCM wakeup registers to cause the PRCM to ignore
2542 * wakeup events from the module. Does not set any wakeup routing
2543 * registers beyond this point - if the module is to wake up any other
2544 * module or subsystem, that must be set separately. Called by
2545 * omap_device code. Returns -EINVAL on error or 0 upon success.
2546 */
omap_hwmod_disable_wakeup(struct omap_hwmod * oh)2547 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
2548 {
2549 unsigned long flags;
2550 u32 v;
2551
2552 spin_lock_irqsave(&oh->_lock, flags);
2553
2554 if (oh->class->sysc &&
2555 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
2556 v = oh->_sysc_cache;
2557 _disable_wakeup(oh, &v);
2558 _write_sysconfig(v, oh);
2559 }
2560
2561 _set_idle_ioring_wakeup(oh, false);
2562 spin_unlock_irqrestore(&oh->_lock, flags);
2563
2564 return 0;
2565 }
2566
2567 /**
2568 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
2569 * contained in the hwmod module.
2570 * @oh: struct omap_hwmod *
2571 * @name: name of the reset line to lookup and assert
2572 *
2573 * Some IP like dsp, ipu or iva contain processor that require
2574 * an HW reset line to be assert / deassert in order to enable fully
2575 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2576 * yet supported on this OMAP; otherwise, passes along the return value
2577 * from _assert_hardreset().
2578 */
omap_hwmod_assert_hardreset(struct omap_hwmod * oh,const char * name)2579 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
2580 {
2581 int ret;
2582 unsigned long flags;
2583
2584 if (!oh)
2585 return -EINVAL;
2586
2587 spin_lock_irqsave(&oh->_lock, flags);
2588 ret = _assert_hardreset(oh, name);
2589 spin_unlock_irqrestore(&oh->_lock, flags);
2590
2591 return ret;
2592 }
2593
2594 /**
2595 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
2596 * contained in the hwmod module.
2597 * @oh: struct omap_hwmod *
2598 * @name: name of the reset line to look up and deassert
2599 *
2600 * Some IP like dsp, ipu or iva contain processor that require
2601 * an HW reset line to be assert / deassert in order to enable fully
2602 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2603 * yet supported on this OMAP; otherwise, passes along the return value
2604 * from _deassert_hardreset().
2605 */
omap_hwmod_deassert_hardreset(struct omap_hwmod * oh,const char * name)2606 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
2607 {
2608 int ret;
2609 unsigned long flags;
2610
2611 if (!oh)
2612 return -EINVAL;
2613
2614 spin_lock_irqsave(&oh->_lock, flags);
2615 ret = _deassert_hardreset(oh, name);
2616 spin_unlock_irqrestore(&oh->_lock, flags);
2617
2618 return ret;
2619 }
2620
2621 /**
2622 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
2623 * contained in the hwmod module
2624 * @oh: struct omap_hwmod *
2625 * @name: name of the reset line to look up and read
2626 *
2627 * Return the current state of the hwmod @oh's reset line named @name:
2628 * returns -EINVAL upon parameter error or if this operation
2629 * is unsupported on the current OMAP; otherwise, passes along the return
2630 * value from _read_hardreset().
2631 */
omap_hwmod_read_hardreset(struct omap_hwmod * oh,const char * name)2632 int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
2633 {
2634 int ret;
2635 unsigned long flags;
2636
2637 if (!oh)
2638 return -EINVAL;
2639
2640 spin_lock_irqsave(&oh->_lock, flags);
2641 ret = _read_hardreset(oh, name);
2642 spin_unlock_irqrestore(&oh->_lock, flags);
2643
2644 return ret;
2645 }
2646
2647
2648 /**
2649 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
2650 * @classname: struct omap_hwmod_class name to search for
2651 * @fn: callback function pointer to call for each hwmod in class @classname
2652 * @user: arbitrary context data to pass to the callback function
2653 *
2654 * For each omap_hwmod of class @classname, call @fn.
2655 * If the callback function returns something other than
2656 * zero, the iterator is terminated, and the callback function's return
2657 * value is passed back to the caller. Returns 0 upon success, -EINVAL
2658 * if @classname or @fn are NULL, or passes back the error code from @fn.
2659 */
omap_hwmod_for_each_by_class(const char * classname,int (* fn)(struct omap_hwmod * oh,void * user),void * user)2660 int omap_hwmod_for_each_by_class(const char *classname,
2661 int (*fn)(struct omap_hwmod *oh,
2662 void *user),
2663 void *user)
2664 {
2665 struct omap_hwmod *temp_oh;
2666 int ret = 0;
2667
2668 if (!classname || !fn)
2669 return -EINVAL;
2670
2671 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
2672 __func__, classname);
2673
2674 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
2675 if (!strcmp(temp_oh->class->name, classname)) {
2676 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
2677 __func__, temp_oh->name);
2678 ret = (*fn)(temp_oh, user);
2679 if (ret)
2680 break;
2681 }
2682 }
2683
2684 if (ret)
2685 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
2686 __func__, ret);
2687
2688 return ret;
2689 }
2690
2691 /**
2692 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
2693 * @oh: struct omap_hwmod *
2694 * @state: state that _setup() should leave the hwmod in
2695 *
2696 * Sets the hwmod state that @oh will enter at the end of _setup()
2697 * (called by omap_hwmod_setup_*()). Only valid to call between
2698 * calling omap_hwmod_register() and omap_hwmod_setup_*(). Returns
2699 * 0 upon success or -EINVAL if there is a problem with the arguments
2700 * or if the hwmod is in the wrong state.
2701 */
omap_hwmod_set_postsetup_state(struct omap_hwmod * oh,u8 state)2702 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
2703 {
2704 int ret;
2705 unsigned long flags;
2706
2707 if (!oh)
2708 return -EINVAL;
2709
2710 if (state != _HWMOD_STATE_DISABLED &&
2711 state != _HWMOD_STATE_ENABLED &&
2712 state != _HWMOD_STATE_IDLE)
2713 return -EINVAL;
2714
2715 spin_lock_irqsave(&oh->_lock, flags);
2716
2717 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2718 ret = -EINVAL;
2719 goto ohsps_unlock;
2720 }
2721
2722 oh->_postsetup_state = state;
2723 ret = 0;
2724
2725 ohsps_unlock:
2726 spin_unlock_irqrestore(&oh->_lock, flags);
2727
2728 return ret;
2729 }
2730
2731 /**
2732 * omap_hwmod_get_context_loss_count - get lost context count
2733 * @oh: struct omap_hwmod *
2734 *
2735 * Query the powerdomain of of @oh to get the context loss
2736 * count for this device.
2737 *
2738 * Returns the context loss count of the powerdomain assocated with @oh
2739 * upon success, or zero if no powerdomain exists for @oh.
2740 */
omap_hwmod_get_context_loss_count(struct omap_hwmod * oh)2741 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
2742 {
2743 struct powerdomain *pwrdm;
2744 int ret = 0;
2745
2746 pwrdm = omap_hwmod_get_pwrdm(oh);
2747 if (pwrdm)
2748 ret = pwrdm_get_context_loss_count(pwrdm);
2749
2750 return ret;
2751 }
2752
2753 /**
2754 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
2755 * @oh: struct omap_hwmod *
2756 *
2757 * Prevent the hwmod @oh from being reset during the setup process.
2758 * Intended for use by board-*.c files on boards with devices that
2759 * cannot tolerate being reset. Must be called before the hwmod has
2760 * been set up. Returns 0 upon success or negative error code upon
2761 * failure.
2762 */
omap_hwmod_no_setup_reset(struct omap_hwmod * oh)2763 int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
2764 {
2765 if (!oh)
2766 return -EINVAL;
2767
2768 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2769 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
2770 oh->name);
2771 return -EINVAL;
2772 }
2773
2774 oh->flags |= HWMOD_INIT_NO_RESET;
2775
2776 return 0;
2777 }
2778
2779 /**
2780 * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
2781 * @oh: struct omap_hwmod * containing hwmod mux entries
2782 * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
2783 * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
2784 *
2785 * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
2786 * entry number @pad_idx for the hwmod @oh, trigger the interrupt
2787 * service routine for the hwmod's mpu_irqs array index @irq_idx. If
2788 * this function is not called for a given pad_idx, then the ISR
2789 * associated with @oh's first MPU IRQ will be triggered when an I/O
2790 * pad wakeup occurs on that pad. Note that @pad_idx is the index of
2791 * the _dynamic or wakeup_ entry: if there are other entries not
2792 * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
2793 * entries are NOT COUNTED in the dynamic pad index. This function
2794 * must be called separately for each pad that requires its interrupt
2795 * to be re-routed this way. Returns -EINVAL if there is an argument
2796 * problem or if @oh does not have hwmod mux entries or MPU IRQs;
2797 * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
2798 *
2799 * XXX This function interface is fragile. Rather than using array
2800 * indexes, which are subject to unpredictable change, it should be
2801 * using hwmod IRQ names, and some other stable key for the hwmod mux
2802 * pad records.
2803 */
omap_hwmod_pad_route_irq(struct omap_hwmod * oh,int pad_idx,int irq_idx)2804 int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
2805 {
2806 int nr_irqs;
2807
2808 might_sleep();
2809
2810 if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
2811 pad_idx >= oh->mux->nr_pads_dynamic)
2812 return -EINVAL;
2813
2814 /* Check the number of available mpu_irqs */
2815 for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
2816 ;
2817
2818 if (irq_idx >= nr_irqs)
2819 return -EINVAL;
2820
2821 if (!oh->mux->irqs) {
2822 /* XXX What frees this? */
2823 oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
2824 GFP_KERNEL);
2825 if (!oh->mux->irqs)
2826 return -ENOMEM;
2827 }
2828 oh->mux->irqs[pad_idx] = irq_idx;
2829
2830 return 0;
2831 }
2832