1 /* 2 * omap_hwmod_2xxx_ipblock_data.c - common IP block data for OMAP2xxx 3 * 4 * Copyright (C) 2011 Nokia Corporation 5 * Paul Walmsley 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 #include <plat/omap_hwmod.h> 12 #include <plat/serial.h> 13 #include <plat/dma.h> 14 #include <plat/dmtimer.h> 15 #include <plat/mcspi.h> 16 17 #include <mach/irqs.h> 18 19 #include "omap_hwmod_common_data.h" 20 #include "wd_timer.h" 21 22 struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[] = { 23 { .irq = 48, }, 24 { .irq = -1 } 25 }; 26 27 struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[] = { 28 { .name = "dispc", .dma_req = 5 }, 29 { .dma_req = -1 } 30 }; 31 32 /* 33 * 'dispc' class 34 * display controller 35 */ 36 37 static struct omap_hwmod_class_sysconfig omap2_dispc_sysc = { 38 .rev_offs = 0x0000, 39 .sysc_offs = 0x0010, 40 .syss_offs = 0x0014, 41 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE | 42 SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), 43 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | 44 MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), 45 .sysc_fields = &omap_hwmod_sysc_type1, 46 }; 47 48 struct omap_hwmod_class omap2_dispc_hwmod_class = { 49 .name = "dispc", 50 .sysc = &omap2_dispc_sysc, 51 }; 52 53 /* OMAP2xxx Timer Common */ 54 static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = { 55 .rev_offs = 0x0000, 56 .sysc_offs = 0x0010, 57 .syss_offs = 0x0014, 58 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY | 59 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | 60 SYSC_HAS_AUTOIDLE), 61 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), 62 .sysc_fields = &omap_hwmod_sysc_type1, 63 }; 64 65 struct omap_hwmod_class omap2xxx_timer_hwmod_class = { 66 .name = "timer", 67 .sysc = &omap2xxx_timer_sysc, 68 .rev = OMAP_TIMER_IP_VERSION_1, 69 }; 70 71 /* 72 * 'wd_timer' class 73 * 32-bit watchdog upward counter that generates a pulse on the reset pin on 74 * overflow condition 75 */ 76 77 static struct omap_hwmod_class_sysconfig omap2xxx_wd_timer_sysc = { 78 .rev_offs = 0x0000, 79 .sysc_offs = 0x0010, 80 .syss_offs = 0x0014, 81 .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | 82 SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), 83 .sysc_fields = &omap_hwmod_sysc_type1, 84 }; 85 86 struct omap_hwmod_class omap2xxx_wd_timer_hwmod_class = { 87 .name = "wd_timer", 88 .sysc = &omap2xxx_wd_timer_sysc, 89 .pre_shutdown = &omap2_wd_timer_disable 90 }; 91 92 /* 93 * 'gpio' class 94 * general purpose io module 95 */ 96 static struct omap_hwmod_class_sysconfig omap2xxx_gpio_sysc = { 97 .rev_offs = 0x0000, 98 .sysc_offs = 0x0010, 99 .syss_offs = 0x0014, 100 .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | 101 SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | 102 SYSS_HAS_RESET_STATUS), 103 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), 104 .sysc_fields = &omap_hwmod_sysc_type1, 105 }; 106 107 struct omap_hwmod_class omap2xxx_gpio_hwmod_class = { 108 .name = "gpio", 109 .sysc = &omap2xxx_gpio_sysc, 110 .rev = 0, 111 }; 112 113 /* system dma */ 114 static struct omap_hwmod_class_sysconfig omap2xxx_dma_sysc = { 115 .rev_offs = 0x0000, 116 .sysc_offs = 0x002c, 117 .syss_offs = 0x0028, 118 .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE | 119 SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE | 120 SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), 121 .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), 122 .sysc_fields = &omap_hwmod_sysc_type1, 123 }; 124 125 struct omap_hwmod_class omap2xxx_dma_hwmod_class = { 126 .name = "dma", 127 .sysc = &omap2xxx_dma_sysc, 128 }; 129 130 /* 131 * 'mailbox' class 132 * mailbox module allowing communication between the on-chip processors 133 * using a queued mailbox-interrupt mechanism. 134 */ 135 136 static struct omap_hwmod_class_sysconfig omap2xxx_mailbox_sysc = { 137 .rev_offs = 0x000, 138 .sysc_offs = 0x010, 139 .syss_offs = 0x014, 140 .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | 141 SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), 142 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), 143 .sysc_fields = &omap_hwmod_sysc_type1, 144 }; 145 146 struct omap_hwmod_class omap2xxx_mailbox_hwmod_class = { 147 .name = "mailbox", 148 .sysc = &omap2xxx_mailbox_sysc, 149 }; 150 151 /* 152 * 'mcspi' class 153 * multichannel serial port interface (mcspi) / master/slave synchronous serial 154 * bus 155 */ 156 157 static struct omap_hwmod_class_sysconfig omap2xxx_mcspi_sysc = { 158 .rev_offs = 0x0000, 159 .sysc_offs = 0x0010, 160 .syss_offs = 0x0014, 161 .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | 162 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | 163 SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), 164 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), 165 .sysc_fields = &omap_hwmod_sysc_type1, 166 }; 167 168 struct omap_hwmod_class omap2xxx_mcspi_class = { 169 .name = "mcspi", 170 .sysc = &omap2xxx_mcspi_sysc, 171 .rev = OMAP2_MCSPI_REV, 172 }; 173