1 /*
2  * Copyright 2012 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 #include "priv.h"
25 #include "acpi.h"
26 
27 #include <core/notify.h>
28 #include <core/option.h>
29 
30 #include <subdev/bios.h>
31 #include <subdev/therm.h>
32 
33 static DEFINE_MUTEX(nv_devices_mutex);
34 static LIST_HEAD(nv_devices);
35 
36 static struct nvkm_device *
nvkm_device_find_locked(u64 handle)37 nvkm_device_find_locked(u64 handle)
38 {
39 	struct nvkm_device *device;
40 	list_for_each_entry(device, &nv_devices, head) {
41 		if (device->handle == handle)
42 			return device;
43 	}
44 	return NULL;
45 }
46 
47 struct nvkm_device *
nvkm_device_find(u64 handle)48 nvkm_device_find(u64 handle)
49 {
50 	struct nvkm_device *device;
51 	mutex_lock(&nv_devices_mutex);
52 	device = nvkm_device_find_locked(handle);
53 	mutex_unlock(&nv_devices_mutex);
54 	return device;
55 }
56 
57 int
nvkm_device_list(u64 * name,int size)58 nvkm_device_list(u64 *name, int size)
59 {
60 	struct nvkm_device *device;
61 	int nr = 0;
62 	mutex_lock(&nv_devices_mutex);
63 	list_for_each_entry(device, &nv_devices, head) {
64 		if (nr++ < size)
65 			name[nr - 1] = device->handle;
66 	}
67 	mutex_unlock(&nv_devices_mutex);
68 	return nr;
69 }
70 
71 static const struct nvkm_device_chip
72 null_chipset = {
73 	.name = "NULL",
74 	.bios     = { 0x00000001, nvkm_bios_new },
75 };
76 
77 static const struct nvkm_device_chip
78 nv4_chipset = {
79 	.name = "NV04",
80 	.bios     = { 0x00000001, nvkm_bios_new },
81 	.bus      = { 0x00000001, nv04_bus_new },
82 	.clk      = { 0x00000001, nv04_clk_new },
83 	.devinit  = { 0x00000001, nv04_devinit_new },
84 	.fb       = { 0x00000001, nv04_fb_new },
85 	.i2c      = { 0x00000001, nv04_i2c_new },
86 	.imem     = { 0x00000001, nv04_instmem_new },
87 	.mc       = { 0x00000001, nv04_mc_new },
88 	.mmu      = { 0x00000001, nv04_mmu_new },
89 	.pci      = { 0x00000001, nv04_pci_new },
90 	.timer    = { 0x00000001, nv04_timer_new },
91 	.disp     = { 0x00000001, nv04_disp_new },
92 	.dma      = { 0x00000001, nv04_dma_new },
93 	.fifo     = { 0x00000001, nv04_fifo_new },
94 	.gr       = { 0x00000001, nv04_gr_new },
95 	.sw       = { 0x00000001, nv04_sw_new },
96 };
97 
98 static const struct nvkm_device_chip
99 nv5_chipset = {
100 	.name = "NV05",
101 	.bios     = { 0x00000001, nvkm_bios_new },
102 	.bus      = { 0x00000001, nv04_bus_new },
103 	.clk      = { 0x00000001, nv04_clk_new },
104 	.devinit  = { 0x00000001, nv05_devinit_new },
105 	.fb       = { 0x00000001, nv04_fb_new },
106 	.i2c      = { 0x00000001, nv04_i2c_new },
107 	.imem     = { 0x00000001, nv04_instmem_new },
108 	.mc       = { 0x00000001, nv04_mc_new },
109 	.mmu      = { 0x00000001, nv04_mmu_new },
110 	.pci      = { 0x00000001, nv04_pci_new },
111 	.timer    = { 0x00000001, nv04_timer_new },
112 	.disp     = { 0x00000001, nv04_disp_new },
113 	.dma      = { 0x00000001, nv04_dma_new },
114 	.fifo     = { 0x00000001, nv04_fifo_new },
115 	.gr       = { 0x00000001, nv04_gr_new },
116 	.sw       = { 0x00000001, nv04_sw_new },
117 };
118 
119 static const struct nvkm_device_chip
120 nv10_chipset = {
121 	.name = "NV10",
122 	.bios     = { 0x00000001, nvkm_bios_new },
123 	.bus      = { 0x00000001, nv04_bus_new },
124 	.clk      = { 0x00000001, nv04_clk_new },
125 	.devinit  = { 0x00000001, nv10_devinit_new },
126 	.fb       = { 0x00000001, nv10_fb_new },
127 	.gpio     = { 0x00000001, nv10_gpio_new },
128 	.i2c      = { 0x00000001, nv04_i2c_new },
129 	.imem     = { 0x00000001, nv04_instmem_new },
130 	.mc       = { 0x00000001, nv04_mc_new },
131 	.mmu      = { 0x00000001, nv04_mmu_new },
132 	.pci      = { 0x00000001, nv04_pci_new },
133 	.timer    = { 0x00000001, nv04_timer_new },
134 	.disp     = { 0x00000001, nv04_disp_new },
135 	.dma      = { 0x00000001, nv04_dma_new },
136 	.gr       = { 0x00000001, nv10_gr_new },
137 };
138 
139 static const struct nvkm_device_chip
140 nv11_chipset = {
141 	.name = "NV11",
142 	.bios     = { 0x00000001, nvkm_bios_new },
143 	.bus      = { 0x00000001, nv04_bus_new },
144 	.clk      = { 0x00000001, nv04_clk_new },
145 	.devinit  = { 0x00000001, nv10_devinit_new },
146 	.fb       = { 0x00000001, nv10_fb_new },
147 	.gpio     = { 0x00000001, nv10_gpio_new },
148 	.i2c      = { 0x00000001, nv04_i2c_new },
149 	.imem     = { 0x00000001, nv04_instmem_new },
150 	.mc       = { 0x00000001, nv11_mc_new },
151 	.mmu      = { 0x00000001, nv04_mmu_new },
152 	.pci      = { 0x00000001, nv04_pci_new },
153 	.timer    = { 0x00000001, nv04_timer_new },
154 	.disp     = { 0x00000001, nv04_disp_new },
155 	.dma      = { 0x00000001, nv04_dma_new },
156 	.fifo     = { 0x00000001, nv10_fifo_new },
157 	.gr       = { 0x00000001, nv15_gr_new },
158 	.sw       = { 0x00000001, nv10_sw_new },
159 };
160 
161 static const struct nvkm_device_chip
162 nv15_chipset = {
163 	.name = "NV15",
164 	.bios     = { 0x00000001, nvkm_bios_new },
165 	.bus      = { 0x00000001, nv04_bus_new },
166 	.clk      = { 0x00000001, nv04_clk_new },
167 	.devinit  = { 0x00000001, nv10_devinit_new },
168 	.fb       = { 0x00000001, nv10_fb_new },
169 	.gpio     = { 0x00000001, nv10_gpio_new },
170 	.i2c      = { 0x00000001, nv04_i2c_new },
171 	.imem     = { 0x00000001, nv04_instmem_new },
172 	.mc       = { 0x00000001, nv04_mc_new },
173 	.mmu      = { 0x00000001, nv04_mmu_new },
174 	.pci      = { 0x00000001, nv04_pci_new },
175 	.timer    = { 0x00000001, nv04_timer_new },
176 	.disp     = { 0x00000001, nv04_disp_new },
177 	.dma      = { 0x00000001, nv04_dma_new },
178 	.fifo     = { 0x00000001, nv10_fifo_new },
179 	.gr       = { 0x00000001, nv15_gr_new },
180 	.sw       = { 0x00000001, nv10_sw_new },
181 };
182 
183 static const struct nvkm_device_chip
184 nv17_chipset = {
185 	.name = "NV17",
186 	.bios     = { 0x00000001, nvkm_bios_new },
187 	.bus      = { 0x00000001, nv04_bus_new },
188 	.clk      = { 0x00000001, nv04_clk_new },
189 	.devinit  = { 0x00000001, nv10_devinit_new },
190 	.fb       = { 0x00000001, nv10_fb_new },
191 	.gpio     = { 0x00000001, nv10_gpio_new },
192 	.i2c      = { 0x00000001, nv04_i2c_new },
193 	.imem     = { 0x00000001, nv04_instmem_new },
194 	.mc       = { 0x00000001, nv17_mc_new },
195 	.mmu      = { 0x00000001, nv04_mmu_new },
196 	.pci      = { 0x00000001, nv04_pci_new },
197 	.timer    = { 0x00000001, nv04_timer_new },
198 	.disp     = { 0x00000001, nv04_disp_new },
199 	.dma      = { 0x00000001, nv04_dma_new },
200 	.fifo     = { 0x00000001, nv17_fifo_new },
201 	.gr       = { 0x00000001, nv17_gr_new },
202 	.sw       = { 0x00000001, nv10_sw_new },
203 };
204 
205 static const struct nvkm_device_chip
206 nv18_chipset = {
207 	.name = "NV18",
208 	.bios     = { 0x00000001, nvkm_bios_new },
209 	.bus      = { 0x00000001, nv04_bus_new },
210 	.clk      = { 0x00000001, nv04_clk_new },
211 	.devinit  = { 0x00000001, nv10_devinit_new },
212 	.fb       = { 0x00000001, nv10_fb_new },
213 	.gpio     = { 0x00000001, nv10_gpio_new },
214 	.i2c      = { 0x00000001, nv04_i2c_new },
215 	.imem     = { 0x00000001, nv04_instmem_new },
216 	.mc       = { 0x00000001, nv17_mc_new },
217 	.mmu      = { 0x00000001, nv04_mmu_new },
218 	.pci      = { 0x00000001, nv04_pci_new },
219 	.timer    = { 0x00000001, nv04_timer_new },
220 	.disp     = { 0x00000001, nv04_disp_new },
221 	.dma      = { 0x00000001, nv04_dma_new },
222 	.fifo     = { 0x00000001, nv17_fifo_new },
223 	.gr       = { 0x00000001, nv17_gr_new },
224 	.sw       = { 0x00000001, nv10_sw_new },
225 };
226 
227 static const struct nvkm_device_chip
228 nv1a_chipset = {
229 	.name = "nForce",
230 	.bios     = { 0x00000001, nvkm_bios_new },
231 	.bus      = { 0x00000001, nv04_bus_new },
232 	.clk      = { 0x00000001, nv04_clk_new },
233 	.devinit  = { 0x00000001, nv1a_devinit_new },
234 	.fb       = { 0x00000001, nv1a_fb_new },
235 	.gpio     = { 0x00000001, nv10_gpio_new },
236 	.i2c      = { 0x00000001, nv04_i2c_new },
237 	.imem     = { 0x00000001, nv04_instmem_new },
238 	.mc       = { 0x00000001, nv04_mc_new },
239 	.mmu      = { 0x00000001, nv04_mmu_new },
240 	.pci      = { 0x00000001, nv04_pci_new },
241 	.timer    = { 0x00000001, nv04_timer_new },
242 	.disp     = { 0x00000001, nv04_disp_new },
243 	.dma      = { 0x00000001, nv04_dma_new },
244 	.fifo     = { 0x00000001, nv10_fifo_new },
245 	.gr       = { 0x00000001, nv15_gr_new },
246 	.sw       = { 0x00000001, nv10_sw_new },
247 };
248 
249 static const struct nvkm_device_chip
250 nv1f_chipset = {
251 	.name = "nForce2",
252 	.bios     = { 0x00000001, nvkm_bios_new },
253 	.bus      = { 0x00000001, nv04_bus_new },
254 	.clk      = { 0x00000001, nv04_clk_new },
255 	.devinit  = { 0x00000001, nv1a_devinit_new },
256 	.fb       = { 0x00000001, nv1a_fb_new },
257 	.gpio     = { 0x00000001, nv10_gpio_new },
258 	.i2c      = { 0x00000001, nv04_i2c_new },
259 	.imem     = { 0x00000001, nv04_instmem_new },
260 	.mc       = { 0x00000001, nv17_mc_new },
261 	.mmu      = { 0x00000001, nv04_mmu_new },
262 	.pci      = { 0x00000001, nv04_pci_new },
263 	.timer    = { 0x00000001, nv04_timer_new },
264 	.disp     = { 0x00000001, nv04_disp_new },
265 	.dma      = { 0x00000001, nv04_dma_new },
266 	.fifo     = { 0x00000001, nv17_fifo_new },
267 	.gr       = { 0x00000001, nv17_gr_new },
268 	.sw       = { 0x00000001, nv10_sw_new },
269 };
270 
271 static const struct nvkm_device_chip
272 nv20_chipset = {
273 	.name = "NV20",
274 	.bios     = { 0x00000001, nvkm_bios_new },
275 	.bus      = { 0x00000001, nv04_bus_new },
276 	.clk      = { 0x00000001, nv04_clk_new },
277 	.devinit  = { 0x00000001, nv20_devinit_new },
278 	.fb       = { 0x00000001, nv20_fb_new },
279 	.gpio     = { 0x00000001, nv10_gpio_new },
280 	.i2c      = { 0x00000001, nv04_i2c_new },
281 	.imem     = { 0x00000001, nv04_instmem_new },
282 	.mc       = { 0x00000001, nv17_mc_new },
283 	.mmu      = { 0x00000001, nv04_mmu_new },
284 	.pci      = { 0x00000001, nv04_pci_new },
285 	.timer    = { 0x00000001, nv04_timer_new },
286 	.disp     = { 0x00000001, nv04_disp_new },
287 	.dma      = { 0x00000001, nv04_dma_new },
288 	.fifo     = { 0x00000001, nv17_fifo_new },
289 	.gr       = { 0x00000001, nv20_gr_new },
290 	.sw       = { 0x00000001, nv10_sw_new },
291 };
292 
293 static const struct nvkm_device_chip
294 nv25_chipset = {
295 	.name = "NV25",
296 	.bios     = { 0x00000001, nvkm_bios_new },
297 	.bus      = { 0x00000001, nv04_bus_new },
298 	.clk      = { 0x00000001, nv04_clk_new },
299 	.devinit  = { 0x00000001, nv20_devinit_new },
300 	.fb       = { 0x00000001, nv25_fb_new },
301 	.gpio     = { 0x00000001, nv10_gpio_new },
302 	.i2c      = { 0x00000001, nv04_i2c_new },
303 	.imem     = { 0x00000001, nv04_instmem_new },
304 	.mc       = { 0x00000001, nv17_mc_new },
305 	.mmu      = { 0x00000001, nv04_mmu_new },
306 	.pci      = { 0x00000001, nv04_pci_new },
307 	.timer    = { 0x00000001, nv04_timer_new },
308 	.disp     = { 0x00000001, nv04_disp_new },
309 	.dma      = { 0x00000001, nv04_dma_new },
310 	.fifo     = { 0x00000001, nv17_fifo_new },
311 	.gr       = { 0x00000001, nv25_gr_new },
312 	.sw       = { 0x00000001, nv10_sw_new },
313 };
314 
315 static const struct nvkm_device_chip
316 nv28_chipset = {
317 	.name = "NV28",
318 	.bios     = { 0x00000001, nvkm_bios_new },
319 	.bus      = { 0x00000001, nv04_bus_new },
320 	.clk      = { 0x00000001, nv04_clk_new },
321 	.devinit  = { 0x00000001, nv20_devinit_new },
322 	.fb       = { 0x00000001, nv25_fb_new },
323 	.gpio     = { 0x00000001, nv10_gpio_new },
324 	.i2c      = { 0x00000001, nv04_i2c_new },
325 	.imem     = { 0x00000001, nv04_instmem_new },
326 	.mc       = { 0x00000001, nv17_mc_new },
327 	.mmu      = { 0x00000001, nv04_mmu_new },
328 	.pci      = { 0x00000001, nv04_pci_new },
329 	.timer    = { 0x00000001, nv04_timer_new },
330 	.disp     = { 0x00000001, nv04_disp_new },
331 	.dma      = { 0x00000001, nv04_dma_new },
332 	.fifo     = { 0x00000001, nv17_fifo_new },
333 	.gr       = { 0x00000001, nv25_gr_new },
334 	.sw       = { 0x00000001, nv10_sw_new },
335 };
336 
337 static const struct nvkm_device_chip
338 nv2a_chipset = {
339 	.name = "NV2A",
340 	.bios     = { 0x00000001, nvkm_bios_new },
341 	.bus      = { 0x00000001, nv04_bus_new },
342 	.clk      = { 0x00000001, nv04_clk_new },
343 	.devinit  = { 0x00000001, nv20_devinit_new },
344 	.fb       = { 0x00000001, nv25_fb_new },
345 	.gpio     = { 0x00000001, nv10_gpio_new },
346 	.i2c      = { 0x00000001, nv04_i2c_new },
347 	.imem     = { 0x00000001, nv04_instmem_new },
348 	.mc       = { 0x00000001, nv17_mc_new },
349 	.mmu      = { 0x00000001, nv04_mmu_new },
350 	.pci      = { 0x00000001, nv04_pci_new },
351 	.timer    = { 0x00000001, nv04_timer_new },
352 	.disp     = { 0x00000001, nv04_disp_new },
353 	.dma      = { 0x00000001, nv04_dma_new },
354 	.fifo     = { 0x00000001, nv17_fifo_new },
355 	.gr       = { 0x00000001, nv2a_gr_new },
356 	.sw       = { 0x00000001, nv10_sw_new },
357 };
358 
359 static const struct nvkm_device_chip
360 nv30_chipset = {
361 	.name = "NV30",
362 	.bios     = { 0x00000001, nvkm_bios_new },
363 	.bus      = { 0x00000001, nv04_bus_new },
364 	.clk      = { 0x00000001, nv04_clk_new },
365 	.devinit  = { 0x00000001, nv20_devinit_new },
366 	.fb       = { 0x00000001, nv30_fb_new },
367 	.gpio     = { 0x00000001, nv10_gpio_new },
368 	.i2c      = { 0x00000001, nv04_i2c_new },
369 	.imem     = { 0x00000001, nv04_instmem_new },
370 	.mc       = { 0x00000001, nv17_mc_new },
371 	.mmu      = { 0x00000001, nv04_mmu_new },
372 	.pci      = { 0x00000001, nv04_pci_new },
373 	.timer    = { 0x00000001, nv04_timer_new },
374 	.disp     = { 0x00000001, nv04_disp_new },
375 	.dma      = { 0x00000001, nv04_dma_new },
376 	.fifo     = { 0x00000001, nv17_fifo_new },
377 	.gr       = { 0x00000001, nv30_gr_new },
378 	.sw       = { 0x00000001, nv10_sw_new },
379 };
380 
381 static const struct nvkm_device_chip
382 nv31_chipset = {
383 	.name = "NV31",
384 	.bios     = { 0x00000001, nvkm_bios_new },
385 	.bus      = { 0x00000001, nv31_bus_new },
386 	.clk      = { 0x00000001, nv04_clk_new },
387 	.devinit  = { 0x00000001, nv20_devinit_new },
388 	.fb       = { 0x00000001, nv30_fb_new },
389 	.gpio     = { 0x00000001, nv10_gpio_new },
390 	.i2c      = { 0x00000001, nv04_i2c_new },
391 	.imem     = { 0x00000001, nv04_instmem_new },
392 	.mc       = { 0x00000001, nv17_mc_new },
393 	.mmu      = { 0x00000001, nv04_mmu_new },
394 	.pci      = { 0x00000001, nv04_pci_new },
395 	.timer    = { 0x00000001, nv04_timer_new },
396 	.disp     = { 0x00000001, nv04_disp_new },
397 	.dma      = { 0x00000001, nv04_dma_new },
398 	.fifo     = { 0x00000001, nv17_fifo_new },
399 	.gr       = { 0x00000001, nv30_gr_new },
400 	.mpeg     = { 0x00000001, nv31_mpeg_new },
401 	.sw       = { 0x00000001, nv10_sw_new },
402 };
403 
404 static const struct nvkm_device_chip
405 nv34_chipset = {
406 	.name = "NV34",
407 	.bios     = { 0x00000001, nvkm_bios_new },
408 	.bus      = { 0x00000001, nv31_bus_new },
409 	.clk      = { 0x00000001, nv04_clk_new },
410 	.devinit  = { 0x00000001, nv10_devinit_new },
411 	.fb       = { 0x00000001, nv10_fb_new },
412 	.gpio     = { 0x00000001, nv10_gpio_new },
413 	.i2c      = { 0x00000001, nv04_i2c_new },
414 	.imem     = { 0x00000001, nv04_instmem_new },
415 	.mc       = { 0x00000001, nv17_mc_new },
416 	.mmu      = { 0x00000001, nv04_mmu_new },
417 	.pci      = { 0x00000001, nv04_pci_new },
418 	.timer    = { 0x00000001, nv04_timer_new },
419 	.disp     = { 0x00000001, nv04_disp_new },
420 	.dma      = { 0x00000001, nv04_dma_new },
421 	.fifo     = { 0x00000001, nv17_fifo_new },
422 	.gr       = { 0x00000001, nv34_gr_new },
423 	.mpeg     = { 0x00000001, nv31_mpeg_new },
424 	.sw       = { 0x00000001, nv10_sw_new },
425 };
426 
427 static const struct nvkm_device_chip
428 nv35_chipset = {
429 	.name = "NV35",
430 	.bios     = { 0x00000001, nvkm_bios_new },
431 	.bus      = { 0x00000001, nv04_bus_new },
432 	.clk      = { 0x00000001, nv04_clk_new },
433 	.devinit  = { 0x00000001, nv20_devinit_new },
434 	.fb       = { 0x00000001, nv35_fb_new },
435 	.gpio     = { 0x00000001, nv10_gpio_new },
436 	.i2c      = { 0x00000001, nv04_i2c_new },
437 	.imem     = { 0x00000001, nv04_instmem_new },
438 	.mc       = { 0x00000001, nv17_mc_new },
439 	.mmu      = { 0x00000001, nv04_mmu_new },
440 	.pci      = { 0x00000001, nv04_pci_new },
441 	.timer    = { 0x00000001, nv04_timer_new },
442 	.disp     = { 0x00000001, nv04_disp_new },
443 	.dma      = { 0x00000001, nv04_dma_new },
444 	.fifo     = { 0x00000001, nv17_fifo_new },
445 	.gr       = { 0x00000001, nv35_gr_new },
446 	.sw       = { 0x00000001, nv10_sw_new },
447 };
448 
449 static const struct nvkm_device_chip
450 nv36_chipset = {
451 	.name = "NV36",
452 	.bios     = { 0x00000001, nvkm_bios_new },
453 	.bus      = { 0x00000001, nv31_bus_new },
454 	.clk      = { 0x00000001, nv04_clk_new },
455 	.devinit  = { 0x00000001, nv20_devinit_new },
456 	.fb       = { 0x00000001, nv36_fb_new },
457 	.gpio     = { 0x00000001, nv10_gpio_new },
458 	.i2c      = { 0x00000001, nv04_i2c_new },
459 	.imem     = { 0x00000001, nv04_instmem_new },
460 	.mc       = { 0x00000001, nv17_mc_new },
461 	.mmu      = { 0x00000001, nv04_mmu_new },
462 	.pci      = { 0x00000001, nv04_pci_new },
463 	.timer    = { 0x00000001, nv04_timer_new },
464 	.disp     = { 0x00000001, nv04_disp_new },
465 	.dma      = { 0x00000001, nv04_dma_new },
466 	.fifo     = { 0x00000001, nv17_fifo_new },
467 	.gr       = { 0x00000001, nv35_gr_new },
468 	.mpeg     = { 0x00000001, nv31_mpeg_new },
469 	.sw       = { 0x00000001, nv10_sw_new },
470 };
471 
472 static const struct nvkm_device_chip
473 nv40_chipset = {
474 	.name = "NV40",
475 	.bios     = { 0x00000001, nvkm_bios_new },
476 	.bus      = { 0x00000001, nv31_bus_new },
477 	.clk      = { 0x00000001, nv40_clk_new },
478 	.devinit  = { 0x00000001, nv1a_devinit_new },
479 	.fb       = { 0x00000001, nv40_fb_new },
480 	.gpio     = { 0x00000001, nv10_gpio_new },
481 	.i2c      = { 0x00000001, nv04_i2c_new },
482 	.imem     = { 0x00000001, nv40_instmem_new },
483 	.mc       = { 0x00000001, nv17_mc_new },
484 	.mmu      = { 0x00000001, nv04_mmu_new },
485 	.pci      = { 0x00000001, nv40_pci_new },
486 	.therm    = { 0x00000001, nv40_therm_new },
487 	.timer    = { 0x00000001, nv40_timer_new },
488 	.volt     = { 0x00000001, nv40_volt_new },
489 	.disp     = { 0x00000001, nv04_disp_new },
490 	.dma      = { 0x00000001, nv04_dma_new },
491 	.fifo     = { 0x00000001, nv40_fifo_new },
492 	.gr       = { 0x00000001, nv40_gr_new },
493 	.mpeg     = { 0x00000001, nv40_mpeg_new },
494 	.pm       = { 0x00000001, nv40_pm_new },
495 	.sw       = { 0x00000001, nv10_sw_new },
496 };
497 
498 static const struct nvkm_device_chip
499 nv41_chipset = {
500 	.name = "NV41",
501 	.bios     = { 0x00000001, nvkm_bios_new },
502 	.bus      = { 0x00000001, nv31_bus_new },
503 	.clk      = { 0x00000001, nv40_clk_new },
504 	.devinit  = { 0x00000001, nv1a_devinit_new },
505 	.fb       = { 0x00000001, nv41_fb_new },
506 	.gpio     = { 0x00000001, nv10_gpio_new },
507 	.i2c      = { 0x00000001, nv04_i2c_new },
508 	.imem     = { 0x00000001, nv40_instmem_new },
509 	.mc       = { 0x00000001, nv17_mc_new },
510 	.mmu      = { 0x00000001, nv41_mmu_new },
511 	.pci      = { 0x00000001, nv40_pci_new },
512 	.therm    = { 0x00000001, nv40_therm_new },
513 	.timer    = { 0x00000001, nv41_timer_new },
514 	.volt     = { 0x00000001, nv40_volt_new },
515 	.disp     = { 0x00000001, nv04_disp_new },
516 	.dma      = { 0x00000001, nv04_dma_new },
517 	.fifo     = { 0x00000001, nv40_fifo_new },
518 	.gr       = { 0x00000001, nv40_gr_new },
519 	.mpeg     = { 0x00000001, nv40_mpeg_new },
520 	.pm       = { 0x00000001, nv40_pm_new },
521 	.sw       = { 0x00000001, nv10_sw_new },
522 };
523 
524 static const struct nvkm_device_chip
525 nv42_chipset = {
526 	.name = "NV42",
527 	.bios     = { 0x00000001, nvkm_bios_new },
528 	.bus      = { 0x00000001, nv31_bus_new },
529 	.clk      = { 0x00000001, nv40_clk_new },
530 	.devinit  = { 0x00000001, nv1a_devinit_new },
531 	.fb       = { 0x00000001, nv41_fb_new },
532 	.gpio     = { 0x00000001, nv10_gpio_new },
533 	.i2c      = { 0x00000001, nv04_i2c_new },
534 	.imem     = { 0x00000001, nv40_instmem_new },
535 	.mc       = { 0x00000001, nv17_mc_new },
536 	.mmu      = { 0x00000001, nv41_mmu_new },
537 	.pci      = { 0x00000001, nv40_pci_new },
538 	.therm    = { 0x00000001, nv40_therm_new },
539 	.timer    = { 0x00000001, nv41_timer_new },
540 	.volt     = { 0x00000001, nv40_volt_new },
541 	.disp     = { 0x00000001, nv04_disp_new },
542 	.dma      = { 0x00000001, nv04_dma_new },
543 	.fifo     = { 0x00000001, nv40_fifo_new },
544 	.gr       = { 0x00000001, nv40_gr_new },
545 	.mpeg     = { 0x00000001, nv40_mpeg_new },
546 	.pm       = { 0x00000001, nv40_pm_new },
547 	.sw       = { 0x00000001, nv10_sw_new },
548 };
549 
550 static const struct nvkm_device_chip
551 nv43_chipset = {
552 	.name = "NV43",
553 	.bios     = { 0x00000001, nvkm_bios_new },
554 	.bus      = { 0x00000001, nv31_bus_new },
555 	.clk      = { 0x00000001, nv40_clk_new },
556 	.devinit  = { 0x00000001, nv1a_devinit_new },
557 	.fb       = { 0x00000001, nv41_fb_new },
558 	.gpio     = { 0x00000001, nv10_gpio_new },
559 	.i2c      = { 0x00000001, nv04_i2c_new },
560 	.imem     = { 0x00000001, nv40_instmem_new },
561 	.mc       = { 0x00000001, nv17_mc_new },
562 	.mmu      = { 0x00000001, nv41_mmu_new },
563 	.pci      = { 0x00000001, nv40_pci_new },
564 	.therm    = { 0x00000001, nv40_therm_new },
565 	.timer    = { 0x00000001, nv41_timer_new },
566 	.volt     = { 0x00000001, nv40_volt_new },
567 	.disp     = { 0x00000001, nv04_disp_new },
568 	.dma      = { 0x00000001, nv04_dma_new },
569 	.fifo     = { 0x00000001, nv40_fifo_new },
570 	.gr       = { 0x00000001, nv40_gr_new },
571 	.mpeg     = { 0x00000001, nv40_mpeg_new },
572 	.pm       = { 0x00000001, nv40_pm_new },
573 	.sw       = { 0x00000001, nv10_sw_new },
574 };
575 
576 static const struct nvkm_device_chip
577 nv44_chipset = {
578 	.name = "NV44",
579 	.bios     = { 0x00000001, nvkm_bios_new },
580 	.bus      = { 0x00000001, nv31_bus_new },
581 	.clk      = { 0x00000001, nv40_clk_new },
582 	.devinit  = { 0x00000001, nv1a_devinit_new },
583 	.fb       = { 0x00000001, nv44_fb_new },
584 	.gpio     = { 0x00000001, nv10_gpio_new },
585 	.i2c      = { 0x00000001, nv04_i2c_new },
586 	.imem     = { 0x00000001, nv40_instmem_new },
587 	.mc       = { 0x00000001, nv44_mc_new },
588 	.mmu      = { 0x00000001, nv44_mmu_new },
589 	.pci      = { 0x00000001, nv40_pci_new },
590 	.therm    = { 0x00000001, nv40_therm_new },
591 	.timer    = { 0x00000001, nv41_timer_new },
592 	.volt     = { 0x00000001, nv40_volt_new },
593 	.disp     = { 0x00000001, nv04_disp_new },
594 	.dma      = { 0x00000001, nv04_dma_new },
595 	.fifo     = { 0x00000001, nv40_fifo_new },
596 	.gr       = { 0x00000001, nv44_gr_new },
597 	.mpeg     = { 0x00000001, nv44_mpeg_new },
598 	.pm       = { 0x00000001, nv40_pm_new },
599 	.sw       = { 0x00000001, nv10_sw_new },
600 };
601 
602 static const struct nvkm_device_chip
603 nv45_chipset = {
604 	.name = "NV45",
605 	.bios     = { 0x00000001, nvkm_bios_new },
606 	.bus      = { 0x00000001, nv31_bus_new },
607 	.clk      = { 0x00000001, nv40_clk_new },
608 	.devinit  = { 0x00000001, nv1a_devinit_new },
609 	.fb       = { 0x00000001, nv40_fb_new },
610 	.gpio     = { 0x00000001, nv10_gpio_new },
611 	.i2c      = { 0x00000001, nv04_i2c_new },
612 	.imem     = { 0x00000001, nv40_instmem_new },
613 	.mc       = { 0x00000001, nv17_mc_new },
614 	.mmu      = { 0x00000001, nv04_mmu_new },
615 	.pci      = { 0x00000001, nv40_pci_new },
616 	.therm    = { 0x00000001, nv40_therm_new },
617 	.timer    = { 0x00000001, nv41_timer_new },
618 	.volt     = { 0x00000001, nv40_volt_new },
619 	.disp     = { 0x00000001, nv04_disp_new },
620 	.dma      = { 0x00000001, nv04_dma_new },
621 	.fifo     = { 0x00000001, nv40_fifo_new },
622 	.gr       = { 0x00000001, nv40_gr_new },
623 	.mpeg     = { 0x00000001, nv44_mpeg_new },
624 	.pm       = { 0x00000001, nv40_pm_new },
625 	.sw       = { 0x00000001, nv10_sw_new },
626 };
627 
628 static const struct nvkm_device_chip
629 nv46_chipset = {
630 	.name = "G72",
631 	.bios     = { 0x00000001, nvkm_bios_new },
632 	.bus      = { 0x00000001, nv31_bus_new },
633 	.clk      = { 0x00000001, nv40_clk_new },
634 	.devinit  = { 0x00000001, nv1a_devinit_new },
635 	.fb       = { 0x00000001, nv46_fb_new },
636 	.gpio     = { 0x00000001, nv10_gpio_new },
637 	.i2c      = { 0x00000001, nv04_i2c_new },
638 	.imem     = { 0x00000001, nv40_instmem_new },
639 	.mc       = { 0x00000001, nv44_mc_new },
640 	.mmu      = { 0x00000001, nv44_mmu_new },
641 	.pci      = { 0x00000001, nv46_pci_new },
642 	.therm    = { 0x00000001, nv40_therm_new },
643 	.timer    = { 0x00000001, nv41_timer_new },
644 	.volt     = { 0x00000001, nv40_volt_new },
645 	.disp     = { 0x00000001, nv04_disp_new },
646 	.dma      = { 0x00000001, nv04_dma_new },
647 	.fifo     = { 0x00000001, nv40_fifo_new },
648 	.gr       = { 0x00000001, nv44_gr_new },
649 	.mpeg     = { 0x00000001, nv44_mpeg_new },
650 	.pm       = { 0x00000001, nv40_pm_new },
651 	.sw       = { 0x00000001, nv10_sw_new },
652 };
653 
654 static const struct nvkm_device_chip
655 nv47_chipset = {
656 	.name = "G70",
657 	.bios     = { 0x00000001, nvkm_bios_new },
658 	.bus      = { 0x00000001, nv31_bus_new },
659 	.clk      = { 0x00000001, nv40_clk_new },
660 	.devinit  = { 0x00000001, nv1a_devinit_new },
661 	.fb       = { 0x00000001, nv47_fb_new },
662 	.gpio     = { 0x00000001, nv10_gpio_new },
663 	.i2c      = { 0x00000001, nv04_i2c_new },
664 	.imem     = { 0x00000001, nv40_instmem_new },
665 	.mc       = { 0x00000001, nv17_mc_new },
666 	.mmu      = { 0x00000001, nv41_mmu_new },
667 	.pci      = { 0x00000001, nv40_pci_new },
668 	.therm    = { 0x00000001, nv40_therm_new },
669 	.timer    = { 0x00000001, nv41_timer_new },
670 	.volt     = { 0x00000001, nv40_volt_new },
671 	.disp     = { 0x00000001, nv04_disp_new },
672 	.dma      = { 0x00000001, nv04_dma_new },
673 	.fifo     = { 0x00000001, nv40_fifo_new },
674 	.gr       = { 0x00000001, nv40_gr_new },
675 	.mpeg     = { 0x00000001, nv44_mpeg_new },
676 	.pm       = { 0x00000001, nv40_pm_new },
677 	.sw       = { 0x00000001, nv10_sw_new },
678 };
679 
680 static const struct nvkm_device_chip
681 nv49_chipset = {
682 	.name = "G71",
683 	.bios     = { 0x00000001, nvkm_bios_new },
684 	.bus      = { 0x00000001, nv31_bus_new },
685 	.clk      = { 0x00000001, nv40_clk_new },
686 	.devinit  = { 0x00000001, nv1a_devinit_new },
687 	.fb       = { 0x00000001, nv49_fb_new },
688 	.gpio     = { 0x00000001, nv10_gpio_new },
689 	.i2c      = { 0x00000001, nv04_i2c_new },
690 	.imem     = { 0x00000001, nv40_instmem_new },
691 	.mc       = { 0x00000001, nv17_mc_new },
692 	.mmu      = { 0x00000001, nv41_mmu_new },
693 	.pci      = { 0x00000001, nv40_pci_new },
694 	.therm    = { 0x00000001, nv40_therm_new },
695 	.timer    = { 0x00000001, nv41_timer_new },
696 	.volt     = { 0x00000001, nv40_volt_new },
697 	.disp     = { 0x00000001, nv04_disp_new },
698 	.dma      = { 0x00000001, nv04_dma_new },
699 	.fifo     = { 0x00000001, nv40_fifo_new },
700 	.gr       = { 0x00000001, nv40_gr_new },
701 	.mpeg     = { 0x00000001, nv44_mpeg_new },
702 	.pm       = { 0x00000001, nv40_pm_new },
703 	.sw       = { 0x00000001, nv10_sw_new },
704 };
705 
706 static const struct nvkm_device_chip
707 nv4a_chipset = {
708 	.name = "NV44A",
709 	.bios     = { 0x00000001, nvkm_bios_new },
710 	.bus      = { 0x00000001, nv31_bus_new },
711 	.clk      = { 0x00000001, nv40_clk_new },
712 	.devinit  = { 0x00000001, nv1a_devinit_new },
713 	.fb       = { 0x00000001, nv44_fb_new },
714 	.gpio     = { 0x00000001, nv10_gpio_new },
715 	.i2c      = { 0x00000001, nv04_i2c_new },
716 	.imem     = { 0x00000001, nv40_instmem_new },
717 	.mc       = { 0x00000001, nv44_mc_new },
718 	.mmu      = { 0x00000001, nv04_mmu_new },
719 	.pci      = { 0x00000001, nv40_pci_new },
720 	.therm    = { 0x00000001, nv40_therm_new },
721 	.timer    = { 0x00000001, nv41_timer_new },
722 	.volt     = { 0x00000001, nv40_volt_new },
723 	.disp     = { 0x00000001, nv04_disp_new },
724 	.dma      = { 0x00000001, nv04_dma_new },
725 	.fifo     = { 0x00000001, nv40_fifo_new },
726 	.gr       = { 0x00000001, nv44_gr_new },
727 	.mpeg     = { 0x00000001, nv44_mpeg_new },
728 	.pm       = { 0x00000001, nv40_pm_new },
729 	.sw       = { 0x00000001, nv10_sw_new },
730 };
731 
732 static const struct nvkm_device_chip
733 nv4b_chipset = {
734 	.name = "G73",
735 	.bios     = { 0x00000001, nvkm_bios_new },
736 	.bus      = { 0x00000001, nv31_bus_new },
737 	.clk      = { 0x00000001, nv40_clk_new },
738 	.devinit  = { 0x00000001, nv1a_devinit_new },
739 	.fb       = { 0x00000001, nv49_fb_new },
740 	.gpio     = { 0x00000001, nv10_gpio_new },
741 	.i2c      = { 0x00000001, nv04_i2c_new },
742 	.imem     = { 0x00000001, nv40_instmem_new },
743 	.mc       = { 0x00000001, nv17_mc_new },
744 	.mmu      = { 0x00000001, nv41_mmu_new },
745 	.pci      = { 0x00000001, nv40_pci_new },
746 	.therm    = { 0x00000001, nv40_therm_new },
747 	.timer    = { 0x00000001, nv41_timer_new },
748 	.volt     = { 0x00000001, nv40_volt_new },
749 	.disp     = { 0x00000001, nv04_disp_new },
750 	.dma      = { 0x00000001, nv04_dma_new },
751 	.fifo     = { 0x00000001, nv40_fifo_new },
752 	.gr       = { 0x00000001, nv40_gr_new },
753 	.mpeg     = { 0x00000001, nv44_mpeg_new },
754 	.pm       = { 0x00000001, nv40_pm_new },
755 	.sw       = { 0x00000001, nv10_sw_new },
756 };
757 
758 static const struct nvkm_device_chip
759 nv4c_chipset = {
760 	.name = "C61",
761 	.bios     = { 0x00000001, nvkm_bios_new },
762 	.bus      = { 0x00000001, nv31_bus_new },
763 	.clk      = { 0x00000001, nv40_clk_new },
764 	.devinit  = { 0x00000001, nv1a_devinit_new },
765 	.fb       = { 0x00000001, nv46_fb_new },
766 	.gpio     = { 0x00000001, nv10_gpio_new },
767 	.i2c      = { 0x00000001, nv04_i2c_new },
768 	.imem     = { 0x00000001, nv40_instmem_new },
769 	.mc       = { 0x00000001, nv44_mc_new },
770 	.mmu      = { 0x00000001, nv44_mmu_new },
771 	.pci      = { 0x00000001, nv4c_pci_new },
772 	.therm    = { 0x00000001, nv40_therm_new },
773 	.timer    = { 0x00000001, nv41_timer_new },
774 	.volt     = { 0x00000001, nv40_volt_new },
775 	.disp     = { 0x00000001, nv04_disp_new },
776 	.dma      = { 0x00000001, nv04_dma_new },
777 	.fifo     = { 0x00000001, nv40_fifo_new },
778 	.gr       = { 0x00000001, nv44_gr_new },
779 	.mpeg     = { 0x00000001, nv44_mpeg_new },
780 	.pm       = { 0x00000001, nv40_pm_new },
781 	.sw       = { 0x00000001, nv10_sw_new },
782 };
783 
784 static const struct nvkm_device_chip
785 nv4e_chipset = {
786 	.name = "C51",
787 	.bios     = { 0x00000001, nvkm_bios_new },
788 	.bus      = { 0x00000001, nv31_bus_new },
789 	.clk      = { 0x00000001, nv40_clk_new },
790 	.devinit  = { 0x00000001, nv1a_devinit_new },
791 	.fb       = { 0x00000001, nv4e_fb_new },
792 	.gpio     = { 0x00000001, nv10_gpio_new },
793 	.i2c      = { 0x00000001, nv4e_i2c_new },
794 	.imem     = { 0x00000001, nv40_instmem_new },
795 	.mc       = { 0x00000001, nv44_mc_new },
796 	.mmu      = { 0x00000001, nv44_mmu_new },
797 	.pci      = { 0x00000001, nv4c_pci_new },
798 	.therm    = { 0x00000001, nv40_therm_new },
799 	.timer    = { 0x00000001, nv41_timer_new },
800 	.volt     = { 0x00000001, nv40_volt_new },
801 	.disp     = { 0x00000001, nv04_disp_new },
802 	.dma      = { 0x00000001, nv04_dma_new },
803 	.fifo     = { 0x00000001, nv40_fifo_new },
804 	.gr       = { 0x00000001, nv44_gr_new },
805 	.mpeg     = { 0x00000001, nv44_mpeg_new },
806 	.pm       = { 0x00000001, nv40_pm_new },
807 	.sw       = { 0x00000001, nv10_sw_new },
808 };
809 
810 static const struct nvkm_device_chip
811 nv50_chipset = {
812 	.name = "G80",
813 	.bar      = { 0x00000001, nv50_bar_new },
814 	.bios     = { 0x00000001, nvkm_bios_new },
815 	.bus      = { 0x00000001, nv50_bus_new },
816 	.clk      = { 0x00000001, nv50_clk_new },
817 	.devinit  = { 0x00000001, nv50_devinit_new },
818 	.fb       = { 0x00000001, nv50_fb_new },
819 	.fuse     = { 0x00000001, nv50_fuse_new },
820 	.gpio     = { 0x00000001, nv50_gpio_new },
821 	.i2c      = { 0x00000001, nv50_i2c_new },
822 	.imem     = { 0x00000001, nv50_instmem_new },
823 	.mc       = { 0x00000001, nv50_mc_new },
824 	.mmu      = { 0x00000001, nv50_mmu_new },
825 	.mxm      = { 0x00000001, nv50_mxm_new },
826 	.pci      = { 0x00000001, nv46_pci_new },
827 	.therm    = { 0x00000001, nv50_therm_new },
828 	.timer    = { 0x00000001, nv41_timer_new },
829 	.volt     = { 0x00000001, nv40_volt_new },
830 	.disp     = { 0x00000001, nv50_disp_new },
831 	.dma      = { 0x00000001, nv50_dma_new },
832 	.fifo     = { 0x00000001, nv50_fifo_new },
833 	.gr       = { 0x00000001, nv50_gr_new },
834 	.mpeg     = { 0x00000001, nv50_mpeg_new },
835 	.pm       = { 0x00000001, nv50_pm_new },
836 	.sw       = { 0x00000001, nv50_sw_new },
837 };
838 
839 static const struct nvkm_device_chip
840 nv63_chipset = {
841 	.name = "C73",
842 	.bios     = { 0x00000001, nvkm_bios_new },
843 	.bus      = { 0x00000001, nv31_bus_new },
844 	.clk      = { 0x00000001, nv40_clk_new },
845 	.devinit  = { 0x00000001, nv1a_devinit_new },
846 	.fb       = { 0x00000001, nv46_fb_new },
847 	.gpio     = { 0x00000001, nv10_gpio_new },
848 	.i2c      = { 0x00000001, nv04_i2c_new },
849 	.imem     = { 0x00000001, nv40_instmem_new },
850 	.mc       = { 0x00000001, nv44_mc_new },
851 	.mmu      = { 0x00000001, nv44_mmu_new },
852 	.pci      = { 0x00000001, nv4c_pci_new },
853 	.therm    = { 0x00000001, nv40_therm_new },
854 	.timer    = { 0x00000001, nv41_timer_new },
855 	.volt     = { 0x00000001, nv40_volt_new },
856 	.disp     = { 0x00000001, nv04_disp_new },
857 	.dma      = { 0x00000001, nv04_dma_new },
858 	.fifo     = { 0x00000001, nv40_fifo_new },
859 	.gr       = { 0x00000001, nv44_gr_new },
860 	.mpeg     = { 0x00000001, nv44_mpeg_new },
861 	.pm       = { 0x00000001, nv40_pm_new },
862 	.sw       = { 0x00000001, nv10_sw_new },
863 };
864 
865 static const struct nvkm_device_chip
866 nv67_chipset = {
867 	.name = "C67",
868 	.bios     = { 0x00000001, nvkm_bios_new },
869 	.bus      = { 0x00000001, nv31_bus_new },
870 	.clk      = { 0x00000001, nv40_clk_new },
871 	.devinit  = { 0x00000001, nv1a_devinit_new },
872 	.fb       = { 0x00000001, nv46_fb_new },
873 	.gpio     = { 0x00000001, nv10_gpio_new },
874 	.i2c      = { 0x00000001, nv04_i2c_new },
875 	.imem     = { 0x00000001, nv40_instmem_new },
876 	.mc       = { 0x00000001, nv44_mc_new },
877 	.mmu      = { 0x00000001, nv44_mmu_new },
878 	.pci      = { 0x00000001, nv4c_pci_new },
879 	.therm    = { 0x00000001, nv40_therm_new },
880 	.timer    = { 0x00000001, nv41_timer_new },
881 	.volt     = { 0x00000001, nv40_volt_new },
882 	.disp     = { 0x00000001, nv04_disp_new },
883 	.dma      = { 0x00000001, nv04_dma_new },
884 	.fifo     = { 0x00000001, nv40_fifo_new },
885 	.gr       = { 0x00000001, nv44_gr_new },
886 	.mpeg     = { 0x00000001, nv44_mpeg_new },
887 	.pm       = { 0x00000001, nv40_pm_new },
888 	.sw       = { 0x00000001, nv10_sw_new },
889 };
890 
891 static const struct nvkm_device_chip
892 nv68_chipset = {
893 	.name = "C68",
894 	.bios     = { 0x00000001, nvkm_bios_new },
895 	.bus      = { 0x00000001, nv31_bus_new },
896 	.clk      = { 0x00000001, nv40_clk_new },
897 	.devinit  = { 0x00000001, nv1a_devinit_new },
898 	.fb       = { 0x00000001, nv46_fb_new },
899 	.gpio     = { 0x00000001, nv10_gpio_new },
900 	.i2c      = { 0x00000001, nv04_i2c_new },
901 	.imem     = { 0x00000001, nv40_instmem_new },
902 	.mc       = { 0x00000001, nv44_mc_new },
903 	.mmu      = { 0x00000001, nv44_mmu_new },
904 	.pci      = { 0x00000001, nv4c_pci_new },
905 	.therm    = { 0x00000001, nv40_therm_new },
906 	.timer    = { 0x00000001, nv41_timer_new },
907 	.volt     = { 0x00000001, nv40_volt_new },
908 	.disp     = { 0x00000001, nv04_disp_new },
909 	.dma      = { 0x00000001, nv04_dma_new },
910 	.fifo     = { 0x00000001, nv40_fifo_new },
911 	.gr       = { 0x00000001, nv44_gr_new },
912 	.mpeg     = { 0x00000001, nv44_mpeg_new },
913 	.pm       = { 0x00000001, nv40_pm_new },
914 	.sw       = { 0x00000001, nv10_sw_new },
915 };
916 
917 static const struct nvkm_device_chip
918 nv84_chipset = {
919 	.name = "G84",
920 	.bar      = { 0x00000001, g84_bar_new },
921 	.bios     = { 0x00000001, nvkm_bios_new },
922 	.bus      = { 0x00000001, nv50_bus_new },
923 	.clk      = { 0x00000001, g84_clk_new },
924 	.devinit  = { 0x00000001, g84_devinit_new },
925 	.fb       = { 0x00000001, g84_fb_new },
926 	.fuse     = { 0x00000001, nv50_fuse_new },
927 	.gpio     = { 0x00000001, nv50_gpio_new },
928 	.i2c      = { 0x00000001, nv50_i2c_new },
929 	.imem     = { 0x00000001, nv50_instmem_new },
930 	.mc       = { 0x00000001, g84_mc_new },
931 	.mmu      = { 0x00000001, g84_mmu_new },
932 	.mxm      = { 0x00000001, nv50_mxm_new },
933 	.pci      = { 0x00000001, g84_pci_new },
934 	.therm    = { 0x00000001, g84_therm_new },
935 	.timer    = { 0x00000001, nv41_timer_new },
936 	.volt     = { 0x00000001, nv40_volt_new },
937 	.bsp      = { 0x00000001, g84_bsp_new },
938 	.cipher   = { 0x00000001, g84_cipher_new },
939 	.disp     = { 0x00000001, g84_disp_new },
940 	.dma      = { 0x00000001, nv50_dma_new },
941 	.fifo     = { 0x00000001, g84_fifo_new },
942 	.gr       = { 0x00000001, g84_gr_new },
943 	.mpeg     = { 0x00000001, g84_mpeg_new },
944 	.pm       = { 0x00000001, g84_pm_new },
945 	.sw       = { 0x00000001, nv50_sw_new },
946 	.vp       = { 0x00000001, g84_vp_new },
947 };
948 
949 static const struct nvkm_device_chip
950 nv86_chipset = {
951 	.name = "G86",
952 	.bar      = { 0x00000001, g84_bar_new },
953 	.bios     = { 0x00000001, nvkm_bios_new },
954 	.bus      = { 0x00000001, nv50_bus_new },
955 	.clk      = { 0x00000001, g84_clk_new },
956 	.devinit  = { 0x00000001, g84_devinit_new },
957 	.fb       = { 0x00000001, g84_fb_new },
958 	.fuse     = { 0x00000001, nv50_fuse_new },
959 	.gpio     = { 0x00000001, nv50_gpio_new },
960 	.i2c      = { 0x00000001, nv50_i2c_new },
961 	.imem     = { 0x00000001, nv50_instmem_new },
962 	.mc       = { 0x00000001, g84_mc_new },
963 	.mmu      = { 0x00000001, g84_mmu_new },
964 	.mxm      = { 0x00000001, nv50_mxm_new },
965 	.pci      = { 0x00000001, g84_pci_new },
966 	.therm    = { 0x00000001, g84_therm_new },
967 	.timer    = { 0x00000001, nv41_timer_new },
968 	.volt     = { 0x00000001, nv40_volt_new },
969 	.bsp      = { 0x00000001, g84_bsp_new },
970 	.cipher   = { 0x00000001, g84_cipher_new },
971 	.disp     = { 0x00000001, g84_disp_new },
972 	.dma      = { 0x00000001, nv50_dma_new },
973 	.fifo     = { 0x00000001, g84_fifo_new },
974 	.gr       = { 0x00000001, g84_gr_new },
975 	.mpeg     = { 0x00000001, g84_mpeg_new },
976 	.pm       = { 0x00000001, g84_pm_new },
977 	.sw       = { 0x00000001, nv50_sw_new },
978 	.vp       = { 0x00000001, g84_vp_new },
979 };
980 
981 static const struct nvkm_device_chip
982 nv92_chipset = {
983 	.name = "G92",
984 	.bar      = { 0x00000001, g84_bar_new },
985 	.bios     = { 0x00000001, nvkm_bios_new },
986 	.bus      = { 0x00000001, nv50_bus_new },
987 	.clk      = { 0x00000001, g84_clk_new },
988 	.devinit  = { 0x00000001, g84_devinit_new },
989 	.fb       = { 0x00000001, g84_fb_new },
990 	.fuse     = { 0x00000001, nv50_fuse_new },
991 	.gpio     = { 0x00000001, nv50_gpio_new },
992 	.i2c      = { 0x00000001, nv50_i2c_new },
993 	.imem     = { 0x00000001, nv50_instmem_new },
994 	.mc       = { 0x00000001, g84_mc_new },
995 	.mmu      = { 0x00000001, g84_mmu_new },
996 	.mxm      = { 0x00000001, nv50_mxm_new },
997 	.pci      = { 0x00000001, g92_pci_new },
998 	.therm    = { 0x00000001, g84_therm_new },
999 	.timer    = { 0x00000001, nv41_timer_new },
1000 	.volt     = { 0x00000001, nv40_volt_new },
1001 	.bsp      = { 0x00000001, g84_bsp_new },
1002 	.cipher   = { 0x00000001, g84_cipher_new },
1003 	.disp     = { 0x00000001, g84_disp_new },
1004 	.dma      = { 0x00000001, nv50_dma_new },
1005 	.fifo     = { 0x00000001, g84_fifo_new },
1006 	.gr       = { 0x00000001, g84_gr_new },
1007 	.mpeg     = { 0x00000001, g84_mpeg_new },
1008 	.pm       = { 0x00000001, g84_pm_new },
1009 	.sw       = { 0x00000001, nv50_sw_new },
1010 	.vp       = { 0x00000001, g84_vp_new },
1011 };
1012 
1013 static const struct nvkm_device_chip
1014 nv94_chipset = {
1015 	.name = "G94",
1016 	.bar      = { 0x00000001, g84_bar_new },
1017 	.bios     = { 0x00000001, nvkm_bios_new },
1018 	.bus      = { 0x00000001, g94_bus_new },
1019 	.clk      = { 0x00000001, g84_clk_new },
1020 	.devinit  = { 0x00000001, g84_devinit_new },
1021 	.fb       = { 0x00000001, g84_fb_new },
1022 	.fuse     = { 0x00000001, nv50_fuse_new },
1023 	.gpio     = { 0x00000001, g94_gpio_new },
1024 	.i2c      = { 0x00000001, g94_i2c_new },
1025 	.imem     = { 0x00000001, nv50_instmem_new },
1026 	.mc       = { 0x00000001, g84_mc_new },
1027 	.mmu      = { 0x00000001, g84_mmu_new },
1028 	.mxm      = { 0x00000001, nv50_mxm_new },
1029 	.pci      = { 0x00000001, g94_pci_new },
1030 	.therm    = { 0x00000001, g84_therm_new },
1031 	.timer    = { 0x00000001, nv41_timer_new },
1032 	.volt     = { 0x00000001, nv40_volt_new },
1033 	.bsp      = { 0x00000001, g84_bsp_new },
1034 	.cipher   = { 0x00000001, g84_cipher_new },
1035 	.disp     = { 0x00000001, g94_disp_new },
1036 	.dma      = { 0x00000001, nv50_dma_new },
1037 	.fifo     = { 0x00000001, g84_fifo_new },
1038 	.gr       = { 0x00000001, g84_gr_new },
1039 	.mpeg     = { 0x00000001, g84_mpeg_new },
1040 	.pm       = { 0x00000001, g84_pm_new },
1041 	.sw       = { 0x00000001, nv50_sw_new },
1042 	.vp       = { 0x00000001, g84_vp_new },
1043 };
1044 
1045 static const struct nvkm_device_chip
1046 nv96_chipset = {
1047 	.name = "G96",
1048 	.bar      = { 0x00000001, g84_bar_new },
1049 	.bios     = { 0x00000001, nvkm_bios_new },
1050 	.bus      = { 0x00000001, g94_bus_new },
1051 	.clk      = { 0x00000001, g84_clk_new },
1052 	.devinit  = { 0x00000001, g84_devinit_new },
1053 	.fb       = { 0x00000001, g84_fb_new },
1054 	.fuse     = { 0x00000001, nv50_fuse_new },
1055 	.gpio     = { 0x00000001, g94_gpio_new },
1056 	.i2c      = { 0x00000001, g94_i2c_new },
1057 	.imem     = { 0x00000001, nv50_instmem_new },
1058 	.mc       = { 0x00000001, g84_mc_new },
1059 	.mmu      = { 0x00000001, g84_mmu_new },
1060 	.mxm      = { 0x00000001, nv50_mxm_new },
1061 	.pci      = { 0x00000001, g94_pci_new },
1062 	.therm    = { 0x00000001, g84_therm_new },
1063 	.timer    = { 0x00000001, nv41_timer_new },
1064 	.volt     = { 0x00000001, nv40_volt_new },
1065 	.bsp      = { 0x00000001, g84_bsp_new },
1066 	.cipher   = { 0x00000001, g84_cipher_new },
1067 	.disp     = { 0x00000001, g94_disp_new },
1068 	.dma      = { 0x00000001, nv50_dma_new },
1069 	.fifo     = { 0x00000001, g84_fifo_new },
1070 	.gr       = { 0x00000001, g84_gr_new },
1071 	.mpeg     = { 0x00000001, g84_mpeg_new },
1072 	.pm       = { 0x00000001, g84_pm_new },
1073 	.sw       = { 0x00000001, nv50_sw_new },
1074 	.vp       = { 0x00000001, g84_vp_new },
1075 };
1076 
1077 static const struct nvkm_device_chip
1078 nv98_chipset = {
1079 	.name = "G98",
1080 	.bar      = { 0x00000001, g84_bar_new },
1081 	.bios     = { 0x00000001, nvkm_bios_new },
1082 	.bus      = { 0x00000001, g94_bus_new },
1083 	.clk      = { 0x00000001, g84_clk_new },
1084 	.devinit  = { 0x00000001, g98_devinit_new },
1085 	.fb       = { 0x00000001, g84_fb_new },
1086 	.fuse     = { 0x00000001, nv50_fuse_new },
1087 	.gpio     = { 0x00000001, g94_gpio_new },
1088 	.i2c      = { 0x00000001, g94_i2c_new },
1089 	.imem     = { 0x00000001, nv50_instmem_new },
1090 	.mc       = { 0x00000001, g98_mc_new },
1091 	.mmu      = { 0x00000001, g84_mmu_new },
1092 	.mxm      = { 0x00000001, nv50_mxm_new },
1093 	.pci      = { 0x00000001, g94_pci_new },
1094 	.therm    = { 0x00000001, g84_therm_new },
1095 	.timer    = { 0x00000001, nv41_timer_new },
1096 	.volt     = { 0x00000001, nv40_volt_new },
1097 	.disp     = { 0x00000001, g94_disp_new },
1098 	.dma      = { 0x00000001, nv50_dma_new },
1099 	.fifo     = { 0x00000001, g84_fifo_new },
1100 	.gr       = { 0x00000001, g84_gr_new },
1101 	.mspdec   = { 0x00000001, g98_mspdec_new },
1102 	.msppp    = { 0x00000001, g98_msppp_new },
1103 	.msvld    = { 0x00000001, g98_msvld_new },
1104 	.pm       = { 0x00000001, g84_pm_new },
1105 	.sec      = { 0x00000001, g98_sec_new },
1106 	.sw       = { 0x00000001, nv50_sw_new },
1107 };
1108 
1109 static const struct nvkm_device_chip
1110 nva0_chipset = {
1111 	.name = "GT200",
1112 	.bar      = { 0x00000001, g84_bar_new },
1113 	.bios     = { 0x00000001, nvkm_bios_new },
1114 	.bus      = { 0x00000001, g94_bus_new },
1115 	.clk      = { 0x00000001, g84_clk_new },
1116 	.devinit  = { 0x00000001, g84_devinit_new },
1117 	.fb       = { 0x00000001, g84_fb_new },
1118 	.fuse     = { 0x00000001, nv50_fuse_new },
1119 	.gpio     = { 0x00000001, g94_gpio_new },
1120 	.i2c      = { 0x00000001, nv50_i2c_new },
1121 	.imem     = { 0x00000001, nv50_instmem_new },
1122 	.mc       = { 0x00000001, g84_mc_new },
1123 	.mmu      = { 0x00000001, g84_mmu_new },
1124 	.mxm      = { 0x00000001, nv50_mxm_new },
1125 	.pci      = { 0x00000001, g94_pci_new },
1126 	.therm    = { 0x00000001, g84_therm_new },
1127 	.timer    = { 0x00000001, nv41_timer_new },
1128 	.volt     = { 0x00000001, nv40_volt_new },
1129 	.bsp      = { 0x00000001, g84_bsp_new },
1130 	.cipher   = { 0x00000001, g84_cipher_new },
1131 	.disp     = { 0x00000001, gt200_disp_new },
1132 	.dma      = { 0x00000001, nv50_dma_new },
1133 	.fifo     = { 0x00000001, g84_fifo_new },
1134 	.gr       = { 0x00000001, gt200_gr_new },
1135 	.mpeg     = { 0x00000001, g84_mpeg_new },
1136 	.pm       = { 0x00000001, gt200_pm_new },
1137 	.sw       = { 0x00000001, nv50_sw_new },
1138 	.vp       = { 0x00000001, g84_vp_new },
1139 };
1140 
1141 static const struct nvkm_device_chip
1142 nva3_chipset = {
1143 	.name = "GT215",
1144 	.bar      = { 0x00000001, g84_bar_new },
1145 	.bios     = { 0x00000001, nvkm_bios_new },
1146 	.bus      = { 0x00000001, g94_bus_new },
1147 	.clk      = { 0x00000001, gt215_clk_new },
1148 	.devinit  = { 0x00000001, gt215_devinit_new },
1149 	.fb       = { 0x00000001, gt215_fb_new },
1150 	.fuse     = { 0x00000001, nv50_fuse_new },
1151 	.gpio     = { 0x00000001, g94_gpio_new },
1152 	.i2c      = { 0x00000001, g94_i2c_new },
1153 	.imem     = { 0x00000001, nv50_instmem_new },
1154 	.mc       = { 0x00000001, gt215_mc_new },
1155 	.mmu      = { 0x00000001, g84_mmu_new },
1156 	.mxm      = { 0x00000001, nv50_mxm_new },
1157 	.pci      = { 0x00000001, g94_pci_new },
1158 	.pmu      = { 0x00000001, gt215_pmu_new },
1159 	.therm    = { 0x00000001, gt215_therm_new },
1160 	.timer    = { 0x00000001, nv41_timer_new },
1161 	.volt     = { 0x00000001, nv40_volt_new },
1162 	.ce       = { 0x00000001, gt215_ce_new },
1163 	.disp     = { 0x00000001, gt215_disp_new },
1164 	.dma      = { 0x00000001, nv50_dma_new },
1165 	.fifo     = { 0x00000001, g84_fifo_new },
1166 	.gr       = { 0x00000001, gt215_gr_new },
1167 	.mpeg     = { 0x00000001, g84_mpeg_new },
1168 	.mspdec   = { 0x00000001, gt215_mspdec_new },
1169 	.msppp    = { 0x00000001, gt215_msppp_new },
1170 	.msvld    = { 0x00000001, gt215_msvld_new },
1171 	.pm       = { 0x00000001, gt215_pm_new },
1172 	.sw       = { 0x00000001, nv50_sw_new },
1173 };
1174 
1175 static const struct nvkm_device_chip
1176 nva5_chipset = {
1177 	.name = "GT216",
1178 	.bar      = { 0x00000001, g84_bar_new },
1179 	.bios     = { 0x00000001, nvkm_bios_new },
1180 	.bus      = { 0x00000001, g94_bus_new },
1181 	.clk      = { 0x00000001, gt215_clk_new },
1182 	.devinit  = { 0x00000001, gt215_devinit_new },
1183 	.fb       = { 0x00000001, gt215_fb_new },
1184 	.fuse     = { 0x00000001, nv50_fuse_new },
1185 	.gpio     = { 0x00000001, g94_gpio_new },
1186 	.i2c      = { 0x00000001, g94_i2c_new },
1187 	.imem     = { 0x00000001, nv50_instmem_new },
1188 	.mc       = { 0x00000001, gt215_mc_new },
1189 	.mmu      = { 0x00000001, g84_mmu_new },
1190 	.mxm      = { 0x00000001, nv50_mxm_new },
1191 	.pci      = { 0x00000001, g94_pci_new },
1192 	.pmu      = { 0x00000001, gt215_pmu_new },
1193 	.therm    = { 0x00000001, gt215_therm_new },
1194 	.timer    = { 0x00000001, nv41_timer_new },
1195 	.volt     = { 0x00000001, nv40_volt_new },
1196 	.ce       = { 0x00000001, gt215_ce_new },
1197 	.disp     = { 0x00000001, gt215_disp_new },
1198 	.dma      = { 0x00000001, nv50_dma_new },
1199 	.fifo     = { 0x00000001, g84_fifo_new },
1200 	.gr       = { 0x00000001, gt215_gr_new },
1201 	.mspdec   = { 0x00000001, gt215_mspdec_new },
1202 	.msppp    = { 0x00000001, gt215_msppp_new },
1203 	.msvld    = { 0x00000001, gt215_msvld_new },
1204 	.pm       = { 0x00000001, gt215_pm_new },
1205 	.sw       = { 0x00000001, nv50_sw_new },
1206 };
1207 
1208 static const struct nvkm_device_chip
1209 nva8_chipset = {
1210 	.name = "GT218",
1211 	.bar      = { 0x00000001, g84_bar_new },
1212 	.bios     = { 0x00000001, nvkm_bios_new },
1213 	.bus      = { 0x00000001, g94_bus_new },
1214 	.clk      = { 0x00000001, gt215_clk_new },
1215 	.devinit  = { 0x00000001, gt215_devinit_new },
1216 	.fb       = { 0x00000001, gt215_fb_new },
1217 	.fuse     = { 0x00000001, nv50_fuse_new },
1218 	.gpio     = { 0x00000001, g94_gpio_new },
1219 	.i2c      = { 0x00000001, g94_i2c_new },
1220 	.imem     = { 0x00000001, nv50_instmem_new },
1221 	.mc       = { 0x00000001, gt215_mc_new },
1222 	.mmu      = { 0x00000001, g84_mmu_new },
1223 	.mxm      = { 0x00000001, nv50_mxm_new },
1224 	.pci      = { 0x00000001, g94_pci_new },
1225 	.pmu      = { 0x00000001, gt215_pmu_new },
1226 	.therm    = { 0x00000001, gt215_therm_new },
1227 	.timer    = { 0x00000001, nv41_timer_new },
1228 	.volt     = { 0x00000001, nv40_volt_new },
1229 	.ce       = { 0x00000001, gt215_ce_new },
1230 	.disp     = { 0x00000001, gt215_disp_new },
1231 	.dma      = { 0x00000001, nv50_dma_new },
1232 	.fifo     = { 0x00000001, g84_fifo_new },
1233 	.gr       = { 0x00000001, gt215_gr_new },
1234 	.mspdec   = { 0x00000001, gt215_mspdec_new },
1235 	.msppp    = { 0x00000001, gt215_msppp_new },
1236 	.msvld    = { 0x00000001, gt215_msvld_new },
1237 	.pm       = { 0x00000001, gt215_pm_new },
1238 	.sw       = { 0x00000001, nv50_sw_new },
1239 };
1240 
1241 static const struct nvkm_device_chip
1242 nvaa_chipset = {
1243 	.name = "MCP77/MCP78",
1244 	.bar      = { 0x00000001, g84_bar_new },
1245 	.bios     = { 0x00000001, nvkm_bios_new },
1246 	.bus      = { 0x00000001, g94_bus_new },
1247 	.clk      = { 0x00000001, mcp77_clk_new },
1248 	.devinit  = { 0x00000001, g98_devinit_new },
1249 	.fb       = { 0x00000001, mcp77_fb_new },
1250 	.fuse     = { 0x00000001, nv50_fuse_new },
1251 	.gpio     = { 0x00000001, g94_gpio_new },
1252 	.i2c      = { 0x00000001, g94_i2c_new },
1253 	.imem     = { 0x00000001, nv50_instmem_new },
1254 	.mc       = { 0x00000001, g98_mc_new },
1255 	.mmu      = { 0x00000001, mcp77_mmu_new },
1256 	.mxm      = { 0x00000001, nv50_mxm_new },
1257 	.pci      = { 0x00000001, g94_pci_new },
1258 	.therm    = { 0x00000001, g84_therm_new },
1259 	.timer    = { 0x00000001, nv41_timer_new },
1260 	.volt     = { 0x00000001, nv40_volt_new },
1261 	.disp     = { 0x00000001, mcp77_disp_new },
1262 	.dma      = { 0x00000001, nv50_dma_new },
1263 	.fifo     = { 0x00000001, g84_fifo_new },
1264 	.gr       = { 0x00000001, gt200_gr_new },
1265 	.mspdec   = { 0x00000001, g98_mspdec_new },
1266 	.msppp    = { 0x00000001, g98_msppp_new },
1267 	.msvld    = { 0x00000001, g98_msvld_new },
1268 	.pm       = { 0x00000001, g84_pm_new },
1269 	.sec      = { 0x00000001, g98_sec_new },
1270 	.sw       = { 0x00000001, nv50_sw_new },
1271 };
1272 
1273 static const struct nvkm_device_chip
1274 nvac_chipset = {
1275 	.name = "MCP79/MCP7A",
1276 	.bar      = { 0x00000001, g84_bar_new },
1277 	.bios     = { 0x00000001, nvkm_bios_new },
1278 	.bus      = { 0x00000001, g94_bus_new },
1279 	.clk      = { 0x00000001, mcp77_clk_new },
1280 	.devinit  = { 0x00000001, g98_devinit_new },
1281 	.fb       = { 0x00000001, mcp77_fb_new },
1282 	.fuse     = { 0x00000001, nv50_fuse_new },
1283 	.gpio     = { 0x00000001, g94_gpio_new },
1284 	.i2c      = { 0x00000001, g94_i2c_new },
1285 	.imem     = { 0x00000001, nv50_instmem_new },
1286 	.mc       = { 0x00000001, g98_mc_new },
1287 	.mmu      = { 0x00000001, mcp77_mmu_new },
1288 	.mxm      = { 0x00000001, nv50_mxm_new },
1289 	.pci      = { 0x00000001, g94_pci_new },
1290 	.therm    = { 0x00000001, g84_therm_new },
1291 	.timer    = { 0x00000001, nv41_timer_new },
1292 	.volt     = { 0x00000001, nv40_volt_new },
1293 	.disp     = { 0x00000001, mcp77_disp_new },
1294 	.dma      = { 0x00000001, nv50_dma_new },
1295 	.fifo     = { 0x00000001, g84_fifo_new },
1296 	.gr       = { 0x00000001, mcp79_gr_new },
1297 	.mspdec   = { 0x00000001, g98_mspdec_new },
1298 	.msppp    = { 0x00000001, g98_msppp_new },
1299 	.msvld    = { 0x00000001, g98_msvld_new },
1300 	.pm       = { 0x00000001, g84_pm_new },
1301 	.sec      = { 0x00000001, g98_sec_new },
1302 	.sw       = { 0x00000001, nv50_sw_new },
1303 };
1304 
1305 static const struct nvkm_device_chip
1306 nvaf_chipset = {
1307 	.name = "MCP89",
1308 	.bar      = { 0x00000001, g84_bar_new },
1309 	.bios     = { 0x00000001, nvkm_bios_new },
1310 	.bus      = { 0x00000001, g94_bus_new },
1311 	.clk      = { 0x00000001, gt215_clk_new },
1312 	.devinit  = { 0x00000001, mcp89_devinit_new },
1313 	.fb       = { 0x00000001, mcp89_fb_new },
1314 	.fuse     = { 0x00000001, nv50_fuse_new },
1315 	.gpio     = { 0x00000001, g94_gpio_new },
1316 	.i2c      = { 0x00000001, g94_i2c_new },
1317 	.imem     = { 0x00000001, nv50_instmem_new },
1318 	.mc       = { 0x00000001, gt215_mc_new },
1319 	.mmu      = { 0x00000001, mcp77_mmu_new },
1320 	.mxm      = { 0x00000001, nv50_mxm_new },
1321 	.pci      = { 0x00000001, g94_pci_new },
1322 	.pmu      = { 0x00000001, gt215_pmu_new },
1323 	.therm    = { 0x00000001, gt215_therm_new },
1324 	.timer    = { 0x00000001, nv41_timer_new },
1325 	.volt     = { 0x00000001, nv40_volt_new },
1326 	.ce       = { 0x00000001, gt215_ce_new },
1327 	.disp     = { 0x00000001, mcp89_disp_new },
1328 	.dma      = { 0x00000001, nv50_dma_new },
1329 	.fifo     = { 0x00000001, g84_fifo_new },
1330 	.gr       = { 0x00000001, mcp89_gr_new },
1331 	.mspdec   = { 0x00000001, gt215_mspdec_new },
1332 	.msppp    = { 0x00000001, gt215_msppp_new },
1333 	.msvld    = { 0x00000001, mcp89_msvld_new },
1334 	.pm       = { 0x00000001, gt215_pm_new },
1335 	.sw       = { 0x00000001, nv50_sw_new },
1336 };
1337 
1338 static const struct nvkm_device_chip
1339 nvc0_chipset = {
1340 	.name = "GF100",
1341 	.bar      = { 0x00000001, gf100_bar_new },
1342 	.bios     = { 0x00000001, nvkm_bios_new },
1343 	.bus      = { 0x00000001, gf100_bus_new },
1344 	.clk      = { 0x00000001, gf100_clk_new },
1345 	.devinit  = { 0x00000001, gf100_devinit_new },
1346 	.fb       = { 0x00000001, gf100_fb_new },
1347 	.fuse     = { 0x00000001, gf100_fuse_new },
1348 	.gpio     = { 0x00000001, g94_gpio_new },
1349 	.i2c      = { 0x00000001, g94_i2c_new },
1350 	.iccsense = { 0x00000001, gf100_iccsense_new },
1351 	.imem     = { 0x00000001, nv50_instmem_new },
1352 	.ltc      = { 0x00000001, gf100_ltc_new },
1353 	.mc       = { 0x00000001, gf100_mc_new },
1354 	.mmu      = { 0x00000001, gf100_mmu_new },
1355 	.mxm      = { 0x00000001, nv50_mxm_new },
1356 	.pci      = { 0x00000001, gf100_pci_new },
1357 	.pmu      = { 0x00000001, gf100_pmu_new },
1358 	.privring = { 0x00000001, gf100_privring_new },
1359 	.therm    = { 0x00000001, gt215_therm_new },
1360 	.timer    = { 0x00000001, nv41_timer_new },
1361 	.volt     = { 0x00000001, gf100_volt_new },
1362 	.ce       = { 0x00000003, gf100_ce_new },
1363 	.disp     = { 0x00000001, gt215_disp_new },
1364 	.dma      = { 0x00000001, gf100_dma_new },
1365 	.fifo     = { 0x00000001, gf100_fifo_new },
1366 	.gr       = { 0x00000001, gf100_gr_new },
1367 	.mspdec   = { 0x00000001, gf100_mspdec_new },
1368 	.msppp    = { 0x00000001, gf100_msppp_new },
1369 	.msvld    = { 0x00000001, gf100_msvld_new },
1370 	.pm       = { 0x00000001, gf100_pm_new },
1371 	.sw       = { 0x00000001, gf100_sw_new },
1372 };
1373 
1374 static const struct nvkm_device_chip
1375 nvc1_chipset = {
1376 	.name = "GF108",
1377 	.bar      = { 0x00000001, gf100_bar_new },
1378 	.bios     = { 0x00000001, nvkm_bios_new },
1379 	.bus      = { 0x00000001, gf100_bus_new },
1380 	.clk      = { 0x00000001, gf100_clk_new },
1381 	.devinit  = { 0x00000001, gf100_devinit_new },
1382 	.fb       = { 0x00000001, gf108_fb_new },
1383 	.fuse     = { 0x00000001, gf100_fuse_new },
1384 	.gpio     = { 0x00000001, g94_gpio_new },
1385 	.i2c      = { 0x00000001, g94_i2c_new },
1386 	.iccsense = { 0x00000001, gf100_iccsense_new },
1387 	.imem     = { 0x00000001, nv50_instmem_new },
1388 	.ltc      = { 0x00000001, gf100_ltc_new },
1389 	.mc       = { 0x00000001, gf100_mc_new },
1390 	.mmu      = { 0x00000001, gf100_mmu_new },
1391 	.mxm      = { 0x00000001, nv50_mxm_new },
1392 	.pci      = { 0x00000001, gf106_pci_new },
1393 	.pmu      = { 0x00000001, gf100_pmu_new },
1394 	.privring = { 0x00000001, gf100_privring_new },
1395 	.therm    = { 0x00000001, gt215_therm_new },
1396 	.timer    = { 0x00000001, nv41_timer_new },
1397 	.volt     = { 0x00000001, gf100_volt_new },
1398 	.ce       = { 0x00000001, gf100_ce_new },
1399 	.disp     = { 0x00000001, gt215_disp_new },
1400 	.dma      = { 0x00000001, gf100_dma_new },
1401 	.fifo     = { 0x00000001, gf100_fifo_new },
1402 	.gr       = { 0x00000001, gf108_gr_new },
1403 	.mspdec   = { 0x00000001, gf100_mspdec_new },
1404 	.msppp    = { 0x00000001, gf100_msppp_new },
1405 	.msvld    = { 0x00000001, gf100_msvld_new },
1406 	.pm       = { 0x00000001, gf108_pm_new },
1407 	.sw       = { 0x00000001, gf100_sw_new },
1408 };
1409 
1410 static const struct nvkm_device_chip
1411 nvc3_chipset = {
1412 	.name = "GF106",
1413 	.bar      = { 0x00000001, gf100_bar_new },
1414 	.bios     = { 0x00000001, nvkm_bios_new },
1415 	.bus      = { 0x00000001, gf100_bus_new },
1416 	.clk      = { 0x00000001, gf100_clk_new },
1417 	.devinit  = { 0x00000001, gf100_devinit_new },
1418 	.fb       = { 0x00000001, gf100_fb_new },
1419 	.fuse     = { 0x00000001, gf100_fuse_new },
1420 	.gpio     = { 0x00000001, g94_gpio_new },
1421 	.i2c      = { 0x00000001, g94_i2c_new },
1422 	.iccsense = { 0x00000001, gf100_iccsense_new },
1423 	.imem     = { 0x00000001, nv50_instmem_new },
1424 	.ltc      = { 0x00000001, gf100_ltc_new },
1425 	.mc       = { 0x00000001, gf100_mc_new },
1426 	.mmu      = { 0x00000001, gf100_mmu_new },
1427 	.mxm      = { 0x00000001, nv50_mxm_new },
1428 	.pci      = { 0x00000001, gf106_pci_new },
1429 	.pmu      = { 0x00000001, gf100_pmu_new },
1430 	.privring = { 0x00000001, gf100_privring_new },
1431 	.therm    = { 0x00000001, gt215_therm_new },
1432 	.timer    = { 0x00000001, nv41_timer_new },
1433 	.volt     = { 0x00000001, gf100_volt_new },
1434 	.ce       = { 0x00000001, gf100_ce_new },
1435 	.disp     = { 0x00000001, gt215_disp_new },
1436 	.dma      = { 0x00000001, gf100_dma_new },
1437 	.fifo     = { 0x00000001, gf100_fifo_new },
1438 	.gr       = { 0x00000001, gf104_gr_new },
1439 	.mspdec   = { 0x00000001, gf100_mspdec_new },
1440 	.msppp    = { 0x00000001, gf100_msppp_new },
1441 	.msvld    = { 0x00000001, gf100_msvld_new },
1442 	.pm       = { 0x00000001, gf100_pm_new },
1443 	.sw       = { 0x00000001, gf100_sw_new },
1444 };
1445 
1446 static const struct nvkm_device_chip
1447 nvc4_chipset = {
1448 	.name = "GF104",
1449 	.bar      = { 0x00000001, gf100_bar_new },
1450 	.bios     = { 0x00000001, nvkm_bios_new },
1451 	.bus      = { 0x00000001, gf100_bus_new },
1452 	.clk      = { 0x00000001, gf100_clk_new },
1453 	.devinit  = { 0x00000001, gf100_devinit_new },
1454 	.fb       = { 0x00000001, gf100_fb_new },
1455 	.fuse     = { 0x00000001, gf100_fuse_new },
1456 	.gpio     = { 0x00000001, g94_gpio_new },
1457 	.i2c      = { 0x00000001, g94_i2c_new },
1458 	.iccsense = { 0x00000001, gf100_iccsense_new },
1459 	.imem     = { 0x00000001, nv50_instmem_new },
1460 	.ltc      = { 0x00000001, gf100_ltc_new },
1461 	.mc       = { 0x00000001, gf100_mc_new },
1462 	.mmu      = { 0x00000001, gf100_mmu_new },
1463 	.mxm      = { 0x00000001, nv50_mxm_new },
1464 	.pci      = { 0x00000001, gf100_pci_new },
1465 	.pmu      = { 0x00000001, gf100_pmu_new },
1466 	.privring = { 0x00000001, gf100_privring_new },
1467 	.therm    = { 0x00000001, gt215_therm_new },
1468 	.timer    = { 0x00000001, nv41_timer_new },
1469 	.volt     = { 0x00000001, gf100_volt_new },
1470 	.ce       = { 0x00000003, gf100_ce_new },
1471 	.disp     = { 0x00000001, gt215_disp_new },
1472 	.dma      = { 0x00000001, gf100_dma_new },
1473 	.fifo     = { 0x00000001, gf100_fifo_new },
1474 	.gr       = { 0x00000001, gf104_gr_new },
1475 	.mspdec   = { 0x00000001, gf100_mspdec_new },
1476 	.msppp    = { 0x00000001, gf100_msppp_new },
1477 	.msvld    = { 0x00000001, gf100_msvld_new },
1478 	.pm       = { 0x00000001, gf100_pm_new },
1479 	.sw       = { 0x00000001, gf100_sw_new },
1480 };
1481 
1482 static const struct nvkm_device_chip
1483 nvc8_chipset = {
1484 	.name = "GF110",
1485 	.bar      = { 0x00000001, gf100_bar_new },
1486 	.bios     = { 0x00000001, nvkm_bios_new },
1487 	.bus      = { 0x00000001, gf100_bus_new },
1488 	.clk      = { 0x00000001, gf100_clk_new },
1489 	.devinit  = { 0x00000001, gf100_devinit_new },
1490 	.fb       = { 0x00000001, gf100_fb_new },
1491 	.fuse     = { 0x00000001, gf100_fuse_new },
1492 	.gpio     = { 0x00000001, g94_gpio_new },
1493 	.i2c      = { 0x00000001, g94_i2c_new },
1494 	.iccsense = { 0x00000001, gf100_iccsense_new },
1495 	.imem     = { 0x00000001, nv50_instmem_new },
1496 	.ltc      = { 0x00000001, gf100_ltc_new },
1497 	.mc       = { 0x00000001, gf100_mc_new },
1498 	.mmu      = { 0x00000001, gf100_mmu_new },
1499 	.mxm      = { 0x00000001, nv50_mxm_new },
1500 	.pci      = { 0x00000001, gf100_pci_new },
1501 	.pmu      = { 0x00000001, gf100_pmu_new },
1502 	.privring = { 0x00000001, gf100_privring_new },
1503 	.therm    = { 0x00000001, gt215_therm_new },
1504 	.timer    = { 0x00000001, nv41_timer_new },
1505 	.volt     = { 0x00000001, gf100_volt_new },
1506 	.ce       = { 0x00000003, gf100_ce_new },
1507 	.disp     = { 0x00000001, gt215_disp_new },
1508 	.dma      = { 0x00000001, gf100_dma_new },
1509 	.fifo     = { 0x00000001, gf100_fifo_new },
1510 	.gr       = { 0x00000001, gf110_gr_new },
1511 	.mspdec   = { 0x00000001, gf100_mspdec_new },
1512 	.msppp    = { 0x00000001, gf100_msppp_new },
1513 	.msvld    = { 0x00000001, gf100_msvld_new },
1514 	.pm       = { 0x00000001, gf100_pm_new },
1515 	.sw       = { 0x00000001, gf100_sw_new },
1516 };
1517 
1518 static const struct nvkm_device_chip
1519 nvce_chipset = {
1520 	.name = "GF114",
1521 	.bar      = { 0x00000001, gf100_bar_new },
1522 	.bios     = { 0x00000001, nvkm_bios_new },
1523 	.bus      = { 0x00000001, gf100_bus_new },
1524 	.clk      = { 0x00000001, gf100_clk_new },
1525 	.devinit  = { 0x00000001, gf100_devinit_new },
1526 	.fb       = { 0x00000001, gf100_fb_new },
1527 	.fuse     = { 0x00000001, gf100_fuse_new },
1528 	.gpio     = { 0x00000001, g94_gpio_new },
1529 	.i2c      = { 0x00000001, g94_i2c_new },
1530 	.iccsense = { 0x00000001, gf100_iccsense_new },
1531 	.imem     = { 0x00000001, nv50_instmem_new },
1532 	.ltc      = { 0x00000001, gf100_ltc_new },
1533 	.mc       = { 0x00000001, gf100_mc_new },
1534 	.mmu      = { 0x00000001, gf100_mmu_new },
1535 	.mxm      = { 0x00000001, nv50_mxm_new },
1536 	.pci      = { 0x00000001, gf100_pci_new },
1537 	.pmu      = { 0x00000001, gf100_pmu_new },
1538 	.privring = { 0x00000001, gf100_privring_new },
1539 	.therm    = { 0x00000001, gt215_therm_new },
1540 	.timer    = { 0x00000001, nv41_timer_new },
1541 	.volt     = { 0x00000001, gf100_volt_new },
1542 	.ce       = { 0x00000003, gf100_ce_new },
1543 	.disp     = { 0x00000001, gt215_disp_new },
1544 	.dma      = { 0x00000001, gf100_dma_new },
1545 	.fifo     = { 0x00000001, gf100_fifo_new },
1546 	.gr       = { 0x00000001, gf104_gr_new },
1547 	.mspdec   = { 0x00000001, gf100_mspdec_new },
1548 	.msppp    = { 0x00000001, gf100_msppp_new },
1549 	.msvld    = { 0x00000001, gf100_msvld_new },
1550 	.pm       = { 0x00000001, gf100_pm_new },
1551 	.sw       = { 0x00000001, gf100_sw_new },
1552 };
1553 
1554 static const struct nvkm_device_chip
1555 nvcf_chipset = {
1556 	.name = "GF116",
1557 	.bar      = { 0x00000001, gf100_bar_new },
1558 	.bios     = { 0x00000001, nvkm_bios_new },
1559 	.bus      = { 0x00000001, gf100_bus_new },
1560 	.clk      = { 0x00000001, gf100_clk_new },
1561 	.devinit  = { 0x00000001, gf100_devinit_new },
1562 	.fb       = { 0x00000001, gf100_fb_new },
1563 	.fuse     = { 0x00000001, gf100_fuse_new },
1564 	.gpio     = { 0x00000001, g94_gpio_new },
1565 	.i2c      = { 0x00000001, g94_i2c_new },
1566 	.iccsense = { 0x00000001, gf100_iccsense_new },
1567 	.imem     = { 0x00000001, nv50_instmem_new },
1568 	.ltc      = { 0x00000001, gf100_ltc_new },
1569 	.mc       = { 0x00000001, gf100_mc_new },
1570 	.mmu      = { 0x00000001, gf100_mmu_new },
1571 	.mxm      = { 0x00000001, nv50_mxm_new },
1572 	.pci      = { 0x00000001, gf106_pci_new },
1573 	.pmu      = { 0x00000001, gf100_pmu_new },
1574 	.privring = { 0x00000001, gf100_privring_new },
1575 	.therm    = { 0x00000001, gt215_therm_new },
1576 	.timer    = { 0x00000001, nv41_timer_new },
1577 	.volt     = { 0x00000001, gf100_volt_new },
1578 	.ce       = { 0x00000001, gf100_ce_new },
1579 	.disp     = { 0x00000001, gt215_disp_new },
1580 	.dma      = { 0x00000001, gf100_dma_new },
1581 	.fifo     = { 0x00000001, gf100_fifo_new },
1582 	.gr       = { 0x00000001, gf104_gr_new },
1583 	.mspdec   = { 0x00000001, gf100_mspdec_new },
1584 	.msppp    = { 0x00000001, gf100_msppp_new },
1585 	.msvld    = { 0x00000001, gf100_msvld_new },
1586 	.pm       = { 0x00000001, gf100_pm_new },
1587 	.sw       = { 0x00000001, gf100_sw_new },
1588 };
1589 
1590 static const struct nvkm_device_chip
1591 nvd7_chipset = {
1592 	.name = "GF117",
1593 	.bar      = { 0x00000001, gf100_bar_new },
1594 	.bios     = { 0x00000001, nvkm_bios_new },
1595 	.bus      = { 0x00000001, gf100_bus_new },
1596 	.clk      = { 0x00000001, gf100_clk_new },
1597 	.devinit  = { 0x00000001, gf100_devinit_new },
1598 	.fb       = { 0x00000001, gf100_fb_new },
1599 	.fuse     = { 0x00000001, gf100_fuse_new },
1600 	.gpio     = { 0x00000001, gf119_gpio_new },
1601 	.i2c      = { 0x00000001, gf117_i2c_new },
1602 	.iccsense = { 0x00000001, gf100_iccsense_new },
1603 	.imem     = { 0x00000001, nv50_instmem_new },
1604 	.ltc      = { 0x00000001, gf100_ltc_new },
1605 	.mc       = { 0x00000001, gf100_mc_new },
1606 	.mmu      = { 0x00000001, gf100_mmu_new },
1607 	.mxm      = { 0x00000001, nv50_mxm_new },
1608 	.pci      = { 0x00000001, gf106_pci_new },
1609 	.privring = { 0x00000001, gf117_privring_new },
1610 	.therm    = { 0x00000001, gf119_therm_new },
1611 	.timer    = { 0x00000001, nv41_timer_new },
1612 	.volt     = { 0x00000001, gf117_volt_new },
1613 	.ce       = { 0x00000001, gf100_ce_new },
1614 	.disp     = { 0x00000001, gf119_disp_new },
1615 	.dma      = { 0x00000001, gf119_dma_new },
1616 	.fifo     = { 0x00000001, gf100_fifo_new },
1617 	.gr       = { 0x00000001, gf117_gr_new },
1618 	.mspdec   = { 0x00000001, gf100_mspdec_new },
1619 	.msppp    = { 0x00000001, gf100_msppp_new },
1620 	.msvld    = { 0x00000001, gf100_msvld_new },
1621 	.pm       = { 0x00000001, gf117_pm_new },
1622 	.sw       = { 0x00000001, gf100_sw_new },
1623 };
1624 
1625 static const struct nvkm_device_chip
1626 nvd9_chipset = {
1627 	.name = "GF119",
1628 	.bar      = { 0x00000001, gf100_bar_new },
1629 	.bios     = { 0x00000001, nvkm_bios_new },
1630 	.bus      = { 0x00000001, gf100_bus_new },
1631 	.clk      = { 0x00000001, gf100_clk_new },
1632 	.devinit  = { 0x00000001, gf100_devinit_new },
1633 	.fb       = { 0x00000001, gf100_fb_new },
1634 	.fuse     = { 0x00000001, gf100_fuse_new },
1635 	.gpio     = { 0x00000001, gf119_gpio_new },
1636 	.i2c      = { 0x00000001, gf119_i2c_new },
1637 	.iccsense = { 0x00000001, gf100_iccsense_new },
1638 	.imem     = { 0x00000001, nv50_instmem_new },
1639 	.ltc      = { 0x00000001, gf100_ltc_new },
1640 	.mc       = { 0x00000001, gf100_mc_new },
1641 	.mmu      = { 0x00000001, gf100_mmu_new },
1642 	.mxm      = { 0x00000001, nv50_mxm_new },
1643 	.pci      = { 0x00000001, gf106_pci_new },
1644 	.pmu      = { 0x00000001, gf119_pmu_new },
1645 	.privring = { 0x00000001, gf117_privring_new },
1646 	.therm    = { 0x00000001, gf119_therm_new },
1647 	.timer    = { 0x00000001, nv41_timer_new },
1648 	.volt     = { 0x00000001, gf100_volt_new },
1649 	.ce       = { 0x00000001, gf100_ce_new },
1650 	.disp     = { 0x00000001, gf119_disp_new },
1651 	.dma      = { 0x00000001, gf119_dma_new },
1652 	.fifo     = { 0x00000001, gf100_fifo_new },
1653 	.gr       = { 0x00000001, gf119_gr_new },
1654 	.mspdec   = { 0x00000001, gf100_mspdec_new },
1655 	.msppp    = { 0x00000001, gf100_msppp_new },
1656 	.msvld    = { 0x00000001, gf100_msvld_new },
1657 	.pm       = { 0x00000001, gf117_pm_new },
1658 	.sw       = { 0x00000001, gf100_sw_new },
1659 };
1660 
1661 static const struct nvkm_device_chip
1662 nve4_chipset = {
1663 	.name = "GK104",
1664 	.bar      = { 0x00000001, gf100_bar_new },
1665 	.bios     = { 0x00000001, nvkm_bios_new },
1666 	.bus      = { 0x00000001, gf100_bus_new },
1667 	.clk      = { 0x00000001, gk104_clk_new },
1668 	.devinit  = { 0x00000001, gf100_devinit_new },
1669 	.fb       = { 0x00000001, gk104_fb_new },
1670 	.fuse     = { 0x00000001, gf100_fuse_new },
1671 	.gpio     = { 0x00000001, gk104_gpio_new },
1672 	.i2c      = { 0x00000001, gk104_i2c_new },
1673 	.iccsense = { 0x00000001, gf100_iccsense_new },
1674 	.imem     = { 0x00000001, nv50_instmem_new },
1675 	.ltc      = { 0x00000001, gk104_ltc_new },
1676 	.mc       = { 0x00000001, gk104_mc_new },
1677 	.mmu      = { 0x00000001, gk104_mmu_new },
1678 	.mxm      = { 0x00000001, nv50_mxm_new },
1679 	.pci      = { 0x00000001, gk104_pci_new },
1680 	.pmu      = { 0x00000001, gk104_pmu_new },
1681 	.privring = { 0x00000001, gk104_privring_new },
1682 	.therm    = { 0x00000001, gk104_therm_new },
1683 	.timer    = { 0x00000001, nv41_timer_new },
1684 	.top      = { 0x00000001, gk104_top_new },
1685 	.volt     = { 0x00000001, gk104_volt_new },
1686 	.ce       = { 0x00000007, gk104_ce_new },
1687 	.disp     = { 0x00000001, gk104_disp_new },
1688 	.dma      = { 0x00000001, gf119_dma_new },
1689 	.fifo     = { 0x00000001, gk104_fifo_new },
1690 	.gr       = { 0x00000001, gk104_gr_new },
1691 	.mspdec   = { 0x00000001, gk104_mspdec_new },
1692 	.msppp    = { 0x00000001, gf100_msppp_new },
1693 	.msvld    = { 0x00000001, gk104_msvld_new },
1694 	.pm       = { 0x00000001, gk104_pm_new },
1695 	.sw       = { 0x00000001, gf100_sw_new },
1696 };
1697 
1698 static const struct nvkm_device_chip
1699 nve6_chipset = {
1700 	.name = "GK106",
1701 	.bar      = { 0x00000001, gf100_bar_new },
1702 	.bios     = { 0x00000001, nvkm_bios_new },
1703 	.bus      = { 0x00000001, gf100_bus_new },
1704 	.clk      = { 0x00000001, gk104_clk_new },
1705 	.devinit  = { 0x00000001, gf100_devinit_new },
1706 	.fb       = { 0x00000001, gk104_fb_new },
1707 	.fuse     = { 0x00000001, gf100_fuse_new },
1708 	.gpio     = { 0x00000001, gk104_gpio_new },
1709 	.i2c      = { 0x00000001, gk104_i2c_new },
1710 	.iccsense = { 0x00000001, gf100_iccsense_new },
1711 	.imem     = { 0x00000001, nv50_instmem_new },
1712 	.ltc      = { 0x00000001, gk104_ltc_new },
1713 	.mc       = { 0x00000001, gk104_mc_new },
1714 	.mmu      = { 0x00000001, gk104_mmu_new },
1715 	.mxm      = { 0x00000001, nv50_mxm_new },
1716 	.pci      = { 0x00000001, gk104_pci_new },
1717 	.pmu      = { 0x00000001, gk104_pmu_new },
1718 	.privring = { 0x00000001, gk104_privring_new },
1719 	.therm    = { 0x00000001, gk104_therm_new },
1720 	.timer    = { 0x00000001, nv41_timer_new },
1721 	.top      = { 0x00000001, gk104_top_new },
1722 	.volt     = { 0x00000001, gk104_volt_new },
1723 	.ce       = { 0x00000007, gk104_ce_new },
1724 	.disp     = { 0x00000001, gk104_disp_new },
1725 	.dma      = { 0x00000001, gf119_dma_new },
1726 	.fifo     = { 0x00000001, gk104_fifo_new },
1727 	.gr       = { 0x00000001, gk104_gr_new },
1728 	.mspdec   = { 0x00000001, gk104_mspdec_new },
1729 	.msppp    = { 0x00000001, gf100_msppp_new },
1730 	.msvld    = { 0x00000001, gk104_msvld_new },
1731 	.pm       = { 0x00000001, gk104_pm_new },
1732 	.sw       = { 0x00000001, gf100_sw_new },
1733 };
1734 
1735 static const struct nvkm_device_chip
1736 nve7_chipset = {
1737 	.name = "GK107",
1738 	.bar      = { 0x00000001, gf100_bar_new },
1739 	.bios     = { 0x00000001, nvkm_bios_new },
1740 	.bus      = { 0x00000001, gf100_bus_new },
1741 	.clk      = { 0x00000001, gk104_clk_new },
1742 	.devinit  = { 0x00000001, gf100_devinit_new },
1743 	.fb       = { 0x00000001, gk104_fb_new },
1744 	.fuse     = { 0x00000001, gf100_fuse_new },
1745 	.gpio     = { 0x00000001, gk104_gpio_new },
1746 	.i2c      = { 0x00000001, gk104_i2c_new },
1747 	.iccsense = { 0x00000001, gf100_iccsense_new },
1748 	.imem     = { 0x00000001, nv50_instmem_new },
1749 	.ltc      = { 0x00000001, gk104_ltc_new },
1750 	.mc       = { 0x00000001, gk104_mc_new },
1751 	.mmu      = { 0x00000001, gk104_mmu_new },
1752 	.mxm      = { 0x00000001, nv50_mxm_new },
1753 	.pci      = { 0x00000001, gk104_pci_new },
1754 	.pmu      = { 0x00000001, gk104_pmu_new },
1755 	.privring = { 0x00000001, gk104_privring_new },
1756 	.therm    = { 0x00000001, gk104_therm_new },
1757 	.timer    = { 0x00000001, nv41_timer_new },
1758 	.top      = { 0x00000001, gk104_top_new },
1759 	.volt     = { 0x00000001, gk104_volt_new },
1760 	.ce       = { 0x00000007, gk104_ce_new },
1761 	.disp     = { 0x00000001, gk104_disp_new },
1762 	.dma      = { 0x00000001, gf119_dma_new },
1763 	.fifo     = { 0x00000001, gk104_fifo_new },
1764 	.gr       = { 0x00000001, gk104_gr_new },
1765 	.mspdec   = { 0x00000001, gk104_mspdec_new },
1766 	.msppp    = { 0x00000001, gf100_msppp_new },
1767 	.msvld    = { 0x00000001, gk104_msvld_new },
1768 	.pm       = { 0x00000001, gk104_pm_new },
1769 	.sw       = { 0x00000001, gf100_sw_new },
1770 };
1771 
1772 static const struct nvkm_device_chip
1773 nvea_chipset = {
1774 	.name = "GK20A",
1775 	.bar      = { 0x00000001, gk20a_bar_new },
1776 	.bus      = { 0x00000001, gf100_bus_new },
1777 	.clk      = { 0x00000001, gk20a_clk_new },
1778 	.fb       = { 0x00000001, gk20a_fb_new },
1779 	.fuse     = { 0x00000001, gf100_fuse_new },
1780 	.imem     = { 0x00000001, gk20a_instmem_new },
1781 	.ltc      = { 0x00000001, gk104_ltc_new },
1782 	.mc       = { 0x00000001, gk20a_mc_new },
1783 	.mmu      = { 0x00000001, gk20a_mmu_new },
1784 	.pmu      = { 0x00000001, gk20a_pmu_new },
1785 	.privring = { 0x00000001, gk20a_privring_new },
1786 	.timer    = { 0x00000001, gk20a_timer_new },
1787 	.top      = { 0x00000001, gk104_top_new },
1788 	.volt     = { 0x00000001, gk20a_volt_new },
1789 	.ce       = { 0x00000004, gk104_ce_new },
1790 	.dma      = { 0x00000001, gf119_dma_new },
1791 	.fifo     = { 0x00000001, gk20a_fifo_new },
1792 	.gr       = { 0x00000001, gk20a_gr_new },
1793 	.pm       = { 0x00000001, gk104_pm_new },
1794 	.sw       = { 0x00000001, gf100_sw_new },
1795 };
1796 
1797 static const struct nvkm_device_chip
1798 nvf0_chipset = {
1799 	.name = "GK110",
1800 	.bar      = { 0x00000001, gf100_bar_new },
1801 	.bios     = { 0x00000001, nvkm_bios_new },
1802 	.bus      = { 0x00000001, gf100_bus_new },
1803 	.clk      = { 0x00000001, gk104_clk_new },
1804 	.devinit  = { 0x00000001, gf100_devinit_new },
1805 	.fb       = { 0x00000001, gk110_fb_new },
1806 	.fuse     = { 0x00000001, gf100_fuse_new },
1807 	.gpio     = { 0x00000001, gk104_gpio_new },
1808 	.i2c      = { 0x00000001, gk110_i2c_new },
1809 	.iccsense = { 0x00000001, gf100_iccsense_new },
1810 	.imem     = { 0x00000001, nv50_instmem_new },
1811 	.ltc      = { 0x00000001, gk104_ltc_new },
1812 	.mc       = { 0x00000001, gk104_mc_new },
1813 	.mmu      = { 0x00000001, gk104_mmu_new },
1814 	.mxm      = { 0x00000001, nv50_mxm_new },
1815 	.pci      = { 0x00000001, gk104_pci_new },
1816 	.pmu      = { 0x00000001, gk110_pmu_new },
1817 	.privring = { 0x00000001, gk104_privring_new },
1818 	.therm    = { 0x00000001, gk104_therm_new },
1819 	.timer    = { 0x00000001, nv41_timer_new },
1820 	.top      = { 0x00000001, gk104_top_new },
1821 	.volt     = { 0x00000001, gk104_volt_new },
1822 	.ce       = { 0x00000007, gk104_ce_new },
1823 	.disp     = { 0x00000001, gk110_disp_new },
1824 	.dma      = { 0x00000001, gf119_dma_new },
1825 	.fifo     = { 0x00000001, gk110_fifo_new },
1826 	.gr       = { 0x00000001, gk110_gr_new },
1827 	.mspdec   = { 0x00000001, gk104_mspdec_new },
1828 	.msppp    = { 0x00000001, gf100_msppp_new },
1829 	.msvld    = { 0x00000001, gk104_msvld_new },
1830 	.sw       = { 0x00000001, gf100_sw_new },
1831 };
1832 
1833 static const struct nvkm_device_chip
1834 nvf1_chipset = {
1835 	.name = "GK110B",
1836 	.bar      = { 0x00000001, gf100_bar_new },
1837 	.bios     = { 0x00000001, nvkm_bios_new },
1838 	.bus      = { 0x00000001, gf100_bus_new },
1839 	.clk      = { 0x00000001, gk104_clk_new },
1840 	.devinit  = { 0x00000001, gf100_devinit_new },
1841 	.fb       = { 0x00000001, gk110_fb_new },
1842 	.fuse     = { 0x00000001, gf100_fuse_new },
1843 	.gpio     = { 0x00000001, gk104_gpio_new },
1844 	.i2c      = { 0x00000001, gk110_i2c_new },
1845 	.iccsense = { 0x00000001, gf100_iccsense_new },
1846 	.imem     = { 0x00000001, nv50_instmem_new },
1847 	.ltc      = { 0x00000001, gk104_ltc_new },
1848 	.mc       = { 0x00000001, gk104_mc_new },
1849 	.mmu      = { 0x00000001, gk104_mmu_new },
1850 	.mxm      = { 0x00000001, nv50_mxm_new },
1851 	.pci      = { 0x00000001, gk104_pci_new },
1852 	.pmu      = { 0x00000001, gk110_pmu_new },
1853 	.privring = { 0x00000001, gk104_privring_new },
1854 	.therm    = { 0x00000001, gk104_therm_new },
1855 	.timer    = { 0x00000001, nv41_timer_new },
1856 	.top      = { 0x00000001, gk104_top_new },
1857 	.volt     = { 0x00000001, gk104_volt_new },
1858 	.ce       = { 0x00000007, gk104_ce_new },
1859 	.disp     = { 0x00000001, gk110_disp_new },
1860 	.dma      = { 0x00000001, gf119_dma_new },
1861 	.fifo     = { 0x00000001, gk110_fifo_new },
1862 	.gr       = { 0x00000001, gk110b_gr_new },
1863 	.mspdec   = { 0x00000001, gk104_mspdec_new },
1864 	.msppp    = { 0x00000001, gf100_msppp_new },
1865 	.msvld    = { 0x00000001, gk104_msvld_new },
1866 	.sw       = { 0x00000001, gf100_sw_new },
1867 };
1868 
1869 static const struct nvkm_device_chip
1870 nv106_chipset = {
1871 	.name = "GK208B",
1872 	.bar      = { 0x00000001, gf100_bar_new },
1873 	.bios     = { 0x00000001, nvkm_bios_new },
1874 	.bus      = { 0x00000001, gf100_bus_new },
1875 	.clk      = { 0x00000001, gk104_clk_new },
1876 	.devinit  = { 0x00000001, gf100_devinit_new },
1877 	.fb       = { 0x00000001, gk110_fb_new },
1878 	.fuse     = { 0x00000001, gf100_fuse_new },
1879 	.gpio     = { 0x00000001, gk104_gpio_new },
1880 	.i2c      = { 0x00000001, gk110_i2c_new },
1881 	.iccsense = { 0x00000001, gf100_iccsense_new },
1882 	.imem     = { 0x00000001, nv50_instmem_new },
1883 	.ltc      = { 0x00000001, gk104_ltc_new },
1884 	.mc       = { 0x00000001, gk20a_mc_new },
1885 	.mmu      = { 0x00000001, gk104_mmu_new },
1886 	.mxm      = { 0x00000001, nv50_mxm_new },
1887 	.pci      = { 0x00000001, gk104_pci_new },
1888 	.pmu      = { 0x00000001, gk208_pmu_new },
1889 	.privring = { 0x00000001, gk104_privring_new },
1890 	.therm    = { 0x00000001, gk104_therm_new },
1891 	.timer    = { 0x00000001, nv41_timer_new },
1892 	.top      = { 0x00000001, gk104_top_new },
1893 	.volt     = { 0x00000001, gk104_volt_new },
1894 	.ce       = { 0x00000007, gk104_ce_new },
1895 	.disp     = { 0x00000001, gk110_disp_new },
1896 	.dma      = { 0x00000001, gf119_dma_new },
1897 	.fifo     = { 0x00000001, gk208_fifo_new },
1898 	.gr       = { 0x00000001, gk208_gr_new },
1899 	.mspdec   = { 0x00000001, gk104_mspdec_new },
1900 	.msppp    = { 0x00000001, gf100_msppp_new },
1901 	.msvld    = { 0x00000001, gk104_msvld_new },
1902 	.sw       = { 0x00000001, gf100_sw_new },
1903 };
1904 
1905 static const struct nvkm_device_chip
1906 nv108_chipset = {
1907 	.name = "GK208",
1908 	.bar      = { 0x00000001, gf100_bar_new },
1909 	.bios     = { 0x00000001, nvkm_bios_new },
1910 	.bus      = { 0x00000001, gf100_bus_new },
1911 	.clk      = { 0x00000001, gk104_clk_new },
1912 	.devinit  = { 0x00000001, gf100_devinit_new },
1913 	.fb       = { 0x00000001, gk110_fb_new },
1914 	.fuse     = { 0x00000001, gf100_fuse_new },
1915 	.gpio     = { 0x00000001, gk104_gpio_new },
1916 	.i2c      = { 0x00000001, gk110_i2c_new },
1917 	.iccsense = { 0x00000001, gf100_iccsense_new },
1918 	.imem     = { 0x00000001, nv50_instmem_new },
1919 	.ltc      = { 0x00000001, gk104_ltc_new },
1920 	.mc       = { 0x00000001, gk20a_mc_new },
1921 	.mmu      = { 0x00000001, gk104_mmu_new },
1922 	.mxm      = { 0x00000001, nv50_mxm_new },
1923 	.pci      = { 0x00000001, gk104_pci_new },
1924 	.pmu      = { 0x00000001, gk208_pmu_new },
1925 	.privring = { 0x00000001, gk104_privring_new },
1926 	.therm    = { 0x00000001, gk104_therm_new },
1927 	.timer    = { 0x00000001, nv41_timer_new },
1928 	.top      = { 0x00000001, gk104_top_new },
1929 	.volt     = { 0x00000001, gk104_volt_new },
1930 	.ce       = { 0x00000007, gk104_ce_new },
1931 	.disp     = { 0x00000001, gk110_disp_new },
1932 	.dma      = { 0x00000001, gf119_dma_new },
1933 	.fifo     = { 0x00000001, gk208_fifo_new },
1934 	.gr       = { 0x00000001, gk208_gr_new },
1935 	.mspdec   = { 0x00000001, gk104_mspdec_new },
1936 	.msppp    = { 0x00000001, gf100_msppp_new },
1937 	.msvld    = { 0x00000001, gk104_msvld_new },
1938 	.sw       = { 0x00000001, gf100_sw_new },
1939 };
1940 
1941 static const struct nvkm_device_chip
1942 nv117_chipset = {
1943 	.name = "GM107",
1944 	.bar      = { 0x00000001, gm107_bar_new },
1945 	.bios     = { 0x00000001, nvkm_bios_new },
1946 	.bus      = { 0x00000001, gf100_bus_new },
1947 	.clk      = { 0x00000001, gk104_clk_new },
1948 	.devinit  = { 0x00000001, gm107_devinit_new },
1949 	.fb       = { 0x00000001, gm107_fb_new },
1950 	.fuse     = { 0x00000001, gm107_fuse_new },
1951 	.gpio     = { 0x00000001, gk104_gpio_new },
1952 	.i2c      = { 0x00000001, gk110_i2c_new },
1953 	.iccsense = { 0x00000001, gf100_iccsense_new },
1954 	.imem     = { 0x00000001, nv50_instmem_new },
1955 	.ltc      = { 0x00000001, gm107_ltc_new },
1956 	.mc       = { 0x00000001, gk20a_mc_new },
1957 	.mmu      = { 0x00000001, gk104_mmu_new },
1958 	.mxm      = { 0x00000001, nv50_mxm_new },
1959 	.pci      = { 0x00000001, gk104_pci_new },
1960 	.pmu      = { 0x00000001, gm107_pmu_new },
1961 	.privring = { 0x00000001, gk104_privring_new },
1962 	.therm    = { 0x00000001, gm107_therm_new },
1963 	.timer    = { 0x00000001, gk20a_timer_new },
1964 	.top      = { 0x00000001, gk104_top_new },
1965 	.volt     = { 0x00000001, gk104_volt_new },
1966 	.ce       = { 0x00000005, gm107_ce_new },
1967 	.disp     = { 0x00000001, gm107_disp_new },
1968 	.dma      = { 0x00000001, gf119_dma_new },
1969 	.fifo     = { 0x00000001, gm107_fifo_new },
1970 	.gr       = { 0x00000001, gm107_gr_new },
1971 	.nvdec    = { 0x00000001, gm107_nvdec_new },
1972 	.nvenc    = { 0x00000001, gm107_nvenc_new },
1973 	.sw       = { 0x00000001, gf100_sw_new },
1974 };
1975 
1976 static const struct nvkm_device_chip
1977 nv118_chipset = {
1978 	.name = "GM108",
1979 	.bar      = { 0x00000001, gm107_bar_new },
1980 	.bios     = { 0x00000001, nvkm_bios_new },
1981 	.bus      = { 0x00000001, gf100_bus_new },
1982 	.clk      = { 0x00000001, gk104_clk_new },
1983 	.devinit  = { 0x00000001, gm107_devinit_new },
1984 	.fb       = { 0x00000001, gm107_fb_new },
1985 	.fuse     = { 0x00000001, gm107_fuse_new },
1986 	.gpio     = { 0x00000001, gk104_gpio_new },
1987 	.i2c      = { 0x00000001, gk110_i2c_new },
1988 	.iccsense = { 0x00000001, gf100_iccsense_new },
1989 	.imem     = { 0x00000001, nv50_instmem_new },
1990 	.ltc      = { 0x00000001, gm107_ltc_new },
1991 	.mc       = { 0x00000001, gk20a_mc_new },
1992 	.mmu      = { 0x00000001, gk104_mmu_new },
1993 	.mxm      = { 0x00000001, nv50_mxm_new },
1994 	.pci      = { 0x00000001, gk104_pci_new },
1995 	.pmu      = { 0x00000001, gm107_pmu_new },
1996 	.privring = { 0x00000001, gk104_privring_new },
1997 	.therm    = { 0x00000001, gm107_therm_new },
1998 	.timer    = { 0x00000001, gk20a_timer_new },
1999 	.top      = { 0x00000001, gk104_top_new },
2000 	.volt     = { 0x00000001, gk104_volt_new },
2001 	.ce       = { 0x00000005, gm107_ce_new },
2002 	.disp     = { 0x00000001, gm107_disp_new },
2003 	.dma      = { 0x00000001, gf119_dma_new },
2004 	.fifo     = { 0x00000001, gm107_fifo_new },
2005 	.gr       = { 0x00000001, gm107_gr_new },
2006 	.sw       = { 0x00000001, gf100_sw_new },
2007 };
2008 
2009 static const struct nvkm_device_chip
2010 nv120_chipset = {
2011 	.name = "GM200",
2012 	.acr      = { 0x00000001, gm200_acr_new },
2013 	.bar      = { 0x00000001, gm107_bar_new },
2014 	.bios     = { 0x00000001, nvkm_bios_new },
2015 	.bus      = { 0x00000001, gf100_bus_new },
2016 	.devinit  = { 0x00000001, gm200_devinit_new },
2017 	.fb       = { 0x00000001, gm200_fb_new },
2018 	.fuse     = { 0x00000001, gm107_fuse_new },
2019 	.gpio     = { 0x00000001, gk104_gpio_new },
2020 	.i2c      = { 0x00000001, gm200_i2c_new },
2021 	.iccsense = { 0x00000001, gf100_iccsense_new },
2022 	.imem     = { 0x00000001, nv50_instmem_new },
2023 	.ltc      = { 0x00000001, gm200_ltc_new },
2024 	.mc       = { 0x00000001, gk20a_mc_new },
2025 	.mmu      = { 0x00000001, gm200_mmu_new },
2026 	.mxm      = { 0x00000001, nv50_mxm_new },
2027 	.pci      = { 0x00000001, gk104_pci_new },
2028 	.pmu      = { 0x00000001, gm200_pmu_new },
2029 	.privring = { 0x00000001, gm200_privring_new },
2030 	.therm    = { 0x00000001, gm200_therm_new },
2031 	.timer    = { 0x00000001, gk20a_timer_new },
2032 	.top      = { 0x00000001, gk104_top_new },
2033 	.volt     = { 0x00000001, gk104_volt_new },
2034 	.ce       = { 0x00000007, gm200_ce_new },
2035 	.disp     = { 0x00000001, gm200_disp_new },
2036 	.dma      = { 0x00000001, gf119_dma_new },
2037 	.fifo     = { 0x00000001, gm200_fifo_new },
2038 	.gr       = { 0x00000001, gm200_gr_new },
2039 	.nvdec    = { 0x00000001, gm107_nvdec_new },
2040 	.nvenc    = { 0x00000003, gm107_nvenc_new },
2041 	.sw       = { 0x00000001, gf100_sw_new },
2042 };
2043 
2044 static const struct nvkm_device_chip
2045 nv124_chipset = {
2046 	.name = "GM204",
2047 	.acr      = { 0x00000001, gm200_acr_new },
2048 	.bar      = { 0x00000001, gm107_bar_new },
2049 	.bios     = { 0x00000001, nvkm_bios_new },
2050 	.bus      = { 0x00000001, gf100_bus_new },
2051 	.devinit  = { 0x00000001, gm200_devinit_new },
2052 	.fb       = { 0x00000001, gm200_fb_new },
2053 	.fuse     = { 0x00000001, gm107_fuse_new },
2054 	.gpio     = { 0x00000001, gk104_gpio_new },
2055 	.i2c      = { 0x00000001, gm200_i2c_new },
2056 	.iccsense = { 0x00000001, gf100_iccsense_new },
2057 	.imem     = { 0x00000001, nv50_instmem_new },
2058 	.ltc      = { 0x00000001, gm200_ltc_new },
2059 	.mc       = { 0x00000001, gk20a_mc_new },
2060 	.mmu      = { 0x00000001, gm200_mmu_new },
2061 	.mxm      = { 0x00000001, nv50_mxm_new },
2062 	.pci      = { 0x00000001, gk104_pci_new },
2063 	.pmu      = { 0x00000001, gm200_pmu_new },
2064 	.privring = { 0x00000001, gm200_privring_new },
2065 	.therm    = { 0x00000001, gm200_therm_new },
2066 	.timer    = { 0x00000001, gk20a_timer_new },
2067 	.top      = { 0x00000001, gk104_top_new },
2068 	.volt     = { 0x00000001, gk104_volt_new },
2069 	.ce       = { 0x00000007, gm200_ce_new },
2070 	.disp     = { 0x00000001, gm200_disp_new },
2071 	.dma      = { 0x00000001, gf119_dma_new },
2072 	.fifo     = { 0x00000001, gm200_fifo_new },
2073 	.gr       = { 0x00000001, gm200_gr_new },
2074 	.nvdec    = { 0x00000001, gm107_nvdec_new },
2075 	.nvenc    = { 0x00000003, gm107_nvenc_new },
2076 	.sw       = { 0x00000001, gf100_sw_new },
2077 };
2078 
2079 static const struct nvkm_device_chip
2080 nv126_chipset = {
2081 	.name = "GM206",
2082 	.acr      = { 0x00000001, gm200_acr_new },
2083 	.bar      = { 0x00000001, gm107_bar_new },
2084 	.bios     = { 0x00000001, nvkm_bios_new },
2085 	.bus      = { 0x00000001, gf100_bus_new },
2086 	.devinit  = { 0x00000001, gm200_devinit_new },
2087 	.fb       = { 0x00000001, gm200_fb_new },
2088 	.fuse     = { 0x00000001, gm107_fuse_new },
2089 	.gpio     = { 0x00000001, gk104_gpio_new },
2090 	.i2c      = { 0x00000001, gm200_i2c_new },
2091 	.iccsense = { 0x00000001, gf100_iccsense_new },
2092 	.imem     = { 0x00000001, nv50_instmem_new },
2093 	.ltc      = { 0x00000001, gm200_ltc_new },
2094 	.mc       = { 0x00000001, gk20a_mc_new },
2095 	.mmu      = { 0x00000001, gm200_mmu_new },
2096 	.mxm      = { 0x00000001, nv50_mxm_new },
2097 	.pci      = { 0x00000001, gk104_pci_new },
2098 	.pmu      = { 0x00000001, gm200_pmu_new },
2099 	.privring = { 0x00000001, gm200_privring_new },
2100 	.therm    = { 0x00000001, gm200_therm_new },
2101 	.timer    = { 0x00000001, gk20a_timer_new },
2102 	.top      = { 0x00000001, gk104_top_new },
2103 	.volt     = { 0x00000001, gk104_volt_new },
2104 	.ce       = { 0x00000007, gm200_ce_new },
2105 	.disp     = { 0x00000001, gm200_disp_new },
2106 	.dma      = { 0x00000001, gf119_dma_new },
2107 	.fifo     = { 0x00000001, gm200_fifo_new },
2108 	.gr       = { 0x00000001, gm200_gr_new },
2109 	.nvdec    = { 0x00000001, gm107_nvdec_new },
2110 	.nvenc    = { 0x00000001, gm107_nvenc_new },
2111 	.sw       = { 0x00000001, gf100_sw_new },
2112 };
2113 
2114 static const struct nvkm_device_chip
2115 nv12b_chipset = {
2116 	.name = "GM20B",
2117 	.acr      = { 0x00000001, gm20b_acr_new },
2118 	.bar      = { 0x00000001, gm20b_bar_new },
2119 	.bus      = { 0x00000001, gf100_bus_new },
2120 	.clk      = { 0x00000001, gm20b_clk_new },
2121 	.fb       = { 0x00000001, gm20b_fb_new },
2122 	.fuse     = { 0x00000001, gm107_fuse_new },
2123 	.imem     = { 0x00000001, gk20a_instmem_new },
2124 	.ltc      = { 0x00000001, gm200_ltc_new },
2125 	.mc       = { 0x00000001, gk20a_mc_new },
2126 	.mmu      = { 0x00000001, gm20b_mmu_new },
2127 	.pmu      = { 0x00000001, gm20b_pmu_new },
2128 	.privring = { 0x00000001, gk20a_privring_new },
2129 	.timer    = { 0x00000001, gk20a_timer_new },
2130 	.top      = { 0x00000001, gk104_top_new },
2131 	.volt     = { 0x00000001, gm20b_volt_new },
2132 	.ce       = { 0x00000004, gm200_ce_new },
2133 	.dma      = { 0x00000001, gf119_dma_new },
2134 	.fifo     = { 0x00000001, gm20b_fifo_new },
2135 	.gr       = { 0x00000001, gm20b_gr_new },
2136 	.sw       = { 0x00000001, gf100_sw_new },
2137 };
2138 
2139 static const struct nvkm_device_chip
2140 nv130_chipset = {
2141 	.name = "GP100",
2142 	.acr      = { 0x00000001, gm200_acr_new },
2143 	.bar      = { 0x00000001, gm107_bar_new },
2144 	.bios     = { 0x00000001, nvkm_bios_new },
2145 	.bus      = { 0x00000001, gf100_bus_new },
2146 	.devinit  = { 0x00000001, gm200_devinit_new },
2147 	.fault    = { 0x00000001, gp100_fault_new },
2148 	.fb       = { 0x00000001, gp100_fb_new },
2149 	.fuse     = { 0x00000001, gm107_fuse_new },
2150 	.gpio     = { 0x00000001, gk104_gpio_new },
2151 	.i2c      = { 0x00000001, gm200_i2c_new },
2152 	.imem     = { 0x00000001, nv50_instmem_new },
2153 	.ltc      = { 0x00000001, gp100_ltc_new },
2154 	.mc       = { 0x00000001, gp100_mc_new },
2155 	.mmu      = { 0x00000001, gp100_mmu_new },
2156 	.therm    = { 0x00000001, gp100_therm_new },
2157 	.pci      = { 0x00000001, gp100_pci_new },
2158 	.pmu      = { 0x00000001, gm200_pmu_new },
2159 	.privring = { 0x00000001, gm200_privring_new },
2160 	.timer    = { 0x00000001, gk20a_timer_new },
2161 	.top      = { 0x00000001, gk104_top_new },
2162 	.ce       = { 0x0000003f, gp100_ce_new },
2163 	.dma      = { 0x00000001, gf119_dma_new },
2164 	.disp     = { 0x00000001, gp100_disp_new },
2165 	.fifo     = { 0x00000001, gp100_fifo_new },
2166 	.gr       = { 0x00000001, gp100_gr_new },
2167 	.nvdec    = { 0x00000001, gm107_nvdec_new },
2168 	.nvenc    = { 0x00000007, gm107_nvenc_new },
2169 	.sw       = { 0x00000001, gf100_sw_new },
2170 };
2171 
2172 static const struct nvkm_device_chip
2173 nv132_chipset = {
2174 	.name = "GP102",
2175 	.acr      = { 0x00000001, gp102_acr_new },
2176 	.bar      = { 0x00000001, gm107_bar_new },
2177 	.bios     = { 0x00000001, nvkm_bios_new },
2178 	.bus      = { 0x00000001, gf100_bus_new },
2179 	.devinit  = { 0x00000001, gm200_devinit_new },
2180 	.fault    = { 0x00000001, gp100_fault_new },
2181 	.fb       = { 0x00000001, gp102_fb_new },
2182 	.fuse     = { 0x00000001, gm107_fuse_new },
2183 	.gpio     = { 0x00000001, gk104_gpio_new },
2184 	.i2c      = { 0x00000001, gm200_i2c_new },
2185 	.imem     = { 0x00000001, nv50_instmem_new },
2186 	.ltc      = { 0x00000001, gp102_ltc_new },
2187 	.mc       = { 0x00000001, gp100_mc_new },
2188 	.mmu      = { 0x00000001, gp100_mmu_new },
2189 	.therm    = { 0x00000001, gp100_therm_new },
2190 	.pci      = { 0x00000001, gp100_pci_new },
2191 	.pmu      = { 0x00000001, gp102_pmu_new },
2192 	.privring = { 0x00000001, gm200_privring_new },
2193 	.timer    = { 0x00000001, gk20a_timer_new },
2194 	.top      = { 0x00000001, gk104_top_new },
2195 	.ce       = { 0x0000000f, gp102_ce_new },
2196 	.disp     = { 0x00000001, gp102_disp_new },
2197 	.dma      = { 0x00000001, gf119_dma_new },
2198 	.fifo     = { 0x00000001, gp100_fifo_new },
2199 	.gr       = { 0x00000001, gp102_gr_new },
2200 	.nvdec    = { 0x00000001, gm107_nvdec_new },
2201 	.nvenc    = { 0x00000003, gm107_nvenc_new },
2202 	.sec2     = { 0x00000001, gp102_sec2_new },
2203 	.sw       = { 0x00000001, gf100_sw_new },
2204 };
2205 
2206 static const struct nvkm_device_chip
2207 nv134_chipset = {
2208 	.name = "GP104",
2209 	.acr      = { 0x00000001, gp102_acr_new },
2210 	.bar      = { 0x00000001, gm107_bar_new },
2211 	.bios     = { 0x00000001, nvkm_bios_new },
2212 	.bus      = { 0x00000001, gf100_bus_new },
2213 	.devinit  = { 0x00000001, gm200_devinit_new },
2214 	.fault    = { 0x00000001, gp100_fault_new },
2215 	.fb       = { 0x00000001, gp102_fb_new },
2216 	.fuse     = { 0x00000001, gm107_fuse_new },
2217 	.gpio     = { 0x00000001, gk104_gpio_new },
2218 	.i2c      = { 0x00000001, gm200_i2c_new },
2219 	.imem     = { 0x00000001, nv50_instmem_new },
2220 	.ltc      = { 0x00000001, gp102_ltc_new },
2221 	.mc       = { 0x00000001, gp100_mc_new },
2222 	.mmu      = { 0x00000001, gp100_mmu_new },
2223 	.therm    = { 0x00000001, gp100_therm_new },
2224 	.pci      = { 0x00000001, gp100_pci_new },
2225 	.pmu      = { 0x00000001, gp102_pmu_new },
2226 	.privring = { 0x00000001, gm200_privring_new },
2227 	.timer    = { 0x00000001, gk20a_timer_new },
2228 	.top      = { 0x00000001, gk104_top_new },
2229 	.ce       = { 0x0000000f, gp102_ce_new },
2230 	.disp     = { 0x00000001, gp102_disp_new },
2231 	.dma      = { 0x00000001, gf119_dma_new },
2232 	.fifo     = { 0x00000001, gp100_fifo_new },
2233 	.gr       = { 0x00000001, gp104_gr_new },
2234 	.nvdec    = { 0x00000001, gm107_nvdec_new },
2235 	.nvenc    = { 0x00000003, gm107_nvenc_new },
2236 	.sec2     = { 0x00000001, gp102_sec2_new },
2237 	.sw       = { 0x00000001, gf100_sw_new },
2238 };
2239 
2240 static const struct nvkm_device_chip
2241 nv136_chipset = {
2242 	.name = "GP106",
2243 	.acr      = { 0x00000001, gp102_acr_new },
2244 	.bar      = { 0x00000001, gm107_bar_new },
2245 	.bios     = { 0x00000001, nvkm_bios_new },
2246 	.bus      = { 0x00000001, gf100_bus_new },
2247 	.devinit  = { 0x00000001, gm200_devinit_new },
2248 	.fault    = { 0x00000001, gp100_fault_new },
2249 	.fb       = { 0x00000001, gp102_fb_new },
2250 	.fuse     = { 0x00000001, gm107_fuse_new },
2251 	.gpio     = { 0x00000001, gk104_gpio_new },
2252 	.i2c      = { 0x00000001, gm200_i2c_new },
2253 	.imem     = { 0x00000001, nv50_instmem_new },
2254 	.ltc      = { 0x00000001, gp102_ltc_new },
2255 	.mc       = { 0x00000001, gp100_mc_new },
2256 	.mmu      = { 0x00000001, gp100_mmu_new },
2257 	.therm    = { 0x00000001, gp100_therm_new },
2258 	.pci      = { 0x00000001, gp100_pci_new },
2259 	.pmu      = { 0x00000001, gp102_pmu_new },
2260 	.privring = { 0x00000001, gm200_privring_new },
2261 	.timer    = { 0x00000001, gk20a_timer_new },
2262 	.top      = { 0x00000001, gk104_top_new },
2263 	.ce       = { 0x0000000f, gp102_ce_new },
2264 	.disp     = { 0x00000001, gp102_disp_new },
2265 	.dma      = { 0x00000001, gf119_dma_new },
2266 	.fifo     = { 0x00000001, gp100_fifo_new },
2267 	.gr       = { 0x00000001, gp104_gr_new },
2268 	.nvdec    = { 0x00000001, gm107_nvdec_new },
2269 	.nvenc    = { 0x00000001, gm107_nvenc_new },
2270 	.sec2     = { 0x00000001, gp102_sec2_new },
2271 	.sw       = { 0x00000001, gf100_sw_new },
2272 };
2273 
2274 static const struct nvkm_device_chip
2275 nv137_chipset = {
2276 	.name = "GP107",
2277 	.acr      = { 0x00000001, gp102_acr_new },
2278 	.bar      = { 0x00000001, gm107_bar_new },
2279 	.bios     = { 0x00000001, nvkm_bios_new },
2280 	.bus      = { 0x00000001, gf100_bus_new },
2281 	.devinit  = { 0x00000001, gm200_devinit_new },
2282 	.fault    = { 0x00000001, gp100_fault_new },
2283 	.fb       = { 0x00000001, gp102_fb_new },
2284 	.fuse     = { 0x00000001, gm107_fuse_new },
2285 	.gpio     = { 0x00000001, gk104_gpio_new },
2286 	.i2c      = { 0x00000001, gm200_i2c_new },
2287 	.imem     = { 0x00000001, nv50_instmem_new },
2288 	.ltc      = { 0x00000001, gp102_ltc_new },
2289 	.mc       = { 0x00000001, gp100_mc_new },
2290 	.mmu      = { 0x00000001, gp100_mmu_new },
2291 	.therm    = { 0x00000001, gp100_therm_new },
2292 	.pci      = { 0x00000001, gp100_pci_new },
2293 	.pmu      = { 0x00000001, gp102_pmu_new },
2294 	.privring = { 0x00000001, gm200_privring_new },
2295 	.timer    = { 0x00000001, gk20a_timer_new },
2296 	.top      = { 0x00000001, gk104_top_new },
2297 	.ce       = { 0x0000000f, gp102_ce_new },
2298 	.disp     = { 0x00000001, gp102_disp_new },
2299 	.dma      = { 0x00000001, gf119_dma_new },
2300 	.fifo     = { 0x00000001, gp100_fifo_new },
2301 	.gr       = { 0x00000001, gp107_gr_new },
2302 	.nvdec    = { 0x00000001, gm107_nvdec_new },
2303 	.nvenc    = { 0x00000003, gm107_nvenc_new },
2304 	.sec2     = { 0x00000001, gp102_sec2_new },
2305 	.sw       = { 0x00000001, gf100_sw_new },
2306 };
2307 
2308 static const struct nvkm_device_chip
2309 nv138_chipset = {
2310 	.name = "GP108",
2311 	.acr      = { 0x00000001, gp108_acr_new },
2312 	.bar      = { 0x00000001, gm107_bar_new },
2313 	.bios     = { 0x00000001, nvkm_bios_new },
2314 	.bus      = { 0x00000001, gf100_bus_new },
2315 	.devinit  = { 0x00000001, gm200_devinit_new },
2316 	.fault    = { 0x00000001, gp100_fault_new },
2317 	.fb       = { 0x00000001, gp102_fb_new },
2318 	.fuse     = { 0x00000001, gm107_fuse_new },
2319 	.gpio     = { 0x00000001, gk104_gpio_new },
2320 	.i2c      = { 0x00000001, gm200_i2c_new },
2321 	.imem     = { 0x00000001, nv50_instmem_new },
2322 	.ltc      = { 0x00000001, gp102_ltc_new },
2323 	.mc       = { 0x00000001, gp100_mc_new },
2324 	.mmu      = { 0x00000001, gp100_mmu_new },
2325 	.therm    = { 0x00000001, gp100_therm_new },
2326 	.pci      = { 0x00000001, gp100_pci_new },
2327 	.pmu      = { 0x00000001, gp102_pmu_new },
2328 	.privring = { 0x00000001, gm200_privring_new },
2329 	.timer    = { 0x00000001, gk20a_timer_new },
2330 	.top      = { 0x00000001, gk104_top_new },
2331 	.ce       = { 0x0000000f, gp102_ce_new },
2332 	.disp     = { 0x00000001, gp102_disp_new },
2333 	.dma      = { 0x00000001, gf119_dma_new },
2334 	.fifo     = { 0x00000001, gp100_fifo_new },
2335 	.gr       = { 0x00000001, gp108_gr_new },
2336 	.nvdec    = { 0x00000001, gm107_nvdec_new },
2337 	.sec2     = { 0x00000001, gp108_sec2_new },
2338 	.sw       = { 0x00000001, gf100_sw_new },
2339 };
2340 
2341 static const struct nvkm_device_chip
2342 nv13b_chipset = {
2343 	.name = "GP10B",
2344 	.acr      = { 0x00000001, gp10b_acr_new },
2345 	.bar      = { 0x00000001, gm20b_bar_new },
2346 	.bus      = { 0x00000001, gf100_bus_new },
2347 	.fault    = { 0x00000001, gp10b_fault_new },
2348 	.fb       = { 0x00000001, gp10b_fb_new },
2349 	.fuse     = { 0x00000001, gm107_fuse_new },
2350 	.imem     = { 0x00000001, gk20a_instmem_new },
2351 	.ltc      = { 0x00000001, gp10b_ltc_new },
2352 	.mc       = { 0x00000001, gp10b_mc_new },
2353 	.mmu      = { 0x00000001, gp10b_mmu_new },
2354 	.pmu      = { 0x00000001, gp10b_pmu_new },
2355 	.privring = { 0x00000001, gp10b_privring_new },
2356 	.timer    = { 0x00000001, gk20a_timer_new },
2357 	.top      = { 0x00000001, gk104_top_new },
2358 	.ce       = { 0x00000001, gp100_ce_new },
2359 	.dma      = { 0x00000001, gf119_dma_new },
2360 	.fifo     = { 0x00000001, gp10b_fifo_new },
2361 	.gr       = { 0x00000001, gp10b_gr_new },
2362 	.sw       = { 0x00000001, gf100_sw_new },
2363 };
2364 
2365 static const struct nvkm_device_chip
2366 nv140_chipset = {
2367 	.name = "GV100",
2368 	.acr      = { 0x00000001, gp108_acr_new },
2369 	.bar      = { 0x00000001, gm107_bar_new },
2370 	.bios     = { 0x00000001, nvkm_bios_new },
2371 	.bus      = { 0x00000001, gf100_bus_new },
2372 	.devinit  = { 0x00000001, gv100_devinit_new },
2373 	.fault    = { 0x00000001, gv100_fault_new },
2374 	.fb       = { 0x00000001, gv100_fb_new },
2375 	.fuse     = { 0x00000001, gm107_fuse_new },
2376 	.gpio     = { 0x00000001, gk104_gpio_new },
2377 	.gsp      = { 0x00000001, gv100_gsp_new },
2378 	.i2c      = { 0x00000001, gm200_i2c_new },
2379 	.imem     = { 0x00000001, nv50_instmem_new },
2380 	.ltc      = { 0x00000001, gp102_ltc_new },
2381 	.mc       = { 0x00000001, gp100_mc_new },
2382 	.mmu      = { 0x00000001, gv100_mmu_new },
2383 	.pci      = { 0x00000001, gp100_pci_new },
2384 	.pmu      = { 0x00000001, gp102_pmu_new },
2385 	.privring = { 0x00000001, gm200_privring_new },
2386 	.therm    = { 0x00000001, gp100_therm_new },
2387 	.timer    = { 0x00000001, gk20a_timer_new },
2388 	.top      = { 0x00000001, gk104_top_new },
2389 	.ce       = { 0x000001ff, gv100_ce_new },
2390 	.disp     = { 0x00000001, gv100_disp_new },
2391 	.dma      = { 0x00000001, gv100_dma_new },
2392 	.fifo     = { 0x00000001, gv100_fifo_new },
2393 	.gr       = { 0x00000001, gv100_gr_new },
2394 	.nvdec    = { 0x00000001, gm107_nvdec_new },
2395 	.nvenc    = { 0x00000007, gm107_nvenc_new },
2396 	.sec2     = { 0x00000001, gp108_sec2_new },
2397 };
2398 
2399 static const struct nvkm_device_chip
2400 nv162_chipset = {
2401 	.name = "TU102",
2402 	.acr      = { 0x00000001, tu102_acr_new },
2403 	.bar      = { 0x00000001, tu102_bar_new },
2404 	.bios     = { 0x00000001, nvkm_bios_new },
2405 	.bus      = { 0x00000001, gf100_bus_new },
2406 	.devinit  = { 0x00000001, tu102_devinit_new },
2407 	.fault    = { 0x00000001, tu102_fault_new },
2408 	.fb       = { 0x00000001, gv100_fb_new },
2409 	.fuse     = { 0x00000001, gm107_fuse_new },
2410 	.gpio     = { 0x00000001, gk104_gpio_new },
2411 	.gsp      = { 0x00000001, gv100_gsp_new },
2412 	.i2c      = { 0x00000001, gm200_i2c_new },
2413 	.imem     = { 0x00000001, nv50_instmem_new },
2414 	.ltc      = { 0x00000001, gp102_ltc_new },
2415 	.mc       = { 0x00000001, tu102_mc_new },
2416 	.mmu      = { 0x00000001, tu102_mmu_new },
2417 	.pci      = { 0x00000001, gp100_pci_new },
2418 	.pmu      = { 0x00000001, gp102_pmu_new },
2419 	.privring = { 0x00000001, gm200_privring_new },
2420 	.therm    = { 0x00000001, gp100_therm_new },
2421 	.timer    = { 0x00000001, gk20a_timer_new },
2422 	.top      = { 0x00000001, gk104_top_new },
2423 	.ce       = { 0x0000001f, tu102_ce_new },
2424 	.disp     = { 0x00000001, tu102_disp_new },
2425 	.dma      = { 0x00000001, gv100_dma_new },
2426 	.fifo     = { 0x00000001, tu102_fifo_new },
2427 	.gr       = { 0x00000001, tu102_gr_new },
2428 	.nvdec    = { 0x00000001, gm107_nvdec_new },
2429 	.nvenc    = { 0x00000001, gm107_nvenc_new },
2430 	.sec2     = { 0x00000001, tu102_sec2_new },
2431 };
2432 
2433 static const struct nvkm_device_chip
2434 nv164_chipset = {
2435 	.name = "TU104",
2436 	.acr      = { 0x00000001, tu102_acr_new },
2437 	.bar      = { 0x00000001, tu102_bar_new },
2438 	.bios     = { 0x00000001, nvkm_bios_new },
2439 	.bus      = { 0x00000001, gf100_bus_new },
2440 	.devinit  = { 0x00000001, tu102_devinit_new },
2441 	.fault    = { 0x00000001, tu102_fault_new },
2442 	.fb       = { 0x00000001, gv100_fb_new },
2443 	.fuse     = { 0x00000001, gm107_fuse_new },
2444 	.gpio     = { 0x00000001, gk104_gpio_new },
2445 	.gsp      = { 0x00000001, gv100_gsp_new },
2446 	.i2c      = { 0x00000001, gm200_i2c_new },
2447 	.imem     = { 0x00000001, nv50_instmem_new },
2448 	.ltc      = { 0x00000001, gp102_ltc_new },
2449 	.mc       = { 0x00000001, tu102_mc_new },
2450 	.mmu      = { 0x00000001, tu102_mmu_new },
2451 	.pci      = { 0x00000001, gp100_pci_new },
2452 	.pmu      = { 0x00000001, gp102_pmu_new },
2453 	.privring = { 0x00000001, gm200_privring_new },
2454 	.therm    = { 0x00000001, gp100_therm_new },
2455 	.timer    = { 0x00000001, gk20a_timer_new },
2456 	.top      = { 0x00000001, gk104_top_new },
2457 	.ce       = { 0x0000001f, tu102_ce_new },
2458 	.disp     = { 0x00000001, tu102_disp_new },
2459 	.dma      = { 0x00000001, gv100_dma_new },
2460 	.fifo     = { 0x00000001, tu102_fifo_new },
2461 	.gr       = { 0x00000001, tu102_gr_new },
2462 	.nvdec    = { 0x00000003, gm107_nvdec_new },
2463 	.nvenc    = { 0x00000001, gm107_nvenc_new },
2464 	.sec2     = { 0x00000001, tu102_sec2_new },
2465 };
2466 
2467 static const struct nvkm_device_chip
2468 nv166_chipset = {
2469 	.name = "TU106",
2470 	.acr      = { 0x00000001, tu102_acr_new },
2471 	.bar      = { 0x00000001, tu102_bar_new },
2472 	.bios     = { 0x00000001, nvkm_bios_new },
2473 	.bus      = { 0x00000001, gf100_bus_new },
2474 	.devinit  = { 0x00000001, tu102_devinit_new },
2475 	.fault    = { 0x00000001, tu102_fault_new },
2476 	.fb       = { 0x00000001, gv100_fb_new },
2477 	.fuse     = { 0x00000001, gm107_fuse_new },
2478 	.gpio     = { 0x00000001, gk104_gpio_new },
2479 	.gsp      = { 0x00000001, gv100_gsp_new },
2480 	.i2c      = { 0x00000001, gm200_i2c_new },
2481 	.imem     = { 0x00000001, nv50_instmem_new },
2482 	.ltc      = { 0x00000001, gp102_ltc_new },
2483 	.mc       = { 0x00000001, tu102_mc_new },
2484 	.mmu      = { 0x00000001, tu102_mmu_new },
2485 	.pci      = { 0x00000001, gp100_pci_new },
2486 	.pmu      = { 0x00000001, gp102_pmu_new },
2487 	.privring = { 0x00000001, gm200_privring_new },
2488 	.therm    = { 0x00000001, gp100_therm_new },
2489 	.timer    = { 0x00000001, gk20a_timer_new },
2490 	.top      = { 0x00000001, gk104_top_new },
2491 	.ce       = { 0x0000001f, tu102_ce_new },
2492 	.disp     = { 0x00000001, tu102_disp_new },
2493 	.dma      = { 0x00000001, gv100_dma_new },
2494 	.fifo     = { 0x00000001, tu102_fifo_new },
2495 	.gr       = { 0x00000001, tu102_gr_new },
2496 	.nvdec    = { 0x00000007, gm107_nvdec_new },
2497 	.nvenc    = { 0x00000001, gm107_nvenc_new },
2498 	.sec2     = { 0x00000001, tu102_sec2_new },
2499 };
2500 
2501 static const struct nvkm_device_chip
2502 nv167_chipset = {
2503 	.name = "TU117",
2504 	.acr      = { 0x00000001, tu102_acr_new },
2505 	.bar      = { 0x00000001, tu102_bar_new },
2506 	.bios     = { 0x00000001, nvkm_bios_new },
2507 	.bus      = { 0x00000001, gf100_bus_new },
2508 	.devinit  = { 0x00000001, tu102_devinit_new },
2509 	.fault    = { 0x00000001, tu102_fault_new },
2510 	.fb       = { 0x00000001, gv100_fb_new },
2511 	.fuse     = { 0x00000001, gm107_fuse_new },
2512 	.gpio     = { 0x00000001, gk104_gpio_new },
2513 	.gsp      = { 0x00000001, gv100_gsp_new },
2514 	.i2c      = { 0x00000001, gm200_i2c_new },
2515 	.imem     = { 0x00000001, nv50_instmem_new },
2516 	.ltc      = { 0x00000001, gp102_ltc_new },
2517 	.mc       = { 0x00000001, tu102_mc_new },
2518 	.mmu      = { 0x00000001, tu102_mmu_new },
2519 	.pci      = { 0x00000001, gp100_pci_new },
2520 	.pmu      = { 0x00000001, gp102_pmu_new },
2521 	.privring = { 0x00000001, gm200_privring_new },
2522 	.therm    = { 0x00000001, gp100_therm_new },
2523 	.timer    = { 0x00000001, gk20a_timer_new },
2524 	.top      = { 0x00000001, gk104_top_new },
2525 	.ce       = { 0x0000001f, tu102_ce_new },
2526 	.disp     = { 0x00000001, tu102_disp_new },
2527 	.dma      = { 0x00000001, gv100_dma_new },
2528 	.fifo     = { 0x00000001, tu102_fifo_new },
2529 	.gr       = { 0x00000001, tu102_gr_new },
2530 	.nvdec    = { 0x00000001, gm107_nvdec_new },
2531 	.nvenc    = { 0x00000001, gm107_nvenc_new },
2532 	.sec2     = { 0x00000001, tu102_sec2_new },
2533 };
2534 
2535 static const struct nvkm_device_chip
2536 nv168_chipset = {
2537 	.name = "TU116",
2538 	.acr      = { 0x00000001, tu102_acr_new },
2539 	.bar      = { 0x00000001, tu102_bar_new },
2540 	.bios     = { 0x00000001, nvkm_bios_new },
2541 	.bus      = { 0x00000001, gf100_bus_new },
2542 	.devinit  = { 0x00000001, tu102_devinit_new },
2543 	.fault    = { 0x00000001, tu102_fault_new },
2544 	.fb       = { 0x00000001, gv100_fb_new },
2545 	.fuse     = { 0x00000001, gm107_fuse_new },
2546 	.gpio     = { 0x00000001, gk104_gpio_new },
2547 	.gsp      = { 0x00000001, gv100_gsp_new },
2548 	.i2c      = { 0x00000001, gm200_i2c_new },
2549 	.imem     = { 0x00000001, nv50_instmem_new },
2550 	.ltc      = { 0x00000001, gp102_ltc_new },
2551 	.mc       = { 0x00000001, tu102_mc_new },
2552 	.mmu      = { 0x00000001, tu102_mmu_new },
2553 	.pci      = { 0x00000001, gp100_pci_new },
2554 	.pmu      = { 0x00000001, gp102_pmu_new },
2555 	.privring = { 0x00000001, gm200_privring_new },
2556 	.therm    = { 0x00000001, gp100_therm_new },
2557 	.timer    = { 0x00000001, gk20a_timer_new },
2558 	.top      = { 0x00000001, gk104_top_new },
2559 	.ce       = { 0x0000001f, tu102_ce_new },
2560 	.disp     = { 0x00000001, tu102_disp_new },
2561 	.dma      = { 0x00000001, gv100_dma_new },
2562 	.fifo     = { 0x00000001, tu102_fifo_new },
2563 	.gr       = { 0x00000001, tu102_gr_new },
2564 	.nvdec    = { 0x00000001, gm107_nvdec_new },
2565 	.nvenc    = { 0x00000001, gm107_nvenc_new },
2566 	.sec2     = { 0x00000001, tu102_sec2_new },
2567 };
2568 
2569 static const struct nvkm_device_chip
2570 nv170_chipset = {
2571 	.name = "GA100",
2572 	.bar      = { 0x00000001, tu102_bar_new },
2573 	.bios     = { 0x00000001, nvkm_bios_new },
2574 	.devinit  = { 0x00000001, ga100_devinit_new },
2575 	.fb       = { 0x00000001, ga100_fb_new },
2576 	.gpio     = { 0x00000001, gk104_gpio_new },
2577 	.i2c      = { 0x00000001, gm200_i2c_new },
2578 	.imem     = { 0x00000001, nv50_instmem_new },
2579 	.mc       = { 0x00000001, ga100_mc_new },
2580 	.mmu      = { 0x00000001, tu102_mmu_new },
2581 	.pci      = { 0x00000001, gp100_pci_new },
2582 	.privring = { 0x00000001, gm200_privring_new },
2583 	.timer    = { 0x00000001, gk20a_timer_new },
2584 	.top      = { 0x00000001, ga100_top_new },
2585 };
2586 
2587 static const struct nvkm_device_chip
2588 nv172_chipset = {
2589 	.name = "GA102",
2590 	.bar      = { 0x00000001, tu102_bar_new },
2591 	.bios     = { 0x00000001, nvkm_bios_new },
2592 	.devinit  = { 0x00000001, ga100_devinit_new },
2593 	.fb       = { 0x00000001, ga102_fb_new },
2594 	.gpio     = { 0x00000001, ga102_gpio_new },
2595 	.i2c      = { 0x00000001, gm200_i2c_new },
2596 	.imem     = { 0x00000001, nv50_instmem_new },
2597 	.mc       = { 0x00000001, ga100_mc_new },
2598 	.mmu      = { 0x00000001, tu102_mmu_new },
2599 	.pci      = { 0x00000001, gp100_pci_new },
2600 	.privring = { 0x00000001, gm200_privring_new },
2601 	.timer    = { 0x00000001, gk20a_timer_new },
2602 	.top      = { 0x00000001, ga100_top_new },
2603 	.disp     = { 0x00000001, ga102_disp_new },
2604 	.dma      = { 0x00000001, gv100_dma_new },
2605 	.fifo     = { 0x00000001, ga102_fifo_new },
2606 };
2607 
2608 static const struct nvkm_device_chip
2609 nv173_chipset = {
2610 	.name = "GA103",
2611 	.bar      = { 0x00000001, tu102_bar_new },
2612 	.bios     = { 0x00000001, nvkm_bios_new },
2613 	.devinit  = { 0x00000001, ga100_devinit_new },
2614 	.fb       = { 0x00000001, ga102_fb_new },
2615 	.gpio     = { 0x00000001, ga102_gpio_new },
2616 	.i2c      = { 0x00000001, gm200_i2c_new },
2617 	.imem     = { 0x00000001, nv50_instmem_new },
2618 	.mc       = { 0x00000001, ga100_mc_new },
2619 	.mmu      = { 0x00000001, tu102_mmu_new },
2620 	.pci      = { 0x00000001, gp100_pci_new },
2621 	.privring = { 0x00000001, gm200_privring_new },
2622 	.timer    = { 0x00000001, gk20a_timer_new },
2623 	.top      = { 0x00000001, ga100_top_new },
2624 	.disp     = { 0x00000001, ga102_disp_new },
2625 	.dma      = { 0x00000001, gv100_dma_new },
2626 	.fifo     = { 0x00000001, ga102_fifo_new },
2627 };
2628 
2629 static const struct nvkm_device_chip
2630 nv174_chipset = {
2631 	.name = "GA104",
2632 	.bar      = { 0x00000001, tu102_bar_new },
2633 	.bios     = { 0x00000001, nvkm_bios_new },
2634 	.devinit  = { 0x00000001, ga100_devinit_new },
2635 	.fb       = { 0x00000001, ga102_fb_new },
2636 	.gpio     = { 0x00000001, ga102_gpio_new },
2637 	.i2c      = { 0x00000001, gm200_i2c_new },
2638 	.imem     = { 0x00000001, nv50_instmem_new },
2639 	.mc       = { 0x00000001, ga100_mc_new },
2640 	.mmu      = { 0x00000001, tu102_mmu_new },
2641 	.pci      = { 0x00000001, gp100_pci_new },
2642 	.privring = { 0x00000001, gm200_privring_new },
2643 	.timer    = { 0x00000001, gk20a_timer_new },
2644 	.top      = { 0x00000001, ga100_top_new },
2645 	.disp     = { 0x00000001, ga102_disp_new },
2646 	.dma      = { 0x00000001, gv100_dma_new },
2647 	.fifo     = { 0x00000001, ga102_fifo_new },
2648 };
2649 
2650 static const struct nvkm_device_chip
2651 nv176_chipset = {
2652 	.name = "GA106",
2653 	.bar      = { 0x00000001, tu102_bar_new },
2654 	.bios     = { 0x00000001, nvkm_bios_new },
2655 	.devinit  = { 0x00000001, ga100_devinit_new },
2656 	.fb       = { 0x00000001, ga102_fb_new },
2657 	.gpio     = { 0x00000001, ga102_gpio_new },
2658 	.i2c      = { 0x00000001, gm200_i2c_new },
2659 	.imem     = { 0x00000001, nv50_instmem_new },
2660 	.mc       = { 0x00000001, ga100_mc_new },
2661 	.mmu      = { 0x00000001, tu102_mmu_new },
2662 	.pci      = { 0x00000001, gp100_pci_new },
2663 	.privring = { 0x00000001, gm200_privring_new },
2664 	.timer    = { 0x00000001, gk20a_timer_new },
2665 	.top      = { 0x00000001, ga100_top_new },
2666 	.disp     = { 0x00000001, ga102_disp_new },
2667 	.dma      = { 0x00000001, gv100_dma_new },
2668 	.fifo     = { 0x00000001, ga102_fifo_new },
2669 };
2670 
2671 static const struct nvkm_device_chip
2672 nv177_chipset = {
2673 	.name = "GA107",
2674 	.bar      = { 0x00000001, tu102_bar_new },
2675 	.bios     = { 0x00000001, nvkm_bios_new },
2676 	.devinit  = { 0x00000001, ga100_devinit_new },
2677 	.fb       = { 0x00000001, ga102_fb_new },
2678 	.gpio     = { 0x00000001, ga102_gpio_new },
2679 	.i2c      = { 0x00000001, gm200_i2c_new },
2680 	.imem     = { 0x00000001, nv50_instmem_new },
2681 	.mc       = { 0x00000001, ga100_mc_new },
2682 	.mmu      = { 0x00000001, tu102_mmu_new },
2683 	.pci      = { 0x00000001, gp100_pci_new },
2684 	.privring = { 0x00000001, gm200_privring_new },
2685 	.timer    = { 0x00000001, gk20a_timer_new },
2686 	.top      = { 0x00000001, ga100_top_new },
2687 	.disp     = { 0x00000001, ga102_disp_new },
2688 	.dma      = { 0x00000001, gv100_dma_new },
2689 	.fifo     = { 0x00000001, ga102_fifo_new },
2690 };
2691 
2692 static int
nvkm_device_event_ctor(struct nvkm_object * object,void * data,u32 size,struct nvkm_notify * notify)2693 nvkm_device_event_ctor(struct nvkm_object *object, void *data, u32 size,
2694 		       struct nvkm_notify *notify)
2695 {
2696 	if (!WARN_ON(size != 0)) {
2697 		notify->size  = 0;
2698 		notify->types = 1;
2699 		notify->index = 0;
2700 		return 0;
2701 	}
2702 	return -EINVAL;
2703 }
2704 
2705 static const struct nvkm_event_func
2706 nvkm_device_event_func = {
2707 	.ctor = nvkm_device_event_ctor,
2708 };
2709 
2710 struct nvkm_subdev *
nvkm_device_subdev(struct nvkm_device * device,int type,int inst)2711 nvkm_device_subdev(struct nvkm_device *device, int type, int inst)
2712 {
2713 	struct nvkm_subdev *subdev;
2714 
2715 	list_for_each_entry(subdev, &device->subdev, head) {
2716 		if (subdev->type == type && subdev->inst == inst)
2717 			return subdev;
2718 	}
2719 
2720 	return NULL;
2721 }
2722 
2723 struct nvkm_engine *
nvkm_device_engine(struct nvkm_device * device,int type,int inst)2724 nvkm_device_engine(struct nvkm_device *device, int type, int inst)
2725 {
2726 	struct nvkm_subdev *subdev = nvkm_device_subdev(device, type, inst);
2727 	if (subdev && subdev->func == &nvkm_engine)
2728 		return container_of(subdev, struct nvkm_engine, subdev);
2729 	return NULL;
2730 }
2731 
2732 int
nvkm_device_fini(struct nvkm_device * device,bool suspend)2733 nvkm_device_fini(struct nvkm_device *device, bool suspend)
2734 {
2735 	const char *action = suspend ? "suspend" : "fini";
2736 	struct nvkm_subdev *subdev;
2737 	int ret;
2738 	s64 time;
2739 
2740 	nvdev_trace(device, "%s running...\n", action);
2741 	time = ktime_to_us(ktime_get());
2742 
2743 	nvkm_acpi_fini(device);
2744 
2745 	list_for_each_entry_reverse(subdev, &device->subdev, head) {
2746 		ret = nvkm_subdev_fini(subdev, suspend);
2747 		if (ret && suspend)
2748 			goto fail;
2749 	}
2750 
2751 	nvkm_therm_clkgate_fini(device->therm, suspend);
2752 
2753 	if (device->func->fini)
2754 		device->func->fini(device, suspend);
2755 
2756 	time = ktime_to_us(ktime_get()) - time;
2757 	nvdev_trace(device, "%s completed in %lldus...\n", action, time);
2758 	return 0;
2759 
2760 fail:
2761 	list_for_each_entry_from(subdev, &device->subdev, head) {
2762 		int rret = nvkm_subdev_init(subdev);
2763 		if (rret)
2764 			nvkm_fatal(subdev, "failed restart, %d\n", ret);
2765 	}
2766 
2767 	nvdev_trace(device, "%s failed with %d\n", action, ret);
2768 	return ret;
2769 }
2770 
2771 static int
nvkm_device_preinit(struct nvkm_device * device)2772 nvkm_device_preinit(struct nvkm_device *device)
2773 {
2774 	struct nvkm_subdev *subdev;
2775 	int ret;
2776 	s64 time;
2777 
2778 	nvdev_trace(device, "preinit running...\n");
2779 	time = ktime_to_us(ktime_get());
2780 
2781 	if (device->func->preinit) {
2782 		ret = device->func->preinit(device);
2783 		if (ret)
2784 			goto fail;
2785 	}
2786 
2787 	list_for_each_entry(subdev, &device->subdev, head) {
2788 		ret = nvkm_subdev_preinit(subdev);
2789 		if (ret)
2790 			goto fail;
2791 	}
2792 
2793 	ret = nvkm_devinit_post(device->devinit);
2794 	if (ret)
2795 		goto fail;
2796 
2797 	time = ktime_to_us(ktime_get()) - time;
2798 	nvdev_trace(device, "preinit completed in %lldus\n", time);
2799 	return 0;
2800 
2801 fail:
2802 	nvdev_error(device, "preinit failed with %d\n", ret);
2803 	return ret;
2804 }
2805 
2806 int
nvkm_device_init(struct nvkm_device * device)2807 nvkm_device_init(struct nvkm_device *device)
2808 {
2809 	struct nvkm_subdev *subdev;
2810 	int ret;
2811 	s64 time;
2812 
2813 	ret = nvkm_device_preinit(device);
2814 	if (ret)
2815 		return ret;
2816 
2817 	nvkm_device_fini(device, false);
2818 
2819 	nvdev_trace(device, "init running...\n");
2820 	time = ktime_to_us(ktime_get());
2821 
2822 	if (device->func->init) {
2823 		ret = device->func->init(device);
2824 		if (ret)
2825 			goto fail;
2826 	}
2827 
2828 	list_for_each_entry(subdev, &device->subdev, head) {
2829 		ret = nvkm_subdev_init(subdev);
2830 		if (ret)
2831 			goto fail_subdev;
2832 	}
2833 
2834 	nvkm_acpi_init(device);
2835 	nvkm_therm_clkgate_enable(device->therm);
2836 
2837 	time = ktime_to_us(ktime_get()) - time;
2838 	nvdev_trace(device, "init completed in %lldus\n", time);
2839 	return 0;
2840 
2841 fail_subdev:
2842 	list_for_each_entry_from(subdev, &device->subdev, head)
2843 		nvkm_subdev_fini(subdev, false);
2844 fail:
2845 	nvkm_device_fini(device, false);
2846 
2847 	nvdev_error(device, "init failed with %d\n", ret);
2848 	return ret;
2849 }
2850 
2851 void
nvkm_device_del(struct nvkm_device ** pdevice)2852 nvkm_device_del(struct nvkm_device **pdevice)
2853 {
2854 	struct nvkm_device *device = *pdevice;
2855 	struct nvkm_subdev *subdev, *subtmp;
2856 	if (device) {
2857 		mutex_lock(&nv_devices_mutex);
2858 
2859 		list_for_each_entry_safe_reverse(subdev, subtmp, &device->subdev, head)
2860 			nvkm_subdev_del(&subdev);
2861 
2862 		nvkm_event_fini(&device->event);
2863 
2864 		if (device->pri)
2865 			iounmap(device->pri);
2866 		list_del(&device->head);
2867 
2868 		if (device->func->dtor)
2869 			*pdevice = device->func->dtor(device);
2870 		mutex_unlock(&nv_devices_mutex);
2871 
2872 		kfree(*pdevice);
2873 		*pdevice = NULL;
2874 	}
2875 }
2876 
2877 /* returns true if the GPU is in the CPU native byte order */
2878 static inline bool
nvkm_device_endianness(struct nvkm_device * device)2879 nvkm_device_endianness(struct nvkm_device *device)
2880 {
2881 #ifdef __BIG_ENDIAN
2882 	const bool big_endian = true;
2883 #else
2884 	const bool big_endian = false;
2885 #endif
2886 
2887 	/* Read NV_PMC_BOOT_1, and assume non-functional endian switch if it
2888 	 * doesn't contain the expected values.
2889 	 */
2890 	u32 pmc_boot_1 = nvkm_rd32(device, 0x000004);
2891 	if (pmc_boot_1 && pmc_boot_1 != 0x01000001)
2892 		return !big_endian; /* Assume GPU is LE in this case. */
2893 
2894 	/* 0 means LE and 0x01000001 means BE GPU. Condition is true when
2895 	 * GPU/CPU endianness don't match.
2896 	 */
2897 	if (big_endian == !pmc_boot_1) {
2898 		nvkm_wr32(device, 0x000004, 0x01000001);
2899 		nvkm_rd32(device, 0x000000);
2900 		if (nvkm_rd32(device, 0x000004) != (big_endian ? 0x01000001 : 0x00000000))
2901 			return !big_endian; /* Assume GPU is LE on any unexpected read-back. */
2902 	}
2903 
2904 	/* CPU/GPU endianness should (hopefully) match. */
2905 	return true;
2906 }
2907 
2908 int
nvkm_device_ctor(const struct nvkm_device_func * func,const struct nvkm_device_quirk * quirk,struct device * dev,enum nvkm_device_type type,u64 handle,const char * name,const char * cfg,const char * dbg,bool detect,bool mmio,u64 subdev_mask,struct nvkm_device * device)2909 nvkm_device_ctor(const struct nvkm_device_func *func,
2910 		 const struct nvkm_device_quirk *quirk,
2911 		 struct device *dev, enum nvkm_device_type type, u64 handle,
2912 		 const char *name, const char *cfg, const char *dbg,
2913 		 bool detect, bool mmio, u64 subdev_mask,
2914 		 struct nvkm_device *device)
2915 {
2916 	struct nvkm_subdev *subdev;
2917 	u64 mmio_base, mmio_size;
2918 	u32 boot0, boot1, strap;
2919 	int ret = -EEXIST, j;
2920 	unsigned chipset;
2921 
2922 	mutex_lock(&nv_devices_mutex);
2923 	if (nvkm_device_find_locked(handle))
2924 		goto done;
2925 
2926 	device->func = func;
2927 	device->quirk = quirk;
2928 	device->dev = dev;
2929 	device->type = type;
2930 	device->handle = handle;
2931 	device->cfgopt = cfg;
2932 	device->dbgopt = dbg;
2933 	device->name = name;
2934 	list_add_tail(&device->head, &nv_devices);
2935 	device->debug = nvkm_dbgopt(device->dbgopt, "device");
2936 	INIT_LIST_HEAD(&device->subdev);
2937 
2938 	ret = nvkm_event_init(&nvkm_device_event_func, 1, 1, &device->event);
2939 	if (ret)
2940 		goto done;
2941 
2942 	mmio_base = device->func->resource_addr(device, 0);
2943 	mmio_size = device->func->resource_size(device, 0);
2944 
2945 	if (detect || mmio) {
2946 		device->pri = ioremap(mmio_base, mmio_size);
2947 		if (device->pri == NULL) {
2948 			nvdev_error(device, "unable to map PRI\n");
2949 			ret = -ENOMEM;
2950 			goto done;
2951 		}
2952 	}
2953 
2954 	/* identify the chipset, and determine classes of subdev/engines */
2955 	if (detect) {
2956 		/* switch mmio to cpu's native endianness */
2957 		if (!nvkm_device_endianness(device)) {
2958 			nvdev_error(device,
2959 				    "Couldn't switch GPU to CPUs endianness\n");
2960 			ret = -ENOSYS;
2961 			goto done;
2962 		}
2963 
2964 		boot0 = nvkm_rd32(device, 0x000000);
2965 
2966 		/* chipset can be overridden for devel/testing purposes */
2967 		chipset = nvkm_longopt(device->cfgopt, "NvChipset", 0);
2968 		if (chipset) {
2969 			u32 override_boot0;
2970 
2971 			if (chipset >= 0x10) {
2972 				override_boot0  = ((chipset & 0x1ff) << 20);
2973 				override_boot0 |= 0x000000a1;
2974 			} else {
2975 				if (chipset != 0x04)
2976 					override_boot0 = 0x20104000;
2977 				else
2978 					override_boot0 = 0x20004000;
2979 			}
2980 
2981 			nvdev_warn(device, "CHIPSET OVERRIDE: %08x -> %08x\n",
2982 				   boot0, override_boot0);
2983 			boot0 = override_boot0;
2984 		}
2985 
2986 		/* determine chipset and derive architecture from it */
2987 		if ((boot0 & 0x1f000000) > 0) {
2988 			device->chipset = (boot0 & 0x1ff00000) >> 20;
2989 			device->chiprev = (boot0 & 0x000000ff);
2990 			switch (device->chipset & 0x1f0) {
2991 			case 0x010: {
2992 				if (0x461 & (1 << (device->chipset & 0xf)))
2993 					device->card_type = NV_10;
2994 				else
2995 					device->card_type = NV_11;
2996 				device->chiprev = 0x00;
2997 				break;
2998 			}
2999 			case 0x020: device->card_type = NV_20; break;
3000 			case 0x030: device->card_type = NV_30; break;
3001 			case 0x040:
3002 			case 0x060: device->card_type = NV_40; break;
3003 			case 0x050:
3004 			case 0x080:
3005 			case 0x090:
3006 			case 0x0a0: device->card_type = NV_50; break;
3007 			case 0x0c0:
3008 			case 0x0d0: device->card_type = NV_C0; break;
3009 			case 0x0e0:
3010 			case 0x0f0:
3011 			case 0x100: device->card_type = NV_E0; break;
3012 			case 0x110:
3013 			case 0x120: device->card_type = GM100; break;
3014 			case 0x130: device->card_type = GP100; break;
3015 			case 0x140: device->card_type = GV100; break;
3016 			case 0x160: device->card_type = TU100; break;
3017 			case 0x170: device->card_type = GA100; break;
3018 			default:
3019 				break;
3020 			}
3021 		} else
3022 		if ((boot0 & 0xff00fff0) == 0x20004000) {
3023 			if (boot0 & 0x00f00000)
3024 				device->chipset = 0x05;
3025 			else
3026 				device->chipset = 0x04;
3027 			device->card_type = NV_04;
3028 		}
3029 
3030 		switch (device->chipset) {
3031 		case 0x004: device->chip = &nv4_chipset; break;
3032 		case 0x005: device->chip = &nv5_chipset; break;
3033 		case 0x010: device->chip = &nv10_chipset; break;
3034 		case 0x011: device->chip = &nv11_chipset; break;
3035 		case 0x015: device->chip = &nv15_chipset; break;
3036 		case 0x017: device->chip = &nv17_chipset; break;
3037 		case 0x018: device->chip = &nv18_chipset; break;
3038 		case 0x01a: device->chip = &nv1a_chipset; break;
3039 		case 0x01f: device->chip = &nv1f_chipset; break;
3040 		case 0x020: device->chip = &nv20_chipset; break;
3041 		case 0x025: device->chip = &nv25_chipset; break;
3042 		case 0x028: device->chip = &nv28_chipset; break;
3043 		case 0x02a: device->chip = &nv2a_chipset; break;
3044 		case 0x030: device->chip = &nv30_chipset; break;
3045 		case 0x031: device->chip = &nv31_chipset; break;
3046 		case 0x034: device->chip = &nv34_chipset; break;
3047 		case 0x035: device->chip = &nv35_chipset; break;
3048 		case 0x036: device->chip = &nv36_chipset; break;
3049 		case 0x040: device->chip = &nv40_chipset; break;
3050 		case 0x041: device->chip = &nv41_chipset; break;
3051 		case 0x042: device->chip = &nv42_chipset; break;
3052 		case 0x043: device->chip = &nv43_chipset; break;
3053 		case 0x044: device->chip = &nv44_chipset; break;
3054 		case 0x045: device->chip = &nv45_chipset; break;
3055 		case 0x046: device->chip = &nv46_chipset; break;
3056 		case 0x047: device->chip = &nv47_chipset; break;
3057 		case 0x049: device->chip = &nv49_chipset; break;
3058 		case 0x04a: device->chip = &nv4a_chipset; break;
3059 		case 0x04b: device->chip = &nv4b_chipset; break;
3060 		case 0x04c: device->chip = &nv4c_chipset; break;
3061 		case 0x04e: device->chip = &nv4e_chipset; break;
3062 		case 0x050: device->chip = &nv50_chipset; break;
3063 		case 0x063: device->chip = &nv63_chipset; break;
3064 		case 0x067: device->chip = &nv67_chipset; break;
3065 		case 0x068: device->chip = &nv68_chipset; break;
3066 		case 0x084: device->chip = &nv84_chipset; break;
3067 		case 0x086: device->chip = &nv86_chipset; break;
3068 		case 0x092: device->chip = &nv92_chipset; break;
3069 		case 0x094: device->chip = &nv94_chipset; break;
3070 		case 0x096: device->chip = &nv96_chipset; break;
3071 		case 0x098: device->chip = &nv98_chipset; break;
3072 		case 0x0a0: device->chip = &nva0_chipset; break;
3073 		case 0x0a3: device->chip = &nva3_chipset; break;
3074 		case 0x0a5: device->chip = &nva5_chipset; break;
3075 		case 0x0a8: device->chip = &nva8_chipset; break;
3076 		case 0x0aa: device->chip = &nvaa_chipset; break;
3077 		case 0x0ac: device->chip = &nvac_chipset; break;
3078 		case 0x0af: device->chip = &nvaf_chipset; break;
3079 		case 0x0c0: device->chip = &nvc0_chipset; break;
3080 		case 0x0c1: device->chip = &nvc1_chipset; break;
3081 		case 0x0c3: device->chip = &nvc3_chipset; break;
3082 		case 0x0c4: device->chip = &nvc4_chipset; break;
3083 		case 0x0c8: device->chip = &nvc8_chipset; break;
3084 		case 0x0ce: device->chip = &nvce_chipset; break;
3085 		case 0x0cf: device->chip = &nvcf_chipset; break;
3086 		case 0x0d7: device->chip = &nvd7_chipset; break;
3087 		case 0x0d9: device->chip = &nvd9_chipset; break;
3088 		case 0x0e4: device->chip = &nve4_chipset; break;
3089 		case 0x0e6: device->chip = &nve6_chipset; break;
3090 		case 0x0e7: device->chip = &nve7_chipset; break;
3091 		case 0x0ea: device->chip = &nvea_chipset; break;
3092 		case 0x0f0: device->chip = &nvf0_chipset; break;
3093 		case 0x0f1: device->chip = &nvf1_chipset; break;
3094 		case 0x106: device->chip = &nv106_chipset; break;
3095 		case 0x108: device->chip = &nv108_chipset; break;
3096 		case 0x117: device->chip = &nv117_chipset; break;
3097 		case 0x118: device->chip = &nv118_chipset; break;
3098 		case 0x120: device->chip = &nv120_chipset; break;
3099 		case 0x124: device->chip = &nv124_chipset; break;
3100 		case 0x126: device->chip = &nv126_chipset; break;
3101 		case 0x12b: device->chip = &nv12b_chipset; break;
3102 		case 0x130: device->chip = &nv130_chipset; break;
3103 		case 0x132: device->chip = &nv132_chipset; break;
3104 		case 0x134: device->chip = &nv134_chipset; break;
3105 		case 0x136: device->chip = &nv136_chipset; break;
3106 		case 0x137: device->chip = &nv137_chipset; break;
3107 		case 0x138: device->chip = &nv138_chipset; break;
3108 		case 0x13b: device->chip = &nv13b_chipset; break;
3109 		case 0x140: device->chip = &nv140_chipset; break;
3110 		case 0x162: device->chip = &nv162_chipset; break;
3111 		case 0x164: device->chip = &nv164_chipset; break;
3112 		case 0x166: device->chip = &nv166_chipset; break;
3113 		case 0x167: device->chip = &nv167_chipset; break;
3114 		case 0x168: device->chip = &nv168_chipset; break;
3115 		case 0x172: device->chip = &nv172_chipset; break;
3116 		case 0x173: device->chip = &nv173_chipset; break;
3117 		case 0x174: device->chip = &nv174_chipset; break;
3118 		case 0x176: device->chip = &nv176_chipset; break;
3119 		case 0x177: device->chip = &nv177_chipset; break;
3120 		default:
3121 			if (nvkm_boolopt(device->cfgopt, "NvEnableUnsupportedChipsets", false)) {
3122 				switch (device->chipset) {
3123 				case 0x170: device->chip = &nv170_chipset; break;
3124 				default:
3125 					break;
3126 				}
3127 			}
3128 
3129 			if (!device->chip) {
3130 				nvdev_error(device, "unknown chipset (%08x)\n", boot0);
3131 				ret = -ENODEV;
3132 				goto done;
3133 			}
3134 			break;
3135 		}
3136 
3137 		nvdev_info(device, "NVIDIA %s (%08x)\n",
3138 			   device->chip->name, boot0);
3139 
3140 		/* vGPU detection */
3141 		boot1 = nvkm_rd32(device, 0x0000004);
3142 		if (device->card_type >= TU100 && (boot1 & 0x00030000)) {
3143 			nvdev_info(device, "vGPUs are not supported\n");
3144 			ret = -ENODEV;
3145 			goto done;
3146 		}
3147 
3148 		/* read strapping information */
3149 		strap = nvkm_rd32(device, 0x101000);
3150 
3151 		/* determine frequency of timing crystal */
3152 		if ( device->card_type <= NV_10 || device->chipset < 0x17 ||
3153 		    (device->chipset >= 0x20 && device->chipset < 0x25))
3154 			strap &= 0x00000040;
3155 		else
3156 			strap &= 0x00400040;
3157 
3158 		switch (strap) {
3159 		case 0x00000000: device->crystal = 13500; break;
3160 		case 0x00000040: device->crystal = 14318; break;
3161 		case 0x00400000: device->crystal = 27000; break;
3162 		case 0x00400040: device->crystal = 25000; break;
3163 		}
3164 	} else {
3165 		device->chip = &null_chipset;
3166 	}
3167 
3168 	if (!device->name)
3169 		device->name = device->chip->name;
3170 
3171 	mutex_init(&device->mutex);
3172 
3173 #define NVKM_LAYOUT_ONCE(type,data,ptr)                                                      \
3174 	if (device->chip->ptr.inst && (subdev_mask & (BIT_ULL(type)))) {                     \
3175 		WARN_ON(device->chip->ptr.inst != 0x00000001);                               \
3176 		ret = device->chip->ptr.ctor(device, (type), -1, &device->ptr);              \
3177 		subdev = nvkm_device_subdev(device, (type), 0);                              \
3178 		if (ret) {                                                                   \
3179 			nvkm_subdev_del(&subdev);                                            \
3180 			device->ptr = NULL;                                                  \
3181 			if (ret != -ENODEV) {                                                \
3182 				nvdev_error(device, "%s ctor failed: %d\n",                  \
3183 					    nvkm_subdev_type[(type)], ret);                  \
3184 				goto done;                                                   \
3185 			}                                                                    \
3186 		} else {                                                                     \
3187 			subdev->pself = (void **)&device->ptr;                               \
3188 		}                                                                            \
3189 	}
3190 #define NVKM_LAYOUT_INST(type,data,ptr,cnt)                                                  \
3191 	WARN_ON(device->chip->ptr.inst & ~((1 << ARRAY_SIZE(device->ptr)) - 1));             \
3192 	for (j = 0; device->chip->ptr.inst && j < ARRAY_SIZE(device->ptr); j++) {            \
3193 		if ((device->chip->ptr.inst & BIT(j)) && (subdev_mask & BIT_ULL(type))) {    \
3194 			ret = device->chip->ptr.ctor(device, (type), (j), &device->ptr[j]);  \
3195 			subdev = nvkm_device_subdev(device, (type), (j));                    \
3196 			if (ret) {                                                           \
3197 				nvkm_subdev_del(&subdev);                                    \
3198 				device->ptr[j] = NULL;                                       \
3199 				if (ret != -ENODEV) {                                        \
3200 					nvdev_error(device, "%s%d ctor failed: %d\n",        \
3201 						    nvkm_subdev_type[(type)], (j), ret);     \
3202 					goto done;                                           \
3203 				}                                                            \
3204 			} else {                                                             \
3205 				subdev->pself = (void **)&device->ptr[j];                    \
3206 			}                                                                    \
3207 		}                                                                            \
3208 	}
3209 #include <core/layout.h>
3210 #undef NVKM_LAYOUT_INST
3211 #undef NVKM_LAYOUT_ONCE
3212 
3213 	ret = 0;
3214 done:
3215 	if (device->pri && (!mmio || ret)) {
3216 		iounmap(device->pri);
3217 		device->pri = NULL;
3218 	}
3219 	mutex_unlock(&nv_devices_mutex);
3220 	return ret;
3221 }
3222