1 /*********************************************************************
2 *
3 * Filename: nsc-ircc.c
4 * Version: 1.0
5 * Description: Driver for the NSC PC'108 and PC'338 IrDA chipsets
6 * Status: Stable.
7 * Author: Dag Brattli <dagb@cs.uit.no>
8 * Created at: Sat Nov 7 21:43:15 1998
9 * Modified at: Sat Aug 14 04:14:57 2004
10 * Modified by: Maik Broemme <mbroemme@plusserver.de>
11 *
12 * Copyright (c) 1998-2000 Dag Brattli <dagb@cs.uit.no>
13 * Copyright (c) 1998 Lichen Wang, <lwang@actisys.com>
14 * Copyright (c) 1998 Actisys Corp., www.actisys.com
15 * All Rights Reserved
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * Neither Dag Brattli nor University of Troms� admit liability nor
23 * provide warranty for any of this software. This material is
24 * provided "AS-IS" and at no charge.
25 *
26 * Notice that all functions that needs to access the chip in _any_
27 * way, must save BSR register on entry, and restore it on exit.
28 * It is _very_ important to follow this policy!
29 *
30 * __u8 bank;
31 *
32 * bank = inb(iobase+BSR);
33 *
34 * do_your_stuff_here();
35 *
36 * outb(bank, iobase+BSR);
37 *
38 * If you find bugs in this file, its very likely that the same bug
39 * will also be in w83977af_ir.c since the implementations are quite
40 * similar.
41 *
42 ********************************************************************/
43
44 #include <linux/module.h>
45
46 #include <linux/kernel.h>
47 #include <linux/types.h>
48 #include <linux/skbuff.h>
49 #include <linux/netdevice.h>
50 #include <linux/ioport.h>
51 #include <linux/delay.h>
52 #include <linux/slab.h>
53 #include <linux/init.h>
54 #include <linux/rtnetlink.h>
55
56 #include <asm/io.h>
57 #include <asm/dma.h>
58 #include <asm/byteorder.h>
59
60 #include <linux/pm.h>
61
62 #include <net/irda/wrapper.h>
63 #include <net/irda/irda.h>
64 #include <net/irda/irmod.h>
65 #include <net/irda/irlap_frame.h>
66 #include <net/irda/irda_device.h>
67
68 #include <net/irda/nsc-ircc.h>
69
70 #define CHIP_IO_EXTENT 8
71 #define BROKEN_DONGLE_ID
72
73 static char *driver_name = "nsc-ircc";
74
75 /* Module parameters */
76 static int qos_mtt_bits = 0x07; /* 1 ms or more */
77 static int dongle_id;
78
79 /* Use BIOS settions by default, but user may supply module parameters */
80 static unsigned int io[] = { ~0, ~0, ~0, ~0 };
81 static unsigned int irq[] = { 0, 0, 0, 0, 0 };
82 static unsigned int dma[] = { 0, 0, 0, 0, 0 };
83
84 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info);
85 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info);
86 static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info);
87 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info);
88 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info);
89 static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info);
90
91 /* These are the known NSC chips */
92 static nsc_chip_t chips[] = {
93 /* Name, {cfg registers}, chip id index reg, chip id expected value, revision mask */
94 { "PC87108", { 0x150, 0x398, 0xea }, 0x05, 0x10, 0xf0,
95 nsc_ircc_probe_108, nsc_ircc_init_108 },
96 { "PC87338", { 0x398, 0x15c, 0x2e }, 0x08, 0xb0, 0xf8,
97 nsc_ircc_probe_338, nsc_ircc_init_338 },
98 /* Contributed by Jan Frey - IBM A30/A31 */
99 { "PC8739x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xea, 0xff,
100 nsc_ircc_probe_39x, nsc_ircc_init_39x },
101 { NULL }
102 #if 0
103 /* Probably bogus, "PC8739x" should be the real thing. Jean II */
104 /* Contributed by Kevin Thayer - OmniBook 6100 */
105 { "PC87338?", { 0x2e, 0x15c, 0x398 }, 0x08, 0x00, 0xf8,
106 nsc_ircc_probe_338, nsc_ircc_init_338 },
107 #endif
108 };
109
110 /* Max 4 instances for now */
111 static struct nsc_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL };
112
113 static char *dongle_types[] = {
114 "Differential serial interface",
115 "Differential serial interface",
116 "Reserved",
117 "Reserved",
118 "Sharp RY5HD01",
119 "Reserved",
120 "Single-ended serial interface",
121 "Consumer-IR only",
122 "HP HSDL-2300, HP HSDL-3600/HSDL-3610",
123 "IBM31T1100 or Temic TFDS6000/TFDS6500",
124 "Reserved",
125 "Reserved",
126 "HP HSDL-1100/HSDL-2100",
127 "HP HSDL-1100/HSDL-2100",
128 "Supports SIR Mode only",
129 "No dongle connected",
130 };
131
132 /* Some prototypes */
133 static int nsc_ircc_open(int i, chipio_t *info);
134 #ifdef MODULE
135 static int nsc_ircc_close(struct nsc_ircc_cb *self);
136 #endif /* MODULE */
137 static int nsc_ircc_setup(chipio_t *info);
138 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self);
139 static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self);
140 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase);
141 static int nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev);
142 static int nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev);
143 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
144 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase);
145 static void nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 baud);
146 static void nsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *regs);
147 static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self);
148 static int nsc_ircc_read_dongle_id (int iobase);
149 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id);
150
151 static int nsc_ircc_net_init(struct net_device *dev);
152 static int nsc_ircc_net_open(struct net_device *dev);
153 static int nsc_ircc_net_close(struct net_device *dev);
154 static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
155 static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev);
156 static int nsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data);
157
158 /*
159 * Function nsc_ircc_init ()
160 *
161 * Initialize chip. Just try to find out how many chips we are dealing with
162 * and where they are
163 */
nsc_ircc_init(void)164 int __init nsc_ircc_init(void)
165 {
166 chipio_t info;
167 nsc_chip_t *chip;
168 int ret = -ENODEV;
169 int cfg_base;
170 int cfg, id;
171 int reg;
172 int i = 0;
173
174 /* Probe for all the NSC chipsets we know about */
175 for (chip=chips; chip->name ; chip++) {
176 IRDA_DEBUG(2, "%s(), Probing for %s ...\n",
177 __FUNCTION__, chip->name);
178
179 /* Try all config registers for this chip */
180 for (cfg=0; cfg<3; cfg++) {
181 cfg_base = chip->cfg[cfg];
182 if (!cfg_base)
183 continue;
184
185 memset(&info, 0, sizeof(chipio_t));
186 info.cfg_base = cfg_base;
187 info.fir_base = io[i];
188 info.dma = dma[i];
189 info.irq = irq[i];
190
191 /* Read index register */
192 reg = inb(cfg_base);
193 if (reg == 0xff) {
194 IRDA_DEBUG(2, "%s() no chip at 0x%03x\n",
195 __FUNCTION__, cfg_base);
196 continue;
197 }
198
199 /* Read chip identification register */
200 outb(chip->cid_index, cfg_base);
201 id = inb(cfg_base+1);
202 if ((id & chip->cid_mask) == chip->cid_value) {
203 IRDA_DEBUG(2, "%s() Found %s chip, revision=%d\n",
204 __FUNCTION__, chip->name, id & ~chip->cid_mask);
205 /*
206 * If the user supplies the base address, then
207 * we init the chip, if not we probe the values
208 * set by the BIOS
209 */
210 if (io[i] < 0x2000) {
211 chip->init(chip, &info);
212 } else
213 chip->probe(chip, &info);
214
215 if (nsc_ircc_open(i, &info) == 0)
216 ret = 0;
217 i++;
218 } else {
219 IRDA_DEBUG(2, "%s(), Wrong chip id=0x%02x\n", __FUNCTION__, id);
220 }
221 }
222
223 }
224
225 return ret;
226 }
227
228 /*
229 * Function nsc_ircc_cleanup ()
230 *
231 * Close all configured chips
232 *
233 */
234 #ifdef MODULE
nsc_ircc_cleanup(void)235 static void nsc_ircc_cleanup(void)
236 {
237 int i;
238
239 pm_unregister_all(nsc_ircc_pmproc);
240
241 for (i=0; i < 4; i++) {
242 if (dev_self[i])
243 nsc_ircc_close(dev_self[i]);
244 }
245 }
246 #endif /* MODULE */
247
248 /*
249 * Function nsc_ircc_open (iobase, irq)
250 *
251 * Open driver instance
252 *
253 */
nsc_ircc_open(int i,chipio_t * info)254 static int nsc_ircc_open(int i, chipio_t *info)
255 {
256 struct net_device *dev;
257 struct nsc_ircc_cb *self;
258 struct pm_dev *pmdev;
259 void *ret;
260 int err;
261
262 IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
263
264 MESSAGE("%s, Found chip at base=0x%03x\n", driver_name,
265 info->cfg_base);
266
267 if ((nsc_ircc_setup(info)) == -1)
268 return -1;
269
270 MESSAGE("%s, driver loaded (Dag Brattli)\n", driver_name);
271
272 /* Allocate new instance of the driver */
273 self = kmalloc(sizeof(struct nsc_ircc_cb), GFP_KERNEL);
274 if (self == NULL) {
275 ERROR("%s(), can't allocate memory for "
276 "control block!\n", __FUNCTION__);
277 return -ENOMEM;
278 }
279 memset(self, 0, sizeof(struct nsc_ircc_cb));
280 spin_lock_init(&self->lock);
281
282 /* Need to store self somewhere */
283 dev_self[i] = self;
284 self->index = i;
285
286 /* Initialize IO */
287 self->io.cfg_base = info->cfg_base;
288 self->io.fir_base = info->fir_base;
289 self->io.irq = info->irq;
290 self->io.fir_ext = CHIP_IO_EXTENT;
291 self->io.dma = info->dma;
292 self->io.fifo_size = 32;
293
294 /* Reserve the ioports that we need */
295 ret = request_region(self->io.fir_base, self->io.fir_ext, driver_name);
296 if (!ret) {
297 WARNING("%s(), can't get iobase of 0x%03x\n",
298 __FUNCTION__, self->io.fir_base);
299 dev_self[i] = NULL;
300 kfree(self);
301 return -ENODEV;
302 }
303
304 /* Initialize QoS for this device */
305 irda_init_max_qos_capabilies(&self->qos);
306
307 /* The only value we must override it the baudrate */
308 self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
309 IR_115200|IR_576000|IR_1152000 |(IR_4000000 << 8);
310
311 self->qos.min_turn_time.bits = qos_mtt_bits;
312 irda_qos_bits_to_value(&self->qos);
313
314 self->flags = IFF_FIR|IFF_MIR|IFF_SIR|IFF_DMA|IFF_PIO|IFF_DONGLE;
315
316 /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
317 self->rx_buff.truesize = 14384;
318 self->tx_buff.truesize = 14384;
319
320 /* Allocate memory if needed */
321 self->rx_buff.head = (__u8 *) kmalloc(self->rx_buff.truesize,
322 GFP_KERNEL|GFP_DMA);
323 if (self->rx_buff.head == NULL) {
324 kfree(self);
325 return -ENOMEM;
326 }
327 memset(self->rx_buff.head, 0, self->rx_buff.truesize);
328
329 self->tx_buff.head = (__u8 *) kmalloc(self->tx_buff.truesize,
330 GFP_KERNEL|GFP_DMA);
331 if (self->tx_buff.head == NULL) {
332 kfree(self->rx_buff.head);
333 kfree(self);
334 return -ENOMEM;
335 }
336 memset(self->tx_buff.head, 0, self->tx_buff.truesize);
337
338 self->rx_buff.in_frame = FALSE;
339 self->rx_buff.state = OUTSIDE_FRAME;
340 self->tx_buff.data = self->tx_buff.head;
341 self->rx_buff.data = self->rx_buff.head;
342
343 /* Reset Tx queue info */
344 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
345 self->tx_fifo.tail = self->tx_buff.head;
346
347 if (!(dev = dev_alloc("irda%d", &err))) {
348 ERROR("%s(), dev_alloc() failed!\n", __FUNCTION__);
349 return -ENOMEM;
350 }
351
352 dev->priv = (void *) self;
353 self->netdev = dev;
354
355 /* Override the network functions we need to use */
356 dev->init = nsc_ircc_net_init;
357 dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
358 dev->open = nsc_ircc_net_open;
359 dev->stop = nsc_ircc_net_close;
360 dev->do_ioctl = nsc_ircc_net_ioctl;
361 dev->get_stats = nsc_ircc_net_get_stats;
362
363 rtnl_lock();
364 err = register_netdevice(dev);
365 rtnl_unlock();
366 if (err) {
367 ERROR("%s(), register_netdev() failed!\n", __FUNCTION__);
368 return -1;
369 }
370 MESSAGE("IrDA: Registered device %s\n", dev->name);
371
372 /* Check if user has supplied the dongle id and if it is in the range of available ids or not. */
373 if (!dongle_id) {
374 dongle_id = nsc_ircc_read_dongle_id(self->io.fir_base);
375
376 MESSAGE("%s, Found dongle: %s\n", driver_name,
377 dongle_types[dongle_id]);
378 } else {
379 if (dongle_id < sizeof(dongle_types) / sizeof(dongle_types[0])) {
380 MESSAGE("%s, Using dongle: %s\n", driver_name,
381 dongle_types[dongle_id]);
382 } else {
383 MESSAGE("%s, dongle id %i out of range, start autodetect.\n", driver_name, dongle_id);
384 dongle_id = nsc_ircc_read_dongle_id(self->io.fir_base);
385 MESSAGE("%s, Found dongle: %s\n", driver_name,
386 dongle_types[dongle_id]);
387 }
388 }
389
390 self->io.dongle_id = dongle_id;
391 nsc_ircc_init_dongle_interface(self->io.fir_base, dongle_id);
392
393 pmdev = pm_register(PM_SYS_DEV, PM_SYS_IRDA, nsc_ircc_pmproc);
394 if (pmdev)
395 pmdev->data = self;
396
397 return 0;
398 }
399
400 #ifdef MODULE
401 /*
402 * Function nsc_ircc_close (self)
403 *
404 * Close driver instance
405 *
406 */
nsc_ircc_close(struct nsc_ircc_cb * self)407 static int nsc_ircc_close(struct nsc_ircc_cb *self)
408 {
409 int iobase;
410
411 IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
412
413 ASSERT(self != NULL, return -1;);
414
415 iobase = self->io.fir_base;
416
417 /* Remove netdevice */
418 if (self->netdev) {
419 rtnl_lock();
420 unregister_netdevice(self->netdev);
421 rtnl_unlock();
422 }
423
424 /* Release the PORT that this driver is using */
425 IRDA_DEBUG(4, "%s(), Releasing Region %03x\n",
426 __FUNCTION__, self->io.fir_base);
427 release_region(self->io.fir_base, self->io.fir_ext);
428
429 if (self->tx_buff.head)
430 kfree(self->tx_buff.head);
431
432 if (self->rx_buff.head)
433 kfree(self->rx_buff.head);
434
435 dev_self[self->index] = NULL;
436 kfree(self);
437
438 return 0;
439 }
440 #endif /* MODULE */
441
442 /*
443 * Function nsc_ircc_init_108 (iobase, cfg_base, irq, dma)
444 *
445 * Initialize the NSC '108 chip
446 *
447 */
nsc_ircc_init_108(nsc_chip_t * chip,chipio_t * info)448 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info)
449 {
450 int cfg_base = info->cfg_base;
451 __u8 temp=0;
452
453 outb(2, cfg_base); /* Mode Control Register (MCTL) */
454 outb(0x00, cfg_base+1); /* Disable device */
455
456 /* Base Address and Interrupt Control Register (BAIC) */
457 outb(CFG_108_BAIC, cfg_base);
458 switch (info->fir_base) {
459 case 0x3e8: outb(0x14, cfg_base+1); break;
460 case 0x2e8: outb(0x15, cfg_base+1); break;
461 case 0x3f8: outb(0x16, cfg_base+1); break;
462 case 0x2f8: outb(0x17, cfg_base+1); break;
463 default: ERROR("%s(), invalid base_address", __FUNCTION__);
464 }
465
466 /* Control Signal Routing Register (CSRT) */
467 switch (info->irq) {
468 case 3: temp = 0x01; break;
469 case 4: temp = 0x02; break;
470 case 5: temp = 0x03; break;
471 case 7: temp = 0x04; break;
472 case 9: temp = 0x05; break;
473 case 11: temp = 0x06; break;
474 case 15: temp = 0x07; break;
475 default: ERROR("%s(), invalid irq", __FUNCTION__);
476 }
477 outb(CFG_108_CSRT, cfg_base);
478
479 switch (info->dma) {
480 case 0: outb(0x08+temp, cfg_base+1); break;
481 case 1: outb(0x10+temp, cfg_base+1); break;
482 case 3: outb(0x18+temp, cfg_base+1); break;
483 default: ERROR("%s(), invalid dma", __FUNCTION__);
484 }
485
486 outb(CFG_108_MCTL, cfg_base); /* Mode Control Register (MCTL) */
487 outb(0x03, cfg_base+1); /* Enable device */
488
489 return 0;
490 }
491
492 /*
493 * Function nsc_ircc_probe_108 (chip, info)
494 *
495 *
496 *
497 */
nsc_ircc_probe_108(nsc_chip_t * chip,chipio_t * info)498 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info)
499 {
500 int cfg_base = info->cfg_base;
501 int reg;
502
503 /* Read address and interrupt control register (BAIC) */
504 outb(CFG_108_BAIC, cfg_base);
505 reg = inb(cfg_base+1);
506
507 switch (reg & 0x03) {
508 case 0:
509 info->fir_base = 0x3e8;
510 break;
511 case 1:
512 info->fir_base = 0x2e8;
513 break;
514 case 2:
515 info->fir_base = 0x3f8;
516 break;
517 case 3:
518 info->fir_base = 0x2f8;
519 break;
520 }
521 info->sir_base = info->fir_base;
522 IRDA_DEBUG(2, "%s(), probing fir_base=0x%03x\n",
523 __FUNCTION__, info->fir_base);
524
525 /* Read control signals routing register (CSRT) */
526 outb(CFG_108_CSRT, cfg_base);
527 reg = inb(cfg_base+1);
528
529 switch (reg & 0x07) {
530 case 0:
531 info->irq = -1;
532 break;
533 case 1:
534 info->irq = 3;
535 break;
536 case 2:
537 info->irq = 4;
538 break;
539 case 3:
540 info->irq = 5;
541 break;
542 case 4:
543 info->irq = 7;
544 break;
545 case 5:
546 info->irq = 9;
547 break;
548 case 6:
549 info->irq = 11;
550 break;
551 case 7:
552 info->irq = 15;
553 break;
554 }
555 IRDA_DEBUG(2, "%s(), probing irq=%d\n", __FUNCTION__, info->irq);
556
557 /* Currently we only read Rx DMA but it will also be used for Tx */
558 switch ((reg >> 3) & 0x03) {
559 case 0:
560 info->dma = -1;
561 break;
562 case 1:
563 info->dma = 0;
564 break;
565 case 2:
566 info->dma = 1;
567 break;
568 case 3:
569 info->dma = 3;
570 break;
571 }
572 IRDA_DEBUG(2, "%s(), probing dma=%d\n", __FUNCTION__, info->dma);
573
574 /* Read mode control register (MCTL) */
575 outb(CFG_108_MCTL, cfg_base);
576 reg = inb(cfg_base+1);
577
578 info->enabled = reg & 0x01;
579 info->suspended = !((reg >> 1) & 0x01);
580
581 return 0;
582 }
583
584 /*
585 * Function nsc_ircc_init_338 (chip, info)
586 *
587 * Initialize the NSC '338 chip. Remember that the 87338 needs two
588 * consecutive writes to the data registers while CPU interrupts are
589 * disabled. The 97338 does not require this, but shouldn't be any
590 * harm if we do it anyway.
591 */
nsc_ircc_init_338(nsc_chip_t * chip,chipio_t * info)592 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info)
593 {
594 /* No init yet */
595
596 return 0;
597 }
598
599 /*
600 * Function nsc_ircc_probe_338 (chip, info)
601 *
602 *
603 *
604 */
nsc_ircc_probe_338(nsc_chip_t * chip,chipio_t * info)605 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info)
606 {
607 int cfg_base = info->cfg_base;
608 int reg, com = 0;
609 int pnp;
610
611 /* Read funtion enable register (FER) */
612 outb(CFG_338_FER, cfg_base);
613 reg = inb(cfg_base+1);
614
615 info->enabled = (reg >> 2) & 0x01;
616
617 /* Check if we are in Legacy or PnP mode */
618 outb(CFG_338_PNP0, cfg_base);
619 reg = inb(cfg_base+1);
620
621 pnp = (reg >> 3) & 0x01;
622 if (pnp) {
623 IRDA_DEBUG(2, "(), Chip is in PnP mode\n");
624 outb(0x46, cfg_base);
625 reg = (inb(cfg_base+1) & 0xfe) << 2;
626
627 outb(0x47, cfg_base);
628 reg |= ((inb(cfg_base+1) & 0xfc) << 8);
629
630 info->fir_base = reg;
631 } else {
632 /* Read function address register (FAR) */
633 outb(CFG_338_FAR, cfg_base);
634 reg = inb(cfg_base+1);
635
636 switch ((reg >> 4) & 0x03) {
637 case 0:
638 info->fir_base = 0x3f8;
639 break;
640 case 1:
641 info->fir_base = 0x2f8;
642 break;
643 case 2:
644 com = 3;
645 break;
646 case 3:
647 com = 4;
648 break;
649 }
650
651 if (com) {
652 switch ((reg >> 6) & 0x03) {
653 case 0:
654 if (com == 3)
655 info->fir_base = 0x3e8;
656 else
657 info->fir_base = 0x2e8;
658 break;
659 case 1:
660 if (com == 3)
661 info->fir_base = 0x338;
662 else
663 info->fir_base = 0x238;
664 break;
665 case 2:
666 if (com == 3)
667 info->fir_base = 0x2e8;
668 else
669 info->fir_base = 0x2e0;
670 break;
671 case 3:
672 if (com == 3)
673 info->fir_base = 0x220;
674 else
675 info->fir_base = 0x228;
676 break;
677 }
678 }
679 }
680 info->sir_base = info->fir_base;
681
682 /* Read PnP register 1 (PNP1) */
683 outb(CFG_338_PNP1, cfg_base);
684 reg = inb(cfg_base+1);
685
686 info->irq = reg >> 4;
687
688 /* Read PnP register 3 (PNP3) */
689 outb(CFG_338_PNP3, cfg_base);
690 reg = inb(cfg_base+1);
691
692 info->dma = (reg & 0x07) - 1;
693
694 /* Read power and test register (PTR) */
695 outb(CFG_338_PTR, cfg_base);
696 reg = inb(cfg_base+1);
697
698 info->suspended = reg & 0x01;
699
700 return 0;
701 }
702
703
704 /*
705 * Function nsc_ircc_init_39x (chip, info)
706 *
707 * Now that we know it's a '39x (see probe below), we need to
708 * configure it so we can use it.
709 *
710 * The NSC '338 chip is a Super I/O chip with a "bank" architecture,
711 * the configuration of the different functionality (serial, parallel,
712 * floppy...) are each in a different bank (Logical Device Number).
713 * The base address, irq and dma configuration registers are common
714 * to all functionalities (index 0x30 to 0x7F).
715 * There is only one configuration register specific to the
716 * serial port, CFG_39X_SPC.
717 * JeanII
718 *
719 * Note : this code was written by Jan Frey <janfrey@web.de>
720 */
nsc_ircc_init_39x(nsc_chip_t * chip,chipio_t * info)721 static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info)
722 {
723 int cfg_base = info->cfg_base;
724 int enabled;
725
726 /* User is shure about his config... accept it. */
727 IRDA_DEBUG(2, "%s(): nsc_ircc_init_39x (user settings): "
728 "io=0x%04x, irq=%d, dma=%d\n",
729 __FUNCTION__, info->fir_base, info->irq, info->dma);
730
731 /* Access bank for SP2 */
732 outb(CFG_39X_LDN, cfg_base);
733 outb(0x02, cfg_base+1);
734
735 /* Configure SP2 */
736
737 /* We want to enable the device if not enabled */
738 outb(CFG_39X_ACT, cfg_base);
739 enabled = inb(cfg_base+1) & 0x01;
740
741 if (!enabled) {
742 /* Enable the device */
743 outb(CFG_39X_SIOCF1, cfg_base);
744 outb(0x01, cfg_base+1);
745 /* May want to update info->enabled. Jean II */
746 }
747
748 /* Enable UART bank switching (bit 7) ; Sets the chip to normal
749 * power mode (wake up from sleep mode) (bit 1) */
750 outb(CFG_39X_SPC, cfg_base);
751 outb(0x82, cfg_base+1);
752
753 return 0;
754 }
755
756 /*
757 * Function nsc_ircc_probe_39x (chip, info)
758 *
759 * Test if we really have a '39x chip at the given address
760 *
761 * Note : this code was written by Jan Frey <janfrey@web.de>
762 */
nsc_ircc_probe_39x(nsc_chip_t * chip,chipio_t * info)763 static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info)
764 {
765 int cfg_base = info->cfg_base;
766 int reg1, reg2, irq, irqt, dma1, dma2;
767 int enabled, susp;
768
769 IRDA_DEBUG(2, "%s(), nsc_ircc_probe_39x, base=%d\n",
770 __FUNCTION__, cfg_base);
771
772 /* This function should be executed with irq off to avoid
773 * another driver messing with the Super I/O bank - Jean II */
774
775 /* Access bank for SP2 */
776 outb(CFG_39X_LDN, cfg_base);
777 outb(0x02, cfg_base+1);
778
779 /* Read infos about SP2 ; store in info struct */
780 outb(CFG_39X_BASEH, cfg_base);
781 reg1 = inb(cfg_base+1);
782 outb(CFG_39X_BASEL, cfg_base);
783 reg2 = inb(cfg_base+1);
784 info->fir_base = (reg1 << 8) | reg2;
785
786 outb(CFG_39X_IRQNUM, cfg_base);
787 irq = inb(cfg_base+1);
788 outb(CFG_39X_IRQSEL, cfg_base);
789 irqt = inb(cfg_base+1);
790 info->irq = irq;
791
792 outb(CFG_39X_DMA0, cfg_base);
793 dma1 = inb(cfg_base+1);
794 outb(CFG_39X_DMA1, cfg_base);
795 dma2 = inb(cfg_base+1);
796 info->dma = dma1 -1;
797
798 outb(CFG_39X_ACT, cfg_base);
799 info->enabled = enabled = inb(cfg_base+1) & 0x01;
800
801 outb(CFG_39X_SPC, cfg_base);
802 susp = 1 - ((inb(cfg_base+1) & 0x02) >> 1);
803
804 IRDA_DEBUG(2, "%s(): io=0x%02x%02x, irq=%d (type %d), rxdma=%d, txdma=%d, enabled=%d (suspended=%d)\n", __FUNCTION__, reg1,reg2,irq,irqt,dma1,dma2,enabled,susp);
805
806 /* Configure SP2 */
807
808 /* We want to enable the device if not enabled */
809 outb(CFG_39X_ACT, cfg_base);
810 enabled = inb(cfg_base+1) & 0x01;
811
812 if (!enabled) {
813 /* Enable the device */
814 outb(CFG_39X_SIOCF1, cfg_base);
815 outb(0x01, cfg_base+1);
816 /* May want to update info->enabled. Jean II */
817 }
818
819 /* Enable UART bank switching (bit 7) ; Sets the chip to normal
820 * power mode (wake up from sleep mode) (bit 1) */
821 outb(CFG_39X_SPC, cfg_base);
822 outb(0x82, cfg_base+1);
823
824 return 0;
825 }
826
827 /*
828 * Function nsc_ircc_setup (info)
829 *
830 * Returns non-negative on success.
831 *
832 */
nsc_ircc_setup(chipio_t * info)833 static int nsc_ircc_setup(chipio_t *info)
834 {
835 int version;
836 int iobase = info->fir_base;
837
838 /* Read the Module ID */
839 switch_bank(iobase, BANK3);
840 version = inb(iobase+MID);
841
842 IRDA_DEBUG(2, "%s() Driver %s Found chip version %02x\n", __FUNCTION__,
843 driver_name, version);
844
845 /* Should be 0x2? */
846 if (0x20 != (version & 0xf0)) {
847 ERROR("%s, Wrong chip version %02x\n", driver_name, version);
848 return -1;
849 }
850
851 /* Switch to advanced mode */
852 switch_bank(iobase, BANK2);
853 outb(ECR1_EXT_SL, iobase+ECR1);
854 switch_bank(iobase, BANK0);
855
856 /* Set FIFO threshold to TX17, RX16, reset and enable FIFO's */
857 switch_bank(iobase, BANK0);
858 outb(FCR_RXTH|FCR_TXTH|FCR_TXSR|FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
859
860 outb(0x03, iobase+LCR); /* 8 bit word length */
861 outb(MCR_SIR, iobase+MCR); /* Start at SIR-mode, also clears LSR*/
862
863 /* Set FIFO size to 32 */
864 switch_bank(iobase, BANK2);
865 outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
866
867 /* IRCR2: FEND_MD is not set */
868 switch_bank(iobase, BANK5);
869 outb(0x02, iobase+4);
870
871 /* Make sure that some defaults are OK */
872 switch_bank(iobase, BANK6);
873 outb(0x20, iobase+0); /* Set 32 bits FIR CRC */
874 outb(0x0a, iobase+1); /* Set MIR pulse width */
875 outb(0x0d, iobase+2); /* Set SIR pulse width to 1.6us */
876 outb(0x2a, iobase+4); /* Set beginning frag, and preamble length */
877
878 /* Enable receive interrupts */
879 switch_bank(iobase, BANK0);
880 outb(IER_RXHDL_IE, iobase+IER);
881
882 return 0;
883 }
884
885 /*
886 * Function nsc_ircc_read_dongle_id (void)
887 *
888 * Try to read dongle indentification. This procedure needs to be executed
889 * once after power-on/reset. It also needs to be used whenever you suspect
890 * that the user may have plugged/unplugged the IrDA Dongle.
891 */
nsc_ircc_read_dongle_id(int iobase)892 static int nsc_ircc_read_dongle_id (int iobase)
893 {
894 int dongle_id;
895 __u8 bank;
896
897 bank = inb(iobase+BSR);
898
899 /* Select Bank 7 */
900 switch_bank(iobase, BANK7);
901
902 /* IRCFG4: IRSL0_DS and IRSL21_DS are cleared */
903 outb(0x00, iobase+7);
904
905 /* ID0, 1, and 2 are pulled up/down very slowly */
906 udelay(50);
907
908 /* IRCFG1: read the ID bits */
909 dongle_id = inb(iobase+4) & 0x0f;
910
911 #ifdef BROKEN_DONGLE_ID
912 if (dongle_id == 0x0a)
913 dongle_id = 0x09;
914 #endif
915 /* Go back to bank 0 before returning */
916 switch_bank(iobase, BANK0);
917
918 outb(bank, iobase+BSR);
919
920 return dongle_id;
921 }
922
923 /*
924 * Function nsc_ircc_init_dongle_interface (iobase, dongle_id)
925 *
926 * This function initializes the dongle for the transceiver that is
927 * used. This procedure needs to be executed once after
928 * power-on/reset. It also needs to be used whenever you suspect that
929 * the dongle is changed.
930 */
nsc_ircc_init_dongle_interface(int iobase,int dongle_id)931 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id)
932 {
933 int bank;
934
935 /* Save current bank */
936 bank = inb(iobase+BSR);
937
938 /* Select Bank 7 */
939 switch_bank(iobase, BANK7);
940
941 /* IRCFG4: set according to dongle_id */
942 switch (dongle_id) {
943 case 0x00: /* same as */
944 case 0x01: /* Differential serial interface */
945 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
946 __FUNCTION__, dongle_types[dongle_id]);
947 break;
948 case 0x02: /* same as */
949 case 0x03: /* Reserved */
950 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
951 __FUNCTION__, dongle_types[dongle_id]);
952 break;
953 case 0x04: /* Sharp RY5HD01 */
954 break;
955 case 0x05: /* Reserved, but this is what the Thinkpad reports */
956 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
957 __FUNCTION__, dongle_types[dongle_id]);
958 break;
959 case 0x06: /* Single-ended serial interface */
960 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
961 __FUNCTION__, dongle_types[dongle_id]);
962 break;
963 case 0x07: /* Consumer-IR only */
964 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
965 __FUNCTION__, dongle_types[dongle_id]);
966 break;
967 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
968 IRDA_DEBUG(0, "%s(), %s\n",
969 __FUNCTION__, dongle_types[dongle_id]);
970 break;
971 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
972 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
973 break;
974 case 0x0A: /* same as */
975 case 0x0B: /* Reserved */
976 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
977 __FUNCTION__, dongle_types[dongle_id]);
978 break;
979 case 0x0C: /* same as */
980 case 0x0D: /* HP HSDL-1100/HSDL-2100 */
981 /*
982 * Set irsl0 as input, irsl[1-2] as output, and separate
983 * inputs are used for SIR and MIR/FIR
984 */
985 outb(0x48, iobase+7);
986 break;
987 case 0x0E: /* Supports SIR Mode only */
988 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
989 break;
990 case 0x0F: /* No dongle connected */
991 IRDA_DEBUG(0, "%s(), %s\n",
992 __FUNCTION__, dongle_types[dongle_id]);
993
994 switch_bank(iobase, BANK0);
995 outb(0x62, iobase+MCR);
996 break;
997 default:
998 IRDA_DEBUG(0, "%s(), invalid dongle_id %#x",
999 __FUNCTION__, dongle_id);
1000 }
1001
1002 /* IRCFG1: IRSL1 and 2 are set to IrDA mode */
1003 outb(0x00, iobase+4);
1004
1005 /* Restore bank register */
1006 outb(bank, iobase+BSR);
1007
1008 } /* set_up_dongle_interface */
1009
1010 /*
1011 * Function nsc_ircc_change_dongle_speed (iobase, speed, dongle_id)
1012 *
1013 * Change speed of the attach dongle
1014 *
1015 */
nsc_ircc_change_dongle_speed(int iobase,int speed,int dongle_id)1016 static void nsc_ircc_change_dongle_speed(int iobase, int speed, int dongle_id)
1017 {
1018 unsigned long flags;
1019 __u8 bank;
1020
1021 /* Save current bank */
1022 bank = inb(iobase+BSR);
1023
1024 /* Select Bank 7 */
1025 switch_bank(iobase, BANK7);
1026
1027 /* IRCFG1: set according to dongle_id */
1028 switch (dongle_id) {
1029 case 0x00: /* same as */
1030 case 0x01: /* Differential serial interface */
1031 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1032 __FUNCTION__, dongle_types[dongle_id]);
1033 break;
1034 case 0x02: /* same as */
1035 case 0x03: /* Reserved */
1036 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1037 __FUNCTION__, dongle_types[dongle_id]);
1038 break;
1039 case 0x04: /* Sharp RY5HD01 */
1040 break;
1041 case 0x05: /* Reserved */
1042 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1043 __FUNCTION__, dongle_types[dongle_id]);
1044 break;
1045 case 0x06: /* Single-ended serial interface */
1046 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1047 __FUNCTION__, dongle_types[dongle_id]);
1048 break;
1049 case 0x07: /* Consumer-IR only */
1050 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1051 __FUNCTION__, dongle_types[dongle_id]);
1052 break;
1053 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
1054 IRDA_DEBUG(0, "%s(), %s\n",
1055 __FUNCTION__, dongle_types[dongle_id]);
1056 outb(0x00, iobase+4);
1057 if (speed > 115200)
1058 outb(0x01, iobase+4);
1059 break;
1060 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
1061 outb(0x01, iobase+4);
1062
1063 if (speed == 4000000) {
1064 save_flags(flags);
1065 cli();
1066 outb(0x81, iobase+4);
1067 outb(0x80, iobase+4);
1068 restore_flags(flags);
1069 } else
1070 outb(0x00, iobase+4);
1071 break;
1072 case 0x0A: /* same as */
1073 case 0x0B: /* Reserved */
1074 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1075 __FUNCTION__, dongle_types[dongle_id]);
1076 break;
1077 case 0x0C: /* same as */
1078 case 0x0D: /* HP HSDL-1100/HSDL-2100 */
1079 break;
1080 case 0x0E: /* Supports SIR Mode only */
1081 break;
1082 case 0x0F: /* No dongle connected */
1083 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1084 __FUNCTION__, dongle_types[dongle_id]);
1085
1086 switch_bank(iobase, BANK0);
1087 outb(0x62, iobase+MCR);
1088 break;
1089 default:
1090 IRDA_DEBUG(0, "%s(), invalid data_rate\n", __FUNCTION__);
1091 }
1092 /* Restore bank register */
1093 outb(bank, iobase+BSR);
1094 }
1095
1096 /*
1097 * Function nsc_ircc_change_speed (self, baud)
1098 *
1099 * Change the speed of the device
1100 *
1101 */
nsc_ircc_change_speed(struct nsc_ircc_cb * self,__u32 speed)1102 static void nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 speed)
1103 {
1104 struct net_device *dev = self->netdev;
1105 __u8 mcr = MCR_SIR;
1106 int iobase;
1107 __u8 bank;
1108
1109 IRDA_DEBUG(2, "%s(), speed=%d\n", __FUNCTION__, speed);
1110
1111 ASSERT(self != NULL, return;);
1112
1113 iobase = self->io.fir_base;
1114
1115 /* Update accounting for new speed */
1116 self->io.speed = speed;
1117
1118 /* Save current bank */
1119 bank = inb(iobase+BSR);
1120
1121 /* Disable interrupts */
1122 switch_bank(iobase, BANK0);
1123 outb(0, iobase+IER);
1124
1125 /* Select Bank 2 */
1126 switch_bank(iobase, BANK2);
1127
1128 outb(0x00, iobase+BGDH);
1129 switch (speed) {
1130 case 9600: outb(0x0c, iobase+BGDL); break;
1131 case 19200: outb(0x06, iobase+BGDL); break;
1132 case 38400: outb(0x03, iobase+BGDL); break;
1133 case 57600: outb(0x02, iobase+BGDL); break;
1134 case 115200: outb(0x01, iobase+BGDL); break;
1135 case 576000:
1136 switch_bank(iobase, BANK5);
1137
1138 /* IRCR2: MDRS is set */
1139 outb(inb(iobase+4) | 0x04, iobase+4);
1140
1141 mcr = MCR_MIR;
1142 IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __FUNCTION__);
1143 break;
1144 case 1152000:
1145 mcr = MCR_MIR;
1146 IRDA_DEBUG(0, "%s(), handling baud of 1152000\n", __FUNCTION__);
1147 break;
1148 case 4000000:
1149 mcr = MCR_FIR;
1150 IRDA_DEBUG(0, "%s(), handling baud of 4000000\n", __FUNCTION__);
1151 break;
1152 default:
1153 mcr = MCR_FIR;
1154 IRDA_DEBUG(0, "%s(), unknown baud rate of %d\n",
1155 __FUNCTION__, speed);
1156 break;
1157 }
1158
1159 /* Set appropriate speed mode */
1160 switch_bank(iobase, BANK0);
1161 outb(mcr | MCR_TX_DFR, iobase+MCR);
1162
1163 /* Give some hits to the transceiver */
1164 nsc_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
1165
1166 /* Set FIFO threshold to TX17, RX16 */
1167 switch_bank(iobase, BANK0);
1168 outb(0x00, iobase+FCR);
1169 outb(FCR_FIFO_EN, iobase+FCR);
1170 outb(FCR_RXTH| /* Set Rx FIFO threshold */
1171 FCR_TXTH| /* Set Tx FIFO threshold */
1172 FCR_TXSR| /* Reset Tx FIFO */
1173 FCR_RXSR| /* Reset Rx FIFO */
1174 FCR_FIFO_EN, /* Enable FIFOs */
1175 iobase+FCR);
1176
1177 /* Set FIFO size to 32 */
1178 switch_bank(iobase, BANK2);
1179 outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
1180
1181 /* Enable some interrupts so we can receive frames */
1182 switch_bank(iobase, BANK0);
1183 if (speed > 115200) {
1184 /* Install FIR xmit handler */
1185 dev->hard_start_xmit = nsc_ircc_hard_xmit_fir;
1186 outb(IER_SFIF_IE, iobase+IER);
1187 nsc_ircc_dma_receive(self);
1188 } else {
1189 /* Install SIR xmit handler */
1190 dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
1191 outb(IER_RXHDL_IE, iobase+IER);
1192 }
1193
1194 /* Restore BSR */
1195 outb(bank, iobase+BSR);
1196 netif_wake_queue(dev);
1197
1198 }
1199
1200 /*
1201 * Function nsc_ircc_hard_xmit (skb, dev)
1202 *
1203 * Transmit the frame!
1204 *
1205 */
nsc_ircc_hard_xmit_sir(struct sk_buff * skb,struct net_device * dev)1206 static int nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev)
1207 {
1208 struct nsc_ircc_cb *self;
1209 unsigned long flags;
1210 int iobase;
1211 __s32 speed;
1212 __u8 bank;
1213
1214 self = (struct nsc_ircc_cb *) dev->priv;
1215
1216 ASSERT(self != NULL, return 0;);
1217
1218 iobase = self->io.fir_base;
1219
1220 netif_stop_queue(dev);
1221
1222 /* Check if we need to change the speed */
1223 speed = irda_get_next_speed(skb);
1224 if ((speed != self->io.speed) && (speed != -1)) {
1225 /* Check for empty frame */
1226 if (!skb->len) {
1227 nsc_ircc_change_speed(self, speed);
1228 dev_kfree_skb(skb);
1229 return 0;
1230 } else
1231 self->new_speed = speed;
1232 }
1233
1234 spin_lock_irqsave(&self->lock, flags);
1235
1236 /* Save current bank */
1237 bank = inb(iobase+BSR);
1238
1239 self->tx_buff.data = self->tx_buff.head;
1240
1241 self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
1242 self->tx_buff.truesize);
1243
1244 self->stats.tx_bytes += self->tx_buff.len;
1245
1246 /* Add interrupt on tx low level (will fire immediately) */
1247 switch_bank(iobase, BANK0);
1248 outb(IER_TXLDL_IE, iobase+IER);
1249
1250 /* Restore bank register */
1251 outb(bank, iobase+BSR);
1252
1253 spin_unlock_irqrestore(&self->lock, flags);
1254
1255 dev_kfree_skb(skb);
1256
1257 return 0;
1258 }
1259
nsc_ircc_hard_xmit_fir(struct sk_buff * skb,struct net_device * dev)1260 static int nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev)
1261 {
1262 struct nsc_ircc_cb *self;
1263 unsigned long flags;
1264 int iobase;
1265 __s32 speed;
1266 __u8 bank;
1267 int mtt, diff;
1268
1269 self = (struct nsc_ircc_cb *) dev->priv;
1270 iobase = self->io.fir_base;
1271
1272 netif_stop_queue(dev);
1273
1274 /* Check if we need to change the speed */
1275 speed = irda_get_next_speed(skb);
1276 if ((speed != self->io.speed) && (speed != -1)) {
1277 /* Check for empty frame */
1278 if (!skb->len) {
1279 nsc_ircc_change_speed(self, speed);
1280 dev_kfree_skb(skb);
1281 return 0;
1282 } else
1283 self->new_speed = speed;
1284 }
1285
1286 spin_lock_irqsave(&self->lock, flags);
1287
1288 /* Save current bank */
1289 bank = inb(iobase+BSR);
1290
1291 /* Register and copy this frame to DMA memory */
1292 self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
1293 self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
1294 self->tx_fifo.tail += skb->len;
1295
1296 self->stats.tx_bytes += skb->len;
1297
1298 memcpy(self->tx_fifo.queue[self->tx_fifo.free].start, skb->data,
1299 skb->len);
1300
1301 self->tx_fifo.len++;
1302 self->tx_fifo.free++;
1303
1304 /* Start transmit only if there is currently no transmit going on */
1305 if (self->tx_fifo.len == 1) {
1306 /* Check if we must wait the min turn time or not */
1307 mtt = irda_get_mtt(skb);
1308 if (mtt) {
1309 /* Check how much time we have used already */
1310 do_gettimeofday(&self->now);
1311 diff = self->now.tv_usec - self->stamp.tv_usec;
1312 if (diff < 0)
1313 diff += 1000000;
1314
1315 /* Check if the mtt is larger than the time we have
1316 * already used by all the protocol processing
1317 */
1318 if (mtt > diff) {
1319 mtt -= diff;
1320
1321 /*
1322 * Use timer if delay larger than 125 us, and
1323 * use udelay for smaller values which should
1324 * be acceptable
1325 */
1326 if (mtt > 125) {
1327 /* Adjust for timer resolution */
1328 mtt = mtt / 125;
1329
1330 /* Setup timer */
1331 switch_bank(iobase, BANK4);
1332 outb(mtt & 0xff, iobase+TMRL);
1333 outb((mtt >> 8) & 0x0f, iobase+TMRH);
1334
1335 /* Start timer */
1336 outb(IRCR1_TMR_EN, iobase+IRCR1);
1337 self->io.direction = IO_XMIT;
1338
1339 /* Enable timer interrupt */
1340 switch_bank(iobase, BANK0);
1341 outb(IER_TMR_IE, iobase+IER);
1342
1343 /* Timer will take care of the rest */
1344 goto out;
1345 } else
1346 udelay(mtt);
1347 }
1348 }
1349 /* Enable DMA interrupt */
1350 switch_bank(iobase, BANK0);
1351 outb(IER_DMA_IE, iobase+IER);
1352
1353 /* Transmit frame */
1354 nsc_ircc_dma_xmit(self, iobase);
1355 }
1356 out:
1357 /* Not busy transmitting anymore if window is not full */
1358 if (self->tx_fifo.free < MAX_TX_WINDOW)
1359 netif_wake_queue(self->netdev);
1360
1361 /* Restore bank register */
1362 outb(bank, iobase+BSR);
1363
1364 spin_unlock_irqrestore(&self->lock, flags);
1365 dev_kfree_skb(skb);
1366
1367 return 0;
1368 }
1369
1370 /*
1371 * Function nsc_ircc_dma_xmit (self, iobase)
1372 *
1373 * Transmit data using DMA
1374 *
1375 */
nsc_ircc_dma_xmit(struct nsc_ircc_cb * self,int iobase)1376 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase)
1377 {
1378 int bsr;
1379
1380 /* Save current bank */
1381 bsr = inb(iobase+BSR);
1382
1383 /* Disable DMA */
1384 switch_bank(iobase, BANK0);
1385 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1386
1387 self->io.direction = IO_XMIT;
1388
1389 /* Choose transmit DMA channel */
1390 switch_bank(iobase, BANK2);
1391 outb(ECR1_DMASWP|ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1392
1393 setup_dma(self->io.dma,
1394 self->tx_fifo.queue[self->tx_fifo.ptr].start,
1395 self->tx_fifo.queue[self->tx_fifo.ptr].len,
1396 DMA_TX_MODE);
1397
1398 /* Enable DMA and SIR interaction pulse */
1399 switch_bank(iobase, BANK0);
1400 outb(inb(iobase+MCR)|MCR_TX_DFR|MCR_DMA_EN|MCR_IR_PLS, iobase+MCR);
1401
1402 /* Restore bank register */
1403 outb(bsr, iobase+BSR);
1404 }
1405
1406 /*
1407 * Function nsc_ircc_pio_xmit (self, iobase)
1408 *
1409 * Transmit data using PIO. Returns the number of bytes that actually
1410 * got transferred
1411 *
1412 */
nsc_ircc_pio_write(int iobase,__u8 * buf,int len,int fifo_size)1413 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size)
1414 {
1415 int actual = 0;
1416 __u8 bank;
1417
1418 IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
1419
1420 /* Save current bank */
1421 bank = inb(iobase+BSR);
1422
1423 switch_bank(iobase, BANK0);
1424 if (!(inb_p(iobase+LSR) & LSR_TXEMP)) {
1425 IRDA_DEBUG(4, "%s(), warning, FIFO not empty yet!\n", __FUNCTION__);
1426
1427 /* FIFO may still be filled to the Tx interrupt threshold */
1428 fifo_size -= 17;
1429 }
1430
1431 /* Fill FIFO with current frame */
1432 while ((fifo_size-- > 0) && (actual < len)) {
1433 /* Transmit next byte */
1434 outb(buf[actual++], iobase+TXD);
1435 }
1436
1437 IRDA_DEBUG(4, "%s(), fifo_size %d ; %d sent of %d\n",
1438 __FUNCTION__, fifo_size, actual, len);
1439
1440 /* Restore bank */
1441 outb(bank, iobase+BSR);
1442
1443 return actual;
1444 }
1445
1446 /*
1447 * Function nsc_ircc_dma_xmit_complete (self)
1448 *
1449 * The transfer of a frame in finished. This function will only be called
1450 * by the interrupt handler
1451 *
1452 */
nsc_ircc_dma_xmit_complete(struct nsc_ircc_cb * self)1453 static int nsc_ircc_dma_xmit_complete(struct nsc_ircc_cb *self)
1454 {
1455 int iobase;
1456 __u8 bank;
1457 int ret = TRUE;
1458
1459 IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
1460
1461 iobase = self->io.fir_base;
1462
1463 /* Save current bank */
1464 bank = inb(iobase+BSR);
1465
1466 /* Disable DMA */
1467 switch_bank(iobase, BANK0);
1468 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1469
1470 /* Check for underrrun! */
1471 if (inb(iobase+ASCR) & ASCR_TXUR) {
1472 self->stats.tx_errors++;
1473 self->stats.tx_fifo_errors++;
1474
1475 /* Clear bit, by writing 1 into it */
1476 outb(ASCR_TXUR, iobase+ASCR);
1477 } else {
1478 self->stats.tx_packets++;
1479 }
1480
1481 /* Check if we need to change the speed */
1482 if (self->new_speed) {
1483 nsc_ircc_change_speed(self, self->new_speed);
1484 self->new_speed = 0;
1485 }
1486
1487 /* Finished with this frame, so prepare for next */
1488 self->tx_fifo.ptr++;
1489 self->tx_fifo.len--;
1490
1491 /* Any frames to be sent back-to-back? */
1492 if (self->tx_fifo.len) {
1493 nsc_ircc_dma_xmit(self, iobase);
1494
1495 /* Not finished yet! */
1496 ret = FALSE;
1497 } else {
1498 /* Reset Tx FIFO info */
1499 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1500 self->tx_fifo.tail = self->tx_buff.head;
1501 }
1502
1503 /* Make sure we have room for more frames */
1504 if (self->tx_fifo.free < MAX_TX_WINDOW) {
1505 /* Not busy transmitting anymore */
1506 /* Tell the network layer, that we can accept more frames */
1507 netif_wake_queue(self->netdev);
1508 }
1509
1510 /* Restore bank */
1511 outb(bank, iobase+BSR);
1512
1513 return ret;
1514 }
1515
1516 /*
1517 * Function nsc_ircc_dma_receive (self)
1518 *
1519 * Get ready for receiving a frame. The device will initiate a DMA
1520 * if it starts to receive a frame.
1521 *
1522 */
nsc_ircc_dma_receive(struct nsc_ircc_cb * self)1523 static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self)
1524 {
1525 int iobase;
1526 __u8 bsr;
1527
1528 iobase = self->io.fir_base;
1529
1530 /* Reset Tx FIFO info */
1531 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1532 self->tx_fifo.tail = self->tx_buff.head;
1533
1534 /* Save current bank */
1535 bsr = inb(iobase+BSR);
1536
1537 /* Disable DMA */
1538 switch_bank(iobase, BANK0);
1539 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1540
1541 /* Choose DMA Rx, DMA Fairness, and Advanced mode */
1542 switch_bank(iobase, BANK2);
1543 outb(ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1544
1545 self->io.direction = IO_RECV;
1546 self->rx_buff.data = self->rx_buff.head;
1547
1548 /* Reset Rx FIFO. This will also flush the ST_FIFO */
1549 switch_bank(iobase, BANK0);
1550 outb(FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
1551
1552 self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1553 self->st_fifo.tail = self->st_fifo.head = 0;
1554
1555 setup_dma(self->io.dma, self->rx_buff.data, self->rx_buff.truesize,
1556 DMA_RX_MODE);
1557
1558 /* Enable DMA */
1559 switch_bank(iobase, BANK0);
1560 outb(inb(iobase+MCR)|MCR_DMA_EN, iobase+MCR);
1561
1562 /* Restore bank register */
1563 outb(bsr, iobase+BSR);
1564
1565 return 0;
1566 }
1567
1568 /*
1569 * Function nsc_ircc_dma_receive_complete (self)
1570 *
1571 * Finished with receiving frames
1572 *
1573 *
1574 */
nsc_ircc_dma_receive_complete(struct nsc_ircc_cb * self,int iobase)1575 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase)
1576 {
1577 struct st_fifo *st_fifo;
1578 struct sk_buff *skb;
1579 __u8 status;
1580 __u8 bank;
1581 int len;
1582
1583 st_fifo = &self->st_fifo;
1584
1585 /* Save current bank */
1586 bank = inb(iobase+BSR);
1587
1588 /* Read all entries in status FIFO */
1589 switch_bank(iobase, BANK5);
1590 while ((status = inb(iobase+FRM_ST)) & FRM_ST_VLD) {
1591 /* We must empty the status FIFO no matter what */
1592 len = inb(iobase+RFLFL) | ((inb(iobase+RFLFH) & 0x1f) << 8);
1593
1594 if (st_fifo->tail >= MAX_RX_WINDOW) {
1595 IRDA_DEBUG(0, "%s(), window is full!\n", __FUNCTION__);
1596 continue;
1597 }
1598
1599 st_fifo->entries[st_fifo->tail].status = status;
1600 st_fifo->entries[st_fifo->tail].len = len;
1601 st_fifo->pending_bytes += len;
1602 st_fifo->tail++;
1603 st_fifo->len++;
1604 }
1605 /* Try to process all entries in status FIFO */
1606 while (st_fifo->len > 0) {
1607 /* Get first entry */
1608 status = st_fifo->entries[st_fifo->head].status;
1609 len = st_fifo->entries[st_fifo->head].len;
1610 st_fifo->pending_bytes -= len;
1611 st_fifo->head++;
1612 st_fifo->len--;
1613
1614 /* Check for errors */
1615 if (status & FRM_ST_ERR_MSK) {
1616 if (status & FRM_ST_LOST_FR) {
1617 /* Add number of lost frames to stats */
1618 self->stats.rx_errors += len;
1619 } else {
1620 /* Skip frame */
1621 self->stats.rx_errors++;
1622
1623 self->rx_buff.data += len;
1624
1625 if (status & FRM_ST_MAX_LEN)
1626 self->stats.rx_length_errors++;
1627
1628 if (status & FRM_ST_PHY_ERR)
1629 self->stats.rx_frame_errors++;
1630
1631 if (status & FRM_ST_BAD_CRC)
1632 self->stats.rx_crc_errors++;
1633 }
1634 /* The errors below can be reported in both cases */
1635 if (status & FRM_ST_OVR1)
1636 self->stats.rx_fifo_errors++;
1637
1638 if (status & FRM_ST_OVR2)
1639 self->stats.rx_fifo_errors++;
1640 } else {
1641 /*
1642 * First we must make sure that the frame we
1643 * want to deliver is all in main memory. If we
1644 * cannot tell, then we check if the Rx FIFO is
1645 * empty. If not then we will have to take a nap
1646 * and try again later.
1647 */
1648 if (st_fifo->pending_bytes < self->io.fifo_size) {
1649 switch_bank(iobase, BANK0);
1650 if (inb(iobase+LSR) & LSR_RXDA) {
1651 /* Put this entry back in fifo */
1652 st_fifo->head--;
1653 st_fifo->len++;
1654 st_fifo->pending_bytes += len;
1655 st_fifo->entries[st_fifo->head].status = status;
1656 st_fifo->entries[st_fifo->head].len = len;
1657 /*
1658 * DMA not finished yet, so try again
1659 * later, set timer value, resolution
1660 * 125 us
1661 */
1662 switch_bank(iobase, BANK4);
1663 outb(0x02, iobase+TMRL); /* x 125 us */
1664 outb(0x00, iobase+TMRH);
1665
1666 /* Start timer */
1667 outb(IRCR1_TMR_EN, iobase+IRCR1);
1668
1669 /* Restore bank register */
1670 outb(bank, iobase+BSR);
1671
1672 return FALSE; /* I'll be back! */
1673 }
1674 }
1675
1676 /*
1677 * Remember the time we received this frame, so we can
1678 * reduce the min turn time a bit since we will know
1679 * how much time we have used for protocol processing
1680 */
1681 do_gettimeofday(&self->stamp);
1682
1683 skb = dev_alloc_skb(len+1);
1684 if (skb == NULL) {
1685 WARNING("%s(), memory squeeze, "
1686 "dropping frame.\n", __FUNCTION__);
1687 self->stats.rx_dropped++;
1688
1689 /* Restore bank register */
1690 outb(bank, iobase+BSR);
1691
1692 return FALSE;
1693 }
1694
1695 /* Make sure IP header gets aligned */
1696 skb_reserve(skb, 1);
1697
1698 /* Copy frame without CRC */
1699 if (self->io.speed < 4000000) {
1700 skb_put(skb, len-2);
1701 memcpy(skb->data, self->rx_buff.data, len-2);
1702 } else {
1703 skb_put(skb, len-4);
1704 memcpy(skb->data, self->rx_buff.data, len-4);
1705 }
1706
1707 /* Move to next frame */
1708 self->rx_buff.data += len;
1709 self->stats.rx_bytes += len;
1710 self->stats.rx_packets++;
1711
1712 skb->dev = self->netdev;
1713 skb->mac.raw = skb->data;
1714 skb->protocol = htons(ETH_P_IRDA);
1715 netif_rx(skb);
1716 }
1717 }
1718 /* Restore bank register */
1719 outb(bank, iobase+BSR);
1720
1721 return TRUE;
1722 }
1723
1724 /*
1725 * Function nsc_ircc_pio_receive (self)
1726 *
1727 * Receive all data in receiver FIFO
1728 *
1729 */
nsc_ircc_pio_receive(struct nsc_ircc_cb * self)1730 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self)
1731 {
1732 __u8 byte;
1733 int iobase;
1734
1735 iobase = self->io.fir_base;
1736
1737 /* Receive all characters in Rx FIFO */
1738 do {
1739 byte = inb(iobase+RXD);
1740 async_unwrap_char(self->netdev, &self->stats, &self->rx_buff,
1741 byte);
1742 } while (inb(iobase+LSR) & LSR_RXDA); /* Data available */
1743 }
1744
1745 /*
1746 * Function nsc_ircc_sir_interrupt (self, eir)
1747 *
1748 * Handle SIR interrupt
1749 *
1750 */
nsc_ircc_sir_interrupt(struct nsc_ircc_cb * self,int eir)1751 static void nsc_ircc_sir_interrupt(struct nsc_ircc_cb *self, int eir)
1752 {
1753 int actual;
1754
1755 /* Check if transmit FIFO is low on data */
1756 if (eir & EIR_TXLDL_EV) {
1757 /* Write data left in transmit buffer */
1758 actual = nsc_ircc_pio_write(self->io.fir_base,
1759 self->tx_buff.data,
1760 self->tx_buff.len,
1761 self->io.fifo_size);
1762 self->tx_buff.data += actual;
1763 self->tx_buff.len -= actual;
1764
1765 self->io.direction = IO_XMIT;
1766
1767 /* Check if finished */
1768 if (self->tx_buff.len > 0)
1769 self->ier = IER_TXLDL_IE;
1770 else {
1771
1772 self->stats.tx_packets++;
1773 netif_wake_queue(self->netdev);
1774 self->ier = IER_TXEMP_IE;
1775 }
1776
1777 }
1778 /* Check if transmission has completed */
1779 if (eir & EIR_TXEMP_EV) {
1780 /* Check if we need to change the speed? */
1781 if (self->new_speed) {
1782 IRDA_DEBUG(2, "%s(), Changing speed!\n", __FUNCTION__);
1783 nsc_ircc_change_speed(self, self->new_speed);
1784 self->new_speed = 0;
1785
1786 /* Check if we are going to FIR */
1787 if (self->io.speed > 115200) {
1788 /* Should wait for status FIFO interrupt */
1789 self->ier = IER_SFIF_IE;
1790
1791 /* No need to do anymore SIR stuff */
1792 return;
1793 }
1794 }
1795 /* Turn around and get ready to receive some data */
1796 self->io.direction = IO_RECV;
1797 self->ier = IER_RXHDL_IE;
1798 }
1799
1800 /* Rx FIFO threshold or timeout */
1801 if (eir & EIR_RXHDL_EV) {
1802 nsc_ircc_pio_receive(self);
1803
1804 /* Keep receiving */
1805 self->ier = IER_RXHDL_IE;
1806 }
1807 }
1808
1809 /*
1810 * Function nsc_ircc_fir_interrupt (self, eir)
1811 *
1812 * Handle MIR/FIR interrupt
1813 *
1814 */
nsc_ircc_fir_interrupt(struct nsc_ircc_cb * self,int iobase,int eir)1815 static void nsc_ircc_fir_interrupt(struct nsc_ircc_cb *self, int iobase,
1816 int eir)
1817 {
1818 __u8 bank;
1819
1820 bank = inb(iobase+BSR);
1821
1822 /* Status FIFO event*/
1823 if (eir & EIR_SFIF_EV) {
1824 /* Check if DMA has finished */
1825 if (nsc_ircc_dma_receive_complete(self, iobase)) {
1826 /* Wait for next status FIFO interrupt */
1827 self->ier = IER_SFIF_IE;
1828 } else {
1829 self->ier = IER_SFIF_IE | IER_TMR_IE;
1830 }
1831 } else if (eir & EIR_TMR_EV) { /* Timer finished */
1832 /* Disable timer */
1833 switch_bank(iobase, BANK4);
1834 outb(0, iobase+IRCR1);
1835
1836 /* Clear timer event */
1837 switch_bank(iobase, BANK0);
1838 outb(ASCR_CTE, iobase+ASCR);
1839
1840 /* Check if this is a Tx timer interrupt */
1841 if (self->io.direction == IO_XMIT) {
1842 nsc_ircc_dma_xmit(self, iobase);
1843
1844 /* Interrupt on DMA */
1845 self->ier = IER_DMA_IE;
1846 } else {
1847 /* Check (again) if DMA has finished */
1848 if (nsc_ircc_dma_receive_complete(self, iobase)) {
1849 self->ier = IER_SFIF_IE;
1850 } else {
1851 self->ier = IER_SFIF_IE | IER_TMR_IE;
1852 }
1853 }
1854 } else if (eir & EIR_DMA_EV) {
1855 /* Finished with all transmissions? */
1856 if (nsc_ircc_dma_xmit_complete(self)) {
1857 /* Check if there are more frames to be transmitted */
1858 if (irda_device_txqueue_empty(self->netdev)) {
1859 /* Prepare for receive */
1860 nsc_ircc_dma_receive(self);
1861
1862 self->ier = IER_SFIF_IE;
1863 }
1864 } else {
1865 /* Not finished yet, so interrupt on DMA again */
1866 self->ier = IER_DMA_IE;
1867 }
1868 }
1869 outb(bank, iobase+BSR);
1870 }
1871
1872 /*
1873 * Function nsc_ircc_interrupt (irq, dev_id, regs)
1874 *
1875 * An interrupt from the chip has arrived. Time to do some work
1876 *
1877 */
nsc_ircc_interrupt(int irq,void * dev_id,struct pt_regs * regs)1878 static void nsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1879 {
1880 struct net_device *dev = (struct net_device *) dev_id;
1881 struct nsc_ircc_cb *self;
1882 __u8 bsr, eir;
1883 int iobase;
1884
1885 if (!dev) {
1886 WARNING("%s: irq %d for unknown device.\n", driver_name, irq);
1887 return;
1888 }
1889 self = (struct nsc_ircc_cb *) dev->priv;
1890
1891 spin_lock(&self->lock);
1892
1893 iobase = self->io.fir_base;
1894
1895 bsr = inb(iobase+BSR); /* Save current bank */
1896
1897 switch_bank(iobase, BANK0);
1898 self->ier = inb(iobase+IER);
1899 eir = inb(iobase+EIR) & self->ier; /* Mask out the interesting ones */
1900
1901 outb(0, iobase+IER); /* Disable interrupts */
1902
1903 if (eir) {
1904 /* Dispatch interrupt handler for the current speed */
1905 if (self->io.speed > 115200)
1906 nsc_ircc_fir_interrupt(self, iobase, eir);
1907 else
1908 nsc_ircc_sir_interrupt(self, eir);
1909 }
1910
1911 outb(self->ier, iobase+IER); /* Restore interrupts */
1912 outb(bsr, iobase+BSR); /* Restore bank register */
1913
1914 spin_unlock(&self->lock);
1915 }
1916
1917 /*
1918 * Function nsc_ircc_is_receiving (self)
1919 *
1920 * Return TRUE is we are currently receiving a frame
1921 *
1922 */
nsc_ircc_is_receiving(struct nsc_ircc_cb * self)1923 static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self)
1924 {
1925 unsigned long flags;
1926 int status = FALSE;
1927 int iobase;
1928 __u8 bank;
1929
1930 ASSERT(self != NULL, return FALSE;);
1931
1932 spin_lock_irqsave(&self->lock, flags);
1933
1934 if (self->io.speed > 115200) {
1935 iobase = self->io.fir_base;
1936
1937 /* Check if rx FIFO is not empty */
1938 bank = inb(iobase+BSR);
1939 switch_bank(iobase, BANK2);
1940 if ((inb(iobase+RXFLV) & 0x3f) != 0) {
1941 /* We are receiving something */
1942 status = TRUE;
1943 }
1944 outb(bank, iobase+BSR);
1945 } else
1946 status = (self->rx_buff.state != OUTSIDE_FRAME);
1947
1948 spin_unlock_irqrestore(&self->lock, flags);
1949
1950 return status;
1951 }
1952
1953 /*
1954 * Function nsc_ircc_net_init (dev)
1955 *
1956 * Initialize network device
1957 *
1958 */
nsc_ircc_net_init(struct net_device * dev)1959 static int nsc_ircc_net_init(struct net_device *dev)
1960 {
1961 IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
1962
1963 /* Setup to be a normal IrDA network device driver */
1964 irda_device_setup(dev);
1965
1966 /* Insert overrides below this line! */
1967
1968 return 0;
1969 }
1970
1971 /*
1972 * Function nsc_ircc_net_open (dev)
1973 *
1974 * Start the device
1975 *
1976 */
nsc_ircc_net_open(struct net_device * dev)1977 static int nsc_ircc_net_open(struct net_device *dev)
1978 {
1979 struct nsc_ircc_cb *self;
1980 int iobase;
1981 char hwname[32];
1982 __u8 bank;
1983
1984 IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
1985
1986 ASSERT(dev != NULL, return -1;);
1987 self = (struct nsc_ircc_cb *) dev->priv;
1988
1989 ASSERT(self != NULL, return 0;);
1990
1991 iobase = self->io.fir_base;
1992
1993 if (request_irq(self->io.irq, nsc_ircc_interrupt, 0, dev->name, dev)) {
1994 WARNING("%s, unable to allocate irq=%d\n", driver_name,
1995 self->io.irq);
1996 return -EAGAIN;
1997 }
1998 /*
1999 * Always allocate the DMA channel after the IRQ, and clean up on
2000 * failure.
2001 */
2002 if (request_dma(self->io.dma, dev->name)) {
2003 WARNING("%s, unable to allocate dma=%d\n", driver_name,
2004 self->io.dma);
2005 free_irq(self->io.irq, dev);
2006 return -EAGAIN;
2007 }
2008
2009 /* Save current bank */
2010 bank = inb(iobase+BSR);
2011
2012 /* turn on interrupts */
2013 switch_bank(iobase, BANK0);
2014 outb(IER_LS_IE | IER_RXHDL_IE, iobase+IER);
2015
2016 /* Restore bank register */
2017 outb(bank, iobase+BSR);
2018
2019 /* Ready to play! */
2020 netif_start_queue(dev);
2021
2022 /* Give self a hardware name */
2023 sprintf(hwname, "NSC-FIR @ 0x%03x", self->io.fir_base);
2024
2025 /*
2026 * Open new IrLAP layer instance, now that everything should be
2027 * initialized properly
2028 */
2029 self->irlap = irlap_open(dev, &self->qos, hwname);
2030
2031 MOD_INC_USE_COUNT;
2032
2033 return 0;
2034 }
2035
2036 /*
2037 * Function nsc_ircc_net_close (dev)
2038 *
2039 * Stop the device
2040 *
2041 */
nsc_ircc_net_close(struct net_device * dev)2042 static int nsc_ircc_net_close(struct net_device *dev)
2043 {
2044 struct nsc_ircc_cb *self;
2045 int iobase;
2046 __u8 bank;
2047
2048 IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
2049
2050 ASSERT(dev != NULL, return -1;);
2051
2052 self = (struct nsc_ircc_cb *) dev->priv;
2053 ASSERT(self != NULL, return 0;);
2054
2055 /* Stop device */
2056 netif_stop_queue(dev);
2057
2058 /* Stop and remove instance of IrLAP */
2059 if (self->irlap)
2060 irlap_close(self->irlap);
2061 self->irlap = NULL;
2062
2063 iobase = self->io.fir_base;
2064
2065 disable_dma(self->io.dma);
2066
2067 /* Save current bank */
2068 bank = inb(iobase+BSR);
2069
2070 /* Disable interrupts */
2071 switch_bank(iobase, BANK0);
2072 outb(0, iobase+IER);
2073
2074 free_irq(self->io.irq, dev);
2075 free_dma(self->io.dma);
2076
2077 /* Restore bank register */
2078 outb(bank, iobase+BSR);
2079
2080 MOD_DEC_USE_COUNT;
2081
2082 return 0;
2083 }
2084
2085 /*
2086 * Function nsc_ircc_net_ioctl (dev, rq, cmd)
2087 *
2088 * Process IOCTL commands for this device
2089 *
2090 */
nsc_ircc_net_ioctl(struct net_device * dev,struct ifreq * rq,int cmd)2091 static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2092 {
2093 struct if_irda_req *irq = (struct if_irda_req *) rq;
2094 struct nsc_ircc_cb *self;
2095 unsigned long flags;
2096 int ret = 0;
2097
2098 ASSERT(dev != NULL, return -1;);
2099
2100 self = dev->priv;
2101
2102 ASSERT(self != NULL, return -1;);
2103
2104 IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, cmd);
2105
2106 /* Disable interrupts & save flags */
2107 save_flags(flags);
2108 cli();
2109
2110 switch (cmd) {
2111 case SIOCSBANDWIDTH: /* Set bandwidth */
2112 if (!capable(CAP_NET_ADMIN)) {
2113 ret = -EPERM;
2114 goto out;
2115 }
2116 nsc_ircc_change_speed(self, irq->ifr_baudrate);
2117 break;
2118 case SIOCSMEDIABUSY: /* Set media busy */
2119 if (!capable(CAP_NET_ADMIN)) {
2120 ret = -EPERM;
2121 goto out;
2122 }
2123 irda_device_set_media_busy(self->netdev, TRUE);
2124 break;
2125 case SIOCGRECEIVING: /* Check if we are receiving right now */
2126 irq->ifr_receiving = nsc_ircc_is_receiving(self);
2127 break;
2128 default:
2129 ret = -EOPNOTSUPP;
2130 }
2131 out:
2132 restore_flags(flags);
2133 return ret;
2134 }
2135
nsc_ircc_net_get_stats(struct net_device * dev)2136 static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev)
2137 {
2138 struct nsc_ircc_cb *self = (struct nsc_ircc_cb *) dev->priv;
2139
2140 return &self->stats;
2141 }
2142
nsc_ircc_suspend(struct nsc_ircc_cb * self)2143 static void nsc_ircc_suspend(struct nsc_ircc_cb *self)
2144 {
2145 MESSAGE("%s, Suspending\n", driver_name);
2146
2147 if (self->io.suspended)
2148 return;
2149
2150 nsc_ircc_net_close(self->netdev);
2151
2152 self->io.suspended = 1;
2153 }
2154
nsc_ircc_wakeup(struct nsc_ircc_cb * self)2155 static void nsc_ircc_wakeup(struct nsc_ircc_cb *self)
2156 {
2157 if (!self->io.suspended)
2158 return;
2159
2160 nsc_ircc_setup(&self->io);
2161 nsc_ircc_net_open(self->netdev);
2162
2163 MESSAGE("%s, Waking up\n", driver_name);
2164
2165 self->io.suspended = 0;
2166 }
2167
nsc_ircc_pmproc(struct pm_dev * dev,pm_request_t rqst,void * data)2168 static int nsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data)
2169 {
2170 struct nsc_ircc_cb *self = (struct nsc_ircc_cb*) dev->data;
2171 if (self) {
2172 switch (rqst) {
2173 case PM_SUSPEND:
2174 nsc_ircc_suspend(self);
2175 break;
2176 case PM_RESUME:
2177 nsc_ircc_wakeup(self);
2178 break;
2179 }
2180 }
2181 return 0;
2182 }
2183
2184 #ifdef MODULE
2185 MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>");
2186 MODULE_DESCRIPTION("NSC IrDA Device Driver");
2187 MODULE_LICENSE("GPL");
2188
2189
2190 MODULE_PARM(qos_mtt_bits, "i");
2191 MODULE_PARM_DESC(qos_mtt_bits, "Minimum Turn Time");
2192 MODULE_PARM(io, "1-4i");
2193 MODULE_PARM_DESC(io, "Base I/O addresses");
2194 MODULE_PARM(irq, "1-4i");
2195 MODULE_PARM_DESC(irq, "IRQ lines");
2196 MODULE_PARM(dma, "1-4i");
2197 MODULE_PARM_DESC(dma, "DMA channels");
2198 MODULE_PARM(dongle_id, "i");
2199 MODULE_PARM_DESC(dongle_id, "Type-id of used dongle");
2200
init_module(void)2201 int init_module(void)
2202 {
2203 return nsc_ircc_init();
2204 }
2205
cleanup_module(void)2206 void cleanup_module(void)
2207 {
2208 nsc_ircc_cleanup();
2209 }
2210 #endif /* MODULE */
2211
2212