1 /*
2 * arch/arm/mach-ns9xxx/time-ns9360.c
3 *
4 * Copyright (C) 2006,2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11 #include <linux/jiffies.h>
12 #include <linux/interrupt.h>
13 #include <linux/irq.h>
14 #include <linux/stringify.h>
15 #include <linux/clocksource.h>
16 #include <linux/clockchips.h>
17
18 #include <mach/processor-ns9360.h>
19 #include <mach/regs-sys-ns9360.h>
20 #include <mach/irqs.h>
21 #include <mach/system.h>
22 #include "generic.h"
23
24 #define TIMER_CLOCKSOURCE 0
25 #define TIMER_CLOCKEVENT 1
26 static u32 latch;
27
ns9360_clocksource_read(struct clocksource * cs)28 static cycle_t ns9360_clocksource_read(struct clocksource *cs)
29 {
30 return __raw_readl(SYS_TR(TIMER_CLOCKSOURCE));
31 }
32
33 static struct clocksource ns9360_clocksource = {
34 .name = "ns9360-timer" __stringify(TIMER_CLOCKSOURCE),
35 .rating = 300,
36 .read = ns9360_clocksource_read,
37 .mask = CLOCKSOURCE_MASK(32),
38 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
39 };
40
ns9360_clockevent_setmode(enum clock_event_mode mode,struct clock_event_device * clk)41 static void ns9360_clockevent_setmode(enum clock_event_mode mode,
42 struct clock_event_device *clk)
43 {
44 u32 tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT));
45
46 switch (mode) {
47 case CLOCK_EVT_MODE_PERIODIC:
48 __raw_writel(latch, SYS_TRC(TIMER_CLOCKEVENT));
49 REGSET(tc, SYS_TCx, REN, EN);
50 REGSET(tc, SYS_TCx, INTS, EN);
51 REGSET(tc, SYS_TCx, TEN, EN);
52 break;
53
54 case CLOCK_EVT_MODE_ONESHOT:
55 REGSET(tc, SYS_TCx, REN, DIS);
56 REGSET(tc, SYS_TCx, INTS, EN);
57
58 /* fall through */
59
60 case CLOCK_EVT_MODE_UNUSED:
61 case CLOCK_EVT_MODE_SHUTDOWN:
62 case CLOCK_EVT_MODE_RESUME:
63 default:
64 REGSET(tc, SYS_TCx, TEN, DIS);
65 break;
66 }
67
68 __raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
69 }
70
ns9360_clockevent_setnextevent(unsigned long evt,struct clock_event_device * clk)71 static int ns9360_clockevent_setnextevent(unsigned long evt,
72 struct clock_event_device *clk)
73 {
74 u32 tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT));
75
76 if (REGGET(tc, SYS_TCx, TEN)) {
77 REGSET(tc, SYS_TCx, TEN, DIS);
78 __raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
79 }
80
81 REGSET(tc, SYS_TCx, TEN, EN);
82
83 __raw_writel(evt, SYS_TRC(TIMER_CLOCKEVENT));
84
85 __raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
86
87 return 0;
88 }
89
90 static struct clock_event_device ns9360_clockevent_device = {
91 .name = "ns9360-timer" __stringify(TIMER_CLOCKEVENT),
92 .shift = 20,
93 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
94 .set_mode = ns9360_clockevent_setmode,
95 .set_next_event = ns9360_clockevent_setnextevent,
96 };
97
ns9360_clockevent_handler(int irq,void * dev_id)98 static irqreturn_t ns9360_clockevent_handler(int irq, void *dev_id)
99 {
100 int timerno = irq - IRQ_NS9360_TIMER0;
101 u32 tc;
102
103 struct clock_event_device *evt = &ns9360_clockevent_device;
104
105 /* clear irq */
106 tc = __raw_readl(SYS_TC(timerno));
107 if (REGGET(tc, SYS_TCx, REN) == SYS_TCx_REN_DIS) {
108 REGSET(tc, SYS_TCx, TEN, DIS);
109 __raw_writel(tc, SYS_TC(timerno));
110 }
111 REGSET(tc, SYS_TCx, INTC, SET);
112 __raw_writel(tc, SYS_TC(timerno));
113 REGSET(tc, SYS_TCx, INTC, UNSET);
114 __raw_writel(tc, SYS_TC(timerno));
115
116 evt->event_handler(evt);
117
118 return IRQ_HANDLED;
119 }
120
121 static struct irqaction ns9360_clockevent_action = {
122 .name = "ns9360-timer" __stringify(TIMER_CLOCKEVENT),
123 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
124 .handler = ns9360_clockevent_handler,
125 };
126
ns9360_timer_init(void)127 static void __init ns9360_timer_init(void)
128 {
129 int tc;
130
131 tc = __raw_readl(SYS_TC(TIMER_CLOCKSOURCE));
132 if (REGGET(tc, SYS_TCx, TEN)) {
133 REGSET(tc, SYS_TCx, TEN, DIS);
134 __raw_writel(tc, SYS_TC(TIMER_CLOCKSOURCE));
135 }
136
137 __raw_writel(0, SYS_TRC(TIMER_CLOCKSOURCE));
138
139 REGSET(tc, SYS_TCx, TEN, EN);
140 REGSET(tc, SYS_TCx, TDBG, STOP);
141 REGSET(tc, SYS_TCx, TLCS, CPU);
142 REGSET(tc, SYS_TCx, TM, IEE);
143 REGSET(tc, SYS_TCx, INTS, DIS);
144 REGSET(tc, SYS_TCx, UDS, UP);
145 REGSET(tc, SYS_TCx, TSZ, 32);
146 REGSET(tc, SYS_TCx, REN, EN);
147
148 __raw_writel(tc, SYS_TC(TIMER_CLOCKSOURCE));
149
150 clocksource_register_hz(&ns9360_clocksource, ns9360_cpuclock());
151
152 latch = SH_DIV(ns9360_cpuclock(), HZ, 0);
153
154 tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT));
155 REGSET(tc, SYS_TCx, TEN, DIS);
156 REGSET(tc, SYS_TCx, TDBG, STOP);
157 REGSET(tc, SYS_TCx, TLCS, CPU);
158 REGSET(tc, SYS_TCx, TM, IEE);
159 REGSET(tc, SYS_TCx, INTS, DIS);
160 REGSET(tc, SYS_TCx, UDS, DOWN);
161 REGSET(tc, SYS_TCx, TSZ, 32);
162 REGSET(tc, SYS_TCx, REN, EN);
163 __raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
164
165 ns9360_clockevent_device.mult = div_sc(ns9360_cpuclock(),
166 NSEC_PER_SEC, ns9360_clockevent_device.shift);
167 ns9360_clockevent_device.max_delta_ns =
168 clockevent_delta2ns(-1, &ns9360_clockevent_device);
169 ns9360_clockevent_device.min_delta_ns =
170 clockevent_delta2ns(1, &ns9360_clockevent_device);
171
172 ns9360_clockevent_device.cpumask = cpumask_of(0);
173 clockevents_register_device(&ns9360_clockevent_device);
174
175 setup_irq(IRQ_NS9360_TIMER0 + TIMER_CLOCKEVENT,
176 &ns9360_clockevent_action);
177 }
178
179 struct sys_timer ns9360_timer = {
180 .init = ns9360_timer_init,
181 };
182