1 /*
2 * Copyright 2005 Stephane Marchesin.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 */
24
25 #include <linux/console.h>
26 #include <linux/module.h>
27
28 #include "drmP.h"
29 #include "drm.h"
30 #include "drm_crtc_helper.h"
31 #include "nouveau_drv.h"
32 #include "nouveau_hw.h"
33 #include "nouveau_fb.h"
34 #include "nouveau_fbcon.h"
35 #include "nouveau_pm.h"
36 #include "nv50_display.h"
37
38 #include "drm_pciids.h"
39
40 MODULE_PARM_DESC(agpmode, "AGP mode (0 to disable AGP)");
41 int nouveau_agpmode = -1;
42 module_param_named(agpmode, nouveau_agpmode, int, 0400);
43
44 MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
45 int nouveau_modeset = -1;
46 module_param_named(modeset, nouveau_modeset, int, 0400);
47
48 MODULE_PARM_DESC(vbios, "Override default VBIOS location");
49 char *nouveau_vbios;
50 module_param_named(vbios, nouveau_vbios, charp, 0400);
51
52 MODULE_PARM_DESC(vram_pushbuf, "Force DMA push buffers to be in VRAM");
53 int nouveau_vram_pushbuf;
54 module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
55
56 MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
57 int nouveau_vram_notify = 0;
58 module_param_named(vram_notify, nouveau_vram_notify, int, 0400);
59
60 MODULE_PARM_DESC(vram_type, "Override detected VRAM type");
61 char *nouveau_vram_type;
62 module_param_named(vram_type, nouveau_vram_type, charp, 0400);
63
64 MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
65 int nouveau_duallink = 1;
66 module_param_named(duallink, nouveau_duallink, int, 0400);
67
68 MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
69 int nouveau_uscript_lvds = -1;
70 module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);
71
72 MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
73 int nouveau_uscript_tmds = -1;
74 module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);
75
76 MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
77 int nouveau_ignorelid = 0;
78 module_param_named(ignorelid, nouveau_ignorelid, int, 0400);
79
80 MODULE_PARM_DESC(noaccel, "Disable all acceleration");
81 int nouveau_noaccel = -1;
82 module_param_named(noaccel, nouveau_noaccel, int, 0400);
83
84 MODULE_PARM_DESC(nofbaccel, "Disable fbcon acceleration");
85 int nouveau_nofbaccel = 0;
86 module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);
87
88 MODULE_PARM_DESC(force_post, "Force POST");
89 int nouveau_force_post = 0;
90 module_param_named(force_post, nouveau_force_post, int, 0400);
91
92 MODULE_PARM_DESC(override_conntype, "Ignore DCB connector type");
93 int nouveau_override_conntype = 0;
94 module_param_named(override_conntype, nouveau_override_conntype, int, 0400);
95
96 MODULE_PARM_DESC(tv_disable, "Disable TV-out detection");
97 int nouveau_tv_disable = 0;
98 module_param_named(tv_disable, nouveau_tv_disable, int, 0400);
99
100 MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
101 "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
102 "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
103 "\t\tDefault: PAL\n"
104 "\t\t*NOTE* Ignored for cards with external TV encoders.");
105 char *nouveau_tv_norm;
106 module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);
107
108 MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
109 "\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
110 "\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
111 "\t\t0x100 vgaattr, 0x200 EVO (G80+)");
112 int nouveau_reg_debug;
113 module_param_named(reg_debug, nouveau_reg_debug, int, 0600);
114
115 MODULE_PARM_DESC(perflvl, "Performance level (default: boot)");
116 char *nouveau_perflvl;
117 module_param_named(perflvl, nouveau_perflvl, charp, 0400);
118
119 MODULE_PARM_DESC(perflvl_wr, "Allow perflvl changes (warning: dangerous!)");
120 int nouveau_perflvl_wr;
121 module_param_named(perflvl_wr, nouveau_perflvl_wr, int, 0400);
122
123 MODULE_PARM_DESC(msi, "Enable MSI (default: off)");
124 int nouveau_msi;
125 module_param_named(msi, nouveau_msi, int, 0400);
126
127 MODULE_PARM_DESC(ctxfw, "Use external HUB/GPC ucode (fermi)");
128 int nouveau_ctxfw;
129 module_param_named(ctxfw, nouveau_ctxfw, int, 0400);
130
131 MODULE_PARM_DESC(mxmdcb, "Santise DCB table according to MXM-SIS");
132 int nouveau_mxmdcb = 1;
133 module_param_named(mxmdcb, nouveau_mxmdcb, int, 0400);
134
135 int nouveau_fbpercrtc;
136 #if 0
137 module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
138 #endif
139
140 static struct pci_device_id pciidlist[] = {
141 {
142 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
143 .class = PCI_BASE_CLASS_DISPLAY << 16,
144 .class_mask = 0xff << 16,
145 },
146 {
147 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
148 .class = PCI_BASE_CLASS_DISPLAY << 16,
149 .class_mask = 0xff << 16,
150 },
151 {}
152 };
153
154 MODULE_DEVICE_TABLE(pci, pciidlist);
155
156 static struct drm_driver driver;
157
158 static int __devinit
nouveau_pci_probe(struct pci_dev * pdev,const struct pci_device_id * ent)159 nouveau_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
160 {
161 return drm_get_pci_dev(pdev, ent, &driver);
162 }
163
164 static void
nouveau_pci_remove(struct pci_dev * pdev)165 nouveau_pci_remove(struct pci_dev *pdev)
166 {
167 struct drm_device *dev = pci_get_drvdata(pdev);
168
169 drm_put_dev(dev);
170 }
171
172 int
nouveau_pci_suspend(struct pci_dev * pdev,pm_message_t pm_state)173 nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
174 {
175 struct drm_device *dev = pci_get_drvdata(pdev);
176 struct drm_nouveau_private *dev_priv = dev->dev_private;
177 struct nouveau_instmem_engine *pinstmem = &dev_priv->engine.instmem;
178 struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
179 struct nouveau_channel *chan;
180 struct drm_crtc *crtc;
181 int ret, i, e;
182
183 if (pm_state.event == PM_EVENT_PRETHAW)
184 return 0;
185
186 if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
187 return 0;
188
189 if (dev->mode_config.num_crtc) {
190 NV_INFO(dev, "Disabling display...\n");
191 nouveau_display_fini(dev);
192
193 NV_INFO(dev, "Disabling fbcon...\n");
194 nouveau_fbcon_set_suspend(dev, 1);
195 }
196
197 NV_INFO(dev, "Unpinning framebuffer(s)...\n");
198 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
199 struct nouveau_framebuffer *nouveau_fb;
200
201 nouveau_fb = nouveau_framebuffer(crtc->fb);
202 if (!nouveau_fb || !nouveau_fb->nvbo)
203 continue;
204
205 nouveau_bo_unpin(nouveau_fb->nvbo);
206 }
207
208 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
209 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
210
211 nouveau_bo_unmap(nv_crtc->cursor.nvbo);
212 nouveau_bo_unpin(nv_crtc->cursor.nvbo);
213 }
214
215 NV_INFO(dev, "Evicting buffers...\n");
216 ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
217
218 NV_INFO(dev, "Idling channels...\n");
219 for (i = 0; i < pfifo->channels; i++) {
220 chan = dev_priv->channels.ptr[i];
221
222 if (chan && chan->pushbuf_bo)
223 nouveau_channel_idle(chan);
224 }
225
226 pfifo->reassign(dev, false);
227 pfifo->disable(dev);
228 pfifo->unload_context(dev);
229
230 for (e = NVOBJ_ENGINE_NR - 1; e >= 0; e--) {
231 if (!dev_priv->eng[e])
232 continue;
233
234 ret = dev_priv->eng[e]->fini(dev, e, true);
235 if (ret) {
236 NV_ERROR(dev, "... engine %d failed: %d\n", e, ret);
237 goto out_abort;
238 }
239 }
240
241 ret = pinstmem->suspend(dev);
242 if (ret) {
243 NV_ERROR(dev, "... failed: %d\n", ret);
244 goto out_abort;
245 }
246
247 NV_INFO(dev, "Suspending GPU objects...\n");
248 ret = nouveau_gpuobj_suspend(dev);
249 if (ret) {
250 NV_ERROR(dev, "... failed: %d\n", ret);
251 pinstmem->resume(dev);
252 goto out_abort;
253 }
254
255 NV_INFO(dev, "And we're gone!\n");
256 pci_save_state(pdev);
257 if (pm_state.event == PM_EVENT_SUSPEND) {
258 pci_disable_device(pdev);
259 pci_set_power_state(pdev, PCI_D3hot);
260 }
261
262 return 0;
263
264 out_abort:
265 NV_INFO(dev, "Re-enabling acceleration..\n");
266 for (e = e + 1; e < NVOBJ_ENGINE_NR; e++) {
267 if (dev_priv->eng[e])
268 dev_priv->eng[e]->init(dev, e);
269 }
270 pfifo->enable(dev);
271 pfifo->reassign(dev, true);
272 return ret;
273 }
274
275 int
nouveau_pci_resume(struct pci_dev * pdev)276 nouveau_pci_resume(struct pci_dev *pdev)
277 {
278 struct drm_device *dev = pci_get_drvdata(pdev);
279 struct drm_nouveau_private *dev_priv = dev->dev_private;
280 struct nouveau_engine *engine = &dev_priv->engine;
281 struct drm_crtc *crtc;
282 int ret, i;
283
284 if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
285 return 0;
286
287 NV_INFO(dev, "We're back, enabling device...\n");
288 pci_set_power_state(pdev, PCI_D0);
289 pci_restore_state(pdev);
290 if (pci_enable_device(pdev))
291 return -1;
292 pci_set_master(dev->pdev);
293
294 /* Make sure the AGP controller is in a consistent state */
295 if (dev_priv->gart_info.type == NOUVEAU_GART_AGP)
296 nouveau_mem_reset_agp(dev);
297
298 /* Make the CRTCs accessible */
299 engine->display.early_init(dev);
300
301 NV_INFO(dev, "POSTing device...\n");
302 ret = nouveau_run_vbios_init(dev);
303 if (ret)
304 return ret;
305
306 if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
307 ret = nouveau_mem_init_agp(dev);
308 if (ret) {
309 NV_ERROR(dev, "error reinitialising AGP: %d\n", ret);
310 return ret;
311 }
312 }
313
314 NV_INFO(dev, "Restoring GPU objects...\n");
315 nouveau_gpuobj_resume(dev);
316
317 NV_INFO(dev, "Reinitialising engines...\n");
318 engine->instmem.resume(dev);
319 engine->mc.init(dev);
320 engine->timer.init(dev);
321 engine->fb.init(dev);
322 for (i = 0; i < NVOBJ_ENGINE_NR; i++) {
323 if (dev_priv->eng[i])
324 dev_priv->eng[i]->init(dev, i);
325 }
326 engine->fifo.init(dev);
327
328 nouveau_irq_postinstall(dev);
329
330 /* Re-write SKIPS, they'll have been lost over the suspend */
331 if (nouveau_vram_pushbuf) {
332 struct nouveau_channel *chan;
333 int j;
334
335 for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
336 chan = dev_priv->channels.ptr[i];
337 if (!chan || !chan->pushbuf_bo)
338 continue;
339
340 for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
341 nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
342 }
343 }
344
345 nouveau_pm_resume(dev);
346
347 NV_INFO(dev, "Restoring mode...\n");
348 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
349 struct nouveau_framebuffer *nouveau_fb;
350
351 nouveau_fb = nouveau_framebuffer(crtc->fb);
352 if (!nouveau_fb || !nouveau_fb->nvbo)
353 continue;
354
355 nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
356 }
357
358 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
359 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
360
361 ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
362 if (!ret)
363 ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
364 if (ret)
365 NV_ERROR(dev, "Could not pin/map cursor.\n");
366 }
367
368 if (dev->mode_config.num_crtc) {
369 nouveau_fbcon_set_suspend(dev, 0);
370 nouveau_fbcon_zfill_all(dev);
371
372 nouveau_display_init(dev);
373 }
374
375 /* Force CLUT to get re-loaded during modeset */
376 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
377 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
378
379 nv_crtc->lut.depth = 0;
380 }
381
382 drm_helper_resume_force_mode(dev);
383
384 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
385 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
386 u32 offset = nv_crtc->cursor.nvbo->bo.offset;
387
388 nv_crtc->cursor.set_offset(nv_crtc, offset);
389 nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
390 nv_crtc->cursor_saved_y);
391 }
392
393 return 0;
394 }
395
396 static const struct file_operations nouveau_driver_fops = {
397 .owner = THIS_MODULE,
398 .open = drm_open,
399 .release = drm_release,
400 .unlocked_ioctl = drm_ioctl,
401 .mmap = nouveau_ttm_mmap,
402 .poll = drm_poll,
403 .fasync = drm_fasync,
404 .read = drm_read,
405 #if defined(CONFIG_COMPAT)
406 .compat_ioctl = nouveau_compat_ioctl,
407 #endif
408 .llseek = noop_llseek,
409 };
410
411 static struct drm_driver driver = {
412 .driver_features =
413 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
414 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
415 DRIVER_MODESET,
416 .load = nouveau_load,
417 .firstopen = nouveau_firstopen,
418 .lastclose = nouveau_lastclose,
419 .unload = nouveau_unload,
420 .open = nouveau_open,
421 .preclose = nouveau_preclose,
422 .postclose = nouveau_postclose,
423 #if defined(CONFIG_DRM_NOUVEAU_DEBUG)
424 .debugfs_init = nouveau_debugfs_init,
425 .debugfs_cleanup = nouveau_debugfs_takedown,
426 #endif
427 .irq_preinstall = nouveau_irq_preinstall,
428 .irq_postinstall = nouveau_irq_postinstall,
429 .irq_uninstall = nouveau_irq_uninstall,
430 .irq_handler = nouveau_irq_handler,
431 .get_vblank_counter = drm_vblank_count,
432 .enable_vblank = nouveau_vblank_enable,
433 .disable_vblank = nouveau_vblank_disable,
434 .reclaim_buffers = drm_core_reclaim_buffers,
435 .ioctls = nouveau_ioctls,
436 .fops = &nouveau_driver_fops,
437 .gem_init_object = nouveau_gem_object_new,
438 .gem_free_object = nouveau_gem_object_del,
439 .gem_open_object = nouveau_gem_object_open,
440 .gem_close_object = nouveau_gem_object_close,
441
442 .dumb_create = nouveau_display_dumb_create,
443 .dumb_map_offset = nouveau_display_dumb_map_offset,
444 .dumb_destroy = nouveau_display_dumb_destroy,
445
446 .name = DRIVER_NAME,
447 .desc = DRIVER_DESC,
448 #ifdef GIT_REVISION
449 .date = GIT_REVISION,
450 #else
451 .date = DRIVER_DATE,
452 #endif
453 .major = DRIVER_MAJOR,
454 .minor = DRIVER_MINOR,
455 .patchlevel = DRIVER_PATCHLEVEL,
456 };
457
458 static struct pci_driver nouveau_pci_driver = {
459 .name = DRIVER_NAME,
460 .id_table = pciidlist,
461 .probe = nouveau_pci_probe,
462 .remove = nouveau_pci_remove,
463 .suspend = nouveau_pci_suspend,
464 .resume = nouveau_pci_resume
465 };
466
nouveau_init(void)467 static int __init nouveau_init(void)
468 {
469 driver.num_ioctls = nouveau_max_ioctl;
470
471 if (nouveau_modeset == -1) {
472 #ifdef CONFIG_VGA_CONSOLE
473 if (vgacon_text_force())
474 nouveau_modeset = 0;
475 #endif
476 }
477
478 if (!nouveau_modeset)
479 return 0;
480
481 nouveau_register_dsm_handler();
482 return drm_pci_init(&driver, &nouveau_pci_driver);
483 }
484
nouveau_exit(void)485 static void __exit nouveau_exit(void)
486 {
487 if (!nouveau_modeset)
488 return;
489
490 drm_pci_exit(&driver, &nouveau_pci_driver);
491 nouveau_unregister_dsm_handler();
492 }
493
494 module_init(nouveau_init);
495 module_exit(nouveau_exit);
496
497 MODULE_AUTHOR(DRIVER_AUTHOR);
498 MODULE_DESCRIPTION(DRIVER_DESC);
499 MODULE_LICENSE("GPL and additional rights");
500