1 /*
2  * Copyright 2005 Stephane Marchesin.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  */
24 
25 #include <linux/console.h>
26 
27 #include "drmP.h"
28 #include "drm.h"
29 #include "drm_crtc_helper.h"
30 #include "nouveau_drv.h"
31 #include "nouveau_hw.h"
32 #include "nouveau_fb.h"
33 #include "nouveau_fbcon.h"
34 #include "nouveau_pm.h"
35 #include "nv50_display.h"
36 
37 #include "drm_pciids.h"
38 
39 MODULE_PARM_DESC(agpmode, "AGP mode (0 to disable AGP)");
40 int nouveau_agpmode = -1;
41 module_param_named(agpmode, nouveau_agpmode, int, 0400);
42 
43 MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
44 static int nouveau_modeset = -1; /* kms */
45 module_param_named(modeset, nouveau_modeset, int, 0400);
46 
47 MODULE_PARM_DESC(vbios, "Override default VBIOS location");
48 char *nouveau_vbios;
49 module_param_named(vbios, nouveau_vbios, charp, 0400);
50 
51 MODULE_PARM_DESC(vram_pushbuf, "Force DMA push buffers to be in VRAM");
52 int nouveau_vram_pushbuf;
53 module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
54 
55 MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
56 int nouveau_vram_notify = 0;
57 module_param_named(vram_notify, nouveau_vram_notify, int, 0400);
58 
59 MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
60 int nouveau_duallink = 1;
61 module_param_named(duallink, nouveau_duallink, int, 0400);
62 
63 MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
64 int nouveau_uscript_lvds = -1;
65 module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);
66 
67 MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
68 int nouveau_uscript_tmds = -1;
69 module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);
70 
71 MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
72 int nouveau_ignorelid = 0;
73 module_param_named(ignorelid, nouveau_ignorelid, int, 0400);
74 
75 MODULE_PARM_DESC(noaccel, "Disable all acceleration");
76 int nouveau_noaccel = 0;
77 module_param_named(noaccel, nouveau_noaccel, int, 0400);
78 
79 MODULE_PARM_DESC(nofbaccel, "Disable fbcon acceleration");
80 int nouveau_nofbaccel = 0;
81 module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);
82 
83 MODULE_PARM_DESC(force_post, "Force POST");
84 int nouveau_force_post = 0;
85 module_param_named(force_post, nouveau_force_post, int, 0400);
86 
87 MODULE_PARM_DESC(override_conntype, "Ignore DCB connector type");
88 int nouveau_override_conntype = 0;
89 module_param_named(override_conntype, nouveau_override_conntype, int, 0400);
90 
91 MODULE_PARM_DESC(tv_disable, "Disable TV-out detection\n");
92 int nouveau_tv_disable = 0;
93 module_param_named(tv_disable, nouveau_tv_disable, int, 0400);
94 
95 MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
96 		 "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
97 		 "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
98 		 "\t\tDefault: PAL\n"
99 		 "\t\t*NOTE* Ignored for cards with external TV encoders.");
100 char *nouveau_tv_norm;
101 module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);
102 
103 MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
104 		"\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
105 		"\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
106 		"\t\t0x100 vgaattr, 0x200 EVO (G80+). ");
107 int nouveau_reg_debug;
108 module_param_named(reg_debug, nouveau_reg_debug, int, 0600);
109 
110 MODULE_PARM_DESC(perflvl, "Performance level (default: boot)\n");
111 char *nouveau_perflvl;
112 module_param_named(perflvl, nouveau_perflvl, charp, 0400);
113 
114 MODULE_PARM_DESC(perflvl_wr, "Allow perflvl changes (warning: dangerous!)\n");
115 int nouveau_perflvl_wr;
116 module_param_named(perflvl_wr, nouveau_perflvl_wr, int, 0400);
117 
118 MODULE_PARM_DESC(msi, "Enable MSI (default: off)\n");
119 int nouveau_msi;
120 module_param_named(msi, nouveau_msi, int, 0400);
121 
122 int nouveau_fbpercrtc;
123 #if 0
124 module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
125 #endif
126 
127 static struct pci_device_id pciidlist[] = {
128 	{
129 		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
130 		.class = PCI_BASE_CLASS_DISPLAY << 16,
131 		.class_mask  = 0xff << 16,
132 	},
133 	{
134 		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
135 		.class = PCI_BASE_CLASS_DISPLAY << 16,
136 		.class_mask  = 0xff << 16,
137 	},
138 	{}
139 };
140 
141 MODULE_DEVICE_TABLE(pci, pciidlist);
142 
143 static struct drm_driver driver;
144 
145 static int __devinit
nouveau_pci_probe(struct pci_dev * pdev,const struct pci_device_id * ent)146 nouveau_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
147 {
148 	return drm_get_pci_dev(pdev, ent, &driver);
149 }
150 
151 static void
nouveau_pci_remove(struct pci_dev * pdev)152 nouveau_pci_remove(struct pci_dev *pdev)
153 {
154 	struct drm_device *dev = pci_get_drvdata(pdev);
155 
156 	drm_put_dev(dev);
157 }
158 
159 int
nouveau_pci_suspend(struct pci_dev * pdev,pm_message_t pm_state)160 nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
161 {
162 	struct drm_device *dev = pci_get_drvdata(pdev);
163 	struct drm_nouveau_private *dev_priv = dev->dev_private;
164 	struct nouveau_instmem_engine *pinstmem = &dev_priv->engine.instmem;
165 	struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
166 	struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
167 	struct nouveau_channel *chan;
168 	struct drm_crtc *crtc;
169 	int ret, i;
170 
171 	if (pm_state.event == PM_EVENT_PRETHAW)
172 		return 0;
173 
174 	if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
175 		return 0;
176 
177 	NV_INFO(dev, "Disabling fbcon acceleration...\n");
178 	nouveau_fbcon_save_disable_accel(dev);
179 
180 	NV_INFO(dev, "Unpinning framebuffer(s)...\n");
181 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
182 		struct nouveau_framebuffer *nouveau_fb;
183 
184 		nouveau_fb = nouveau_framebuffer(crtc->fb);
185 		if (!nouveau_fb || !nouveau_fb->nvbo)
186 			continue;
187 
188 		nouveau_bo_unpin(nouveau_fb->nvbo);
189 	}
190 
191 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
192 		struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
193 
194 		nouveau_bo_unmap(nv_crtc->cursor.nvbo);
195 		nouveau_bo_unpin(nv_crtc->cursor.nvbo);
196 	}
197 
198 	NV_INFO(dev, "Evicting buffers...\n");
199 	ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
200 
201 	NV_INFO(dev, "Idling channels...\n");
202 	for (i = 0; i < pfifo->channels; i++) {
203 		chan = dev_priv->channels.ptr[i];
204 
205 		if (chan && chan->pushbuf_bo)
206 			nouveau_channel_idle(chan);
207 	}
208 
209 	pgraph->fifo_access(dev, false);
210 	nouveau_wait_for_idle(dev);
211 	pfifo->reassign(dev, false);
212 	pfifo->disable(dev);
213 	pfifo->unload_context(dev);
214 	pgraph->unload_context(dev);
215 
216 	ret = pinstmem->suspend(dev);
217 	if (ret) {
218 		NV_ERROR(dev, "... failed: %d\n", ret);
219 		goto out_abort;
220 	}
221 
222 	NV_INFO(dev, "Suspending GPU objects...\n");
223 	ret = nouveau_gpuobj_suspend(dev);
224 	if (ret) {
225 		NV_ERROR(dev, "... failed: %d\n", ret);
226 		pinstmem->resume(dev);
227 		goto out_abort;
228 	}
229 
230 	NV_INFO(dev, "And we're gone!\n");
231 	pci_save_state(pdev);
232 	if (pm_state.event == PM_EVENT_SUSPEND) {
233 		pci_disable_device(pdev);
234 		pci_set_power_state(pdev, PCI_D3hot);
235 	}
236 
237 	console_lock();
238 	nouveau_fbcon_set_suspend(dev, 1);
239 	console_unlock();
240 	nouveau_fbcon_restore_accel(dev);
241 	return 0;
242 
243 out_abort:
244 	NV_INFO(dev, "Re-enabling acceleration..\n");
245 	pfifo->enable(dev);
246 	pfifo->reassign(dev, true);
247 	pgraph->fifo_access(dev, true);
248 	return ret;
249 }
250 
251 int
nouveau_pci_resume(struct pci_dev * pdev)252 nouveau_pci_resume(struct pci_dev *pdev)
253 {
254 	struct drm_device *dev = pci_get_drvdata(pdev);
255 	struct drm_nouveau_private *dev_priv = dev->dev_private;
256 	struct nouveau_engine *engine = &dev_priv->engine;
257 	struct drm_crtc *crtc;
258 	int ret, i;
259 
260 	if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
261 		return 0;
262 
263 	nouveau_fbcon_save_disable_accel(dev);
264 
265 	NV_INFO(dev, "We're back, enabling device...\n");
266 	pci_set_power_state(pdev, PCI_D0);
267 	pci_restore_state(pdev);
268 	if (pci_enable_device(pdev))
269 		return -1;
270 	pci_set_master(dev->pdev);
271 
272 	/* Make sure the AGP controller is in a consistent state */
273 	if (dev_priv->gart_info.type == NOUVEAU_GART_AGP)
274 		nouveau_mem_reset_agp(dev);
275 
276 	/* Make the CRTCs accessible */
277 	engine->display.early_init(dev);
278 
279 	NV_INFO(dev, "POSTing device...\n");
280 	ret = nouveau_run_vbios_init(dev);
281 	if (ret)
282 		return ret;
283 
284 	nouveau_pm_resume(dev);
285 
286 	if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
287 		ret = nouveau_mem_init_agp(dev);
288 		if (ret) {
289 			NV_ERROR(dev, "error reinitialising AGP: %d\n", ret);
290 			return ret;
291 		}
292 	}
293 
294 	NV_INFO(dev, "Restoring GPU objects...\n");
295 	nouveau_gpuobj_resume(dev);
296 
297 	NV_INFO(dev, "Reinitialising engines...\n");
298 	engine->instmem.resume(dev);
299 	engine->mc.init(dev);
300 	engine->timer.init(dev);
301 	engine->fb.init(dev);
302 	engine->graph.init(dev);
303 	engine->crypt.init(dev);
304 	engine->fifo.init(dev);
305 
306 	nouveau_irq_postinstall(dev);
307 
308 	/* Re-write SKIPS, they'll have been lost over the suspend */
309 	if (nouveau_vram_pushbuf) {
310 		struct nouveau_channel *chan;
311 		int j;
312 
313 		for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
314 			chan = dev_priv->channels.ptr[i];
315 			if (!chan || !chan->pushbuf_bo)
316 				continue;
317 
318 			for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
319 				nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
320 		}
321 	}
322 
323 	NV_INFO(dev, "Restoring mode...\n");
324 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
325 		struct nouveau_framebuffer *nouveau_fb;
326 
327 		nouveau_fb = nouveau_framebuffer(crtc->fb);
328 		if (!nouveau_fb || !nouveau_fb->nvbo)
329 			continue;
330 
331 		nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
332 	}
333 
334 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
335 		struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
336 
337 		ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
338 		if (!ret)
339 			ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
340 		if (ret)
341 			NV_ERROR(dev, "Could not pin/map cursor.\n");
342 	}
343 
344 	engine->display.init(dev);
345 
346 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
347 		struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
348 		u32 offset = nv_crtc->cursor.nvbo->bo.mem.start << PAGE_SHIFT;
349 
350 		nv_crtc->cursor.set_offset(nv_crtc, offset);
351 		nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
352 						 nv_crtc->cursor_saved_y);
353 	}
354 
355 	/* Force CLUT to get re-loaded during modeset */
356 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
357 		struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
358 
359 		nv_crtc->lut.depth = 0;
360 	}
361 
362 	console_lock();
363 	nouveau_fbcon_set_suspend(dev, 0);
364 	console_unlock();
365 
366 	nouveau_fbcon_zfill_all(dev);
367 
368 	drm_helper_resume_force_mode(dev);
369 
370 	nouveau_fbcon_restore_accel(dev);
371 	return 0;
372 }
373 
374 static struct drm_driver driver = {
375 	.driver_features =
376 		DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
377 		DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
378 		DRIVER_MODESET,
379 	.load = nouveau_load,
380 	.firstopen = nouveau_firstopen,
381 	.lastclose = nouveau_lastclose,
382 	.unload = nouveau_unload,
383 	.preclose = nouveau_preclose,
384 #if defined(CONFIG_DRM_NOUVEAU_DEBUG)
385 	.debugfs_init = nouveau_debugfs_init,
386 	.debugfs_cleanup = nouveau_debugfs_takedown,
387 #endif
388 	.irq_preinstall = nouveau_irq_preinstall,
389 	.irq_postinstall = nouveau_irq_postinstall,
390 	.irq_uninstall = nouveau_irq_uninstall,
391 	.irq_handler = nouveau_irq_handler,
392 	.get_vblank_counter = drm_vblank_count,
393 	.enable_vblank = nouveau_vblank_enable,
394 	.disable_vblank = nouveau_vblank_disable,
395 	.reclaim_buffers = drm_core_reclaim_buffers,
396 	.ioctls = nouveau_ioctls,
397 	.fops = {
398 		.owner = THIS_MODULE,
399 		.open = drm_open,
400 		.release = drm_release,
401 		.unlocked_ioctl = drm_ioctl,
402 		.mmap = nouveau_ttm_mmap,
403 		.poll = drm_poll,
404 		.fasync = drm_fasync,
405 		.read = drm_read,
406 #if defined(CONFIG_COMPAT)
407 		.compat_ioctl = nouveau_compat_ioctl,
408 #endif
409 		.llseek = noop_llseek,
410 	},
411 
412 	.gem_init_object = nouveau_gem_object_new,
413 	.gem_free_object = nouveau_gem_object_del,
414 
415 	.name = DRIVER_NAME,
416 	.desc = DRIVER_DESC,
417 #ifdef GIT_REVISION
418 	.date = GIT_REVISION,
419 #else
420 	.date = DRIVER_DATE,
421 #endif
422 	.major = DRIVER_MAJOR,
423 	.minor = DRIVER_MINOR,
424 	.patchlevel = DRIVER_PATCHLEVEL,
425 };
426 
427 static struct pci_driver nouveau_pci_driver = {
428 		.name = DRIVER_NAME,
429 		.id_table = pciidlist,
430 		.probe = nouveau_pci_probe,
431 		.remove = nouveau_pci_remove,
432 		.suspend = nouveau_pci_suspend,
433 		.resume = nouveau_pci_resume
434 };
435 
nouveau_init(void)436 static int __init nouveau_init(void)
437 {
438 	driver.num_ioctls = nouveau_max_ioctl;
439 
440 	if (nouveau_modeset == -1) {
441 #ifdef CONFIG_VGA_CONSOLE
442 		if (vgacon_text_force())
443 			nouveau_modeset = 0;
444 		else
445 #endif
446 			nouveau_modeset = 1;
447 	}
448 
449 	if (!nouveau_modeset)
450 		return 0;
451 
452 	nouveau_register_dsm_handler();
453 	return drm_pci_init(&driver, &nouveau_pci_driver);
454 }
455 
nouveau_exit(void)456 static void __exit nouveau_exit(void)
457 {
458 	if (!nouveau_modeset)
459 		return;
460 
461 	drm_pci_exit(&driver, &nouveau_pci_driver);
462 	nouveau_unregister_dsm_handler();
463 }
464 
465 module_init(nouveau_init);
466 module_exit(nouveau_exit);
467 
468 MODULE_AUTHOR(DRIVER_AUTHOR);
469 MODULE_DESCRIPTION(DRIVER_DESC);
470 MODULE_LICENSE("GPL and additional rights");
471