1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * comedi/drivers/ni_routing/ni_device_routes/pci-6070e.c 4 * List of valid routes for specific NI boards. 5 * 6 * COMEDI - Linux Control and Measurement Device Interface 7 * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 */ 19 20 /* 21 * The contents of this file are generated using the tools in 22 * comedi/drivers/ni_routing/tools 23 * 24 * Please use those tools to help maintain the contents of this file. 25 */ 26 27 #include "../ni_device_routes.h" 28 #include "all.h" 29 30 struct ni_device_routes ni_pci_6070e_device_routes = { 31 .device = "pci-6070e", 32 .routes = (struct ni_route_set[]){ 33 { 34 .dest = NI_PFI(0), 35 .src = (int[]){ 36 NI_AI_StartTrigger, 37 0, /* Termination */ 38 } 39 }, 40 { 41 .dest = NI_PFI(1), 42 .src = (int[]){ 43 NI_AI_ReferenceTrigger, 44 0, /* Termination */ 45 } 46 }, 47 { 48 .dest = NI_PFI(2), 49 .src = (int[]){ 50 NI_AI_ConvertClock, 51 0, /* Termination */ 52 } 53 }, 54 { 55 .dest = NI_PFI(3), 56 .src = (int[]){ 57 NI_CtrSource(1), 58 0, /* Termination */ 59 } 60 }, 61 { 62 .dest = NI_PFI(4), 63 .src = (int[]){ 64 NI_CtrGate(1), 65 0, /* Termination */ 66 } 67 }, 68 { 69 .dest = NI_PFI(5), 70 .src = (int[]){ 71 NI_AO_SampleClock, 72 0, /* Termination */ 73 } 74 }, 75 { 76 .dest = NI_PFI(6), 77 .src = (int[]){ 78 NI_AO_StartTrigger, 79 0, /* Termination */ 80 } 81 }, 82 { 83 .dest = NI_PFI(7), 84 .src = (int[]){ 85 NI_AI_SampleClock, 86 0, /* Termination */ 87 } 88 }, 89 { 90 .dest = NI_PFI(8), 91 .src = (int[]){ 92 NI_CtrSource(0), 93 0, /* Termination */ 94 } 95 }, 96 { 97 .dest = NI_PFI(9), 98 .src = (int[]){ 99 NI_CtrGate(0), 100 0, /* Termination */ 101 } 102 }, 103 { 104 .dest = TRIGGER_LINE(0), 105 .src = (int[]){ 106 NI_CtrSource(0), 107 NI_CtrGate(0), 108 NI_CtrInternalOutput(0), 109 NI_CtrOut(0), 110 NI_AI_SampleClock, 111 NI_AI_StartTrigger, 112 NI_AI_ReferenceTrigger, 113 NI_AI_ConvertClock, 114 NI_AO_SampleClock, 115 NI_AO_StartTrigger, 116 0, /* Termination */ 117 } 118 }, 119 { 120 .dest = TRIGGER_LINE(1), 121 .src = (int[]){ 122 NI_CtrSource(0), 123 NI_CtrGate(0), 124 NI_CtrInternalOutput(0), 125 NI_CtrOut(0), 126 NI_AI_SampleClock, 127 NI_AI_StartTrigger, 128 NI_AI_ReferenceTrigger, 129 NI_AI_ConvertClock, 130 NI_AO_SampleClock, 131 NI_AO_StartTrigger, 132 0, /* Termination */ 133 } 134 }, 135 { 136 .dest = TRIGGER_LINE(2), 137 .src = (int[]){ 138 NI_CtrSource(0), 139 NI_CtrGate(0), 140 NI_CtrInternalOutput(0), 141 NI_CtrOut(0), 142 NI_AI_SampleClock, 143 NI_AI_StartTrigger, 144 NI_AI_ReferenceTrigger, 145 NI_AI_ConvertClock, 146 NI_AO_SampleClock, 147 NI_AO_StartTrigger, 148 0, /* Termination */ 149 } 150 }, 151 { 152 .dest = TRIGGER_LINE(3), 153 .src = (int[]){ 154 NI_CtrSource(0), 155 NI_CtrGate(0), 156 NI_CtrInternalOutput(0), 157 NI_CtrOut(0), 158 NI_AI_SampleClock, 159 NI_AI_StartTrigger, 160 NI_AI_ReferenceTrigger, 161 NI_AI_ConvertClock, 162 NI_AO_SampleClock, 163 NI_AO_StartTrigger, 164 0, /* Termination */ 165 } 166 }, 167 { 168 .dest = TRIGGER_LINE(4), 169 .src = (int[]){ 170 NI_CtrSource(0), 171 NI_CtrGate(0), 172 NI_CtrInternalOutput(0), 173 NI_CtrOut(0), 174 NI_AI_SampleClock, 175 NI_AI_StartTrigger, 176 NI_AI_ReferenceTrigger, 177 NI_AI_ConvertClock, 178 NI_AO_SampleClock, 179 NI_AO_StartTrigger, 180 0, /* Termination */ 181 } 182 }, 183 { 184 .dest = TRIGGER_LINE(5), 185 .src = (int[]){ 186 NI_CtrSource(0), 187 NI_CtrGate(0), 188 NI_CtrInternalOutput(0), 189 NI_CtrOut(0), 190 NI_AI_SampleClock, 191 NI_AI_StartTrigger, 192 NI_AI_ReferenceTrigger, 193 NI_AI_ConvertClock, 194 NI_AO_SampleClock, 195 NI_AO_StartTrigger, 196 0, /* Termination */ 197 } 198 }, 199 { 200 .dest = TRIGGER_LINE(6), 201 .src = (int[]){ 202 NI_CtrSource(0), 203 NI_CtrGate(0), 204 NI_CtrInternalOutput(0), 205 NI_CtrOut(0), 206 NI_AI_SampleClock, 207 NI_AI_StartTrigger, 208 NI_AI_ReferenceTrigger, 209 NI_AI_ConvertClock, 210 NI_AO_SampleClock, 211 NI_AO_StartTrigger, 212 0, /* Termination */ 213 } 214 }, 215 { 216 .dest = TRIGGER_LINE(7), 217 .src = (int[]){ 218 NI_20MHzTimebase, 219 0, /* Termination */ 220 } 221 }, 222 { 223 .dest = NI_CtrSource(0), 224 .src = (int[]){ 225 NI_PFI(0), 226 NI_PFI(1), 227 NI_PFI(2), 228 NI_PFI(3), 229 NI_PFI(4), 230 NI_PFI(5), 231 NI_PFI(6), 232 NI_PFI(7), 233 NI_PFI(8), 234 NI_PFI(9), 235 TRIGGER_LINE(0), 236 TRIGGER_LINE(1), 237 TRIGGER_LINE(2), 238 TRIGGER_LINE(3), 239 TRIGGER_LINE(4), 240 TRIGGER_LINE(5), 241 TRIGGER_LINE(6), 242 TRIGGER_LINE(7), 243 NI_MasterTimebase, 244 NI_20MHzTimebase, 245 NI_100kHzTimebase, 246 NI_AnalogComparisonEvent, 247 0, /* Termination */ 248 } 249 }, 250 { 251 .dest = NI_CtrSource(1), 252 .src = (int[]){ 253 NI_PFI(0), 254 NI_PFI(1), 255 NI_PFI(2), 256 NI_PFI(3), 257 NI_PFI(4), 258 NI_PFI(5), 259 NI_PFI(6), 260 NI_PFI(7), 261 NI_PFI(8), 262 NI_PFI(9), 263 TRIGGER_LINE(0), 264 TRIGGER_LINE(1), 265 TRIGGER_LINE(2), 266 TRIGGER_LINE(3), 267 TRIGGER_LINE(4), 268 TRIGGER_LINE(5), 269 TRIGGER_LINE(6), 270 TRIGGER_LINE(7), 271 NI_MasterTimebase, 272 NI_20MHzTimebase, 273 NI_100kHzTimebase, 274 NI_AnalogComparisonEvent, 275 0, /* Termination */ 276 } 277 }, 278 { 279 .dest = NI_CtrGate(0), 280 .src = (int[]){ 281 NI_PFI(0), 282 NI_PFI(1), 283 NI_PFI(2), 284 NI_PFI(3), 285 NI_PFI(4), 286 NI_PFI(5), 287 NI_PFI(6), 288 NI_PFI(7), 289 NI_PFI(8), 290 NI_PFI(9), 291 TRIGGER_LINE(0), 292 TRIGGER_LINE(1), 293 TRIGGER_LINE(2), 294 TRIGGER_LINE(3), 295 TRIGGER_LINE(4), 296 TRIGGER_LINE(5), 297 TRIGGER_LINE(6), 298 NI_CtrInternalOutput(1), 299 NI_AI_StartTrigger, 300 NI_AI_ReferenceTrigger, 301 NI_AnalogComparisonEvent, 302 0, /* Termination */ 303 } 304 }, 305 { 306 .dest = NI_CtrGate(1), 307 .src = (int[]){ 308 NI_PFI(0), 309 NI_PFI(1), 310 NI_PFI(2), 311 NI_PFI(3), 312 NI_PFI(4), 313 NI_PFI(5), 314 NI_PFI(6), 315 NI_PFI(7), 316 NI_PFI(8), 317 NI_PFI(9), 318 TRIGGER_LINE(0), 319 TRIGGER_LINE(1), 320 TRIGGER_LINE(2), 321 TRIGGER_LINE(3), 322 TRIGGER_LINE(4), 323 TRIGGER_LINE(5), 324 TRIGGER_LINE(6), 325 NI_CtrInternalOutput(0), 326 NI_AI_StartTrigger, 327 NI_AI_ReferenceTrigger, 328 NI_AnalogComparisonEvent, 329 0, /* Termination */ 330 } 331 }, 332 { 333 .dest = NI_CtrOut(0), 334 .src = (int[]){ 335 TRIGGER_LINE(0), 336 TRIGGER_LINE(1), 337 TRIGGER_LINE(2), 338 TRIGGER_LINE(3), 339 TRIGGER_LINE(4), 340 TRIGGER_LINE(5), 341 TRIGGER_LINE(6), 342 NI_CtrInternalOutput(0), 343 0, /* Termination */ 344 } 345 }, 346 { 347 .dest = NI_CtrOut(1), 348 .src = (int[]){ 349 NI_CtrInternalOutput(1), 350 0, /* Termination */ 351 } 352 }, 353 { 354 .dest = NI_AI_SampleClock, 355 .src = (int[]){ 356 NI_PFI(0), 357 NI_PFI(1), 358 NI_PFI(2), 359 NI_PFI(3), 360 NI_PFI(4), 361 NI_PFI(5), 362 NI_PFI(6), 363 NI_PFI(7), 364 NI_PFI(8), 365 NI_PFI(9), 366 TRIGGER_LINE(0), 367 TRIGGER_LINE(1), 368 TRIGGER_LINE(2), 369 TRIGGER_LINE(3), 370 TRIGGER_LINE(4), 371 TRIGGER_LINE(5), 372 TRIGGER_LINE(6), 373 NI_CtrInternalOutput(0), 374 NI_AI_SampleClockTimebase, 375 NI_AnalogComparisonEvent, 376 0, /* Termination */ 377 } 378 }, 379 { 380 .dest = NI_AI_SampleClockTimebase, 381 .src = (int[]){ 382 NI_PFI(0), 383 NI_PFI(1), 384 NI_PFI(2), 385 NI_PFI(3), 386 NI_PFI(4), 387 NI_PFI(5), 388 NI_PFI(6), 389 NI_PFI(7), 390 NI_PFI(8), 391 NI_PFI(9), 392 TRIGGER_LINE(0), 393 TRIGGER_LINE(1), 394 TRIGGER_LINE(2), 395 TRIGGER_LINE(3), 396 TRIGGER_LINE(4), 397 TRIGGER_LINE(5), 398 TRIGGER_LINE(6), 399 TRIGGER_LINE(7), 400 NI_MasterTimebase, 401 NI_20MHzTimebase, 402 NI_100kHzTimebase, 403 NI_AnalogComparisonEvent, 404 0, /* Termination */ 405 } 406 }, 407 { 408 .dest = NI_AI_StartTrigger, 409 .src = (int[]){ 410 NI_PFI(0), 411 NI_PFI(1), 412 NI_PFI(2), 413 NI_PFI(3), 414 NI_PFI(4), 415 NI_PFI(5), 416 NI_PFI(6), 417 NI_PFI(7), 418 NI_PFI(8), 419 NI_PFI(9), 420 TRIGGER_LINE(0), 421 TRIGGER_LINE(1), 422 TRIGGER_LINE(2), 423 TRIGGER_LINE(3), 424 TRIGGER_LINE(4), 425 TRIGGER_LINE(5), 426 TRIGGER_LINE(6), 427 NI_CtrInternalOutput(0), 428 NI_AnalogComparisonEvent, 429 0, /* Termination */ 430 } 431 }, 432 { 433 .dest = NI_AI_ReferenceTrigger, 434 .src = (int[]){ 435 NI_PFI(0), 436 NI_PFI(1), 437 NI_PFI(2), 438 NI_PFI(3), 439 NI_PFI(4), 440 NI_PFI(5), 441 NI_PFI(6), 442 NI_PFI(7), 443 NI_PFI(8), 444 NI_PFI(9), 445 TRIGGER_LINE(0), 446 TRIGGER_LINE(1), 447 TRIGGER_LINE(2), 448 TRIGGER_LINE(3), 449 TRIGGER_LINE(4), 450 TRIGGER_LINE(5), 451 TRIGGER_LINE(6), 452 NI_AnalogComparisonEvent, 453 0, /* Termination */ 454 } 455 }, 456 { 457 .dest = NI_AI_ConvertClock, 458 .src = (int[]){ 459 NI_PFI(0), 460 NI_PFI(1), 461 NI_PFI(2), 462 NI_PFI(3), 463 NI_PFI(4), 464 NI_PFI(5), 465 NI_PFI(6), 466 NI_PFI(7), 467 NI_PFI(8), 468 NI_PFI(9), 469 TRIGGER_LINE(0), 470 TRIGGER_LINE(1), 471 TRIGGER_LINE(2), 472 TRIGGER_LINE(3), 473 TRIGGER_LINE(4), 474 TRIGGER_LINE(5), 475 TRIGGER_LINE(6), 476 NI_CtrInternalOutput(0), 477 NI_AI_ConvertClockTimebase, 478 NI_AnalogComparisonEvent, 479 0, /* Termination */ 480 } 481 }, 482 { 483 .dest = NI_AI_ConvertClockTimebase, 484 .src = (int[]){ 485 TRIGGER_LINE(7), 486 NI_AI_SampleClockTimebase, 487 NI_MasterTimebase, 488 NI_20MHzTimebase, 489 0, /* Termination */ 490 } 491 }, 492 { 493 .dest = NI_AI_PauseTrigger, 494 .src = (int[]){ 495 NI_PFI(0), 496 NI_PFI(1), 497 NI_PFI(2), 498 NI_PFI(3), 499 NI_PFI(4), 500 NI_PFI(5), 501 NI_PFI(6), 502 NI_PFI(7), 503 NI_PFI(8), 504 NI_PFI(9), 505 TRIGGER_LINE(0), 506 TRIGGER_LINE(1), 507 TRIGGER_LINE(2), 508 TRIGGER_LINE(3), 509 TRIGGER_LINE(4), 510 TRIGGER_LINE(5), 511 TRIGGER_LINE(6), 512 NI_AnalogComparisonEvent, 513 0, /* Termination */ 514 } 515 }, 516 { 517 .dest = NI_AI_HoldComplete, 518 .src = (int[]){ 519 NI_AI_HoldCompleteEvent, 520 0, /* Termination */ 521 } 522 }, 523 { 524 .dest = NI_AO_SampleClock, 525 .src = (int[]){ 526 NI_PFI(0), 527 NI_PFI(1), 528 NI_PFI(2), 529 NI_PFI(3), 530 NI_PFI(4), 531 NI_PFI(5), 532 NI_PFI(6), 533 NI_PFI(7), 534 NI_PFI(8), 535 NI_PFI(9), 536 TRIGGER_LINE(0), 537 TRIGGER_LINE(1), 538 TRIGGER_LINE(2), 539 TRIGGER_LINE(3), 540 TRIGGER_LINE(4), 541 TRIGGER_LINE(5), 542 TRIGGER_LINE(6), 543 NI_CtrInternalOutput(1), 544 NI_AO_SampleClockTimebase, 545 NI_AnalogComparisonEvent, 546 0, /* Termination */ 547 } 548 }, 549 { 550 .dest = NI_AO_SampleClockTimebase, 551 .src = (int[]){ 552 NI_PFI(0), 553 NI_PFI(1), 554 NI_PFI(2), 555 NI_PFI(3), 556 NI_PFI(4), 557 NI_PFI(5), 558 NI_PFI(6), 559 NI_PFI(7), 560 NI_PFI(8), 561 NI_PFI(9), 562 TRIGGER_LINE(0), 563 TRIGGER_LINE(1), 564 TRIGGER_LINE(2), 565 TRIGGER_LINE(3), 566 TRIGGER_LINE(4), 567 TRIGGER_LINE(5), 568 TRIGGER_LINE(6), 569 TRIGGER_LINE(7), 570 NI_MasterTimebase, 571 NI_20MHzTimebase, 572 NI_100kHzTimebase, 573 NI_AnalogComparisonEvent, 574 0, /* Termination */ 575 } 576 }, 577 { 578 .dest = NI_AO_StartTrigger, 579 .src = (int[]){ 580 NI_PFI(0), 581 NI_PFI(1), 582 NI_PFI(2), 583 NI_PFI(3), 584 NI_PFI(4), 585 NI_PFI(5), 586 NI_PFI(6), 587 NI_PFI(7), 588 NI_PFI(8), 589 NI_PFI(9), 590 TRIGGER_LINE(0), 591 TRIGGER_LINE(1), 592 TRIGGER_LINE(2), 593 TRIGGER_LINE(3), 594 TRIGGER_LINE(4), 595 TRIGGER_LINE(5), 596 TRIGGER_LINE(6), 597 NI_AI_StartTrigger, 598 NI_AnalogComparisonEvent, 599 0, /* Termination */ 600 } 601 }, 602 { 603 .dest = NI_AO_PauseTrigger, 604 .src = (int[]){ 605 NI_PFI(0), 606 NI_PFI(1), 607 NI_PFI(2), 608 NI_PFI(3), 609 NI_PFI(4), 610 NI_PFI(5), 611 NI_PFI(6), 612 NI_PFI(7), 613 NI_PFI(8), 614 NI_PFI(9), 615 TRIGGER_LINE(0), 616 TRIGGER_LINE(1), 617 TRIGGER_LINE(2), 618 TRIGGER_LINE(3), 619 TRIGGER_LINE(4), 620 TRIGGER_LINE(5), 621 TRIGGER_LINE(6), 622 NI_AnalogComparisonEvent, 623 0, /* Termination */ 624 } 625 }, 626 { 627 .dest = NI_MasterTimebase, 628 .src = (int[]){ 629 TRIGGER_LINE(7), 630 NI_20MHzTimebase, 631 0, /* Termination */ 632 } 633 }, 634 { /* Termination of list */ 635 .dest = 0, 636 }, 637 }, 638 }; 639