1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * comedi/drivers/ni_routing/ni_route_values/ni_mseries.c 4 * Route information for NI_MSERIES boards. 5 * 6 * COMEDI - Linux Control and Measurement Device Interface 7 * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 */ 19 20 /* 21 * This file includes a list of all the values of various signals routes 22 * available on NI 660x hardware. In many cases, one does not explicitly make 23 * these routes, rather one might indicate that something is used as the source 24 * of one particular trigger or another (using *_src=TRIG_EXT). 25 * 26 * The contents of this file can be generated using the tools in 27 * comedi/drivers/ni_routing/tools. This file also contains specific notes to 28 * this family of devices. 29 * 30 * Please use those tools to help maintain the contents of this file, but be 31 * mindful to not lose the notes already made in this file, since these notes 32 * are critical to a complete undertsanding of the register values of this 33 * family. 34 */ 35 36 #include "../ni_route_values.h" 37 #include "all.h" 38 39 /* 40 * GATE SELECT NOTE: 41 * CtrAux and CtrArmStartrigger register values are not documented in the 42 * DAQ-STC. There is some evidence that using CtrGate values is valid (see 43 * comedi.h). Some information and hints exist in the M-Series user manual 44 * (ni-62xx user-manual 371022K-01). 45 */ 46 47 const struct family_route_values ni_mseries_route_values = { 48 .family = "ni_mseries", 49 .register_values = { 50 /* 51 * destination = { 52 * source = register value, 53 * ... 54 * } 55 */ 56 [B(NI_PFI(0))] = { 57 [B(TRIGGER_LINE(0))] = I(18), 58 [B(TRIGGER_LINE(1))] = I(19), 59 [B(TRIGGER_LINE(2))] = I(20), 60 [B(TRIGGER_LINE(3))] = I(21), 61 [B(TRIGGER_LINE(4))] = I(22), 62 [B(TRIGGER_LINE(5))] = I(23), 63 [B(TRIGGER_LINE(6))] = I(24), 64 [B(TRIGGER_LINE(7))] = I(25), 65 [B(NI_CtrSource(0))] = I(9), 66 [B(NI_CtrSource(1))] = I(4), 67 [B(NI_CtrGate(0))] = I(10), 68 [B(NI_CtrGate(1))] = I(5), 69 [B(NI_CtrInternalOutput(0))] = I(13), 70 [B(NI_CtrInternalOutput(1))] = I(14), 71 [B(PXI_Star)] = I(26), 72 [B(NI_AI_SampleClock)] = I(8), 73 [B(NI_AI_StartTrigger)] = I(1), 74 [B(NI_AI_ReferenceTrigger)] = I(2), 75 [B(NI_AI_ConvertClock)] = I(3), 76 [B(NI_AI_ExternalMUXClock)] = I(12), 77 [B(NI_AO_SampleClock)] = I(6), 78 [B(NI_AO_StartTrigger)] = I(7), 79 [B(NI_DI_SampleClock)] = I(29), 80 [B(NI_DO_SampleClock)] = I(30), 81 [B(NI_FrequencyOutput)] = I(15), 82 [B(NI_ChangeDetectionEvent)] = I(28), 83 [B(NI_AnalogComparisonEvent)] = I(17), 84 [B(NI_SCXI_Trig1)] = I(27), 85 [B(NI_ExternalStrobe)] = I(11), 86 [B(NI_PFI_DO)] = I(16), 87 }, 88 [B(NI_PFI(1))] = { 89 [B(TRIGGER_LINE(0))] = I(18), 90 [B(TRIGGER_LINE(1))] = I(19), 91 [B(TRIGGER_LINE(2))] = I(20), 92 [B(TRIGGER_LINE(3))] = I(21), 93 [B(TRIGGER_LINE(4))] = I(22), 94 [B(TRIGGER_LINE(5))] = I(23), 95 [B(TRIGGER_LINE(6))] = I(24), 96 [B(TRIGGER_LINE(7))] = I(25), 97 [B(NI_CtrSource(0))] = I(9), 98 [B(NI_CtrSource(1))] = I(4), 99 [B(NI_CtrGate(0))] = I(10), 100 [B(NI_CtrGate(1))] = I(5), 101 [B(NI_CtrInternalOutput(0))] = I(13), 102 [B(NI_CtrInternalOutput(1))] = I(14), 103 [B(PXI_Star)] = I(26), 104 [B(NI_AI_SampleClock)] = I(8), 105 [B(NI_AI_StartTrigger)] = I(1), 106 [B(NI_AI_ReferenceTrigger)] = I(2), 107 [B(NI_AI_ConvertClock)] = I(3), 108 [B(NI_AI_ExternalMUXClock)] = I(12), 109 [B(NI_AO_SampleClock)] = I(6), 110 [B(NI_AO_StartTrigger)] = I(7), 111 [B(NI_DI_SampleClock)] = I(29), 112 [B(NI_DO_SampleClock)] = I(30), 113 [B(NI_FrequencyOutput)] = I(15), 114 [B(NI_ChangeDetectionEvent)] = I(28), 115 [B(NI_AnalogComparisonEvent)] = I(17), 116 [B(NI_SCXI_Trig1)] = I(27), 117 [B(NI_ExternalStrobe)] = I(11), 118 [B(NI_PFI_DO)] = I(16), 119 }, 120 [B(NI_PFI(2))] = { 121 [B(TRIGGER_LINE(0))] = I(18), 122 [B(TRIGGER_LINE(1))] = I(19), 123 [B(TRIGGER_LINE(2))] = I(20), 124 [B(TRIGGER_LINE(3))] = I(21), 125 [B(TRIGGER_LINE(4))] = I(22), 126 [B(TRIGGER_LINE(5))] = I(23), 127 [B(TRIGGER_LINE(6))] = I(24), 128 [B(TRIGGER_LINE(7))] = I(25), 129 [B(NI_CtrSource(0))] = I(9), 130 [B(NI_CtrSource(1))] = I(4), 131 [B(NI_CtrGate(0))] = I(10), 132 [B(NI_CtrGate(1))] = I(5), 133 [B(NI_CtrInternalOutput(0))] = I(13), 134 [B(NI_CtrInternalOutput(1))] = I(14), 135 [B(PXI_Star)] = I(26), 136 [B(NI_AI_SampleClock)] = I(8), 137 [B(NI_AI_StartTrigger)] = I(1), 138 [B(NI_AI_ReferenceTrigger)] = I(2), 139 [B(NI_AI_ConvertClock)] = I(3), 140 [B(NI_AI_ExternalMUXClock)] = I(12), 141 [B(NI_AO_SampleClock)] = I(6), 142 [B(NI_AO_StartTrigger)] = I(7), 143 [B(NI_DI_SampleClock)] = I(29), 144 [B(NI_DO_SampleClock)] = I(30), 145 [B(NI_FrequencyOutput)] = I(15), 146 [B(NI_ChangeDetectionEvent)] = I(28), 147 [B(NI_AnalogComparisonEvent)] = I(17), 148 [B(NI_SCXI_Trig1)] = I(27), 149 [B(NI_ExternalStrobe)] = I(11), 150 [B(NI_PFI_DO)] = I(16), 151 }, 152 [B(NI_PFI(3))] = { 153 [B(TRIGGER_LINE(0))] = I(18), 154 [B(TRIGGER_LINE(1))] = I(19), 155 [B(TRIGGER_LINE(2))] = I(20), 156 [B(TRIGGER_LINE(3))] = I(21), 157 [B(TRIGGER_LINE(4))] = I(22), 158 [B(TRIGGER_LINE(5))] = I(23), 159 [B(TRIGGER_LINE(6))] = I(24), 160 [B(TRIGGER_LINE(7))] = I(25), 161 [B(NI_CtrSource(0))] = I(9), 162 [B(NI_CtrSource(1))] = I(4), 163 [B(NI_CtrGate(0))] = I(10), 164 [B(NI_CtrGate(1))] = I(5), 165 [B(NI_CtrInternalOutput(0))] = I(13), 166 [B(NI_CtrInternalOutput(1))] = I(14), 167 [B(PXI_Star)] = I(26), 168 [B(NI_AI_SampleClock)] = I(8), 169 [B(NI_AI_StartTrigger)] = I(1), 170 [B(NI_AI_ReferenceTrigger)] = I(2), 171 [B(NI_AI_ConvertClock)] = I(3), 172 [B(NI_AI_ExternalMUXClock)] = I(12), 173 [B(NI_AO_SampleClock)] = I(6), 174 [B(NI_AO_StartTrigger)] = I(7), 175 [B(NI_DI_SampleClock)] = I(29), 176 [B(NI_DO_SampleClock)] = I(30), 177 [B(NI_FrequencyOutput)] = I(15), 178 [B(NI_ChangeDetectionEvent)] = I(28), 179 [B(NI_AnalogComparisonEvent)] = I(17), 180 [B(NI_SCXI_Trig1)] = I(27), 181 [B(NI_ExternalStrobe)] = I(11), 182 [B(NI_PFI_DO)] = I(16), 183 }, 184 [B(NI_PFI(4))] = { 185 [B(TRIGGER_LINE(0))] = I(18), 186 [B(TRIGGER_LINE(1))] = I(19), 187 [B(TRIGGER_LINE(2))] = I(20), 188 [B(TRIGGER_LINE(3))] = I(21), 189 [B(TRIGGER_LINE(4))] = I(22), 190 [B(TRIGGER_LINE(5))] = I(23), 191 [B(TRIGGER_LINE(6))] = I(24), 192 [B(TRIGGER_LINE(7))] = I(25), 193 [B(NI_CtrSource(0))] = I(9), 194 [B(NI_CtrSource(1))] = I(4), 195 [B(NI_CtrGate(0))] = I(10), 196 [B(NI_CtrGate(1))] = I(5), 197 [B(NI_CtrInternalOutput(0))] = I(13), 198 [B(NI_CtrInternalOutput(1))] = I(14), 199 [B(PXI_Star)] = I(26), 200 [B(NI_AI_SampleClock)] = I(8), 201 [B(NI_AI_StartTrigger)] = I(1), 202 [B(NI_AI_ReferenceTrigger)] = I(2), 203 [B(NI_AI_ConvertClock)] = I(3), 204 [B(NI_AI_ExternalMUXClock)] = I(12), 205 [B(NI_AO_SampleClock)] = I(6), 206 [B(NI_AO_StartTrigger)] = I(7), 207 [B(NI_DI_SampleClock)] = I(29), 208 [B(NI_DO_SampleClock)] = I(30), 209 [B(NI_FrequencyOutput)] = I(15), 210 [B(NI_ChangeDetectionEvent)] = I(28), 211 [B(NI_AnalogComparisonEvent)] = I(17), 212 [B(NI_SCXI_Trig1)] = I(27), 213 [B(NI_ExternalStrobe)] = I(11), 214 [B(NI_PFI_DO)] = I(16), 215 }, 216 [B(NI_PFI(5))] = { 217 [B(TRIGGER_LINE(0))] = I(18), 218 [B(TRIGGER_LINE(1))] = I(19), 219 [B(TRIGGER_LINE(2))] = I(20), 220 [B(TRIGGER_LINE(3))] = I(21), 221 [B(TRIGGER_LINE(4))] = I(22), 222 [B(TRIGGER_LINE(5))] = I(23), 223 [B(TRIGGER_LINE(6))] = I(24), 224 [B(TRIGGER_LINE(7))] = I(25), 225 [B(NI_CtrSource(0))] = I(9), 226 [B(NI_CtrSource(1))] = I(4), 227 [B(NI_CtrGate(0))] = I(10), 228 [B(NI_CtrGate(1))] = I(5), 229 [B(NI_CtrInternalOutput(0))] = I(13), 230 [B(NI_CtrInternalOutput(1))] = I(14), 231 [B(PXI_Star)] = I(26), 232 [B(NI_AI_SampleClock)] = I(8), 233 [B(NI_AI_StartTrigger)] = I(1), 234 [B(NI_AI_ReferenceTrigger)] = I(2), 235 [B(NI_AI_ConvertClock)] = I(3), 236 [B(NI_AI_ExternalMUXClock)] = I(12), 237 [B(NI_AO_SampleClock)] = I(6), 238 [B(NI_AO_StartTrigger)] = I(7), 239 [B(NI_DI_SampleClock)] = I(29), 240 [B(NI_DO_SampleClock)] = I(30), 241 [B(NI_FrequencyOutput)] = I(15), 242 [B(NI_ChangeDetectionEvent)] = I(28), 243 [B(NI_AnalogComparisonEvent)] = I(17), 244 [B(NI_SCXI_Trig1)] = I(27), 245 [B(NI_ExternalStrobe)] = I(11), 246 [B(NI_PFI_DO)] = I(16), 247 }, 248 [B(NI_PFI(6))] = { 249 [B(TRIGGER_LINE(0))] = I(18), 250 [B(TRIGGER_LINE(1))] = I(19), 251 [B(TRIGGER_LINE(2))] = I(20), 252 [B(TRIGGER_LINE(3))] = I(21), 253 [B(TRIGGER_LINE(4))] = I(22), 254 [B(TRIGGER_LINE(5))] = I(23), 255 [B(TRIGGER_LINE(6))] = I(24), 256 [B(TRIGGER_LINE(7))] = I(25), 257 [B(NI_CtrSource(0))] = I(9), 258 [B(NI_CtrSource(1))] = I(4), 259 [B(NI_CtrGate(0))] = I(10), 260 [B(NI_CtrGate(1))] = I(5), 261 [B(NI_CtrInternalOutput(0))] = I(13), 262 [B(NI_CtrInternalOutput(1))] = I(14), 263 [B(PXI_Star)] = I(26), 264 [B(NI_AI_SampleClock)] = I(8), 265 [B(NI_AI_StartTrigger)] = I(1), 266 [B(NI_AI_ReferenceTrigger)] = I(2), 267 [B(NI_AI_ConvertClock)] = I(3), 268 [B(NI_AI_ExternalMUXClock)] = I(12), 269 [B(NI_AO_SampleClock)] = I(6), 270 [B(NI_AO_StartTrigger)] = I(7), 271 [B(NI_DI_SampleClock)] = I(29), 272 [B(NI_DO_SampleClock)] = I(30), 273 [B(NI_FrequencyOutput)] = I(15), 274 [B(NI_ChangeDetectionEvent)] = I(28), 275 [B(NI_AnalogComparisonEvent)] = I(17), 276 [B(NI_SCXI_Trig1)] = I(27), 277 [B(NI_ExternalStrobe)] = I(11), 278 [B(NI_PFI_DO)] = I(16), 279 }, 280 [B(NI_PFI(7))] = { 281 [B(TRIGGER_LINE(0))] = I(18), 282 [B(TRIGGER_LINE(1))] = I(19), 283 [B(TRIGGER_LINE(2))] = I(20), 284 [B(TRIGGER_LINE(3))] = I(21), 285 [B(TRIGGER_LINE(4))] = I(22), 286 [B(TRIGGER_LINE(5))] = I(23), 287 [B(TRIGGER_LINE(6))] = I(24), 288 [B(TRIGGER_LINE(7))] = I(25), 289 [B(NI_CtrSource(0))] = I(9), 290 [B(NI_CtrSource(1))] = I(4), 291 [B(NI_CtrGate(0))] = I(10), 292 [B(NI_CtrGate(1))] = I(5), 293 [B(NI_CtrInternalOutput(0))] = I(13), 294 [B(NI_CtrInternalOutput(1))] = I(14), 295 [B(PXI_Star)] = I(26), 296 [B(NI_AI_SampleClock)] = I(8), 297 [B(NI_AI_StartTrigger)] = I(1), 298 [B(NI_AI_ReferenceTrigger)] = I(2), 299 [B(NI_AI_ConvertClock)] = I(3), 300 [B(NI_AI_ExternalMUXClock)] = I(12), 301 [B(NI_AO_SampleClock)] = I(6), 302 [B(NI_AO_StartTrigger)] = I(7), 303 [B(NI_DI_SampleClock)] = I(29), 304 [B(NI_DO_SampleClock)] = I(30), 305 [B(NI_FrequencyOutput)] = I(15), 306 [B(NI_ChangeDetectionEvent)] = I(28), 307 [B(NI_AnalogComparisonEvent)] = I(17), 308 [B(NI_SCXI_Trig1)] = I(27), 309 [B(NI_ExternalStrobe)] = I(11), 310 [B(NI_PFI_DO)] = I(16), 311 }, 312 [B(NI_PFI(8))] = { 313 [B(TRIGGER_LINE(0))] = I(18), 314 [B(TRIGGER_LINE(1))] = I(19), 315 [B(TRIGGER_LINE(2))] = I(20), 316 [B(TRIGGER_LINE(3))] = I(21), 317 [B(TRIGGER_LINE(4))] = I(22), 318 [B(TRIGGER_LINE(5))] = I(23), 319 [B(TRIGGER_LINE(6))] = I(24), 320 [B(TRIGGER_LINE(7))] = I(25), 321 [B(NI_CtrSource(0))] = I(9), 322 [B(NI_CtrSource(1))] = I(4), 323 [B(NI_CtrGate(0))] = I(10), 324 [B(NI_CtrGate(1))] = I(5), 325 [B(NI_CtrInternalOutput(0))] = I(13), 326 [B(NI_CtrInternalOutput(1))] = I(14), 327 [B(PXI_Star)] = I(26), 328 [B(NI_AI_SampleClock)] = I(8), 329 [B(NI_AI_StartTrigger)] = I(1), 330 [B(NI_AI_ReferenceTrigger)] = I(2), 331 [B(NI_AI_ConvertClock)] = I(3), 332 [B(NI_AI_ExternalMUXClock)] = I(12), 333 [B(NI_AO_SampleClock)] = I(6), 334 [B(NI_AO_StartTrigger)] = I(7), 335 [B(NI_DI_SampleClock)] = I(29), 336 [B(NI_DO_SampleClock)] = I(30), 337 [B(NI_FrequencyOutput)] = I(15), 338 [B(NI_ChangeDetectionEvent)] = I(28), 339 [B(NI_AnalogComparisonEvent)] = I(17), 340 [B(NI_SCXI_Trig1)] = I(27), 341 [B(NI_ExternalStrobe)] = I(11), 342 [B(NI_PFI_DO)] = I(16), 343 }, 344 [B(NI_PFI(9))] = { 345 [B(TRIGGER_LINE(0))] = I(18), 346 [B(TRIGGER_LINE(1))] = I(19), 347 [B(TRIGGER_LINE(2))] = I(20), 348 [B(TRIGGER_LINE(3))] = I(21), 349 [B(TRIGGER_LINE(4))] = I(22), 350 [B(TRIGGER_LINE(5))] = I(23), 351 [B(TRIGGER_LINE(6))] = I(24), 352 [B(TRIGGER_LINE(7))] = I(25), 353 [B(NI_CtrSource(0))] = I(9), 354 [B(NI_CtrSource(1))] = I(4), 355 [B(NI_CtrGate(0))] = I(10), 356 [B(NI_CtrGate(1))] = I(5), 357 [B(NI_CtrInternalOutput(0))] = I(13), 358 [B(NI_CtrInternalOutput(1))] = I(14), 359 [B(PXI_Star)] = I(26), 360 [B(NI_AI_SampleClock)] = I(8), 361 [B(NI_AI_StartTrigger)] = I(1), 362 [B(NI_AI_ReferenceTrigger)] = I(2), 363 [B(NI_AI_ConvertClock)] = I(3), 364 [B(NI_AI_ExternalMUXClock)] = I(12), 365 [B(NI_AO_SampleClock)] = I(6), 366 [B(NI_AO_StartTrigger)] = I(7), 367 [B(NI_DI_SampleClock)] = I(29), 368 [B(NI_DO_SampleClock)] = I(30), 369 [B(NI_FrequencyOutput)] = I(15), 370 [B(NI_ChangeDetectionEvent)] = I(28), 371 [B(NI_AnalogComparisonEvent)] = I(17), 372 [B(NI_SCXI_Trig1)] = I(27), 373 [B(NI_ExternalStrobe)] = I(11), 374 [B(NI_PFI_DO)] = I(16), 375 }, 376 [B(NI_PFI(10))] = { 377 [B(TRIGGER_LINE(0))] = I(18), 378 [B(TRIGGER_LINE(1))] = I(19), 379 [B(TRIGGER_LINE(2))] = I(20), 380 [B(TRIGGER_LINE(3))] = I(21), 381 [B(TRIGGER_LINE(4))] = I(22), 382 [B(TRIGGER_LINE(5))] = I(23), 383 [B(TRIGGER_LINE(6))] = I(24), 384 [B(TRIGGER_LINE(7))] = I(25), 385 [B(NI_CtrSource(0))] = I(9), 386 [B(NI_CtrSource(1))] = I(4), 387 [B(NI_CtrGate(0))] = I(10), 388 [B(NI_CtrGate(1))] = I(5), 389 [B(NI_CtrInternalOutput(0))] = I(13), 390 [B(NI_CtrInternalOutput(1))] = I(14), 391 [B(PXI_Star)] = I(26), 392 [B(NI_AI_SampleClock)] = I(8), 393 [B(NI_AI_StartTrigger)] = I(1), 394 [B(NI_AI_ReferenceTrigger)] = I(2), 395 [B(NI_AI_ConvertClock)] = I(3), 396 [B(NI_AI_ExternalMUXClock)] = I(12), 397 [B(NI_AO_SampleClock)] = I(6), 398 [B(NI_AO_StartTrigger)] = I(7), 399 [B(NI_DI_SampleClock)] = I(29), 400 [B(NI_DO_SampleClock)] = I(30), 401 [B(NI_FrequencyOutput)] = I(15), 402 [B(NI_ChangeDetectionEvent)] = I(28), 403 [B(NI_AnalogComparisonEvent)] = I(17), 404 [B(NI_SCXI_Trig1)] = I(27), 405 [B(NI_ExternalStrobe)] = I(11), 406 [B(NI_PFI_DO)] = I(16), 407 }, 408 [B(NI_PFI(11))] = { 409 [B(TRIGGER_LINE(0))] = I(18), 410 [B(TRIGGER_LINE(1))] = I(19), 411 [B(TRIGGER_LINE(2))] = I(20), 412 [B(TRIGGER_LINE(3))] = I(21), 413 [B(TRIGGER_LINE(4))] = I(22), 414 [B(TRIGGER_LINE(5))] = I(23), 415 [B(TRIGGER_LINE(6))] = I(24), 416 [B(TRIGGER_LINE(7))] = I(25), 417 [B(NI_CtrSource(0))] = I(9), 418 [B(NI_CtrSource(1))] = I(4), 419 [B(NI_CtrGate(0))] = I(10), 420 [B(NI_CtrGate(1))] = I(5), 421 [B(NI_CtrInternalOutput(0))] = I(13), 422 [B(NI_CtrInternalOutput(1))] = I(14), 423 [B(PXI_Star)] = I(26), 424 [B(NI_AI_SampleClock)] = I(8), 425 [B(NI_AI_StartTrigger)] = I(1), 426 [B(NI_AI_ReferenceTrigger)] = I(2), 427 [B(NI_AI_ConvertClock)] = I(3), 428 [B(NI_AI_ExternalMUXClock)] = I(12), 429 [B(NI_AO_SampleClock)] = I(6), 430 [B(NI_AO_StartTrigger)] = I(7), 431 [B(NI_DI_SampleClock)] = I(29), 432 [B(NI_DO_SampleClock)] = I(30), 433 [B(NI_FrequencyOutput)] = I(15), 434 [B(NI_ChangeDetectionEvent)] = I(28), 435 [B(NI_AnalogComparisonEvent)] = I(17), 436 [B(NI_SCXI_Trig1)] = I(27), 437 [B(NI_ExternalStrobe)] = I(11), 438 [B(NI_PFI_DO)] = I(16), 439 }, 440 [B(NI_PFI(12))] = { 441 [B(TRIGGER_LINE(0))] = I(18), 442 [B(TRIGGER_LINE(1))] = I(19), 443 [B(TRIGGER_LINE(2))] = I(20), 444 [B(TRIGGER_LINE(3))] = I(21), 445 [B(TRIGGER_LINE(4))] = I(22), 446 [B(TRIGGER_LINE(5))] = I(23), 447 [B(TRIGGER_LINE(6))] = I(24), 448 [B(TRIGGER_LINE(7))] = I(25), 449 [B(NI_CtrSource(0))] = I(9), 450 [B(NI_CtrSource(1))] = I(4), 451 [B(NI_CtrGate(0))] = I(10), 452 [B(NI_CtrGate(1))] = I(5), 453 [B(NI_CtrInternalOutput(0))] = I(13), 454 [B(NI_CtrInternalOutput(1))] = I(14), 455 [B(PXI_Star)] = I(26), 456 [B(NI_AI_SampleClock)] = I(8), 457 [B(NI_AI_StartTrigger)] = I(1), 458 [B(NI_AI_ReferenceTrigger)] = I(2), 459 [B(NI_AI_ConvertClock)] = I(3), 460 [B(NI_AI_ExternalMUXClock)] = I(12), 461 [B(NI_AO_SampleClock)] = I(6), 462 [B(NI_AO_StartTrigger)] = I(7), 463 [B(NI_DI_SampleClock)] = I(29), 464 [B(NI_DO_SampleClock)] = I(30), 465 [B(NI_FrequencyOutput)] = I(15), 466 [B(NI_ChangeDetectionEvent)] = I(28), 467 [B(NI_AnalogComparisonEvent)] = I(17), 468 [B(NI_SCXI_Trig1)] = I(27), 469 [B(NI_ExternalStrobe)] = I(11), 470 [B(NI_PFI_DO)] = I(16), 471 }, 472 [B(NI_PFI(13))] = { 473 [B(TRIGGER_LINE(0))] = I(18), 474 [B(TRIGGER_LINE(1))] = I(19), 475 [B(TRIGGER_LINE(2))] = I(20), 476 [B(TRIGGER_LINE(3))] = I(21), 477 [B(TRIGGER_LINE(4))] = I(22), 478 [B(TRIGGER_LINE(5))] = I(23), 479 [B(TRIGGER_LINE(6))] = I(24), 480 [B(TRIGGER_LINE(7))] = I(25), 481 [B(NI_CtrSource(0))] = I(9), 482 [B(NI_CtrSource(1))] = I(4), 483 [B(NI_CtrGate(0))] = I(10), 484 [B(NI_CtrGate(1))] = I(5), 485 [B(NI_CtrInternalOutput(0))] = I(13), 486 [B(NI_CtrInternalOutput(1))] = I(14), 487 [B(PXI_Star)] = I(26), 488 [B(NI_AI_SampleClock)] = I(8), 489 [B(NI_AI_StartTrigger)] = I(1), 490 [B(NI_AI_ReferenceTrigger)] = I(2), 491 [B(NI_AI_ConvertClock)] = I(3), 492 [B(NI_AI_ExternalMUXClock)] = I(12), 493 [B(NI_AO_SampleClock)] = I(6), 494 [B(NI_AO_StartTrigger)] = I(7), 495 [B(NI_DI_SampleClock)] = I(29), 496 [B(NI_DO_SampleClock)] = I(30), 497 [B(NI_FrequencyOutput)] = I(15), 498 [B(NI_ChangeDetectionEvent)] = I(28), 499 [B(NI_AnalogComparisonEvent)] = I(17), 500 [B(NI_SCXI_Trig1)] = I(27), 501 [B(NI_ExternalStrobe)] = I(11), 502 [B(NI_PFI_DO)] = I(16), 503 }, 504 [B(NI_PFI(14))] = { 505 [B(TRIGGER_LINE(0))] = I(18), 506 [B(TRIGGER_LINE(1))] = I(19), 507 [B(TRIGGER_LINE(2))] = I(20), 508 [B(TRIGGER_LINE(3))] = I(21), 509 [B(TRIGGER_LINE(4))] = I(22), 510 [B(TRIGGER_LINE(5))] = I(23), 511 [B(TRIGGER_LINE(6))] = I(24), 512 [B(TRIGGER_LINE(7))] = I(25), 513 [B(NI_CtrSource(0))] = I(9), 514 [B(NI_CtrSource(1))] = I(4), 515 [B(NI_CtrGate(0))] = I(10), 516 [B(NI_CtrGate(1))] = I(5), 517 [B(NI_CtrInternalOutput(0))] = I(13), 518 [B(NI_CtrInternalOutput(1))] = I(14), 519 [B(PXI_Star)] = I(26), 520 [B(NI_AI_SampleClock)] = I(8), 521 [B(NI_AI_StartTrigger)] = I(1), 522 [B(NI_AI_ReferenceTrigger)] = I(2), 523 [B(NI_AI_ConvertClock)] = I(3), 524 [B(NI_AI_ExternalMUXClock)] = I(12), 525 [B(NI_AO_SampleClock)] = I(6), 526 [B(NI_AO_StartTrigger)] = I(7), 527 [B(NI_DI_SampleClock)] = I(29), 528 [B(NI_DO_SampleClock)] = I(30), 529 [B(NI_FrequencyOutput)] = I(15), 530 [B(NI_ChangeDetectionEvent)] = I(28), 531 [B(NI_AnalogComparisonEvent)] = I(17), 532 [B(NI_SCXI_Trig1)] = I(27), 533 [B(NI_ExternalStrobe)] = I(11), 534 [B(NI_PFI_DO)] = I(16), 535 }, 536 [B(NI_PFI(15))] = { 537 [B(TRIGGER_LINE(0))] = I(18), 538 [B(TRIGGER_LINE(1))] = I(19), 539 [B(TRIGGER_LINE(2))] = I(20), 540 [B(TRIGGER_LINE(3))] = I(21), 541 [B(TRIGGER_LINE(4))] = I(22), 542 [B(TRIGGER_LINE(5))] = I(23), 543 [B(TRIGGER_LINE(6))] = I(24), 544 [B(TRIGGER_LINE(7))] = I(25), 545 [B(NI_CtrSource(0))] = I(9), 546 [B(NI_CtrSource(1))] = I(4), 547 [B(NI_CtrGate(0))] = I(10), 548 [B(NI_CtrGate(1))] = I(5), 549 [B(NI_CtrInternalOutput(0))] = I(13), 550 [B(NI_CtrInternalOutput(1))] = I(14), 551 [B(PXI_Star)] = I(26), 552 [B(NI_AI_SampleClock)] = I(8), 553 [B(NI_AI_StartTrigger)] = I(1), 554 [B(NI_AI_ReferenceTrigger)] = I(2), 555 [B(NI_AI_ConvertClock)] = I(3), 556 [B(NI_AI_ExternalMUXClock)] = I(12), 557 [B(NI_AO_SampleClock)] = I(6), 558 [B(NI_AO_StartTrigger)] = I(7), 559 [B(NI_DI_SampleClock)] = I(29), 560 [B(NI_DO_SampleClock)] = I(30), 561 [B(NI_FrequencyOutput)] = I(15), 562 [B(NI_ChangeDetectionEvent)] = I(28), 563 [B(NI_AnalogComparisonEvent)] = I(17), 564 [B(NI_SCXI_Trig1)] = I(27), 565 [B(NI_ExternalStrobe)] = I(11), 566 [B(NI_PFI_DO)] = I(16), 567 }, 568 [B(TRIGGER_LINE(0))] = { 569 [B(NI_RTSI_BRD(0))] = I(8), 570 [B(NI_RTSI_BRD(1))] = I(9), 571 [B(NI_RTSI_BRD(2))] = I(10), 572 [B(NI_RTSI_BRD(3))] = I(11), 573 [B(NI_CtrSource(0))] = I(5), 574 [B(NI_CtrGate(0))] = I(6), 575 [B(NI_AI_StartTrigger)] = I(0), 576 [B(NI_AI_ReferenceTrigger)] = I(1), 577 [B(NI_AI_ConvertClock)] = I(2), 578 [B(NI_AO_SampleClock)] = I(3), 579 [B(NI_AO_StartTrigger)] = I(4), 580 /* 581 * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be 582 * RTSI_OSC according to MHDDK mseries source. There 583 * are hints in comedi that show that this is actually a 584 * 20MHz source for 628x cards(?) 585 */ 586 [B(NI_10MHzRefClock)] = I(12), 587 [B(NI_RGOUT0)] = I(7), 588 }, 589 [B(TRIGGER_LINE(1))] = { 590 [B(NI_RTSI_BRD(0))] = I(8), 591 [B(NI_RTSI_BRD(1))] = I(9), 592 [B(NI_RTSI_BRD(2))] = I(10), 593 [B(NI_RTSI_BRD(3))] = I(11), 594 [B(NI_CtrSource(0))] = I(5), 595 [B(NI_CtrGate(0))] = I(6), 596 [B(NI_AI_StartTrigger)] = I(0), 597 [B(NI_AI_ReferenceTrigger)] = I(1), 598 [B(NI_AI_ConvertClock)] = I(2), 599 [B(NI_AO_SampleClock)] = I(3), 600 [B(NI_AO_StartTrigger)] = I(4), 601 /* 602 * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be 603 * RTSI_OSC according to MHDDK mseries source. There 604 * are hints in comedi that show that this is actually a 605 * 20MHz source for 628x cards(?) 606 */ 607 [B(NI_10MHzRefClock)] = I(12), 608 [B(NI_RGOUT0)] = I(7), 609 }, 610 [B(TRIGGER_LINE(2))] = { 611 [B(NI_RTSI_BRD(0))] = I(8), 612 [B(NI_RTSI_BRD(1))] = I(9), 613 [B(NI_RTSI_BRD(2))] = I(10), 614 [B(NI_RTSI_BRD(3))] = I(11), 615 [B(NI_CtrSource(0))] = I(5), 616 [B(NI_CtrGate(0))] = I(6), 617 [B(NI_AI_StartTrigger)] = I(0), 618 [B(NI_AI_ReferenceTrigger)] = I(1), 619 [B(NI_AI_ConvertClock)] = I(2), 620 [B(NI_AO_SampleClock)] = I(3), 621 [B(NI_AO_StartTrigger)] = I(4), 622 /* 623 * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be 624 * RTSI_OSC according to MHDDK mseries source. There 625 * are hints in comedi that show that this is actually a 626 * 20MHz source for 628x cards(?) 627 */ 628 [B(NI_10MHzRefClock)] = I(12), 629 [B(NI_RGOUT0)] = I(7), 630 }, 631 [B(TRIGGER_LINE(3))] = { 632 [B(NI_RTSI_BRD(0))] = I(8), 633 [B(NI_RTSI_BRD(1))] = I(9), 634 [B(NI_RTSI_BRD(2))] = I(10), 635 [B(NI_RTSI_BRD(3))] = I(11), 636 [B(NI_CtrSource(0))] = I(5), 637 [B(NI_CtrGate(0))] = I(6), 638 [B(NI_AI_StartTrigger)] = I(0), 639 [B(NI_AI_ReferenceTrigger)] = I(1), 640 [B(NI_AI_ConvertClock)] = I(2), 641 [B(NI_AO_SampleClock)] = I(3), 642 [B(NI_AO_StartTrigger)] = I(4), 643 /* 644 * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be 645 * RTSI_OSC according to MHDDK mseries source. There 646 * are hints in comedi that show that this is actually a 647 * 20MHz source for 628x cards(?) 648 */ 649 [B(NI_10MHzRefClock)] = I(12), 650 [B(NI_RGOUT0)] = I(7), 651 }, 652 [B(TRIGGER_LINE(4))] = { 653 [B(NI_RTSI_BRD(0))] = I(8), 654 [B(NI_RTSI_BRD(1))] = I(9), 655 [B(NI_RTSI_BRD(2))] = I(10), 656 [B(NI_RTSI_BRD(3))] = I(11), 657 [B(NI_CtrSource(0))] = I(5), 658 [B(NI_CtrGate(0))] = I(6), 659 [B(NI_AI_StartTrigger)] = I(0), 660 [B(NI_AI_ReferenceTrigger)] = I(1), 661 [B(NI_AI_ConvertClock)] = I(2), 662 [B(NI_AO_SampleClock)] = I(3), 663 [B(NI_AO_StartTrigger)] = I(4), 664 /* 665 * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be 666 * RTSI_OSC according to MHDDK mseries source. There 667 * are hints in comedi that show that this is actually a 668 * 20MHz source for 628x cards(?) 669 */ 670 [B(NI_10MHzRefClock)] = I(12), 671 [B(NI_RGOUT0)] = I(7), 672 }, 673 [B(TRIGGER_LINE(5))] = { 674 [B(NI_RTSI_BRD(0))] = I(8), 675 [B(NI_RTSI_BRD(1))] = I(9), 676 [B(NI_RTSI_BRD(2))] = I(10), 677 [B(NI_RTSI_BRD(3))] = I(11), 678 [B(NI_CtrSource(0))] = I(5), 679 [B(NI_CtrGate(0))] = I(6), 680 [B(NI_AI_StartTrigger)] = I(0), 681 [B(NI_AI_ReferenceTrigger)] = I(1), 682 [B(NI_AI_ConvertClock)] = I(2), 683 [B(NI_AO_SampleClock)] = I(3), 684 [B(NI_AO_StartTrigger)] = I(4), 685 /* 686 * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be 687 * RTSI_OSC according to MHDDK mseries source. There 688 * are hints in comedi that show that this is actually a 689 * 20MHz source for 628x cards(?) 690 */ 691 [B(NI_10MHzRefClock)] = I(12), 692 [B(NI_RGOUT0)] = I(7), 693 }, 694 [B(TRIGGER_LINE(6))] = { 695 [B(NI_RTSI_BRD(0))] = I(8), 696 [B(NI_RTSI_BRD(1))] = I(9), 697 [B(NI_RTSI_BRD(2))] = I(10), 698 [B(NI_RTSI_BRD(3))] = I(11), 699 [B(NI_CtrSource(0))] = I(5), 700 [B(NI_CtrGate(0))] = I(6), 701 [B(NI_AI_StartTrigger)] = I(0), 702 [B(NI_AI_ReferenceTrigger)] = I(1), 703 [B(NI_AI_ConvertClock)] = I(2), 704 [B(NI_AO_SampleClock)] = I(3), 705 [B(NI_AO_StartTrigger)] = I(4), 706 /* 707 * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be 708 * RTSI_OSC according to MHDDK mseries source. There 709 * are hints in comedi that show that this is actually a 710 * 20MHz source for 628x cards(?) 711 */ 712 [B(NI_10MHzRefClock)] = I(12), 713 [B(NI_RGOUT0)] = I(7), 714 }, 715 [B(TRIGGER_LINE(7))] = { 716 [B(NI_RTSI_BRD(0))] = I(8), 717 [B(NI_RTSI_BRD(1))] = I(9), 718 [B(NI_RTSI_BRD(2))] = I(10), 719 [B(NI_RTSI_BRD(3))] = I(11), 720 [B(NI_CtrSource(0))] = I(5), 721 [B(NI_CtrGate(0))] = I(6), 722 [B(NI_AI_StartTrigger)] = I(0), 723 [B(NI_AI_ReferenceTrigger)] = I(1), 724 [B(NI_AI_ConvertClock)] = I(2), 725 [B(NI_AO_SampleClock)] = I(3), 726 [B(NI_AO_StartTrigger)] = I(4), 727 /* 728 * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be 729 * RTSI_OSC according to MHDDK mseries source. There 730 * are hints in comedi that show that this is actually a 731 * 20MHz source for 628x cards(?) 732 */ 733 [B(NI_10MHzRefClock)] = I(12), 734 [B(NI_RGOUT0)] = I(7), 735 }, 736 [B(NI_RTSI_BRD(0))] = { 737 [B(NI_PFI(0))] = I(0), 738 [B(NI_PFI(1))] = I(1), 739 [B(NI_PFI(2))] = I(2), 740 [B(NI_PFI(3))] = I(3), 741 [B(NI_PFI(4))] = I(4), 742 [B(NI_PFI(5))] = I(5), 743 [B(NI_CtrSource(1))] = I(11), 744 [B(NI_CtrGate(1))] = I(10), 745 [B(NI_CtrZ(0))] = I(13), 746 [B(NI_CtrZ(1))] = I(12), 747 [B(NI_CtrOut(1))] = I(9), 748 [B(NI_AI_SampleClock)] = I(15), 749 [B(NI_AI_PauseTrigger)] = I(7), 750 [B(NI_AO_PauseTrigger)] = I(6), 751 [B(NI_FrequencyOutput)] = I(8), 752 [B(NI_AnalogComparisonEvent)] = I(14), 753 }, 754 [B(NI_RTSI_BRD(1))] = { 755 [B(NI_PFI(0))] = I(0), 756 [B(NI_PFI(1))] = I(1), 757 [B(NI_PFI(2))] = I(2), 758 [B(NI_PFI(3))] = I(3), 759 [B(NI_PFI(4))] = I(4), 760 [B(NI_PFI(5))] = I(5), 761 [B(NI_CtrSource(1))] = I(11), 762 [B(NI_CtrGate(1))] = I(10), 763 [B(NI_CtrZ(0))] = I(13), 764 [B(NI_CtrZ(1))] = I(12), 765 [B(NI_CtrOut(1))] = I(9), 766 [B(NI_AI_SampleClock)] = I(15), 767 [B(NI_AI_PauseTrigger)] = I(7), 768 [B(NI_AO_PauseTrigger)] = I(6), 769 [B(NI_FrequencyOutput)] = I(8), 770 [B(NI_AnalogComparisonEvent)] = I(14), 771 }, 772 [B(NI_RTSI_BRD(2))] = { 773 [B(NI_PFI(0))] = I(0), 774 [B(NI_PFI(1))] = I(1), 775 [B(NI_PFI(2))] = I(2), 776 [B(NI_PFI(3))] = I(3), 777 [B(NI_PFI(4))] = I(4), 778 [B(NI_PFI(5))] = I(5), 779 [B(NI_CtrSource(1))] = I(11), 780 [B(NI_CtrGate(1))] = I(10), 781 [B(NI_CtrZ(0))] = I(13), 782 [B(NI_CtrZ(1))] = I(12), 783 [B(NI_CtrOut(1))] = I(9), 784 [B(NI_AI_SampleClock)] = I(15), 785 [B(NI_AI_PauseTrigger)] = I(7), 786 [B(NI_AO_PauseTrigger)] = I(6), 787 [B(NI_FrequencyOutput)] = I(8), 788 [B(NI_AnalogComparisonEvent)] = I(14), 789 }, 790 [B(NI_RTSI_BRD(3))] = { 791 [B(NI_PFI(0))] = I(0), 792 [B(NI_PFI(1))] = I(1), 793 [B(NI_PFI(2))] = I(2), 794 [B(NI_PFI(3))] = I(3), 795 [B(NI_PFI(4))] = I(4), 796 [B(NI_PFI(5))] = I(5), 797 [B(NI_CtrSource(1))] = I(11), 798 [B(NI_CtrGate(1))] = I(10), 799 [B(NI_CtrZ(0))] = I(13), 800 [B(NI_CtrZ(1))] = I(12), 801 [B(NI_CtrOut(1))] = I(9), 802 [B(NI_AI_SampleClock)] = I(15), 803 [B(NI_AI_PauseTrigger)] = I(7), 804 [B(NI_AO_PauseTrigger)] = I(6), 805 [B(NI_FrequencyOutput)] = I(8), 806 [B(NI_AnalogComparisonEvent)] = I(14), 807 }, 808 [B(NI_CtrSource(0))] = { 809 /* These are not currently implemented in ni modules */ 810 [B(NI_PFI(0))] = U(1), 811 [B(NI_PFI(1))] = U(2), 812 [B(NI_PFI(2))] = U(3), 813 [B(NI_PFI(3))] = U(4), 814 [B(NI_PFI(4))] = U(5), 815 [B(NI_PFI(5))] = U(6), 816 [B(NI_PFI(6))] = U(7), 817 [B(NI_PFI(7))] = U(8), 818 [B(NI_PFI(8))] = U(9), 819 [B(NI_PFI(9))] = U(10), 820 [B(NI_PFI(10))] = U(21), 821 [B(NI_PFI(11))] = U(22), 822 [B(NI_PFI(12))] = U(23), 823 [B(NI_PFI(13))] = U(24), 824 [B(NI_PFI(14))] = U(25), 825 [B(NI_PFI(15))] = U(26), 826 [B(TRIGGER_LINE(0))] = U(11), 827 [B(TRIGGER_LINE(1))] = U(12), 828 [B(TRIGGER_LINE(2))] = U(13), 829 [B(TRIGGER_LINE(3))] = U(14), 830 [B(TRIGGER_LINE(4))] = U(15), 831 [B(TRIGGER_LINE(5))] = U(16), 832 [B(TRIGGER_LINE(6))] = U(17), 833 [B(TRIGGER_LINE(7))] = U(27), 834 [B(NI_CtrGate(1))] = U(Gi_SRC(20, 0)), 835 [B(NI_CtrInternalOutput(1))] = U(19), 836 [B(PXI_Star)] = U(Gi_SRC(20, 1)), 837 [B(PXI_Clk10)] = U(29), 838 [B(NI_20MHzTimebase)] = U(0), 839 [B(NI_80MHzTimebase)] = U(Gi_SRC(30, 0)), 840 [B(NI_100kHzTimebase)] = U(18), 841 [B(NI_AnalogComparisonEvent)] = U(Gi_SRC(30, 1)), 842 [B(NI_LogicLow)] = U(31), 843 }, 844 [B(NI_CtrSource(1))] = { 845 /* These are not currently implemented in ni modules */ 846 [B(NI_PFI(0))] = U(1), 847 [B(NI_PFI(1))] = U(2), 848 [B(NI_PFI(2))] = U(3), 849 [B(NI_PFI(3))] = U(4), 850 [B(NI_PFI(4))] = U(5), 851 [B(NI_PFI(5))] = U(6), 852 [B(NI_PFI(6))] = U(7), 853 [B(NI_PFI(7))] = U(8), 854 [B(NI_PFI(8))] = U(9), 855 [B(NI_PFI(9))] = U(10), 856 [B(NI_PFI(10))] = U(21), 857 [B(NI_PFI(11))] = U(22), 858 [B(NI_PFI(12))] = U(23), 859 [B(NI_PFI(13))] = U(24), 860 [B(NI_PFI(14))] = U(25), 861 [B(NI_PFI(15))] = U(26), 862 [B(TRIGGER_LINE(0))] = U(11), 863 [B(TRIGGER_LINE(1))] = U(12), 864 [B(TRIGGER_LINE(2))] = U(13), 865 [B(TRIGGER_LINE(3))] = U(14), 866 [B(TRIGGER_LINE(4))] = U(15), 867 [B(TRIGGER_LINE(5))] = U(16), 868 [B(TRIGGER_LINE(6))] = U(17), 869 [B(TRIGGER_LINE(7))] = U(27), 870 [B(NI_CtrGate(0))] = U(Gi_SRC(20, 0)), 871 [B(NI_CtrInternalOutput(0))] = U(19), 872 [B(PXI_Star)] = U(Gi_SRC(20, 1)), 873 [B(PXI_Clk10)] = U(29), 874 [B(NI_20MHzTimebase)] = U(0), 875 [B(NI_80MHzTimebase)] = U(Gi_SRC(30, 0)), 876 [B(NI_100kHzTimebase)] = U(18), 877 [B(NI_AnalogComparisonEvent)] = U(Gi_SRC(30, 1)), 878 [B(NI_LogicLow)] = U(31), 879 }, 880 [B(NI_CtrGate(0))] = { 881 [B(NI_PFI(0))] = I(1 /* source: mhddk examples */), 882 [B(NI_PFI(1))] = I(2), 883 [B(NI_PFI(2))] = I(3), 884 [B(NI_PFI(3))] = I(4), 885 [B(NI_PFI(4))] = I(5), 886 [B(NI_PFI(5))] = I(6), 887 [B(NI_PFI(6))] = I(7), 888 [B(NI_PFI(7))] = I(8), 889 [B(NI_PFI(8))] = I(9), 890 [B(NI_PFI(9))] = I(10), 891 [B(NI_PFI(10))] = I(21), 892 [B(NI_PFI(11))] = I(22), 893 [B(NI_PFI(12))] = I(23), 894 [B(NI_PFI(13))] = I(24), 895 [B(NI_PFI(14))] = I(25), 896 [B(NI_PFI(15))] = I(26), 897 [B(TRIGGER_LINE(0))] = I(11), 898 [B(TRIGGER_LINE(1))] = I(12), 899 [B(TRIGGER_LINE(2))] = I(13), 900 [B(TRIGGER_LINE(3))] = I(14), 901 [B(TRIGGER_LINE(4))] = I(15), 902 [B(TRIGGER_LINE(5))] = I(16), 903 [B(TRIGGER_LINE(6))] = I(17), 904 [B(TRIGGER_LINE(7))] = I(27), 905 [B(NI_CtrSource(1))] = I(29), 906 /* source for following line: mhddk GP examples */ 907 [B(NI_CtrInternalOutput(1))] = I(20), 908 [B(PXI_Star)] = I(19), 909 [B(NI_AI_StartTrigger)] = I(28), 910 [B(NI_AI_ReferenceTrigger)] = I(18), 911 [B(NI_AnalogComparisonEvent)] = I(30), 912 [B(NI_LogicLow)] = I(31), 913 }, 914 [B(NI_CtrGate(1))] = { 915 /* source for following line: mhddk examples */ 916 [B(NI_PFI(0))] = I(1), 917 [B(NI_PFI(1))] = I(2), 918 [B(NI_PFI(2))] = I(3), 919 [B(NI_PFI(3))] = I(4), 920 [B(NI_PFI(4))] = I(5), 921 [B(NI_PFI(5))] = I(6), 922 [B(NI_PFI(6))] = I(7), 923 [B(NI_PFI(7))] = I(8), 924 [B(NI_PFI(8))] = I(9), 925 [B(NI_PFI(9))] = I(10), 926 [B(NI_PFI(10))] = I(21), 927 [B(NI_PFI(11))] = I(22), 928 [B(NI_PFI(12))] = I(23), 929 [B(NI_PFI(13))] = I(24), 930 [B(NI_PFI(14))] = I(25), 931 [B(NI_PFI(15))] = I(26), 932 [B(TRIGGER_LINE(0))] = I(11), 933 [B(TRIGGER_LINE(1))] = I(12), 934 [B(TRIGGER_LINE(2))] = I(13), 935 [B(TRIGGER_LINE(3))] = I(14), 936 [B(TRIGGER_LINE(4))] = I(15), 937 [B(TRIGGER_LINE(5))] = I(16), 938 [B(TRIGGER_LINE(6))] = I(17), 939 [B(TRIGGER_LINE(7))] = I(27), 940 [B(NI_CtrSource(0))] = I(29), 941 /* source for following line: mhddk GP examples */ 942 [B(NI_CtrInternalOutput(0))] = I(20), 943 [B(PXI_Star)] = I(19), 944 [B(NI_AI_StartTrigger)] = I(28), 945 [B(NI_AI_ReferenceTrigger)] = I(18), 946 [B(NI_AnalogComparisonEvent)] = I(30), 947 [B(NI_LogicLow)] = I(31), 948 }, 949 [B(NI_CtrAux(0))] = { 950 /* these are just a guess; see GATE SELECT NOTE */ 951 [B(NI_PFI(0))] = I(1), 952 [B(NI_PFI(1))] = I(2), 953 [B(NI_PFI(2))] = I(3), 954 [B(NI_PFI(3))] = I(4), 955 [B(NI_PFI(4))] = I(5), 956 [B(NI_PFI(5))] = I(6), 957 [B(NI_PFI(6))] = I(7), 958 [B(NI_PFI(7))] = I(8), 959 [B(NI_PFI(8))] = I(9), 960 [B(NI_PFI(9))] = I(10), 961 [B(NI_PFI(10))] = I(21), 962 [B(NI_PFI(11))] = I(22), 963 [B(NI_PFI(12))] = I(23), 964 [B(NI_PFI(13))] = I(24), 965 [B(NI_PFI(14))] = I(25), 966 [B(NI_PFI(15))] = I(26), 967 [B(TRIGGER_LINE(0))] = I(11), 968 [B(TRIGGER_LINE(1))] = I(12), 969 [B(TRIGGER_LINE(2))] = I(13), 970 [B(TRIGGER_LINE(3))] = I(14), 971 [B(TRIGGER_LINE(4))] = I(15), 972 [B(TRIGGER_LINE(5))] = I(16), 973 [B(TRIGGER_LINE(6))] = I(17), 974 [B(TRIGGER_LINE(7))] = I(27), 975 [B(NI_CtrSource(1))] = I(29), 976 /* source for following line: mhddk GP examples */ 977 [B(NI_CtrInternalOutput(1))] = I(20), 978 [B(PXI_Star)] = I(19), 979 [B(NI_AI_StartTrigger)] = I(28), 980 [B(NI_AI_ReferenceTrigger)] = I(18), 981 [B(NI_AnalogComparisonEvent)] = I(30), 982 [B(NI_LogicLow)] = I(31), 983 }, 984 [B(NI_CtrAux(1))] = { 985 /* these are just a guess; see GATE SELECT NOTE */ 986 [B(NI_PFI(0))] = I(1), 987 [B(NI_PFI(1))] = I(2), 988 [B(NI_PFI(2))] = I(3), 989 [B(NI_PFI(3))] = I(4), 990 [B(NI_PFI(4))] = I(5), 991 [B(NI_PFI(5))] = I(6), 992 [B(NI_PFI(6))] = I(7), 993 [B(NI_PFI(7))] = I(8), 994 [B(NI_PFI(8))] = I(9), 995 [B(NI_PFI(9))] = I(10), 996 [B(NI_PFI(10))] = I(21), 997 [B(NI_PFI(11))] = I(22), 998 [B(NI_PFI(12))] = I(23), 999 [B(NI_PFI(13))] = I(24), 1000 [B(NI_PFI(14))] = I(25), 1001 [B(NI_PFI(15))] = I(26), 1002 [B(TRIGGER_LINE(0))] = I(11), 1003 [B(TRIGGER_LINE(1))] = I(12), 1004 [B(TRIGGER_LINE(2))] = I(13), 1005 [B(TRIGGER_LINE(3))] = I(14), 1006 [B(TRIGGER_LINE(4))] = I(15), 1007 [B(TRIGGER_LINE(5))] = I(16), 1008 [B(TRIGGER_LINE(6))] = I(17), 1009 [B(TRIGGER_LINE(7))] = I(27), 1010 [B(NI_CtrSource(0))] = I(29), 1011 /* source for following line: mhddk GP examples */ 1012 [B(NI_CtrInternalOutput(0))] = I(20), 1013 [B(PXI_Star)] = I(19), 1014 [B(NI_AI_StartTrigger)] = I(28), 1015 [B(NI_AI_ReferenceTrigger)] = I(18), 1016 [B(NI_AnalogComparisonEvent)] = I(30), 1017 [B(NI_LogicLow)] = I(31), 1018 }, 1019 [B(NI_CtrA(0))] = { 1020 /* 1021 * See nimseries/Examples for outputs; inputs a guess 1022 * from device routes shown on NI-MAX. 1023 * see M-Series user manual (371022K-01) 1024 */ 1025 [B(NI_PFI(0))] = I(1), 1026 [B(NI_PFI(1))] = I(2), 1027 [B(NI_PFI(2))] = I(3), 1028 [B(NI_PFI(3))] = I(4), 1029 [B(NI_PFI(4))] = I(5), 1030 [B(NI_PFI(5))] = I(6), 1031 [B(NI_PFI(6))] = I(7), 1032 [B(NI_PFI(7))] = I(8), 1033 [B(NI_PFI(8))] = I(9), 1034 [B(NI_PFI(9))] = I(10), 1035 [B(NI_PFI(10))] = I(21), 1036 [B(NI_PFI(11))] = I(22), 1037 [B(NI_PFI(12))] = I(23), 1038 [B(NI_PFI(13))] = I(24), 1039 [B(NI_PFI(14))] = I(25), 1040 [B(NI_PFI(15))] = I(26), 1041 [B(TRIGGER_LINE(0))] = I(11), 1042 [B(TRIGGER_LINE(1))] = I(12), 1043 [B(TRIGGER_LINE(2))] = I(13), 1044 [B(TRIGGER_LINE(3))] = I(14), 1045 [B(TRIGGER_LINE(4))] = I(15), 1046 [B(TRIGGER_LINE(5))] = I(16), 1047 [B(TRIGGER_LINE(6))] = I(17), 1048 [B(TRIGGER_LINE(7))] = I(27), 1049 [B(PXI_Star)] = I(20), 1050 [B(NI_AnalogComparisonEvent)] = I(30), 1051 [B(NI_LogicLow)] = I(31), 1052 }, 1053 [B(NI_CtrA(1))] = { 1054 /* 1055 * See nimseries/Examples for outputs; inputs a guess 1056 * from device routes shown on NI-MAX. 1057 * see M-Series user manual (371022K-01) 1058 */ 1059 [B(NI_PFI(0))] = I(1), 1060 [B(NI_PFI(1))] = I(2), 1061 [B(NI_PFI(2))] = I(3), 1062 [B(NI_PFI(3))] = I(4), 1063 [B(NI_PFI(4))] = I(5), 1064 [B(NI_PFI(5))] = I(6), 1065 [B(NI_PFI(6))] = I(7), 1066 [B(NI_PFI(7))] = I(8), 1067 [B(NI_PFI(8))] = I(9), 1068 [B(NI_PFI(9))] = I(10), 1069 [B(NI_PFI(10))] = I(21), 1070 [B(NI_PFI(11))] = I(22), 1071 [B(NI_PFI(12))] = I(23), 1072 [B(NI_PFI(13))] = I(24), 1073 [B(NI_PFI(14))] = I(25), 1074 [B(NI_PFI(15))] = I(26), 1075 [B(TRIGGER_LINE(0))] = I(11), 1076 [B(TRIGGER_LINE(1))] = I(12), 1077 [B(TRIGGER_LINE(2))] = I(13), 1078 [B(TRIGGER_LINE(3))] = I(14), 1079 [B(TRIGGER_LINE(4))] = I(15), 1080 [B(TRIGGER_LINE(5))] = I(16), 1081 [B(TRIGGER_LINE(6))] = I(17), 1082 [B(TRIGGER_LINE(7))] = I(27), 1083 [B(PXI_Star)] = I(20), 1084 [B(NI_AnalogComparisonEvent)] = I(30), 1085 [B(NI_LogicLow)] = I(31), 1086 }, 1087 [B(NI_CtrB(0))] = { 1088 /* 1089 * See nimseries/Examples for outputs; inputs a guess 1090 * from device routes shown on NI-MAX. 1091 * see M-Series user manual (371022K-01) 1092 */ 1093 [B(NI_PFI(0))] = I(1), 1094 [B(NI_PFI(1))] = I(2), 1095 [B(NI_PFI(2))] = I(3), 1096 [B(NI_PFI(3))] = I(4), 1097 [B(NI_PFI(4))] = I(5), 1098 [B(NI_PFI(5))] = I(6), 1099 [B(NI_PFI(6))] = I(7), 1100 [B(NI_PFI(7))] = I(8), 1101 [B(NI_PFI(8))] = I(9), 1102 [B(NI_PFI(9))] = I(10), 1103 [B(NI_PFI(10))] = I(21), 1104 [B(NI_PFI(11))] = I(22), 1105 [B(NI_PFI(12))] = I(23), 1106 [B(NI_PFI(13))] = I(24), 1107 [B(NI_PFI(14))] = I(25), 1108 [B(NI_PFI(15))] = I(26), 1109 [B(TRIGGER_LINE(0))] = I(11), 1110 [B(TRIGGER_LINE(1))] = I(12), 1111 [B(TRIGGER_LINE(2))] = I(13), 1112 [B(TRIGGER_LINE(3))] = I(14), 1113 [B(TRIGGER_LINE(4))] = I(15), 1114 [B(TRIGGER_LINE(5))] = I(16), 1115 [B(TRIGGER_LINE(6))] = I(17), 1116 [B(TRIGGER_LINE(7))] = I(27), 1117 [B(PXI_Star)] = I(20), 1118 [B(NI_AnalogComparisonEvent)] = I(30), 1119 [B(NI_LogicLow)] = I(31), 1120 }, 1121 [B(NI_CtrB(1))] = { 1122 /* 1123 * See nimseries/Examples for outputs; inputs a guess 1124 * from device routes shown on NI-MAX. 1125 * see M-Series user manual (371022K-01) 1126 */ 1127 [B(NI_PFI(0))] = I(1), 1128 [B(NI_PFI(1))] = I(2), 1129 [B(NI_PFI(2))] = I(3), 1130 [B(NI_PFI(3))] = I(4), 1131 [B(NI_PFI(4))] = I(5), 1132 [B(NI_PFI(5))] = I(6), 1133 [B(NI_PFI(6))] = I(7), 1134 [B(NI_PFI(7))] = I(8), 1135 [B(NI_PFI(8))] = I(9), 1136 [B(NI_PFI(9))] = I(10), 1137 [B(NI_PFI(10))] = I(21), 1138 [B(NI_PFI(11))] = I(22), 1139 [B(NI_PFI(12))] = I(23), 1140 [B(NI_PFI(13))] = I(24), 1141 [B(NI_PFI(14))] = I(25), 1142 [B(NI_PFI(15))] = I(26), 1143 [B(TRIGGER_LINE(0))] = I(11), 1144 [B(TRIGGER_LINE(1))] = I(12), 1145 [B(TRIGGER_LINE(2))] = I(13), 1146 [B(TRIGGER_LINE(3))] = I(14), 1147 [B(TRIGGER_LINE(4))] = I(15), 1148 [B(TRIGGER_LINE(5))] = I(16), 1149 [B(TRIGGER_LINE(6))] = I(17), 1150 [B(TRIGGER_LINE(7))] = I(27), 1151 [B(PXI_Star)] = I(20), 1152 [B(NI_AnalogComparisonEvent)] = I(30), 1153 [B(NI_LogicLow)] = I(31), 1154 }, 1155 [B(NI_CtrZ(0))] = { 1156 /* 1157 * See nimseries/Examples for outputs; inputs a guess 1158 * from device routes shown on NI-MAX. 1159 * see M-Series user manual (371022K-01) 1160 */ 1161 [B(NI_PFI(0))] = I(1), 1162 [B(NI_PFI(1))] = I(2), 1163 [B(NI_PFI(2))] = I(3), 1164 [B(NI_PFI(3))] = I(4), 1165 [B(NI_PFI(4))] = I(5), 1166 [B(NI_PFI(5))] = I(6), 1167 [B(NI_PFI(6))] = I(7), 1168 [B(NI_PFI(7))] = I(8), 1169 [B(NI_PFI(8))] = I(9), 1170 [B(NI_PFI(9))] = I(10), 1171 [B(NI_PFI(10))] = I(21), 1172 [B(NI_PFI(11))] = I(22), 1173 [B(NI_PFI(12))] = I(23), 1174 [B(NI_PFI(13))] = I(24), 1175 [B(NI_PFI(14))] = I(25), 1176 [B(NI_PFI(15))] = I(26), 1177 [B(TRIGGER_LINE(0))] = I(11), 1178 [B(TRIGGER_LINE(1))] = I(12), 1179 [B(TRIGGER_LINE(2))] = I(13), 1180 [B(TRIGGER_LINE(3))] = I(14), 1181 [B(TRIGGER_LINE(4))] = I(15), 1182 [B(TRIGGER_LINE(5))] = I(16), 1183 [B(TRIGGER_LINE(6))] = I(17), 1184 [B(TRIGGER_LINE(7))] = I(27), 1185 [B(PXI_Star)] = I(20), 1186 [B(NI_AnalogComparisonEvent)] = I(30), 1187 [B(NI_LogicLow)] = I(31), 1188 }, 1189 [B(NI_CtrZ(1))] = { 1190 /* 1191 * See nimseries/Examples for outputs; inputs a guess 1192 * from device routes shown on NI-MAX. 1193 * see M-Series user manual (371022K-01) 1194 */ 1195 [B(NI_PFI(0))] = I(1), 1196 [B(NI_PFI(1))] = I(2), 1197 [B(NI_PFI(2))] = I(3), 1198 [B(NI_PFI(3))] = I(4), 1199 [B(NI_PFI(4))] = I(5), 1200 [B(NI_PFI(5))] = I(6), 1201 [B(NI_PFI(6))] = I(7), 1202 [B(NI_PFI(7))] = I(8), 1203 [B(NI_PFI(8))] = I(9), 1204 [B(NI_PFI(9))] = I(10), 1205 [B(NI_PFI(10))] = I(21), 1206 [B(NI_PFI(11))] = I(22), 1207 [B(NI_PFI(12))] = I(23), 1208 [B(NI_PFI(13))] = I(24), 1209 [B(NI_PFI(14))] = I(25), 1210 [B(NI_PFI(15))] = I(26), 1211 [B(TRIGGER_LINE(0))] = I(11), 1212 [B(TRIGGER_LINE(1))] = I(12), 1213 [B(TRIGGER_LINE(2))] = I(13), 1214 [B(TRIGGER_LINE(3))] = I(14), 1215 [B(TRIGGER_LINE(4))] = I(15), 1216 [B(TRIGGER_LINE(5))] = I(16), 1217 [B(TRIGGER_LINE(6))] = I(17), 1218 [B(TRIGGER_LINE(7))] = I(27), 1219 [B(PXI_Star)] = I(20), 1220 [B(NI_AnalogComparisonEvent)] = I(30), 1221 [B(NI_LogicLow)] = I(31), 1222 }, 1223 [B(NI_CtrArmStartTrigger(0))] = { 1224 /* these are just a guess; see GATE SELECT NOTE */ 1225 [B(NI_PFI(0))] = I(1), 1226 [B(NI_PFI(1))] = I(2), 1227 [B(NI_PFI(2))] = I(3), 1228 [B(NI_PFI(3))] = I(4), 1229 [B(NI_PFI(4))] = I(5), 1230 [B(NI_PFI(5))] = I(6), 1231 [B(NI_PFI(6))] = I(7), 1232 [B(NI_PFI(7))] = I(8), 1233 [B(NI_PFI(8))] = I(9), 1234 [B(NI_PFI(9))] = I(10), 1235 [B(NI_PFI(10))] = I(21), 1236 [B(NI_PFI(11))] = I(22), 1237 [B(NI_PFI(12))] = I(23), 1238 [B(NI_PFI(13))] = I(24), 1239 [B(NI_PFI(14))] = I(25), 1240 [B(NI_PFI(15))] = I(26), 1241 [B(TRIGGER_LINE(0))] = I(11), 1242 [B(TRIGGER_LINE(1))] = I(12), 1243 [B(TRIGGER_LINE(2))] = I(13), 1244 [B(TRIGGER_LINE(3))] = I(14), 1245 [B(TRIGGER_LINE(4))] = I(15), 1246 [B(TRIGGER_LINE(5))] = I(16), 1247 [B(TRIGGER_LINE(6))] = I(17), 1248 [B(TRIGGER_LINE(7))] = I(27), 1249 [B(NI_CtrSource(1))] = I(29), 1250 /* source for following line: mhddk GP examples */ 1251 [B(NI_CtrInternalOutput(1))] = I(20), 1252 [B(PXI_Star)] = I(19), 1253 [B(NI_AI_StartTrigger)] = I(28), 1254 [B(NI_AI_ReferenceTrigger)] = I(18), 1255 [B(NI_AnalogComparisonEvent)] = I(30), 1256 [B(NI_LogicLow)] = I(31), 1257 }, 1258 [B(NI_CtrArmStartTrigger(1))] = { 1259 /* these are just a guess; see GATE SELECT NOTE */ 1260 [B(NI_PFI(0))] = I(1), 1261 [B(NI_PFI(1))] = I(2), 1262 [B(NI_PFI(2))] = I(3), 1263 [B(NI_PFI(3))] = I(4), 1264 [B(NI_PFI(4))] = I(5), 1265 [B(NI_PFI(5))] = I(6), 1266 [B(NI_PFI(6))] = I(7), 1267 [B(NI_PFI(7))] = I(8), 1268 [B(NI_PFI(8))] = I(9), 1269 [B(NI_PFI(9))] = I(10), 1270 [B(NI_PFI(10))] = I(21), 1271 [B(NI_PFI(11))] = I(22), 1272 [B(NI_PFI(12))] = I(23), 1273 [B(NI_PFI(13))] = I(24), 1274 [B(NI_PFI(14))] = I(25), 1275 [B(NI_PFI(15))] = I(26), 1276 [B(TRIGGER_LINE(0))] = I(11), 1277 [B(TRIGGER_LINE(1))] = I(12), 1278 [B(TRIGGER_LINE(2))] = I(13), 1279 [B(TRIGGER_LINE(3))] = I(14), 1280 [B(TRIGGER_LINE(4))] = I(15), 1281 [B(TRIGGER_LINE(5))] = I(16), 1282 [B(TRIGGER_LINE(6))] = I(17), 1283 [B(TRIGGER_LINE(7))] = I(27), 1284 [B(NI_CtrSource(0))] = I(29), 1285 /* source for following line: mhddk GP examples */ 1286 [B(NI_CtrInternalOutput(0))] = I(20), 1287 [B(PXI_Star)] = I(19), 1288 [B(NI_AI_StartTrigger)] = I(28), 1289 [B(NI_AI_ReferenceTrigger)] = I(18), 1290 [B(NI_AnalogComparisonEvent)] = I(30), 1291 [B(NI_LogicLow)] = I(31), 1292 }, 1293 [B(NI_CtrOut(0))] = { 1294 [B(TRIGGER_LINE(0))] = I(1), 1295 [B(TRIGGER_LINE(1))] = I(2), 1296 [B(TRIGGER_LINE(2))] = I(3), 1297 [B(TRIGGER_LINE(3))] = I(4), 1298 [B(TRIGGER_LINE(4))] = I(5), 1299 [B(TRIGGER_LINE(5))] = I(6), 1300 [B(TRIGGER_LINE(6))] = I(7), 1301 [B(NI_CtrInternalOutput(0))] = I(0), 1302 }, 1303 [B(NI_CtrOut(1))] = { 1304 [B(NI_CtrInternalOutput(1))] = I(0), 1305 }, 1306 [B(NI_AI_SampleClock)] = { 1307 [B(NI_PFI(0))] = I(1), 1308 [B(NI_PFI(1))] = I(2), 1309 [B(NI_PFI(2))] = I(3), 1310 [B(NI_PFI(3))] = I(4), 1311 [B(NI_PFI(4))] = I(5), 1312 [B(NI_PFI(5))] = I(6), 1313 [B(NI_PFI(6))] = I(7), 1314 [B(NI_PFI(7))] = I(8), 1315 [B(NI_PFI(8))] = I(9), 1316 [B(NI_PFI(9))] = I(10), 1317 [B(NI_PFI(10))] = I(21), 1318 [B(NI_PFI(11))] = I(22), 1319 [B(NI_PFI(12))] = I(23), 1320 [B(NI_PFI(13))] = I(24), 1321 [B(NI_PFI(14))] = I(25), 1322 [B(NI_PFI(15))] = I(26), 1323 [B(TRIGGER_LINE(0))] = I(11), 1324 [B(TRIGGER_LINE(1))] = I(12), 1325 [B(TRIGGER_LINE(2))] = I(13), 1326 [B(TRIGGER_LINE(3))] = I(14), 1327 [B(TRIGGER_LINE(4))] = I(15), 1328 [B(TRIGGER_LINE(5))] = I(16), 1329 [B(TRIGGER_LINE(6))] = I(17), 1330 [B(TRIGGER_LINE(7))] = I(27), 1331 [B(NI_CtrInternalOutput(0))] = I(19), 1332 [B(NI_CtrInternalOutput(1))] = I(28), 1333 [B(PXI_Star)] = I(20), 1334 [B(NI_AI_SampleClockTimebase)] = I(0), 1335 [B(NI_AnalogComparisonEvent)] = I(30), 1336 [B(NI_SCXI_Trig1)] = I(29), 1337 [B(NI_LogicLow)] = I(31), 1338 }, 1339 [B(NI_AI_SampleClockTimebase)] = { 1340 /* These are not currently implemented in ni modules */ 1341 [B(NI_PFI(0))] = U(1), 1342 [B(NI_PFI(1))] = U(2), 1343 [B(NI_PFI(2))] = U(3), 1344 [B(NI_PFI(3))] = U(4), 1345 [B(NI_PFI(4))] = U(5), 1346 [B(NI_PFI(5))] = U(6), 1347 [B(NI_PFI(6))] = U(7), 1348 [B(NI_PFI(7))] = U(8), 1349 [B(NI_PFI(8))] = U(9), 1350 [B(NI_PFI(9))] = U(10), 1351 [B(NI_PFI(10))] = U(21), 1352 [B(NI_PFI(11))] = U(22), 1353 [B(NI_PFI(12))] = U(23), 1354 [B(NI_PFI(13))] = U(24), 1355 [B(NI_PFI(14))] = U(25), 1356 [B(NI_PFI(15))] = U(26), 1357 [B(TRIGGER_LINE(0))] = U(11), 1358 [B(TRIGGER_LINE(1))] = U(12), 1359 [B(TRIGGER_LINE(2))] = U(13), 1360 [B(TRIGGER_LINE(3))] = U(14), 1361 [B(TRIGGER_LINE(4))] = U(15), 1362 [B(TRIGGER_LINE(5))] = U(16), 1363 [B(TRIGGER_LINE(6))] = U(17), 1364 [B(TRIGGER_LINE(7))] = U(27), 1365 [B(PXI_Star)] = U(20), 1366 [B(PXI_Clk10)] = U(29), 1367 /* 1368 * For routes (*->NI_AI_SampleClockTimebase) and 1369 * (*->NI_AO_SampleClockTimebase), tMSeries.h of MHDDK 1370 * shows 0 value as selecting ground (case ground?) and 1371 * 28 value selecting TIMEBASE 1. 1372 */ 1373 [B(NI_20MHzTimebase)] = U(28), 1374 [B(NI_100kHzTimebase)] = U(19), 1375 [B(NI_AnalogComparisonEvent)] = U(30), 1376 [B(NI_LogicLow)] = U(31), 1377 [B(NI_CaseGround)] = U(0), 1378 }, 1379 [B(NI_AI_StartTrigger)] = { 1380 [B(NI_PFI(0))] = I(1), 1381 [B(NI_PFI(1))] = I(2), 1382 [B(NI_PFI(2))] = I(3), 1383 [B(NI_PFI(3))] = I(4), 1384 [B(NI_PFI(4))] = I(5), 1385 [B(NI_PFI(5))] = I(6), 1386 [B(NI_PFI(6))] = I(7), 1387 [B(NI_PFI(7))] = I(8), 1388 [B(NI_PFI(8))] = I(9), 1389 [B(NI_PFI(9))] = I(10), 1390 [B(NI_PFI(10))] = I(21), 1391 [B(NI_PFI(11))] = I(22), 1392 [B(NI_PFI(12))] = I(23), 1393 [B(NI_PFI(13))] = I(24), 1394 [B(NI_PFI(14))] = I(25), 1395 [B(NI_PFI(15))] = I(26), 1396 [B(TRIGGER_LINE(0))] = I(11), 1397 [B(TRIGGER_LINE(1))] = I(12), 1398 [B(TRIGGER_LINE(2))] = I(13), 1399 [B(TRIGGER_LINE(3))] = I(14), 1400 [B(TRIGGER_LINE(4))] = I(15), 1401 [B(TRIGGER_LINE(5))] = I(16), 1402 [B(TRIGGER_LINE(6))] = I(17), 1403 [B(TRIGGER_LINE(7))] = I(27), 1404 [B(NI_CtrInternalOutput(0))] = I(18), 1405 [B(NI_CtrInternalOutput(1))] = I(19), 1406 [B(PXI_Star)] = I(20), 1407 [B(NI_AnalogComparisonEvent)] = I(30), 1408 [B(NI_LogicLow)] = I(31), 1409 }, 1410 [B(NI_AI_ReferenceTrigger)] = { 1411 /* These are not currently implemented in ni modules */ 1412 [B(NI_PFI(0))] = U(1), 1413 [B(NI_PFI(1))] = U(2), 1414 [B(NI_PFI(2))] = U(3), 1415 [B(NI_PFI(3))] = U(4), 1416 [B(NI_PFI(4))] = U(5), 1417 [B(NI_PFI(5))] = U(6), 1418 [B(NI_PFI(6))] = U(7), 1419 [B(NI_PFI(7))] = U(8), 1420 [B(NI_PFI(8))] = U(9), 1421 [B(NI_PFI(9))] = U(10), 1422 [B(NI_PFI(10))] = U(21), 1423 [B(NI_PFI(11))] = U(22), 1424 [B(NI_PFI(12))] = U(23), 1425 [B(NI_PFI(13))] = U(24), 1426 [B(NI_PFI(14))] = U(25), 1427 [B(NI_PFI(15))] = U(26), 1428 [B(TRIGGER_LINE(0))] = U(11), 1429 [B(TRIGGER_LINE(1))] = U(12), 1430 [B(TRIGGER_LINE(2))] = U(13), 1431 [B(TRIGGER_LINE(3))] = U(14), 1432 [B(TRIGGER_LINE(4))] = U(15), 1433 [B(TRIGGER_LINE(5))] = U(16), 1434 [B(TRIGGER_LINE(6))] = U(17), 1435 [B(TRIGGER_LINE(7))] = U(27), 1436 [B(PXI_Star)] = U(20), 1437 [B(NI_AnalogComparisonEvent)] = U(30), 1438 [B(NI_LogicLow)] = U(31), 1439 }, 1440 [B(NI_AI_ConvertClock)] = { 1441 [B(NI_PFI(0))] = I(1), 1442 [B(NI_PFI(1))] = I(2), 1443 [B(NI_PFI(2))] = I(3), 1444 [B(NI_PFI(3))] = I(4), 1445 [B(NI_PFI(4))] = I(5), 1446 [B(NI_PFI(5))] = I(6), 1447 [B(NI_PFI(6))] = I(7), 1448 [B(NI_PFI(7))] = I(8), 1449 [B(NI_PFI(8))] = I(9), 1450 [B(NI_PFI(9))] = I(10), 1451 [B(NI_PFI(10))] = I(21), 1452 [B(NI_PFI(11))] = I(22), 1453 [B(NI_PFI(12))] = I(23), 1454 [B(NI_PFI(13))] = I(24), 1455 [B(NI_PFI(14))] = I(25), 1456 [B(NI_PFI(15))] = I(26), 1457 [B(TRIGGER_LINE(0))] = I(11), 1458 [B(TRIGGER_LINE(1))] = I(12), 1459 [B(TRIGGER_LINE(2))] = I(13), 1460 [B(TRIGGER_LINE(3))] = I(14), 1461 [B(TRIGGER_LINE(4))] = I(15), 1462 [B(TRIGGER_LINE(5))] = I(16), 1463 [B(TRIGGER_LINE(6))] = I(17), 1464 [B(TRIGGER_LINE(7))] = I(27), 1465 /* source for following line: mhddk example headers */ 1466 [B(NI_CtrInternalOutput(0))] = I(19), 1467 /* source for following line: mhddk example headers */ 1468 [B(NI_CtrInternalOutput(1))] = I(18), 1469 [B(PXI_Star)] = I(20), 1470 [B(NI_AI_ConvertClockTimebase)] = I(0), 1471 [B(NI_AnalogComparisonEvent)] = I(30), 1472 [B(NI_LogicLow)] = I(31), 1473 }, 1474 [B(NI_AI_ConvertClockTimebase)] = { 1475 /* These are not currently implemented in ni modules */ 1476 [B(NI_AI_SampleClockTimebase)] = U(0), 1477 [B(NI_20MHzTimebase)] = U(1), 1478 }, 1479 [B(NI_AI_PauseTrigger)] = { 1480 /* These are not currently implemented in ni modules */ 1481 [B(NI_PFI(0))] = U(1), 1482 [B(NI_PFI(1))] = U(2), 1483 [B(NI_PFI(2))] = U(3), 1484 [B(NI_PFI(3))] = U(4), 1485 [B(NI_PFI(4))] = U(5), 1486 [B(NI_PFI(5))] = U(6), 1487 [B(NI_PFI(6))] = U(7), 1488 [B(NI_PFI(7))] = U(8), 1489 [B(NI_PFI(8))] = U(9), 1490 [B(NI_PFI(9))] = U(10), 1491 [B(NI_PFI(10))] = U(21), 1492 [B(NI_PFI(11))] = U(22), 1493 [B(NI_PFI(12))] = U(23), 1494 [B(NI_PFI(13))] = U(24), 1495 [B(NI_PFI(14))] = U(25), 1496 [B(NI_PFI(15))] = U(26), 1497 [B(TRIGGER_LINE(0))] = U(11), 1498 [B(TRIGGER_LINE(1))] = U(12), 1499 [B(TRIGGER_LINE(2))] = U(13), 1500 [B(TRIGGER_LINE(3))] = U(14), 1501 [B(TRIGGER_LINE(4))] = U(15), 1502 [B(TRIGGER_LINE(5))] = U(16), 1503 [B(TRIGGER_LINE(6))] = U(17), 1504 [B(TRIGGER_LINE(7))] = U(27), 1505 [B(PXI_Star)] = U(20), 1506 [B(NI_AnalogComparisonEvent)] = U(30), 1507 [B(NI_LogicLow)] = U(31), 1508 }, 1509 [B(NI_AO_SampleClock)] = { 1510 [B(NI_PFI(0))] = I(1), 1511 [B(NI_PFI(1))] = I(2), 1512 [B(NI_PFI(2))] = I(3), 1513 [B(NI_PFI(3))] = I(4), 1514 [B(NI_PFI(4))] = I(5), 1515 [B(NI_PFI(5))] = I(6), 1516 [B(NI_PFI(6))] = I(7), 1517 [B(NI_PFI(7))] = I(8), 1518 [B(NI_PFI(8))] = I(9), 1519 [B(NI_PFI(9))] = I(10), 1520 [B(NI_PFI(10))] = I(21), 1521 [B(NI_PFI(11))] = I(22), 1522 [B(NI_PFI(12))] = I(23), 1523 [B(NI_PFI(13))] = I(24), 1524 [B(NI_PFI(14))] = I(25), 1525 [B(NI_PFI(15))] = I(26), 1526 [B(TRIGGER_LINE(0))] = I(11), 1527 [B(TRIGGER_LINE(1))] = I(12), 1528 [B(TRIGGER_LINE(2))] = I(13), 1529 [B(TRIGGER_LINE(3))] = I(14), 1530 [B(TRIGGER_LINE(4))] = I(15), 1531 [B(TRIGGER_LINE(5))] = I(16), 1532 [B(TRIGGER_LINE(6))] = I(17), 1533 [B(TRIGGER_LINE(7))] = I(27), 1534 [B(NI_CtrInternalOutput(0))] = I(18), 1535 [B(NI_CtrInternalOutput(1))] = I(19), 1536 [B(PXI_Star)] = I(20), 1537 [B(NI_AO_SampleClockTimebase)] = I(0), 1538 [B(NI_AnalogComparisonEvent)] = I(30), 1539 [B(NI_LogicLow)] = I(31), 1540 }, 1541 [B(NI_AO_SampleClockTimebase)] = { 1542 /* These are not currently implemented in ni modules */ 1543 [B(NI_PFI(0))] = U(1), 1544 [B(NI_PFI(1))] = U(2), 1545 [B(NI_PFI(2))] = U(3), 1546 [B(NI_PFI(3))] = U(4), 1547 [B(NI_PFI(4))] = U(5), 1548 [B(NI_PFI(5))] = U(6), 1549 [B(NI_PFI(6))] = U(7), 1550 [B(NI_PFI(7))] = U(8), 1551 [B(NI_PFI(8))] = U(9), 1552 [B(NI_PFI(9))] = U(10), 1553 [B(NI_PFI(10))] = U(21), 1554 [B(NI_PFI(11))] = U(22), 1555 [B(NI_PFI(12))] = U(23), 1556 [B(NI_PFI(13))] = U(24), 1557 [B(NI_PFI(14))] = U(25), 1558 [B(NI_PFI(15))] = U(26), 1559 [B(TRIGGER_LINE(0))] = U(11), 1560 [B(TRIGGER_LINE(1))] = U(12), 1561 [B(TRIGGER_LINE(2))] = U(13), 1562 [B(TRIGGER_LINE(3))] = U(14), 1563 [B(TRIGGER_LINE(4))] = U(15), 1564 [B(TRIGGER_LINE(5))] = U(16), 1565 [B(TRIGGER_LINE(6))] = U(17), 1566 [B(TRIGGER_LINE(7))] = U(27), 1567 [B(PXI_Star)] = U(20), 1568 [B(PXI_Clk10)] = U(29), 1569 /* 1570 * For routes (*->NI_AI_SampleClockTimebase) and 1571 * (*->NI_AO_SampleClockTimebase), tMSeries.h of MHDDK 1572 * shows 0 value as selecting ground (case ground?) and 1573 * 28 value selecting TIMEBASE 1. 1574 */ 1575 [B(NI_20MHzTimebase)] = U(28), 1576 [B(NI_100kHzTimebase)] = U(19), 1577 [B(NI_AnalogComparisonEvent)] = U(30), 1578 [B(NI_LogicLow)] = U(31), 1579 [B(NI_CaseGround)] = U(0), 1580 }, 1581 [B(NI_AO_StartTrigger)] = { 1582 [B(NI_PFI(0))] = I(1), 1583 [B(NI_PFI(1))] = I(2), 1584 [B(NI_PFI(2))] = I(3), 1585 [B(NI_PFI(3))] = I(4), 1586 [B(NI_PFI(4))] = I(5), 1587 [B(NI_PFI(5))] = I(6), 1588 [B(NI_PFI(6))] = I(7), 1589 [B(NI_PFI(7))] = I(8), 1590 [B(NI_PFI(8))] = I(9), 1591 [B(NI_PFI(9))] = I(10), 1592 [B(NI_PFI(10))] = I(21), 1593 [B(NI_PFI(11))] = I(22), 1594 [B(NI_PFI(12))] = I(23), 1595 [B(NI_PFI(13))] = I(24), 1596 [B(NI_PFI(14))] = I(25), 1597 [B(NI_PFI(15))] = I(26), 1598 [B(TRIGGER_LINE(0))] = I(11), 1599 [B(TRIGGER_LINE(1))] = I(12), 1600 [B(TRIGGER_LINE(2))] = I(13), 1601 [B(TRIGGER_LINE(3))] = I(14), 1602 [B(TRIGGER_LINE(4))] = I(15), 1603 [B(TRIGGER_LINE(5))] = I(16), 1604 [B(TRIGGER_LINE(6))] = I(17), 1605 [B(TRIGGER_LINE(7))] = I(27), 1606 [B(PXI_Star)] = I(20), 1607 /* 1608 * for the signal route 1609 * (NI_AI_StartTrigger->NI_AO_StartTrigger), DAQ-STC & 1610 * MHDDK disagreed for e-series. MHDDK for m-series 1611 * agrees with DAQ-STC description and uses the value 18 1612 * for the route 1613 * (NI_AI_ReferenceTrigger->NI_AO_StartTrigger). The 1614 * m-series devices are supposed to have DAQ-STC2. 1615 * There are no DAQ-STC2 docs to compare with. 1616 */ 1617 [B(NI_AI_StartTrigger)] = I(19), 1618 [B(NI_AI_ReferenceTrigger)] = I(18), 1619 [B(NI_AnalogComparisonEvent)] = I(30), 1620 [B(NI_LogicLow)] = I(31), 1621 }, 1622 [B(NI_AO_PauseTrigger)] = { 1623 /* These are not currently implemented in ni modules */ 1624 [B(NI_PFI(0))] = U(1), 1625 [B(NI_PFI(1))] = U(2), 1626 [B(NI_PFI(2))] = U(3), 1627 [B(NI_PFI(3))] = U(4), 1628 [B(NI_PFI(4))] = U(5), 1629 [B(NI_PFI(5))] = U(6), 1630 [B(NI_PFI(6))] = U(7), 1631 [B(NI_PFI(7))] = U(8), 1632 [B(NI_PFI(8))] = U(9), 1633 [B(NI_PFI(9))] = U(10), 1634 [B(NI_PFI(10))] = U(21), 1635 [B(NI_PFI(11))] = U(22), 1636 [B(NI_PFI(12))] = U(23), 1637 [B(NI_PFI(13))] = U(24), 1638 [B(NI_PFI(14))] = U(25), 1639 [B(NI_PFI(15))] = U(26), 1640 [B(TRIGGER_LINE(0))] = U(11), 1641 [B(TRIGGER_LINE(1))] = U(12), 1642 [B(TRIGGER_LINE(2))] = U(13), 1643 [B(TRIGGER_LINE(3))] = U(14), 1644 [B(TRIGGER_LINE(4))] = U(15), 1645 [B(TRIGGER_LINE(5))] = U(16), 1646 [B(TRIGGER_LINE(6))] = U(17), 1647 [B(TRIGGER_LINE(7))] = U(27), 1648 [B(PXI_Star)] = U(20), 1649 [B(NI_AnalogComparisonEvent)] = U(30), 1650 [B(NI_LogicLow)] = U(31), 1651 }, 1652 [B(NI_DI_SampleClock)] = { 1653 [B(NI_PFI(0))] = I(1), 1654 [B(NI_PFI(1))] = I(2), 1655 [B(NI_PFI(2))] = I(3), 1656 [B(NI_PFI(3))] = I(4), 1657 [B(NI_PFI(4))] = I(5), 1658 [B(NI_PFI(5))] = I(6), 1659 [B(NI_PFI(6))] = I(7), 1660 [B(NI_PFI(7))] = I(8), 1661 [B(NI_PFI(8))] = I(9), 1662 [B(NI_PFI(9))] = I(10), 1663 [B(NI_PFI(10))] = I(21), 1664 [B(NI_PFI(11))] = I(22), 1665 [B(NI_PFI(12))] = I(23), 1666 [B(NI_PFI(13))] = I(24), 1667 [B(NI_PFI(14))] = I(25), 1668 [B(NI_PFI(15))] = I(26), 1669 [B(TRIGGER_LINE(0))] = I(11), 1670 [B(TRIGGER_LINE(1))] = I(12), 1671 [B(TRIGGER_LINE(2))] = I(13), 1672 [B(TRIGGER_LINE(3))] = I(14), 1673 [B(TRIGGER_LINE(4))] = I(15), 1674 [B(TRIGGER_LINE(5))] = I(16), 1675 [B(TRIGGER_LINE(6))] = I(17), 1676 [B(TRIGGER_LINE(7))] = I(27), 1677 [B(NI_CtrInternalOutput(0))] = I(28), 1678 [B(NI_CtrInternalOutput(1))] = I(29), 1679 [B(PXI_Star)] = I(20), 1680 [B(NI_AI_SampleClock)] = I(18), 1681 [B(NI_AI_ConvertClock)] = I(19), 1682 [B(NI_AO_SampleClock)] = I(31), 1683 [B(NI_FrequencyOutput)] = I(32), 1684 [B(NI_ChangeDetectionEvent)] = I(33), 1685 [B(NI_CaseGround)] = I(0), 1686 }, 1687 [B(NI_DO_SampleClock)] = { 1688 [B(NI_PFI(0))] = I(1), 1689 [B(NI_PFI(1))] = I(2), 1690 [B(NI_PFI(2))] = I(3), 1691 [B(NI_PFI(3))] = I(4), 1692 [B(NI_PFI(4))] = I(5), 1693 [B(NI_PFI(5))] = I(6), 1694 [B(NI_PFI(6))] = I(7), 1695 [B(NI_PFI(7))] = I(8), 1696 [B(NI_PFI(8))] = I(9), 1697 [B(NI_PFI(9))] = I(10), 1698 [B(NI_PFI(10))] = I(21), 1699 [B(NI_PFI(11))] = I(22), 1700 [B(NI_PFI(12))] = I(23), 1701 [B(NI_PFI(13))] = I(24), 1702 [B(NI_PFI(14))] = I(25), 1703 [B(NI_PFI(15))] = I(26), 1704 [B(TRIGGER_LINE(0))] = I(11), 1705 [B(TRIGGER_LINE(1))] = I(12), 1706 [B(TRIGGER_LINE(2))] = I(13), 1707 [B(TRIGGER_LINE(3))] = I(14), 1708 [B(TRIGGER_LINE(4))] = I(15), 1709 [B(TRIGGER_LINE(5))] = I(16), 1710 [B(TRIGGER_LINE(6))] = I(17), 1711 [B(TRIGGER_LINE(7))] = I(27), 1712 [B(NI_CtrInternalOutput(0))] = I(28), 1713 [B(NI_CtrInternalOutput(1))] = I(29), 1714 [B(PXI_Star)] = I(20), 1715 [B(NI_AI_SampleClock)] = I(18), 1716 [B(NI_AI_ConvertClock)] = I(19), 1717 [B(NI_AO_SampleClock)] = I(31), 1718 [B(NI_FrequencyOutput)] = I(32), 1719 [B(NI_ChangeDetectionEvent)] = I(33), 1720 [B(NI_CaseGround)] = I(0), 1721 }, 1722 [B(NI_MasterTimebase)] = { 1723 /* These are not currently implemented in ni modules */ 1724 [B(TRIGGER_LINE(0))] = U(11), 1725 [B(TRIGGER_LINE(1))] = U(12), 1726 [B(TRIGGER_LINE(2))] = U(13), 1727 [B(TRIGGER_LINE(3))] = U(14), 1728 [B(TRIGGER_LINE(4))] = U(15), 1729 [B(TRIGGER_LINE(5))] = U(16), 1730 [B(TRIGGER_LINE(6))] = U(17), 1731 [B(TRIGGER_LINE(7))] = U(27), 1732 [B(PXI_Star)] = U(20), 1733 [B(PXI_Clk10)] = U(29), 1734 [B(NI_10MHzRefClock)] = U(0), 1735 }, 1736 /* 1737 * This symbol is not defined and nothing for this is 1738 * implemented--just including this because data was found in 1739 * the NI-STC for it--can't remember where. 1740 * [B(NI_FrequencyOutTimebase)] = { 1741 * ** These are not currently implemented in ni modules ** 1742 * [B(NI_20MHzTimebase)] = U(0), 1743 * [B(NI_100kHzTimebase)] = U(1), 1744 * }, 1745 */ 1746 [B(NI_RGOUT0)] = { 1747 [B(NI_CtrInternalOutput(0))] = I(0), 1748 [B(NI_CtrOut(0))] = I(1), 1749 }, 1750 }, 1751 }; 1752