1 /*
2 * Linux driver for VMware's vmxnet3 ethernet NIC.
3 *
4 * Copyright (C) 2008-2022, VMware, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; version 2 of the License and no later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more
14 * details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * The full GNU General Public License is included in this distribution in
21 * the file called "COPYING".
22 *
23 * Maintained by: pv-drivers@vmware.com
24 *
25 */
26
27 #ifndef _VMXNET3_INT_H
28 #define _VMXNET3_INT_H
29
30 #include <linux/bitops.h>
31 #include <linux/ethtool.h>
32 #include <linux/delay.h>
33 #include <linux/netdevice.h>
34 #include <linux/pci.h>
35 #include <linux/compiler.h>
36 #include <linux/slab.h>
37 #include <linux/spinlock.h>
38 #include <linux/ioport.h>
39 #include <linux/highmem.h>
40 #include <linux/timer.h>
41 #include <linux/skbuff.h>
42 #include <linux/interrupt.h>
43 #include <linux/workqueue.h>
44 #include <linux/uaccess.h>
45 #include <asm/dma.h>
46 #include <asm/page.h>
47
48 #include <linux/tcp.h>
49 #include <linux/udp.h>
50 #include <linux/ip.h>
51 #include <linux/ipv6.h>
52 #include <linux/in.h>
53 #include <linux/etherdevice.h>
54 #include <asm/checksum.h>
55 #include <linux/if_vlan.h>
56 #include <linux/if_arp.h>
57 #include <linux/inetdevice.h>
58 #include <linux/log2.h>
59
60 #include "vmxnet3_defs.h"
61
62 #ifdef DEBUG
63 # define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI(debug)"
64 #else
65 # define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI"
66 #endif
67
68
69 /*
70 * Version numbers
71 */
72 #define VMXNET3_DRIVER_VERSION_STRING "1.7.0.0-k"
73
74 /* Each byte of this 32-bit integer encodes a version number in
75 * VMXNET3_DRIVER_VERSION_STRING.
76 */
77 #define VMXNET3_DRIVER_VERSION_NUM 0x01070000
78
79 #if defined(CONFIG_PCI_MSI)
80 /* RSS only makes sense if MSI-X is supported. */
81 #define VMXNET3_RSS
82 #endif
83
84 #define VMXNET3_REV_7 6 /* Vmxnet3 Rev. 7 */
85 #define VMXNET3_REV_6 5 /* Vmxnet3 Rev. 6 */
86 #define VMXNET3_REV_5 4 /* Vmxnet3 Rev. 5 */
87 #define VMXNET3_REV_4 3 /* Vmxnet3 Rev. 4 */
88 #define VMXNET3_REV_3 2 /* Vmxnet3 Rev. 3 */
89 #define VMXNET3_REV_2 1 /* Vmxnet3 Rev. 2 */
90 #define VMXNET3_REV_1 0 /* Vmxnet3 Rev. 1 */
91
92 /*
93 * Capabilities
94 */
95
96 enum {
97 VMNET_CAP_SG = 0x0001, /* Can do scatter-gather transmits. */
98 VMNET_CAP_IP4_CSUM = 0x0002, /* Can checksum only TCP/UDP over
99 * IPv4 */
100 VMNET_CAP_HW_CSUM = 0x0004, /* Can checksum all packets. */
101 VMNET_CAP_HIGH_DMA = 0x0008, /* Can DMA to high memory. */
102 VMNET_CAP_TOE = 0x0010, /* Supports TCP/IP offload. */
103 VMNET_CAP_TSO = 0x0020, /* Supports TCP Segmentation
104 * offload */
105 VMNET_CAP_SW_TSO = 0x0040, /* Supports SW TCP Segmentation */
106 VMNET_CAP_VMXNET_APROM = 0x0080, /* Vmxnet APROM support */
107 VMNET_CAP_HW_TX_VLAN = 0x0100, /* Can we do VLAN tagging in HW */
108 VMNET_CAP_HW_RX_VLAN = 0x0200, /* Can we do VLAN untagging in HW */
109 VMNET_CAP_SW_VLAN = 0x0400, /* VLAN tagging/untagging in SW */
110 VMNET_CAP_WAKE_PCKT_RCV = 0x0800, /* Can wake on network packet recv? */
111 VMNET_CAP_ENABLE_INT_INLINE = 0x1000, /* Enable Interrupt Inline */
112 VMNET_CAP_ENABLE_HEADER_COPY = 0x2000, /* copy header for vmkernel */
113 VMNET_CAP_TX_CHAIN = 0x4000, /* Guest can use multiple tx entries
114 * for a pkt */
115 VMNET_CAP_RX_CHAIN = 0x8000, /* pkt can span multiple rx entries */
116 VMNET_CAP_LPD = 0x10000, /* large pkt delivery */
117 VMNET_CAP_BPF = 0x20000, /* BPF Support in VMXNET Virtual HW*/
118 VMNET_CAP_SG_SPAN_PAGES = 0x40000, /* Scatter-gather can span multiple*/
119 /* pages transmits */
120 VMNET_CAP_IP6_CSUM = 0x80000, /* Can do IPv6 csum offload. */
121 VMNET_CAP_TSO6 = 0x100000, /* TSO seg. offload for IPv6 pkts. */
122 VMNET_CAP_TSO256k = 0x200000, /* Can do TSO seg offload for */
123 /* pkts up to 256kB. */
124 VMNET_CAP_UPT = 0x400000 /* Support UPT */
125 };
126
127 /*
128 * Maximum devices supported.
129 */
130 #define MAX_ETHERNET_CARDS 10
131 #define MAX_PCI_PASSTHRU_DEVICE 6
132
133 struct vmxnet3_cmd_ring {
134 union Vmxnet3_GenericDesc *base;
135 u32 size;
136 u32 next2fill;
137 u32 next2comp;
138 u8 gen;
139 u8 isOutOfOrder;
140 dma_addr_t basePA;
141 };
142
143 static inline void
vmxnet3_cmd_ring_adv_next2fill(struct vmxnet3_cmd_ring * ring)144 vmxnet3_cmd_ring_adv_next2fill(struct vmxnet3_cmd_ring *ring)
145 {
146 ring->next2fill++;
147 if (unlikely(ring->next2fill == ring->size)) {
148 ring->next2fill = 0;
149 VMXNET3_FLIP_RING_GEN(ring->gen);
150 }
151 }
152
153 static inline void
vmxnet3_cmd_ring_adv_next2comp(struct vmxnet3_cmd_ring * ring)154 vmxnet3_cmd_ring_adv_next2comp(struct vmxnet3_cmd_ring *ring)
155 {
156 VMXNET3_INC_RING_IDX_ONLY(ring->next2comp, ring->size);
157 }
158
159 static inline int
vmxnet3_cmd_ring_desc_avail(struct vmxnet3_cmd_ring * ring)160 vmxnet3_cmd_ring_desc_avail(struct vmxnet3_cmd_ring *ring)
161 {
162 return (ring->next2comp > ring->next2fill ? 0 : ring->size) +
163 ring->next2comp - ring->next2fill - 1;
164 }
165
166 struct vmxnet3_comp_ring {
167 union Vmxnet3_GenericDesc *base;
168 u32 size;
169 u32 next2proc;
170 u8 gen;
171 u8 intr_idx;
172 dma_addr_t basePA;
173 };
174
175 static inline void
vmxnet3_comp_ring_adv_next2proc(struct vmxnet3_comp_ring * ring)176 vmxnet3_comp_ring_adv_next2proc(struct vmxnet3_comp_ring *ring)
177 {
178 ring->next2proc++;
179 if (unlikely(ring->next2proc == ring->size)) {
180 ring->next2proc = 0;
181 VMXNET3_FLIP_RING_GEN(ring->gen);
182 }
183 }
184
185 struct vmxnet3_tx_data_ring {
186 struct Vmxnet3_TxDataDesc *base;
187 u32 size;
188 dma_addr_t basePA;
189 };
190
191 enum vmxnet3_buf_map_type {
192 VMXNET3_MAP_INVALID = 0,
193 VMXNET3_MAP_NONE,
194 VMXNET3_MAP_SINGLE,
195 VMXNET3_MAP_PAGE,
196 };
197
198 struct vmxnet3_tx_buf_info {
199 u32 map_type;
200 u16 len;
201 u16 sop_idx;
202 dma_addr_t dma_addr;
203 struct sk_buff *skb;
204 };
205
206 struct vmxnet3_tq_driver_stats {
207 u64 drop_total; /* # of pkts dropped by the driver, the
208 * counters below track droppings due to
209 * different reasons
210 */
211 u64 drop_too_many_frags;
212 u64 drop_oversized_hdr;
213 u64 drop_hdr_inspect_err;
214 u64 drop_tso;
215
216 u64 tx_ring_full;
217 u64 linearized; /* # of pkts linearized */
218 u64 copy_skb_header; /* # of times we have to copy skb header */
219 u64 oversized_hdr;
220 };
221
222 struct vmxnet3_tx_ctx {
223 bool ipv4;
224 bool ipv6;
225 u16 mss;
226 u32 l4_offset; /* only valid for pkts requesting tso or csum
227 * offloading. For encap offload, it refers to
228 * inner L4 offset i.e. it includes outer header
229 * encap header and inner eth and ip header size
230 */
231
232 u32 l4_hdr_size; /* only valid if mss != 0
233 * Refers to inner L4 hdr size for encap
234 * offload
235 */
236 u32 copy_size; /* # of bytes copied into the data ring */
237 union Vmxnet3_GenericDesc *sop_txd;
238 union Vmxnet3_GenericDesc *eop_txd;
239 };
240
241 struct vmxnet3_tx_queue {
242 char name[IFNAMSIZ+8]; /* To identify interrupt */
243 struct vmxnet3_adapter *adapter;
244 spinlock_t tx_lock;
245 struct vmxnet3_cmd_ring tx_ring;
246 struct vmxnet3_tx_buf_info *buf_info;
247 struct vmxnet3_tx_data_ring data_ring;
248 struct vmxnet3_comp_ring comp_ring;
249 struct Vmxnet3_TxQueueCtrl *shared;
250 struct vmxnet3_tq_driver_stats stats;
251 bool stopped;
252 int num_stop; /* # of times the queue is
253 * stopped */
254 int qid;
255 u16 txdata_desc_size;
256 } __attribute__((__aligned__(SMP_CACHE_BYTES)));
257
258 enum vmxnet3_rx_buf_type {
259 VMXNET3_RX_BUF_NONE = 0,
260 VMXNET3_RX_BUF_SKB = 1,
261 VMXNET3_RX_BUF_PAGE = 2
262 };
263
264 #define VMXNET3_RXD_COMP_PENDING 0
265 #define VMXNET3_RXD_COMP_DONE 1
266
267 struct vmxnet3_rx_buf_info {
268 enum vmxnet3_rx_buf_type buf_type;
269 u16 len;
270 u8 comp_state;
271 union {
272 struct sk_buff *skb;
273 struct page *page;
274 };
275 dma_addr_t dma_addr;
276 };
277
278 struct vmxnet3_rx_ctx {
279 struct sk_buff *skb;
280 u32 sop_idx;
281 };
282
283 struct vmxnet3_rq_driver_stats {
284 u64 drop_total;
285 u64 drop_err;
286 u64 drop_fcs;
287 u64 rx_buf_alloc_failure;
288 };
289
290 struct vmxnet3_rx_data_ring {
291 Vmxnet3_RxDataDesc *base;
292 dma_addr_t basePA;
293 u16 desc_size;
294 };
295
296 struct vmxnet3_rx_queue {
297 char name[IFNAMSIZ + 8]; /* To identify interrupt */
298 struct vmxnet3_adapter *adapter;
299 struct napi_struct napi;
300 struct vmxnet3_cmd_ring rx_ring[2];
301 struct vmxnet3_rx_data_ring data_ring;
302 struct vmxnet3_comp_ring comp_ring;
303 struct vmxnet3_rx_ctx rx_ctx;
304 u32 qid; /* rqID in RCD for buffer from 1st ring */
305 u32 qid2; /* rqID in RCD for buffer from 2nd ring */
306 u32 dataRingQid; /* rqID in RCD for buffer from data ring */
307 struct vmxnet3_rx_buf_info *buf_info[2];
308 struct Vmxnet3_RxQueueCtrl *shared;
309 struct vmxnet3_rq_driver_stats stats;
310 } __attribute__((__aligned__(SMP_CACHE_BYTES)));
311
312 #define VMXNET3_DEVICE_MAX_TX_QUEUES 32
313 #define VMXNET3_DEVICE_MAX_RX_QUEUES 32 /* Keep this value as a power of 2 */
314
315 #define VMXNET3_DEVICE_DEFAULT_TX_QUEUES 8
316 #define VMXNET3_DEVICE_DEFAULT_RX_QUEUES 8 /* Keep this value as a power of 2 */
317
318 /* Should be less than UPT1_RSS_MAX_IND_TABLE_SIZE */
319 #define VMXNET3_RSS_IND_TABLE_SIZE (VMXNET3_DEVICE_MAX_RX_QUEUES * 4)
320
321 #define VMXNET3_LINUX_MAX_MSIX_VECT (VMXNET3_DEVICE_MAX_TX_QUEUES + \
322 VMXNET3_DEVICE_MAX_RX_QUEUES + 1)
323 #define VMXNET3_LINUX_MIN_MSIX_VECT 3 /* 1 for tx, 1 for rx pair and 1 for event */
324
325
326 struct vmxnet3_intr {
327 enum vmxnet3_intr_mask_mode mask_mode;
328 enum vmxnet3_intr_type type; /* MSI-X, MSI, or INTx? */
329 u8 num_intrs; /* # of intr vectors */
330 u8 event_intr_idx; /* idx of the intr vector for event */
331 u8 mod_levels[VMXNET3_LINUX_MAX_MSIX_VECT]; /* moderation level */
332 char event_msi_vector_name[IFNAMSIZ+17];
333 #ifdef CONFIG_PCI_MSI
334 struct msix_entry msix_entries[VMXNET3_LINUX_MAX_MSIX_VECT];
335 #endif
336 };
337
338 /* Interrupt sharing schemes, share_intr */
339 #define VMXNET3_INTR_BUDDYSHARE 0 /* Corresponding tx,rx queues share irq */
340 #define VMXNET3_INTR_TXSHARE 1 /* All tx queues share one irq */
341 #define VMXNET3_INTR_DONTSHARE 2 /* each queue has its own irq */
342
343
344 #define VMXNET3_STATE_BIT_RESETTING 0
345 #define VMXNET3_STATE_BIT_QUIESCED 1
346 struct vmxnet3_adapter {
347 struct vmxnet3_tx_queue tx_queue[VMXNET3_DEVICE_MAX_TX_QUEUES];
348 struct vmxnet3_rx_queue rx_queue[VMXNET3_DEVICE_MAX_RX_QUEUES];
349 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
350 struct vmxnet3_intr intr;
351 spinlock_t cmd_lock;
352 struct Vmxnet3_DriverShared *shared;
353 struct Vmxnet3_PMConf *pm_conf;
354 struct Vmxnet3_TxQueueDesc *tqd_start; /* all tx queue desc */
355 struct Vmxnet3_RxQueueDesc *rqd_start; /* all rx queue desc */
356 struct net_device *netdev;
357 struct pci_dev *pdev;
358
359 u8 __iomem *hw_addr0; /* for BAR 0 */
360 u8 __iomem *hw_addr1; /* for BAR 1 */
361 u8 version;
362
363 #ifdef VMXNET3_RSS
364 struct UPT1_RSSConf *rss_conf;
365 bool rss;
366 #endif
367 u32 num_rx_queues;
368 u32 num_tx_queues;
369
370 /* rx buffer related */
371 unsigned skb_buf_size;
372 int rx_buf_per_pkt; /* only apply to the 1st ring */
373 dma_addr_t shared_pa;
374 dma_addr_t queue_desc_pa;
375 dma_addr_t coal_conf_pa;
376
377 /* Wake-on-LAN */
378 u32 wol;
379
380 /* Link speed */
381 u32 link_speed; /* in mbps */
382
383 u64 tx_timeout_count;
384
385 /* Ring sizes */
386 u32 tx_ring_size;
387 u32 rx_ring_size;
388 u32 rx_ring2_size;
389
390 /* Size of buffer in the data ring */
391 u16 txdata_desc_size;
392 u16 rxdata_desc_size;
393
394 bool rxdataring_enabled;
395 bool default_rss_fields;
396 enum Vmxnet3_RSSField rss_fields;
397
398 struct work_struct work;
399
400 unsigned long state; /* VMXNET3_STATE_BIT_xxx */
401
402 int share_intr;
403
404 struct Vmxnet3_CoalesceScheme *coal_conf;
405 bool default_coal_mode;
406
407 dma_addr_t adapter_pa;
408 dma_addr_t pm_conf_pa;
409 dma_addr_t rss_conf_pa;
410 bool queuesExtEnabled;
411 struct Vmxnet3_RingBufferSize ringBufSize;
412 u32 devcap_supported[8];
413 u32 ptcap_supported[8];
414 u32 dev_caps[8];
415 u16 tx_prod_offset;
416 u16 rx_prod_offset;
417 u16 rx_prod2_offset;
418 };
419
420 #define VMXNET3_WRITE_BAR0_REG(adapter, reg, val) \
421 writel((val), (adapter)->hw_addr0 + (reg))
422 #define VMXNET3_READ_BAR0_REG(adapter, reg) \
423 readl((adapter)->hw_addr0 + (reg))
424
425 #define VMXNET3_WRITE_BAR1_REG(adapter, reg, val) \
426 writel((val), (adapter)->hw_addr1 + (reg))
427 #define VMXNET3_READ_BAR1_REG(adapter, reg) \
428 readl((adapter)->hw_addr1 + (reg))
429
430 #define VMXNET3_WAKE_QUEUE_THRESHOLD(tq) (5)
431 #define VMXNET3_RX_ALLOC_THRESHOLD(rq, ring_idx, adapter) \
432 ((rq)->rx_ring[ring_idx].size >> 3)
433
434 #define VMXNET3_GET_ADDR_LO(dma) ((u32)(dma))
435 #define VMXNET3_GET_ADDR_HI(dma) ((u32)(((u64)(dma)) >> 32))
436
437 #define VMXNET3_VERSION_GE_2(adapter) \
438 (adapter->version >= VMXNET3_REV_2 + 1)
439 #define VMXNET3_VERSION_GE_3(adapter) \
440 (adapter->version >= VMXNET3_REV_3 + 1)
441 #define VMXNET3_VERSION_GE_4(adapter) \
442 (adapter->version >= VMXNET3_REV_4 + 1)
443 #define VMXNET3_VERSION_GE_5(adapter) \
444 (adapter->version >= VMXNET3_REV_5 + 1)
445 #define VMXNET3_VERSION_GE_6(adapter) \
446 (adapter->version >= VMXNET3_REV_6 + 1)
447 #define VMXNET3_VERSION_GE_7(adapter) \
448 (adapter->version >= VMXNET3_REV_7 + 1)
449
450 /* must be a multiple of VMXNET3_RING_SIZE_ALIGN */
451 #define VMXNET3_DEF_TX_RING_SIZE 512
452 #define VMXNET3_DEF_RX_RING_SIZE 1024
453 #define VMXNET3_DEF_RX_RING2_SIZE 512
454
455 #define VMXNET3_DEF_RXDATA_DESC_SIZE 128
456
457 #define VMXNET3_MAX_ETH_HDR_SIZE 22
458 #define VMXNET3_MAX_SKB_BUF_SIZE (3*1024)
459
460 #define VMXNET3_GET_RING_IDX(adapter, rqID) \
461 ((rqID >= adapter->num_rx_queues && \
462 rqID < 2 * adapter->num_rx_queues) ? 1 : 0) \
463
464 #define VMXNET3_RX_DATA_RING(adapter, rqID) \
465 (rqID >= 2 * adapter->num_rx_queues && \
466 rqID < 3 * adapter->num_rx_queues) \
467
468 #define VMXNET3_COAL_STATIC_DEFAULT_DEPTH 64
469
470 #define VMXNET3_COAL_RBC_RATE(usecs) (1000000 / usecs)
471 #define VMXNET3_COAL_RBC_USECS(rbc_rate) (1000000 / rbc_rate)
472 #define VMXNET3_RSS_FIELDS_DEFAULT (VMXNET3_RSS_FIELDS_TCPIP4 | \
473 VMXNET3_RSS_FIELDS_TCPIP6)
474
475 int
476 vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter);
477
478 int
479 vmxnet3_activate_dev(struct vmxnet3_adapter *adapter);
480
481 void
482 vmxnet3_force_close(struct vmxnet3_adapter *adapter);
483
484 void
485 vmxnet3_reset_dev(struct vmxnet3_adapter *adapter);
486
487 void
488 vmxnet3_tq_destroy_all(struct vmxnet3_adapter *adapter);
489
490 void
491 vmxnet3_rq_destroy_all(struct vmxnet3_adapter *adapter);
492
493 netdev_features_t
494 vmxnet3_fix_features(struct net_device *netdev, netdev_features_t features);
495
496 netdev_features_t
497 vmxnet3_features_check(struct sk_buff *skb,
498 struct net_device *netdev, netdev_features_t features);
499
500 int
501 vmxnet3_set_features(struct net_device *netdev, netdev_features_t features);
502
503 int
504 vmxnet3_create_queues(struct vmxnet3_adapter *adapter,
505 u32 tx_ring_size, u32 rx_ring_size, u32 rx_ring2_size,
506 u16 txdata_desc_size, u16 rxdata_desc_size);
507
508 void vmxnet3_set_ethtool_ops(struct net_device *netdev);
509
510 void vmxnet3_get_stats64(struct net_device *dev,
511 struct rtnl_link_stats64 *stats);
512 bool vmxnet3_check_ptcapability(u32 cap_supported, u32 cap);
513
514 extern char vmxnet3_driver_name[];
515 #endif
516