1 /*
2 * Copyright (C) 1999 ARM Limited
3 * Copyright (C) 2000 Deep Blue Solutions Ltd
4 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
5 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
6 * Copyright 2009 Ilya Yanok, Emcraft Systems Ltd, yanok@emcraft.com
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19 #include <linux/kernel.h>
20 #include <linux/clk.h>
21 #include <linux/io.h>
22 #include <linux/err.h>
23 #include <linux/delay.h>
24 #include <linux/module.h>
25
26 #include <mach/hardware.h>
27 #include <mach/common.h>
28 #include <asm/system_misc.h>
29 #include <asm/proc-fns.h>
30 #include <asm/mach-types.h>
31
32 void __iomem *(*imx_ioremap)(unsigned long, size_t, unsigned int) = NULL;
33 EXPORT_SYMBOL_GPL(imx_ioremap);
34
35 static void __iomem *wdog_base;
36
37 /*
38 * Reset the system. It is called by machine_restart().
39 */
mxc_restart(char mode,const char * cmd)40 void mxc_restart(char mode, const char *cmd)
41 {
42 unsigned int wcr_enable;
43
44 if (cpu_is_mx1()) {
45 wcr_enable = (1 << 0);
46 } else {
47 struct clk *clk;
48
49 clk = clk_get_sys("imx2-wdt.0", NULL);
50 if (!IS_ERR(clk))
51 clk_prepare_enable(clk);
52 wcr_enable = (1 << 2);
53 }
54
55 /* Assert SRS signal */
56 __raw_writew(wcr_enable, wdog_base);
57
58 /* wait for reset to assert... */
59 mdelay(500);
60
61 printk(KERN_ERR "Watchdog reset failed to assert reset\n");
62
63 /* delay to allow the serial port to show the message */
64 mdelay(50);
65
66 /* we'll take a jump through zero as a poor second */
67 soft_restart(0);
68 }
69
mxc_arch_reset_init(void __iomem * base)70 void mxc_arch_reset_init(void __iomem *base)
71 {
72 wdog_base = base;
73 }
74