1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Marvell 88SE64xx/88SE94xx main function
4 *
5 * Copyright 2007 Red Hat, Inc.
6 * Copyright 2008 Marvell. <kewei@marvell.com>
7 * Copyright 2009-2011 Marvell. <yuxiangl@marvell.com>
8 */
9
10 #include "mv_sas.h"
11
mvs_find_tag(struct mvs_info * mvi,struct sas_task * task,u32 * tag)12 static int mvs_find_tag(struct mvs_info *mvi, struct sas_task *task, u32 *tag)
13 {
14 if (task->lldd_task) {
15 struct mvs_slot_info *slot;
16 slot = task->lldd_task;
17 *tag = slot->slot_tag;
18 return 1;
19 }
20 return 0;
21 }
22
mvs_tag_clear(struct mvs_info * mvi,u32 tag)23 void mvs_tag_clear(struct mvs_info *mvi, u32 tag)
24 {
25 void *bitmap = mvi->tags;
26 clear_bit(tag, bitmap);
27 }
28
mvs_tag_free(struct mvs_info * mvi,u32 tag)29 void mvs_tag_free(struct mvs_info *mvi, u32 tag)
30 {
31 mvs_tag_clear(mvi, tag);
32 }
33
mvs_tag_set(struct mvs_info * mvi,unsigned int tag)34 void mvs_tag_set(struct mvs_info *mvi, unsigned int tag)
35 {
36 void *bitmap = mvi->tags;
37 set_bit(tag, bitmap);
38 }
39
mvs_tag_alloc(struct mvs_info * mvi,u32 * tag_out)40 inline int mvs_tag_alloc(struct mvs_info *mvi, u32 *tag_out)
41 {
42 unsigned int index, tag;
43 void *bitmap = mvi->tags;
44
45 index = find_first_zero_bit(bitmap, mvi->tags_num);
46 tag = index;
47 if (tag >= mvi->tags_num)
48 return -SAS_QUEUE_FULL;
49 mvs_tag_set(mvi, tag);
50 *tag_out = tag;
51 return 0;
52 }
53
mvs_tag_init(struct mvs_info * mvi)54 void mvs_tag_init(struct mvs_info *mvi)
55 {
56 int i;
57 for (i = 0; i < mvi->tags_num; ++i)
58 mvs_tag_clear(mvi, i);
59 }
60
mvs_find_dev_mvi(struct domain_device * dev)61 static struct mvs_info *mvs_find_dev_mvi(struct domain_device *dev)
62 {
63 unsigned long i = 0, j = 0, hi = 0;
64 struct sas_ha_struct *sha = dev->port->ha;
65 struct mvs_info *mvi = NULL;
66 struct asd_sas_phy *phy;
67
68 while (sha->sas_port[i]) {
69 if (sha->sas_port[i] == dev->port) {
70 spin_lock(&sha->sas_port[i]->phy_list_lock);
71 phy = container_of(sha->sas_port[i]->phy_list.next,
72 struct asd_sas_phy, port_phy_el);
73 spin_unlock(&sha->sas_port[i]->phy_list_lock);
74 j = 0;
75 while (sha->sas_phy[j]) {
76 if (sha->sas_phy[j] == phy)
77 break;
78 j++;
79 }
80 break;
81 }
82 i++;
83 }
84 hi = j/((struct mvs_prv_info *)sha->lldd_ha)->n_phy;
85 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi];
86
87 return mvi;
88
89 }
90
mvs_find_dev_phyno(struct domain_device * dev,int * phyno)91 static int mvs_find_dev_phyno(struct domain_device *dev, int *phyno)
92 {
93 unsigned long i = 0, j = 0, n = 0, num = 0;
94 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
95 struct mvs_info *mvi = mvi_dev->mvi_info;
96 struct sas_ha_struct *sha = dev->port->ha;
97
98 while (sha->sas_port[i]) {
99 if (sha->sas_port[i] == dev->port) {
100 struct asd_sas_phy *phy;
101
102 spin_lock(&sha->sas_port[i]->phy_list_lock);
103 list_for_each_entry(phy,
104 &sha->sas_port[i]->phy_list, port_phy_el) {
105 j = 0;
106 while (sha->sas_phy[j]) {
107 if (sha->sas_phy[j] == phy)
108 break;
109 j++;
110 }
111 phyno[n] = (j >= mvi->chip->n_phy) ?
112 (j - mvi->chip->n_phy) : j;
113 num++;
114 n++;
115 }
116 spin_unlock(&sha->sas_port[i]->phy_list_lock);
117 break;
118 }
119 i++;
120 }
121 return num;
122 }
123
mvs_find_dev_by_reg_set(struct mvs_info * mvi,u8 reg_set)124 struct mvs_device *mvs_find_dev_by_reg_set(struct mvs_info *mvi,
125 u8 reg_set)
126 {
127 u32 dev_no;
128 for (dev_no = 0; dev_no < MVS_MAX_DEVICES; dev_no++) {
129 if (mvi->devices[dev_no].taskfileset == MVS_ID_NOT_MAPPED)
130 continue;
131
132 if (mvi->devices[dev_no].taskfileset == reg_set)
133 return &mvi->devices[dev_no];
134 }
135 return NULL;
136 }
137
mvs_free_reg_set(struct mvs_info * mvi,struct mvs_device * dev)138 static inline void mvs_free_reg_set(struct mvs_info *mvi,
139 struct mvs_device *dev)
140 {
141 if (!dev) {
142 mv_printk("device has been free.\n");
143 return;
144 }
145 if (dev->taskfileset == MVS_ID_NOT_MAPPED)
146 return;
147 MVS_CHIP_DISP->free_reg_set(mvi, &dev->taskfileset);
148 }
149
mvs_assign_reg_set(struct mvs_info * mvi,struct mvs_device * dev)150 static inline u8 mvs_assign_reg_set(struct mvs_info *mvi,
151 struct mvs_device *dev)
152 {
153 if (dev->taskfileset != MVS_ID_NOT_MAPPED)
154 return 0;
155 return MVS_CHIP_DISP->assign_reg_set(mvi, &dev->taskfileset);
156 }
157
mvs_phys_reset(struct mvs_info * mvi,u32 phy_mask,int hard)158 void mvs_phys_reset(struct mvs_info *mvi, u32 phy_mask, int hard)
159 {
160 u32 no;
161 for_each_phy(phy_mask, phy_mask, no) {
162 if (!(phy_mask & 1))
163 continue;
164 MVS_CHIP_DISP->phy_reset(mvi, no, hard);
165 }
166 }
167
mvs_phy_control(struct asd_sas_phy * sas_phy,enum phy_func func,void * funcdata)168 int mvs_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
169 void *funcdata)
170 {
171 int rc = 0, phy_id = sas_phy->id;
172 u32 tmp, i = 0, hi;
173 struct sas_ha_struct *sha = sas_phy->ha;
174 struct mvs_info *mvi = NULL;
175
176 while (sha->sas_phy[i]) {
177 if (sha->sas_phy[i] == sas_phy)
178 break;
179 i++;
180 }
181 hi = i/((struct mvs_prv_info *)sha->lldd_ha)->n_phy;
182 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi];
183
184 switch (func) {
185 case PHY_FUNC_SET_LINK_RATE:
186 MVS_CHIP_DISP->phy_set_link_rate(mvi, phy_id, funcdata);
187 break;
188
189 case PHY_FUNC_HARD_RESET:
190 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_id);
191 if (tmp & PHY_RST_HARD)
192 break;
193 MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_HARD_RESET);
194 break;
195
196 case PHY_FUNC_LINK_RESET:
197 MVS_CHIP_DISP->phy_enable(mvi, phy_id);
198 MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_SOFT_RESET);
199 break;
200
201 case PHY_FUNC_DISABLE:
202 MVS_CHIP_DISP->phy_disable(mvi, phy_id);
203 break;
204 case PHY_FUNC_RELEASE_SPINUP_HOLD:
205 default:
206 rc = -ENOSYS;
207 }
208 msleep(200);
209 return rc;
210 }
211
mvs_set_sas_addr(struct mvs_info * mvi,int port_id,u32 off_lo,u32 off_hi,u64 sas_addr)212 void mvs_set_sas_addr(struct mvs_info *mvi, int port_id, u32 off_lo,
213 u32 off_hi, u64 sas_addr)
214 {
215 u32 lo = (u32)sas_addr;
216 u32 hi = (u32)(sas_addr>>32);
217
218 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_lo);
219 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, lo);
220 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_hi);
221 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, hi);
222 }
223
mvs_bytes_dmaed(struct mvs_info * mvi,int i,gfp_t gfp_flags)224 static void mvs_bytes_dmaed(struct mvs_info *mvi, int i, gfp_t gfp_flags)
225 {
226 struct mvs_phy *phy = &mvi->phy[i];
227 struct asd_sas_phy *sas_phy = &phy->sas_phy;
228
229 if (!phy->phy_attached)
230 return;
231
232 if (!(phy->att_dev_info & PORT_DEV_TRGT_MASK)
233 && phy->phy_type & PORT_TYPE_SAS) {
234 return;
235 }
236
237 sas_notify_phy_event(sas_phy, PHYE_OOB_DONE, gfp_flags);
238
239 if (sas_phy->phy) {
240 struct sas_phy *sphy = sas_phy->phy;
241
242 sphy->negotiated_linkrate = sas_phy->linkrate;
243 sphy->minimum_linkrate = phy->minimum_linkrate;
244 sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS;
245 sphy->maximum_linkrate = phy->maximum_linkrate;
246 sphy->maximum_linkrate_hw = MVS_CHIP_DISP->phy_max_link_rate();
247 }
248
249 if (phy->phy_type & PORT_TYPE_SAS) {
250 struct sas_identify_frame *id;
251
252 id = (struct sas_identify_frame *)phy->frame_rcvd;
253 id->dev_type = phy->identify.device_type;
254 id->initiator_bits = SAS_PROTOCOL_ALL;
255 id->target_bits = phy->identify.target_port_protocols;
256
257 /* direct attached SAS device */
258 if (phy->att_dev_info & PORT_SSP_TRGT_MASK) {
259 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT);
260 MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x00);
261 }
262 } else if (phy->phy_type & PORT_TYPE_SATA) {
263 /*Nothing*/
264 }
265 mv_dprintk("phy %d byte dmaded.\n", i + mvi->id * mvi->chip->n_phy);
266
267 sas_phy->frame_rcvd_size = phy->frame_rcvd_size;
268
269 sas_notify_port_event(sas_phy, PORTE_BYTES_DMAED, gfp_flags);
270 }
271
mvs_scan_start(struct Scsi_Host * shost)272 void mvs_scan_start(struct Scsi_Host *shost)
273 {
274 int i, j;
275 unsigned short core_nr;
276 struct mvs_info *mvi;
277 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
278 struct mvs_prv_info *mvs_prv = sha->lldd_ha;
279
280 core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host;
281
282 for (j = 0; j < core_nr; j++) {
283 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[j];
284 for (i = 0; i < mvi->chip->n_phy; ++i)
285 mvs_bytes_dmaed(mvi, i, GFP_KERNEL);
286 }
287 mvs_prv->scan_finished = 1;
288 }
289
mvs_scan_finished(struct Scsi_Host * shost,unsigned long time)290 int mvs_scan_finished(struct Scsi_Host *shost, unsigned long time)
291 {
292 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
293 struct mvs_prv_info *mvs_prv = sha->lldd_ha;
294
295 if (mvs_prv->scan_finished == 0)
296 return 0;
297
298 sas_drain_work(sha);
299 return 1;
300 }
301
mvs_task_prep_smp(struct mvs_info * mvi,struct mvs_task_exec_info * tei)302 static int mvs_task_prep_smp(struct mvs_info *mvi,
303 struct mvs_task_exec_info *tei)
304 {
305 int elem, rc, i;
306 struct sas_ha_struct *sha = mvi->sas;
307 struct sas_task *task = tei->task;
308 struct mvs_cmd_hdr *hdr = tei->hdr;
309 struct domain_device *dev = task->dev;
310 struct asd_sas_port *sas_port = dev->port;
311 struct sas_phy *sphy = dev->phy;
312 struct asd_sas_phy *sas_phy = sha->sas_phy[sphy->number];
313 struct scatterlist *sg_req, *sg_resp;
314 u32 req_len, resp_len, tag = tei->tag;
315 void *buf_tmp;
316 u8 *buf_oaf;
317 dma_addr_t buf_tmp_dma;
318 void *buf_prd;
319 struct mvs_slot_info *slot = &mvi->slot_info[tag];
320 u32 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);
321
322 /*
323 * DMA-map SMP request, response buffers
324 */
325 sg_req = &task->smp_task.smp_req;
326 elem = dma_map_sg(mvi->dev, sg_req, 1, DMA_TO_DEVICE);
327 if (!elem)
328 return -ENOMEM;
329 req_len = sg_dma_len(sg_req);
330
331 sg_resp = &task->smp_task.smp_resp;
332 elem = dma_map_sg(mvi->dev, sg_resp, 1, DMA_FROM_DEVICE);
333 if (!elem) {
334 rc = -ENOMEM;
335 goto err_out;
336 }
337 resp_len = SB_RFB_MAX;
338
339 /* must be in dwords */
340 if ((req_len & 0x3) || (resp_len & 0x3)) {
341 rc = -EINVAL;
342 goto err_out_2;
343 }
344
345 /*
346 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
347 */
348
349 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ***** */
350 buf_tmp = slot->buf;
351 buf_tmp_dma = slot->buf_dma;
352
353 hdr->cmd_tbl = cpu_to_le64(sg_dma_address(sg_req));
354
355 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
356 buf_oaf = buf_tmp;
357 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
358
359 buf_tmp += MVS_OAF_SZ;
360 buf_tmp_dma += MVS_OAF_SZ;
361
362 /* region 3: PRD table *********************************** */
363 buf_prd = buf_tmp;
364 if (tei->n_elem)
365 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
366 else
367 hdr->prd_tbl = 0;
368
369 i = MVS_CHIP_DISP->prd_size() * tei->n_elem;
370 buf_tmp += i;
371 buf_tmp_dma += i;
372
373 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
374 slot->response = buf_tmp;
375 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
376 if (mvi->flags & MVF_FLAG_SOC)
377 hdr->reserved[0] = 0;
378
379 /*
380 * Fill in TX ring and command slot header
381 */
382 slot->tx = mvi->tx_prod;
383 mvi->tx[mvi->tx_prod] = cpu_to_le32((TXQ_CMD_SMP << TXQ_CMD_SHIFT) |
384 TXQ_MODE_I | tag |
385 (MVS_PHY_ID << TXQ_PHY_SHIFT));
386
387 hdr->flags |= flags;
388 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | ((req_len - 4) / 4));
389 hdr->tags = cpu_to_le32(tag);
390 hdr->data_len = 0;
391
392 /* generate open address frame hdr (first 12 bytes) */
393 /* initiator, SMP, ftype 1h */
394 buf_oaf[0] = (1 << 7) | (PROTOCOL_SMP << 4) | 0x01;
395 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
396 *(u16 *)(buf_oaf + 2) = 0xFFFF; /* SAS SPEC */
397 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
398
399 /* fill in PRD (scatter/gather) table, if any */
400 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
401
402 return 0;
403
404 err_out_2:
405 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_resp, 1,
406 DMA_FROM_DEVICE);
407 err_out:
408 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_req, 1,
409 DMA_TO_DEVICE);
410 return rc;
411 }
412
mvs_get_ncq_tag(struct sas_task * task,u32 * tag)413 static u32 mvs_get_ncq_tag(struct sas_task *task, u32 *tag)
414 {
415 struct ata_queued_cmd *qc = task->uldd_task;
416
417 if (qc) {
418 if (qc->tf.command == ATA_CMD_FPDMA_WRITE ||
419 qc->tf.command == ATA_CMD_FPDMA_READ ||
420 qc->tf.command == ATA_CMD_FPDMA_RECV ||
421 qc->tf.command == ATA_CMD_FPDMA_SEND ||
422 qc->tf.command == ATA_CMD_NCQ_NON_DATA) {
423 *tag = qc->tag;
424 return 1;
425 }
426 }
427
428 return 0;
429 }
430
mvs_task_prep_ata(struct mvs_info * mvi,struct mvs_task_exec_info * tei)431 static int mvs_task_prep_ata(struct mvs_info *mvi,
432 struct mvs_task_exec_info *tei)
433 {
434 struct sas_task *task = tei->task;
435 struct domain_device *dev = task->dev;
436 struct mvs_device *mvi_dev = dev->lldd_dev;
437 struct mvs_cmd_hdr *hdr = tei->hdr;
438 struct asd_sas_port *sas_port = dev->port;
439 struct mvs_slot_info *slot;
440 void *buf_prd;
441 u32 tag = tei->tag, hdr_tag;
442 u32 flags, del_q;
443 void *buf_tmp;
444 u8 *buf_cmd, *buf_oaf;
445 dma_addr_t buf_tmp_dma;
446 u32 i, req_len, resp_len;
447 const u32 max_resp_len = SB_RFB_MAX;
448
449 if (mvs_assign_reg_set(mvi, mvi_dev) == MVS_ID_NOT_MAPPED) {
450 mv_dprintk("Have not enough regiset for dev %d.\n",
451 mvi_dev->device_id);
452 return -EBUSY;
453 }
454 slot = &mvi->slot_info[tag];
455 slot->tx = mvi->tx_prod;
456 del_q = TXQ_MODE_I | tag |
457 (TXQ_CMD_STP << TXQ_CMD_SHIFT) |
458 ((sas_port->phy_mask & TXQ_PHY_MASK) << TXQ_PHY_SHIFT) |
459 (mvi_dev->taskfileset << TXQ_SRS_SHIFT);
460 mvi->tx[mvi->tx_prod] = cpu_to_le32(del_q);
461
462 if (task->data_dir == DMA_FROM_DEVICE)
463 flags = (MVS_CHIP_DISP->prd_count() << MCH_PRD_LEN_SHIFT);
464 else
465 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);
466
467 if (task->ata_task.use_ncq)
468 flags |= MCH_FPDMA;
469 if (dev->sata_dev.class == ATA_DEV_ATAPI) {
470 if (task->ata_task.fis.command != ATA_CMD_ID_ATAPI)
471 flags |= MCH_ATAPI;
472 }
473
474 hdr->flags = cpu_to_le32(flags);
475
476 if (task->ata_task.use_ncq && mvs_get_ncq_tag(task, &hdr_tag))
477 task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3);
478 else
479 hdr_tag = tag;
480
481 hdr->tags = cpu_to_le32(hdr_tag);
482
483 hdr->data_len = cpu_to_le32(task->total_xfer_len);
484
485 /*
486 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
487 */
488
489 /* region 1: command table area (MVS_ATA_CMD_SZ bytes) ************** */
490 buf_cmd = buf_tmp = slot->buf;
491 buf_tmp_dma = slot->buf_dma;
492
493 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
494
495 buf_tmp += MVS_ATA_CMD_SZ;
496 buf_tmp_dma += MVS_ATA_CMD_SZ;
497
498 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
499 /* used for STP. unused for SATA? */
500 buf_oaf = buf_tmp;
501 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
502
503 buf_tmp += MVS_OAF_SZ;
504 buf_tmp_dma += MVS_OAF_SZ;
505
506 /* region 3: PRD table ********************************************* */
507 buf_prd = buf_tmp;
508
509 if (tei->n_elem)
510 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
511 else
512 hdr->prd_tbl = 0;
513 i = MVS_CHIP_DISP->prd_size() * MVS_CHIP_DISP->prd_count();
514
515 buf_tmp += i;
516 buf_tmp_dma += i;
517
518 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
519 slot->response = buf_tmp;
520 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
521 if (mvi->flags & MVF_FLAG_SOC)
522 hdr->reserved[0] = 0;
523
524 req_len = sizeof(struct host_to_dev_fis);
525 resp_len = MVS_SLOT_BUF_SZ - MVS_ATA_CMD_SZ -
526 sizeof(struct mvs_err_info) - i;
527
528 /* request, response lengths */
529 resp_len = min(resp_len, max_resp_len);
530 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4));
531
532 if (likely(!task->ata_task.device_control_reg_update))
533 task->ata_task.fis.flags |= 0x80; /* C=1: update ATA cmd reg */
534 /* fill in command FIS and ATAPI CDB */
535 memcpy(buf_cmd, &task->ata_task.fis, sizeof(struct host_to_dev_fis));
536 if (dev->sata_dev.class == ATA_DEV_ATAPI)
537 memcpy(buf_cmd + STP_ATAPI_CMD,
538 task->ata_task.atapi_packet, 16);
539
540 /* generate open address frame hdr (first 12 bytes) */
541 /* initiator, STP, ftype 1h */
542 buf_oaf[0] = (1 << 7) | (PROTOCOL_STP << 4) | 0x1;
543 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
544 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1);
545 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
546
547 /* fill in PRD (scatter/gather) table, if any */
548 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
549
550 if (task->data_dir == DMA_FROM_DEVICE)
551 MVS_CHIP_DISP->dma_fix(mvi, sas_port->phy_mask,
552 TRASH_BUCKET_SIZE, tei->n_elem, buf_prd);
553
554 return 0;
555 }
556
mvs_task_prep_ssp(struct mvs_info * mvi,struct mvs_task_exec_info * tei,int is_tmf,struct sas_tmf_task * tmf)557 static int mvs_task_prep_ssp(struct mvs_info *mvi,
558 struct mvs_task_exec_info *tei, int is_tmf,
559 struct sas_tmf_task *tmf)
560 {
561 struct sas_task *task = tei->task;
562 struct mvs_cmd_hdr *hdr = tei->hdr;
563 struct mvs_port *port = tei->port;
564 struct domain_device *dev = task->dev;
565 struct mvs_device *mvi_dev = dev->lldd_dev;
566 struct asd_sas_port *sas_port = dev->port;
567 struct mvs_slot_info *slot;
568 void *buf_prd;
569 struct ssp_frame_hdr *ssp_hdr;
570 void *buf_tmp;
571 u8 *buf_cmd, *buf_oaf, fburst = 0;
572 dma_addr_t buf_tmp_dma;
573 u32 flags;
574 u32 resp_len, req_len, i, tag = tei->tag;
575 const u32 max_resp_len = SB_RFB_MAX;
576 u32 phy_mask;
577
578 slot = &mvi->slot_info[tag];
579
580 phy_mask = ((port->wide_port_phymap) ? port->wide_port_phymap :
581 sas_port->phy_mask) & TXQ_PHY_MASK;
582
583 slot->tx = mvi->tx_prod;
584 mvi->tx[mvi->tx_prod] = cpu_to_le32(TXQ_MODE_I | tag |
585 (TXQ_CMD_SSP << TXQ_CMD_SHIFT) |
586 (phy_mask << TXQ_PHY_SHIFT));
587
588 flags = MCH_RETRY;
589 if (task->ssp_task.enable_first_burst) {
590 flags |= MCH_FBURST;
591 fburst = (1 << 7);
592 }
593 if (is_tmf)
594 flags |= (MCH_SSP_FR_TASK << MCH_SSP_FR_TYPE_SHIFT);
595 else
596 flags |= (MCH_SSP_FR_CMD << MCH_SSP_FR_TYPE_SHIFT);
597
598 hdr->flags = cpu_to_le32(flags | (tei->n_elem << MCH_PRD_LEN_SHIFT));
599 hdr->tags = cpu_to_le32(tag);
600 hdr->data_len = cpu_to_le32(task->total_xfer_len);
601
602 /*
603 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
604 */
605
606 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ************** */
607 buf_cmd = buf_tmp = slot->buf;
608 buf_tmp_dma = slot->buf_dma;
609
610 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
611
612 buf_tmp += MVS_SSP_CMD_SZ;
613 buf_tmp_dma += MVS_SSP_CMD_SZ;
614
615 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
616 buf_oaf = buf_tmp;
617 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
618
619 buf_tmp += MVS_OAF_SZ;
620 buf_tmp_dma += MVS_OAF_SZ;
621
622 /* region 3: PRD table ********************************************* */
623 buf_prd = buf_tmp;
624 if (tei->n_elem)
625 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
626 else
627 hdr->prd_tbl = 0;
628
629 i = MVS_CHIP_DISP->prd_size() * tei->n_elem;
630 buf_tmp += i;
631 buf_tmp_dma += i;
632
633 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
634 slot->response = buf_tmp;
635 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
636 if (mvi->flags & MVF_FLAG_SOC)
637 hdr->reserved[0] = 0;
638
639 resp_len = MVS_SLOT_BUF_SZ - MVS_SSP_CMD_SZ - MVS_OAF_SZ -
640 sizeof(struct mvs_err_info) - i;
641 resp_len = min(resp_len, max_resp_len);
642
643 req_len = sizeof(struct ssp_frame_hdr) + 28;
644
645 /* request, response lengths */
646 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4));
647
648 /* generate open address frame hdr (first 12 bytes) */
649 /* initiator, SSP, ftype 1h */
650 buf_oaf[0] = (1 << 7) | (PROTOCOL_SSP << 4) | 0x1;
651 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
652 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1);
653 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
654
655 /* fill in SSP frame header (Command Table.SSP frame header) */
656 ssp_hdr = (struct ssp_frame_hdr *)buf_cmd;
657
658 if (is_tmf)
659 ssp_hdr->frame_type = SSP_TASK;
660 else
661 ssp_hdr->frame_type = SSP_COMMAND;
662
663 memcpy(ssp_hdr->hashed_dest_addr, dev->hashed_sas_addr,
664 HASHED_SAS_ADDR_SIZE);
665 memcpy(ssp_hdr->hashed_src_addr,
666 dev->hashed_sas_addr, HASHED_SAS_ADDR_SIZE);
667 ssp_hdr->tag = cpu_to_be16(tag);
668
669 /* fill in IU for TASK and Command Frame */
670 buf_cmd += sizeof(*ssp_hdr);
671 memcpy(buf_cmd, &task->ssp_task.LUN, 8);
672
673 if (ssp_hdr->frame_type != SSP_TASK) {
674 buf_cmd[9] = fburst | task->ssp_task.task_attr |
675 (task->ssp_task.task_prio << 3);
676 memcpy(buf_cmd + 12, task->ssp_task.cmd->cmnd,
677 task->ssp_task.cmd->cmd_len);
678 } else{
679 buf_cmd[10] = tmf->tmf;
680 switch (tmf->tmf) {
681 case TMF_ABORT_TASK:
682 case TMF_QUERY_TASK:
683 buf_cmd[12] =
684 (tmf->tag_of_task_to_be_managed >> 8) & 0xff;
685 buf_cmd[13] =
686 tmf->tag_of_task_to_be_managed & 0xff;
687 break;
688 default:
689 break;
690 }
691 }
692 /* fill in PRD (scatter/gather) table, if any */
693 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
694 return 0;
695 }
696
697 #define DEV_IS_GONE(mvi_dev) ((!mvi_dev || (mvi_dev->dev_type == SAS_PHY_UNUSED)))
mvs_task_prep(struct sas_task * task,struct mvs_info * mvi,int is_tmf,struct sas_tmf_task * tmf,int * pass)698 static int mvs_task_prep(struct sas_task *task, struct mvs_info *mvi, int is_tmf,
699 struct sas_tmf_task *tmf, int *pass)
700 {
701 struct domain_device *dev = task->dev;
702 struct mvs_device *mvi_dev = dev->lldd_dev;
703 struct mvs_task_exec_info tei;
704 struct mvs_slot_info *slot;
705 u32 tag = 0xdeadbeef, n_elem = 0;
706 int rc = 0;
707
708 if (!dev->port) {
709 struct task_status_struct *tsm = &task->task_status;
710
711 tsm->resp = SAS_TASK_UNDELIVERED;
712 tsm->stat = SAS_PHY_DOWN;
713 /*
714 * libsas will use dev->port, should
715 * not call task_done for sata
716 */
717 if (dev->dev_type != SAS_SATA_DEV)
718 task->task_done(task);
719 return rc;
720 }
721
722 if (DEV_IS_GONE(mvi_dev)) {
723 if (mvi_dev)
724 mv_dprintk("device %d not ready.\n",
725 mvi_dev->device_id);
726 else
727 mv_dprintk("device %016llx not ready.\n",
728 SAS_ADDR(dev->sas_addr));
729
730 rc = SAS_PHY_DOWN;
731 return rc;
732 }
733 tei.port = dev->port->lldd_port;
734 if (tei.port && !tei.port->port_attached && !tmf) {
735 if (sas_protocol_ata(task->task_proto)) {
736 struct task_status_struct *ts = &task->task_status;
737 mv_dprintk("SATA/STP port %d does not attach"
738 "device.\n", dev->port->id);
739 ts->resp = SAS_TASK_COMPLETE;
740 ts->stat = SAS_PHY_DOWN;
741
742 task->task_done(task);
743
744 } else {
745 struct task_status_struct *ts = &task->task_status;
746 mv_dprintk("SAS port %d does not attach"
747 "device.\n", dev->port->id);
748 ts->resp = SAS_TASK_UNDELIVERED;
749 ts->stat = SAS_PHY_DOWN;
750 task->task_done(task);
751 }
752 return rc;
753 }
754
755 if (!sas_protocol_ata(task->task_proto)) {
756 if (task->num_scatter) {
757 n_elem = dma_map_sg(mvi->dev,
758 task->scatter,
759 task->num_scatter,
760 task->data_dir);
761 if (!n_elem) {
762 rc = -ENOMEM;
763 goto prep_out;
764 }
765 }
766 } else {
767 n_elem = task->num_scatter;
768 }
769
770 rc = mvs_tag_alloc(mvi, &tag);
771 if (rc)
772 goto err_out;
773
774 slot = &mvi->slot_info[tag];
775
776 task->lldd_task = NULL;
777 slot->n_elem = n_elem;
778 slot->slot_tag = tag;
779
780 slot->buf = dma_pool_zalloc(mvi->dma_pool, GFP_ATOMIC, &slot->buf_dma);
781 if (!slot->buf) {
782 rc = -ENOMEM;
783 goto err_out_tag;
784 }
785
786 tei.task = task;
787 tei.hdr = &mvi->slot[tag];
788 tei.tag = tag;
789 tei.n_elem = n_elem;
790 switch (task->task_proto) {
791 case SAS_PROTOCOL_SMP:
792 rc = mvs_task_prep_smp(mvi, &tei);
793 break;
794 case SAS_PROTOCOL_SSP:
795 rc = mvs_task_prep_ssp(mvi, &tei, is_tmf, tmf);
796 break;
797 case SAS_PROTOCOL_SATA:
798 case SAS_PROTOCOL_STP:
799 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
800 rc = mvs_task_prep_ata(mvi, &tei);
801 break;
802 default:
803 dev_printk(KERN_ERR, mvi->dev,
804 "unknown sas_task proto: 0x%x\n",
805 task->task_proto);
806 rc = -EINVAL;
807 break;
808 }
809
810 if (rc) {
811 mv_dprintk("rc is %x\n", rc);
812 goto err_out_slot_buf;
813 }
814 slot->task = task;
815 slot->port = tei.port;
816 task->lldd_task = slot;
817 list_add_tail(&slot->entry, &tei.port->list);
818
819 mvi_dev->running_req++;
820 ++(*pass);
821 mvi->tx_prod = (mvi->tx_prod + 1) & (MVS_CHIP_SLOT_SZ - 1);
822
823 return rc;
824
825 err_out_slot_buf:
826 dma_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
827 err_out_tag:
828 mvs_tag_free(mvi, tag);
829 err_out:
830
831 dev_printk(KERN_ERR, mvi->dev, "mvsas prep failed[%d]!\n", rc);
832 if (!sas_protocol_ata(task->task_proto))
833 if (n_elem)
834 dma_unmap_sg(mvi->dev, task->scatter, n_elem,
835 task->data_dir);
836 prep_out:
837 return rc;
838 }
839
mvs_queue_command(struct sas_task * task,gfp_t gfp_flags)840 int mvs_queue_command(struct sas_task *task, gfp_t gfp_flags)
841 {
842 struct mvs_info *mvi = NULL;
843 u32 rc = 0;
844 u32 pass = 0;
845 unsigned long flags = 0;
846 struct sas_tmf_task *tmf = task->tmf;
847 int is_tmf = !!task->tmf;
848
849 mvi = ((struct mvs_device *)task->dev->lldd_dev)->mvi_info;
850
851 spin_lock_irqsave(&mvi->lock, flags);
852 rc = mvs_task_prep(task, mvi, is_tmf, tmf, &pass);
853 if (rc)
854 dev_printk(KERN_ERR, mvi->dev, "mvsas exec failed[%d]!\n", rc);
855
856 if (likely(pass))
857 MVS_CHIP_DISP->start_delivery(mvi, (mvi->tx_prod - 1) &
858 (MVS_CHIP_SLOT_SZ - 1));
859 spin_unlock_irqrestore(&mvi->lock, flags);
860
861 return rc;
862 }
863
mvs_slot_free(struct mvs_info * mvi,u32 rx_desc)864 static void mvs_slot_free(struct mvs_info *mvi, u32 rx_desc)
865 {
866 u32 slot_idx = rx_desc & RXQ_SLOT_MASK;
867 mvs_tag_clear(mvi, slot_idx);
868 }
869
mvs_slot_task_free(struct mvs_info * mvi,struct sas_task * task,struct mvs_slot_info * slot,u32 slot_idx)870 static void mvs_slot_task_free(struct mvs_info *mvi, struct sas_task *task,
871 struct mvs_slot_info *slot, u32 slot_idx)
872 {
873 if (!slot)
874 return;
875 if (!slot->task)
876 return;
877 if (!sas_protocol_ata(task->task_proto))
878 if (slot->n_elem)
879 dma_unmap_sg(mvi->dev, task->scatter,
880 slot->n_elem, task->data_dir);
881
882 switch (task->task_proto) {
883 case SAS_PROTOCOL_SMP:
884 dma_unmap_sg(mvi->dev, &task->smp_task.smp_resp, 1,
885 DMA_FROM_DEVICE);
886 dma_unmap_sg(mvi->dev, &task->smp_task.smp_req, 1,
887 DMA_TO_DEVICE);
888 break;
889
890 case SAS_PROTOCOL_SATA:
891 case SAS_PROTOCOL_STP:
892 case SAS_PROTOCOL_SSP:
893 default:
894 /* do nothing */
895 break;
896 }
897
898 if (slot->buf) {
899 dma_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
900 slot->buf = NULL;
901 }
902 list_del_init(&slot->entry);
903 task->lldd_task = NULL;
904 slot->task = NULL;
905 slot->port = NULL;
906 slot->slot_tag = 0xFFFFFFFF;
907 mvs_slot_free(mvi, slot_idx);
908 }
909
mvs_update_wideport(struct mvs_info * mvi,int phy_no)910 static void mvs_update_wideport(struct mvs_info *mvi, int phy_no)
911 {
912 struct mvs_phy *phy = &mvi->phy[phy_no];
913 struct mvs_port *port = phy->port;
914 int j, no;
915
916 for_each_phy(port->wide_port_phymap, j, no) {
917 if (j & 1) {
918 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no,
919 PHYR_WIDE_PORT);
920 MVS_CHIP_DISP->write_port_cfg_data(mvi, no,
921 port->wide_port_phymap);
922 } else {
923 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no,
924 PHYR_WIDE_PORT);
925 MVS_CHIP_DISP->write_port_cfg_data(mvi, no,
926 0);
927 }
928 }
929 }
930
mvs_is_phy_ready(struct mvs_info * mvi,int i)931 static u32 mvs_is_phy_ready(struct mvs_info *mvi, int i)
932 {
933 u32 tmp;
934 struct mvs_phy *phy = &mvi->phy[i];
935 struct mvs_port *port = phy->port;
936
937 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, i);
938 if ((tmp & PHY_READY_MASK) && !(phy->irq_status & PHYEV_POOF)) {
939 if (!port)
940 phy->phy_attached = 1;
941 return tmp;
942 }
943
944 if (port) {
945 if (phy->phy_type & PORT_TYPE_SAS) {
946 port->wide_port_phymap &= ~(1U << i);
947 if (!port->wide_port_phymap)
948 port->port_attached = 0;
949 mvs_update_wideport(mvi, i);
950 } else if (phy->phy_type & PORT_TYPE_SATA)
951 port->port_attached = 0;
952 phy->port = NULL;
953 phy->phy_attached = 0;
954 phy->phy_type &= ~(PORT_TYPE_SAS | PORT_TYPE_SATA);
955 }
956 return 0;
957 }
958
mvs_get_d2h_reg(struct mvs_info * mvi,int i,void * buf)959 static void *mvs_get_d2h_reg(struct mvs_info *mvi, int i, void *buf)
960 {
961 u32 *s = (u32 *) buf;
962
963 if (!s)
964 return NULL;
965
966 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG3);
967 s[3] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
968
969 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG2);
970 s[2] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
971
972 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG1);
973 s[1] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
974
975 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG0);
976 s[0] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
977
978 if (((s[1] & 0x00FFFFFF) == 0x00EB1401) && (*(u8 *)&s[3] == 0x01))
979 s[1] = 0x00EB1401 | (*((u8 *)&s[1] + 3) & 0x10);
980
981 return s;
982 }
983
mvs_is_sig_fis_received(u32 irq_status)984 static u32 mvs_is_sig_fis_received(u32 irq_status)
985 {
986 return irq_status & PHYEV_SIG_FIS;
987 }
988
mvs_sig_remove_timer(struct mvs_phy * phy)989 static void mvs_sig_remove_timer(struct mvs_phy *phy)
990 {
991 if (phy->timer.function)
992 del_timer(&phy->timer);
993 phy->timer.function = NULL;
994 }
995
mvs_update_phyinfo(struct mvs_info * mvi,int i,int get_st)996 void mvs_update_phyinfo(struct mvs_info *mvi, int i, int get_st)
997 {
998 struct mvs_phy *phy = &mvi->phy[i];
999 struct sas_identify_frame *id;
1000
1001 id = (struct sas_identify_frame *)phy->frame_rcvd;
1002
1003 if (get_st) {
1004 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, i);
1005 phy->phy_status = mvs_is_phy_ready(mvi, i);
1006 }
1007
1008 if (phy->phy_status) {
1009 int oob_done = 0;
1010 struct asd_sas_phy *sas_phy = &mvi->phy[i].sas_phy;
1011
1012 oob_done = MVS_CHIP_DISP->oob_done(mvi, i);
1013
1014 MVS_CHIP_DISP->fix_phy_info(mvi, i, id);
1015 if (phy->phy_type & PORT_TYPE_SATA) {
1016 phy->identify.target_port_protocols = SAS_PROTOCOL_STP;
1017 if (mvs_is_sig_fis_received(phy->irq_status)) {
1018 mvs_sig_remove_timer(phy);
1019 phy->phy_attached = 1;
1020 phy->att_dev_sas_addr =
1021 i + mvi->id * mvi->chip->n_phy;
1022 if (oob_done)
1023 sas_phy->oob_mode = SATA_OOB_MODE;
1024 phy->frame_rcvd_size =
1025 sizeof(struct dev_to_host_fis);
1026 mvs_get_d2h_reg(mvi, i, id);
1027 } else {
1028 u32 tmp;
1029 dev_printk(KERN_DEBUG, mvi->dev,
1030 "Phy%d : No sig fis\n", i);
1031 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, i);
1032 MVS_CHIP_DISP->write_port_irq_mask(mvi, i,
1033 tmp | PHYEV_SIG_FIS);
1034 phy->phy_attached = 0;
1035 phy->phy_type &= ~PORT_TYPE_SATA;
1036 goto out_done;
1037 }
1038 } else if (phy->phy_type & PORT_TYPE_SAS
1039 || phy->att_dev_info & PORT_SSP_INIT_MASK) {
1040 phy->phy_attached = 1;
1041 phy->identify.device_type =
1042 phy->att_dev_info & PORT_DEV_TYPE_MASK;
1043
1044 if (phy->identify.device_type == SAS_END_DEVICE)
1045 phy->identify.target_port_protocols =
1046 SAS_PROTOCOL_SSP;
1047 else if (phy->identify.device_type != SAS_PHY_UNUSED)
1048 phy->identify.target_port_protocols =
1049 SAS_PROTOCOL_SMP;
1050 if (oob_done)
1051 sas_phy->oob_mode = SAS_OOB_MODE;
1052 phy->frame_rcvd_size =
1053 sizeof(struct sas_identify_frame);
1054 }
1055 memcpy(sas_phy->attached_sas_addr,
1056 &phy->att_dev_sas_addr, SAS_ADDR_SIZE);
1057
1058 if (MVS_CHIP_DISP->phy_work_around)
1059 MVS_CHIP_DISP->phy_work_around(mvi, i);
1060 }
1061 mv_dprintk("phy %d attach dev info is %x\n",
1062 i + mvi->id * mvi->chip->n_phy, phy->att_dev_info);
1063 mv_dprintk("phy %d attach sas addr is %llx\n",
1064 i + mvi->id * mvi->chip->n_phy, phy->att_dev_sas_addr);
1065 out_done:
1066 if (get_st)
1067 MVS_CHIP_DISP->write_port_irq_stat(mvi, i, phy->irq_status);
1068 }
1069
mvs_port_notify_formed(struct asd_sas_phy * sas_phy,int lock)1070 static void mvs_port_notify_formed(struct asd_sas_phy *sas_phy, int lock)
1071 {
1072 struct sas_ha_struct *sas_ha = sas_phy->ha;
1073 struct mvs_info *mvi = NULL; int i = 0, hi;
1074 struct mvs_phy *phy = sas_phy->lldd_phy;
1075 struct asd_sas_port *sas_port = sas_phy->port;
1076 struct mvs_port *port;
1077 unsigned long flags = 0;
1078 if (!sas_port)
1079 return;
1080
1081 while (sas_ha->sas_phy[i]) {
1082 if (sas_ha->sas_phy[i] == sas_phy)
1083 break;
1084 i++;
1085 }
1086 hi = i/((struct mvs_prv_info *)sas_ha->lldd_ha)->n_phy;
1087 mvi = ((struct mvs_prv_info *)sas_ha->lldd_ha)->mvi[hi];
1088 if (i >= mvi->chip->n_phy)
1089 port = &mvi->port[i - mvi->chip->n_phy];
1090 else
1091 port = &mvi->port[i];
1092 if (lock)
1093 spin_lock_irqsave(&mvi->lock, flags);
1094 port->port_attached = 1;
1095 phy->port = port;
1096 sas_port->lldd_port = port;
1097 if (phy->phy_type & PORT_TYPE_SAS) {
1098 port->wide_port_phymap = sas_port->phy_mask;
1099 mv_printk("set wide port phy map %x\n", sas_port->phy_mask);
1100 mvs_update_wideport(mvi, sas_phy->id);
1101
1102 /* direct attached SAS device */
1103 if (phy->att_dev_info & PORT_SSP_TRGT_MASK) {
1104 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT);
1105 MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x04);
1106 }
1107 }
1108 if (lock)
1109 spin_unlock_irqrestore(&mvi->lock, flags);
1110 }
1111
mvs_port_notify_deformed(struct asd_sas_phy * sas_phy,int lock)1112 static void mvs_port_notify_deformed(struct asd_sas_phy *sas_phy, int lock)
1113 {
1114 struct domain_device *dev;
1115 struct mvs_phy *phy = sas_phy->lldd_phy;
1116 struct mvs_info *mvi = phy->mvi;
1117 struct asd_sas_port *port = sas_phy->port;
1118 int phy_no = 0;
1119
1120 while (phy != &mvi->phy[phy_no]) {
1121 phy_no++;
1122 if (phy_no >= MVS_MAX_PHYS)
1123 return;
1124 }
1125 list_for_each_entry(dev, &port->dev_list, dev_list_node)
1126 mvs_do_release_task(phy->mvi, phy_no, dev);
1127
1128 }
1129
1130
mvs_port_formed(struct asd_sas_phy * sas_phy)1131 void mvs_port_formed(struct asd_sas_phy *sas_phy)
1132 {
1133 mvs_port_notify_formed(sas_phy, 1);
1134 }
1135
mvs_port_deformed(struct asd_sas_phy * sas_phy)1136 void mvs_port_deformed(struct asd_sas_phy *sas_phy)
1137 {
1138 mvs_port_notify_deformed(sas_phy, 1);
1139 }
1140
mvs_alloc_dev(struct mvs_info * mvi)1141 static struct mvs_device *mvs_alloc_dev(struct mvs_info *mvi)
1142 {
1143 u32 dev;
1144 for (dev = 0; dev < MVS_MAX_DEVICES; dev++) {
1145 if (mvi->devices[dev].dev_type == SAS_PHY_UNUSED) {
1146 mvi->devices[dev].device_id = dev;
1147 return &mvi->devices[dev];
1148 }
1149 }
1150
1151 if (dev == MVS_MAX_DEVICES)
1152 mv_printk("max support %d devices, ignore ..\n",
1153 MVS_MAX_DEVICES);
1154
1155 return NULL;
1156 }
1157
mvs_free_dev(struct mvs_device * mvi_dev)1158 static void mvs_free_dev(struct mvs_device *mvi_dev)
1159 {
1160 u32 id = mvi_dev->device_id;
1161 memset(mvi_dev, 0, sizeof(*mvi_dev));
1162 mvi_dev->device_id = id;
1163 mvi_dev->dev_type = SAS_PHY_UNUSED;
1164 mvi_dev->dev_status = MVS_DEV_NORMAL;
1165 mvi_dev->taskfileset = MVS_ID_NOT_MAPPED;
1166 }
1167
mvs_dev_found_notify(struct domain_device * dev,int lock)1168 static int mvs_dev_found_notify(struct domain_device *dev, int lock)
1169 {
1170 unsigned long flags = 0;
1171 int res = 0;
1172 struct mvs_info *mvi = NULL;
1173 struct domain_device *parent_dev = dev->parent;
1174 struct mvs_device *mvi_device;
1175
1176 mvi = mvs_find_dev_mvi(dev);
1177
1178 if (lock)
1179 spin_lock_irqsave(&mvi->lock, flags);
1180
1181 mvi_device = mvs_alloc_dev(mvi);
1182 if (!mvi_device) {
1183 res = -1;
1184 goto found_out;
1185 }
1186 dev->lldd_dev = mvi_device;
1187 mvi_device->dev_status = MVS_DEV_NORMAL;
1188 mvi_device->dev_type = dev->dev_type;
1189 mvi_device->mvi_info = mvi;
1190 mvi_device->sas_device = dev;
1191 if (parent_dev && dev_is_expander(parent_dev->dev_type)) {
1192 int phy_id;
1193 u8 phy_num = parent_dev->ex_dev.num_phys;
1194 struct ex_phy *phy;
1195 for (phy_id = 0; phy_id < phy_num; phy_id++) {
1196 phy = &parent_dev->ex_dev.ex_phy[phy_id];
1197 if (SAS_ADDR(phy->attached_sas_addr) ==
1198 SAS_ADDR(dev->sas_addr)) {
1199 mvi_device->attached_phy = phy_id;
1200 break;
1201 }
1202 }
1203
1204 if (phy_id == phy_num) {
1205 mv_printk("Error: no attached dev:%016llx"
1206 "at ex:%016llx.\n",
1207 SAS_ADDR(dev->sas_addr),
1208 SAS_ADDR(parent_dev->sas_addr));
1209 res = -1;
1210 }
1211 }
1212
1213 found_out:
1214 if (lock)
1215 spin_unlock_irqrestore(&mvi->lock, flags);
1216 return res;
1217 }
1218
mvs_dev_found(struct domain_device * dev)1219 int mvs_dev_found(struct domain_device *dev)
1220 {
1221 return mvs_dev_found_notify(dev, 1);
1222 }
1223
mvs_dev_gone_notify(struct domain_device * dev)1224 static void mvs_dev_gone_notify(struct domain_device *dev)
1225 {
1226 unsigned long flags = 0;
1227 struct mvs_device *mvi_dev = dev->lldd_dev;
1228 struct mvs_info *mvi;
1229
1230 if (!mvi_dev) {
1231 mv_dprintk("found dev has gone.\n");
1232 return;
1233 }
1234
1235 mvi = mvi_dev->mvi_info;
1236
1237 spin_lock_irqsave(&mvi->lock, flags);
1238
1239 mv_dprintk("found dev[%d:%x] is gone.\n",
1240 mvi_dev->device_id, mvi_dev->dev_type);
1241 mvs_release_task(mvi, dev);
1242 mvs_free_reg_set(mvi, mvi_dev);
1243 mvs_free_dev(mvi_dev);
1244
1245 dev->lldd_dev = NULL;
1246 mvi_dev->sas_device = NULL;
1247
1248 spin_unlock_irqrestore(&mvi->lock, flags);
1249 }
1250
1251
mvs_dev_gone(struct domain_device * dev)1252 void mvs_dev_gone(struct domain_device *dev)
1253 {
1254 mvs_dev_gone_notify(dev);
1255 }
1256
1257 /* Standard mandates link reset for ATA (type 0)
1258 and hard reset for SSP (type 1) , only for RECOVERY */
mvs_debug_I_T_nexus_reset(struct domain_device * dev)1259 static int mvs_debug_I_T_nexus_reset(struct domain_device *dev)
1260 {
1261 int rc;
1262 struct sas_phy *phy = sas_get_local_phy(dev);
1263 int reset_type = (dev->dev_type == SAS_SATA_DEV ||
1264 (dev->tproto & SAS_PROTOCOL_STP)) ? 0 : 1;
1265 rc = sas_phy_reset(phy, reset_type);
1266 sas_put_local_phy(phy);
1267 msleep(2000);
1268 return rc;
1269 }
1270
1271 /* mandatory SAM-3 */
mvs_lu_reset(struct domain_device * dev,u8 * lun)1272 int mvs_lu_reset(struct domain_device *dev, u8 *lun)
1273 {
1274 unsigned long flags;
1275 int rc = TMF_RESP_FUNC_FAILED;
1276 struct mvs_device * mvi_dev = dev->lldd_dev;
1277 struct mvs_info *mvi = mvi_dev->mvi_info;
1278
1279 mvi_dev->dev_status = MVS_DEV_EH;
1280 rc = sas_lu_reset(dev, lun);
1281 if (rc == TMF_RESP_FUNC_COMPLETE) {
1282 spin_lock_irqsave(&mvi->lock, flags);
1283 mvs_release_task(mvi, dev);
1284 spin_unlock_irqrestore(&mvi->lock, flags);
1285 }
1286 /* If failed, fall-through I_T_Nexus reset */
1287 mv_printk("%s for device[%x]:rc= %d\n", __func__,
1288 mvi_dev->device_id, rc);
1289 return rc;
1290 }
1291
mvs_I_T_nexus_reset(struct domain_device * dev)1292 int mvs_I_T_nexus_reset(struct domain_device *dev)
1293 {
1294 unsigned long flags;
1295 int rc = TMF_RESP_FUNC_FAILED;
1296 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
1297 struct mvs_info *mvi = mvi_dev->mvi_info;
1298
1299 if (mvi_dev->dev_status != MVS_DEV_EH)
1300 return TMF_RESP_FUNC_COMPLETE;
1301 else
1302 mvi_dev->dev_status = MVS_DEV_NORMAL;
1303 rc = mvs_debug_I_T_nexus_reset(dev);
1304 mv_printk("%s for device[%x]:rc= %d\n",
1305 __func__, mvi_dev->device_id, rc);
1306
1307 spin_lock_irqsave(&mvi->lock, flags);
1308 mvs_release_task(mvi, dev);
1309 spin_unlock_irqrestore(&mvi->lock, flags);
1310
1311 return rc;
1312 }
1313 /* optional SAM-3 */
mvs_query_task(struct sas_task * task)1314 int mvs_query_task(struct sas_task *task)
1315 {
1316 u32 tag;
1317 int rc = TMF_RESP_FUNC_FAILED;
1318
1319 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1320 struct domain_device *dev = task->dev;
1321 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
1322 struct mvs_info *mvi = mvi_dev->mvi_info;
1323
1324 rc = mvs_find_tag(mvi, task, &tag);
1325 if (rc == 0) {
1326 rc = TMF_RESP_FUNC_FAILED;
1327 return rc;
1328 }
1329
1330 rc = sas_query_task(task, tag);
1331 switch (rc) {
1332 /* The task is still in Lun, release it then */
1333 case TMF_RESP_FUNC_SUCC:
1334 /* The task is not in Lun or failed, reset the phy */
1335 case TMF_RESP_FUNC_FAILED:
1336 case TMF_RESP_FUNC_COMPLETE:
1337 break;
1338 }
1339 }
1340 mv_printk("%s:rc= %d\n", __func__, rc);
1341 return rc;
1342 }
1343
1344 /* mandatory SAM-3, still need free task/slot info */
mvs_abort_task(struct sas_task * task)1345 int mvs_abort_task(struct sas_task *task)
1346 {
1347 struct domain_device *dev = task->dev;
1348 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
1349 struct mvs_info *mvi;
1350 int rc = TMF_RESP_FUNC_FAILED;
1351 unsigned long flags;
1352 u32 tag;
1353
1354 if (!mvi_dev) {
1355 mv_printk("Device has removed\n");
1356 return TMF_RESP_FUNC_FAILED;
1357 }
1358
1359 mvi = mvi_dev->mvi_info;
1360
1361 spin_lock_irqsave(&task->task_state_lock, flags);
1362 if (task->task_state_flags & SAS_TASK_STATE_DONE) {
1363 spin_unlock_irqrestore(&task->task_state_lock, flags);
1364 rc = TMF_RESP_FUNC_COMPLETE;
1365 goto out;
1366 }
1367 spin_unlock_irqrestore(&task->task_state_lock, flags);
1368 mvi_dev->dev_status = MVS_DEV_EH;
1369 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1370 rc = mvs_find_tag(mvi, task, &tag);
1371 if (rc == 0) {
1372 mv_printk("No such tag in %s\n", __func__);
1373 rc = TMF_RESP_FUNC_FAILED;
1374 return rc;
1375 }
1376
1377 rc = sas_abort_task(task, tag);
1378
1379 /* if successful, clear the task and callback forwards.*/
1380 if (rc == TMF_RESP_FUNC_COMPLETE) {
1381 u32 slot_no;
1382 struct mvs_slot_info *slot;
1383
1384 if (task->lldd_task) {
1385 slot = task->lldd_task;
1386 slot_no = (u32) (slot - mvi->slot_info);
1387 spin_lock_irqsave(&mvi->lock, flags);
1388 mvs_slot_complete(mvi, slot_no, 1);
1389 spin_unlock_irqrestore(&mvi->lock, flags);
1390 }
1391 }
1392
1393 } else if (task->task_proto & SAS_PROTOCOL_SATA ||
1394 task->task_proto & SAS_PROTOCOL_STP) {
1395 if (SAS_SATA_DEV == dev->dev_type) {
1396 struct mvs_slot_info *slot = task->lldd_task;
1397 u32 slot_idx = (u32)(slot - mvi->slot_info);
1398 mv_dprintk("mvs_abort_task() mvi=%p task=%p "
1399 "slot=%p slot_idx=x%x\n",
1400 mvi, task, slot, slot_idx);
1401 task->task_state_flags |= SAS_TASK_STATE_ABORTED;
1402 mvs_slot_task_free(mvi, task, slot, slot_idx);
1403 rc = TMF_RESP_FUNC_COMPLETE;
1404 goto out;
1405 }
1406
1407 }
1408 out:
1409 if (rc != TMF_RESP_FUNC_COMPLETE)
1410 mv_printk("%s:rc= %d\n", __func__, rc);
1411 return rc;
1412 }
1413
mvs_sata_done(struct mvs_info * mvi,struct sas_task * task,u32 slot_idx,int err)1414 static int mvs_sata_done(struct mvs_info *mvi, struct sas_task *task,
1415 u32 slot_idx, int err)
1416 {
1417 struct mvs_device *mvi_dev = task->dev->lldd_dev;
1418 struct task_status_struct *tstat = &task->task_status;
1419 struct ata_task_resp *resp = (struct ata_task_resp *)tstat->buf;
1420 int stat = SAM_STAT_GOOD;
1421
1422
1423 resp->frame_len = sizeof(struct dev_to_host_fis);
1424 memcpy(&resp->ending_fis[0],
1425 SATA_RECEIVED_D2H_FIS(mvi_dev->taskfileset),
1426 sizeof(struct dev_to_host_fis));
1427 tstat->buf_valid_size = sizeof(*resp);
1428 if (unlikely(err)) {
1429 if (unlikely(err & CMD_ISS_STPD))
1430 stat = SAS_OPEN_REJECT;
1431 else
1432 stat = SAS_PROTO_RESPONSE;
1433 }
1434
1435 return stat;
1436 }
1437
mvs_set_sense(u8 * buffer,int len,int d_sense,int key,int asc,int ascq)1438 static void mvs_set_sense(u8 *buffer, int len, int d_sense,
1439 int key, int asc, int ascq)
1440 {
1441 memset(buffer, 0, len);
1442
1443 if (d_sense) {
1444 /* Descriptor format */
1445 if (len < 4) {
1446 mv_printk("Length %d of sense buffer too small to "
1447 "fit sense %x:%x:%x", len, key, asc, ascq);
1448 }
1449
1450 buffer[0] = 0x72; /* Response Code */
1451 if (len > 1)
1452 buffer[1] = key; /* Sense Key */
1453 if (len > 2)
1454 buffer[2] = asc; /* ASC */
1455 if (len > 3)
1456 buffer[3] = ascq; /* ASCQ */
1457 } else {
1458 if (len < 14) {
1459 mv_printk("Length %d of sense buffer too small to "
1460 "fit sense %x:%x:%x", len, key, asc, ascq);
1461 }
1462
1463 buffer[0] = 0x70; /* Response Code */
1464 if (len > 2)
1465 buffer[2] = key; /* Sense Key */
1466 if (len > 7)
1467 buffer[7] = 0x0a; /* Additional Sense Length */
1468 if (len > 12)
1469 buffer[12] = asc; /* ASC */
1470 if (len > 13)
1471 buffer[13] = ascq; /* ASCQ */
1472 }
1473
1474 return;
1475 }
1476
mvs_fill_ssp_resp_iu(struct ssp_response_iu * iu,u8 key,u8 asc,u8 asc_q)1477 static void mvs_fill_ssp_resp_iu(struct ssp_response_iu *iu,
1478 u8 key, u8 asc, u8 asc_q)
1479 {
1480 iu->datapres = SAS_DATAPRES_SENSE_DATA;
1481 iu->response_data_len = 0;
1482 iu->sense_data_len = 17;
1483 iu->status = 02;
1484 mvs_set_sense(iu->sense_data, 17, 0,
1485 key, asc, asc_q);
1486 }
1487
mvs_slot_err(struct mvs_info * mvi,struct sas_task * task,u32 slot_idx)1488 static int mvs_slot_err(struct mvs_info *mvi, struct sas_task *task,
1489 u32 slot_idx)
1490 {
1491 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx];
1492 int stat;
1493 u32 err_dw0 = le32_to_cpu(*(u32 *)slot->response);
1494 u32 err_dw1 = le32_to_cpu(*((u32 *)slot->response + 1));
1495 u32 tfs = 0;
1496 enum mvs_port_type type = PORT_TYPE_SAS;
1497
1498 if (err_dw0 & CMD_ISS_STPD)
1499 MVS_CHIP_DISP->issue_stop(mvi, type, tfs);
1500
1501 MVS_CHIP_DISP->command_active(mvi, slot_idx);
1502
1503 stat = SAM_STAT_CHECK_CONDITION;
1504 switch (task->task_proto) {
1505 case SAS_PROTOCOL_SSP:
1506 {
1507 stat = SAS_ABORTED_TASK;
1508 if ((err_dw0 & NO_DEST) || err_dw1 & bit(31)) {
1509 struct ssp_response_iu *iu = slot->response +
1510 sizeof(struct mvs_err_info);
1511 mvs_fill_ssp_resp_iu(iu, NOT_READY, 0x04, 01);
1512 sas_ssp_task_response(mvi->dev, task, iu);
1513 stat = SAM_STAT_CHECK_CONDITION;
1514 }
1515 if (err_dw1 & bit(31))
1516 mv_printk("reuse same slot, retry command.\n");
1517 break;
1518 }
1519 case SAS_PROTOCOL_SMP:
1520 stat = SAM_STAT_CHECK_CONDITION;
1521 break;
1522
1523 case SAS_PROTOCOL_SATA:
1524 case SAS_PROTOCOL_STP:
1525 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
1526 {
1527 task->ata_task.use_ncq = 0;
1528 stat = SAS_PROTO_RESPONSE;
1529 mvs_sata_done(mvi, task, slot_idx, err_dw0);
1530 }
1531 break;
1532 default:
1533 break;
1534 }
1535
1536 return stat;
1537 }
1538
mvs_slot_complete(struct mvs_info * mvi,u32 rx_desc,u32 flags)1539 int mvs_slot_complete(struct mvs_info *mvi, u32 rx_desc, u32 flags)
1540 {
1541 u32 slot_idx = rx_desc & RXQ_SLOT_MASK;
1542 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx];
1543 struct sas_task *task = slot->task;
1544 struct mvs_device *mvi_dev = NULL;
1545 struct task_status_struct *tstat;
1546 struct domain_device *dev;
1547 u32 aborted;
1548
1549 void *to;
1550 enum exec_status sts;
1551
1552 if (unlikely(!task || !task->lldd_task || !task->dev))
1553 return -1;
1554
1555 tstat = &task->task_status;
1556 dev = task->dev;
1557 mvi_dev = dev->lldd_dev;
1558
1559 spin_lock(&task->task_state_lock);
1560 task->task_state_flags &= ~SAS_TASK_STATE_PENDING;
1561 task->task_state_flags |= SAS_TASK_STATE_DONE;
1562 /* race condition*/
1563 aborted = task->task_state_flags & SAS_TASK_STATE_ABORTED;
1564 spin_unlock(&task->task_state_lock);
1565
1566 memset(tstat, 0, sizeof(*tstat));
1567 tstat->resp = SAS_TASK_COMPLETE;
1568
1569 if (unlikely(aborted)) {
1570 tstat->stat = SAS_ABORTED_TASK;
1571 if (mvi_dev && mvi_dev->running_req)
1572 mvi_dev->running_req--;
1573 if (sas_protocol_ata(task->task_proto))
1574 mvs_free_reg_set(mvi, mvi_dev);
1575
1576 mvs_slot_task_free(mvi, task, slot, slot_idx);
1577 return -1;
1578 }
1579
1580 /* when no device attaching, go ahead and complete by error handling*/
1581 if (unlikely(!mvi_dev || flags)) {
1582 if (!mvi_dev)
1583 mv_dprintk("port has not device.\n");
1584 tstat->stat = SAS_PHY_DOWN;
1585 goto out;
1586 }
1587
1588 /*
1589 * error info record present; slot->response is 32 bit aligned but may
1590 * not be 64 bit aligned, so check for zero in two 32 bit reads
1591 */
1592 if (unlikely((rx_desc & RXQ_ERR)
1593 && (*((u32 *)slot->response)
1594 || *(((u32 *)slot->response) + 1)))) {
1595 mv_dprintk("port %d slot %d rx_desc %X has error info"
1596 "%016llX.\n", slot->port->sas_port.id, slot_idx,
1597 rx_desc, get_unaligned_le64(slot->response));
1598 tstat->stat = mvs_slot_err(mvi, task, slot_idx);
1599 tstat->resp = SAS_TASK_COMPLETE;
1600 goto out;
1601 }
1602
1603 switch (task->task_proto) {
1604 case SAS_PROTOCOL_SSP:
1605 /* hw says status == 0, datapres == 0 */
1606 if (rx_desc & RXQ_GOOD) {
1607 tstat->stat = SAS_SAM_STAT_GOOD;
1608 tstat->resp = SAS_TASK_COMPLETE;
1609 }
1610 /* response frame present */
1611 else if (rx_desc & RXQ_RSP) {
1612 struct ssp_response_iu *iu = slot->response +
1613 sizeof(struct mvs_err_info);
1614 sas_ssp_task_response(mvi->dev, task, iu);
1615 } else
1616 tstat->stat = SAS_SAM_STAT_CHECK_CONDITION;
1617 break;
1618
1619 case SAS_PROTOCOL_SMP: {
1620 struct scatterlist *sg_resp = &task->smp_task.smp_resp;
1621 tstat->stat = SAS_SAM_STAT_GOOD;
1622 to = kmap_atomic(sg_page(sg_resp));
1623 memcpy(to + sg_resp->offset,
1624 slot->response + sizeof(struct mvs_err_info),
1625 sg_dma_len(sg_resp));
1626 kunmap_atomic(to);
1627 break;
1628 }
1629
1630 case SAS_PROTOCOL_SATA:
1631 case SAS_PROTOCOL_STP:
1632 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: {
1633 tstat->stat = mvs_sata_done(mvi, task, slot_idx, 0);
1634 break;
1635 }
1636
1637 default:
1638 tstat->stat = SAS_SAM_STAT_CHECK_CONDITION;
1639 break;
1640 }
1641 if (!slot->port->port_attached) {
1642 mv_dprintk("port %d has removed.\n", slot->port->sas_port.id);
1643 tstat->stat = SAS_PHY_DOWN;
1644 }
1645
1646
1647 out:
1648 if (mvi_dev && mvi_dev->running_req) {
1649 mvi_dev->running_req--;
1650 if (sas_protocol_ata(task->task_proto) && !mvi_dev->running_req)
1651 mvs_free_reg_set(mvi, mvi_dev);
1652 }
1653 mvs_slot_task_free(mvi, task, slot, slot_idx);
1654 sts = tstat->stat;
1655
1656 spin_unlock(&mvi->lock);
1657 if (task->task_done)
1658 task->task_done(task);
1659
1660 spin_lock(&mvi->lock);
1661
1662 return sts;
1663 }
1664
mvs_do_release_task(struct mvs_info * mvi,int phy_no,struct domain_device * dev)1665 void mvs_do_release_task(struct mvs_info *mvi,
1666 int phy_no, struct domain_device *dev)
1667 {
1668 u32 slot_idx;
1669 struct mvs_phy *phy;
1670 struct mvs_port *port;
1671 struct mvs_slot_info *slot, *slot2;
1672
1673 phy = &mvi->phy[phy_no];
1674 port = phy->port;
1675 if (!port)
1676 return;
1677 /* clean cmpl queue in case request is already finished */
1678 mvs_int_rx(mvi, false);
1679
1680
1681
1682 list_for_each_entry_safe(slot, slot2, &port->list, entry) {
1683 struct sas_task *task;
1684 slot_idx = (u32) (slot - mvi->slot_info);
1685 task = slot->task;
1686
1687 if (dev && task->dev != dev)
1688 continue;
1689
1690 mv_printk("Release slot [%x] tag[%x], task [%p]:\n",
1691 slot_idx, slot->slot_tag, task);
1692 MVS_CHIP_DISP->command_active(mvi, slot_idx);
1693
1694 mvs_slot_complete(mvi, slot_idx, 1);
1695 }
1696 }
1697
mvs_release_task(struct mvs_info * mvi,struct domain_device * dev)1698 void mvs_release_task(struct mvs_info *mvi,
1699 struct domain_device *dev)
1700 {
1701 int i, phyno[WIDE_PORT_MAX_PHY], num;
1702 num = mvs_find_dev_phyno(dev, phyno);
1703 for (i = 0; i < num; i++)
1704 mvs_do_release_task(mvi, phyno[i], dev);
1705 }
1706
mvs_phy_disconnected(struct mvs_phy * phy)1707 static void mvs_phy_disconnected(struct mvs_phy *phy)
1708 {
1709 phy->phy_attached = 0;
1710 phy->att_dev_info = 0;
1711 phy->att_dev_sas_addr = 0;
1712 }
1713
mvs_work_queue(struct work_struct * work)1714 static void mvs_work_queue(struct work_struct *work)
1715 {
1716 struct delayed_work *dw = container_of(work, struct delayed_work, work);
1717 struct mvs_wq *mwq = container_of(dw, struct mvs_wq, work_q);
1718 struct mvs_info *mvi = mwq->mvi;
1719 unsigned long flags;
1720 u32 phy_no = (unsigned long) mwq->data;
1721 struct mvs_phy *phy = &mvi->phy[phy_no];
1722 struct asd_sas_phy *sas_phy = &phy->sas_phy;
1723
1724 spin_lock_irqsave(&mvi->lock, flags);
1725 if (mwq->handler & PHY_PLUG_EVENT) {
1726
1727 if (phy->phy_event & PHY_PLUG_OUT) {
1728 u32 tmp;
1729
1730 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no);
1731 phy->phy_event &= ~PHY_PLUG_OUT;
1732 if (!(tmp & PHY_READY_MASK)) {
1733 sas_phy_disconnected(sas_phy);
1734 mvs_phy_disconnected(phy);
1735 sas_notify_phy_event(sas_phy,
1736 PHYE_LOSS_OF_SIGNAL, GFP_ATOMIC);
1737 mv_dprintk("phy%d Removed Device\n", phy_no);
1738 } else {
1739 MVS_CHIP_DISP->detect_porttype(mvi, phy_no);
1740 mvs_update_phyinfo(mvi, phy_no, 1);
1741 mvs_bytes_dmaed(mvi, phy_no, GFP_ATOMIC);
1742 mvs_port_notify_formed(sas_phy, 0);
1743 mv_dprintk("phy%d Attached Device\n", phy_no);
1744 }
1745 }
1746 } else if (mwq->handler & EXP_BRCT_CHG) {
1747 phy->phy_event &= ~EXP_BRCT_CHG;
1748 sas_notify_port_event(sas_phy,
1749 PORTE_BROADCAST_RCVD, GFP_ATOMIC);
1750 mv_dprintk("phy%d Got Broadcast Change\n", phy_no);
1751 }
1752 list_del(&mwq->entry);
1753 spin_unlock_irqrestore(&mvi->lock, flags);
1754 kfree(mwq);
1755 }
1756
mvs_handle_event(struct mvs_info * mvi,void * data,int handler)1757 static int mvs_handle_event(struct mvs_info *mvi, void *data, int handler)
1758 {
1759 struct mvs_wq *mwq;
1760 int ret = 0;
1761
1762 mwq = kmalloc(sizeof(struct mvs_wq), GFP_ATOMIC);
1763 if (mwq) {
1764 mwq->mvi = mvi;
1765 mwq->data = data;
1766 mwq->handler = handler;
1767 MV_INIT_DELAYED_WORK(&mwq->work_q, mvs_work_queue, mwq);
1768 list_add_tail(&mwq->entry, &mvi->wq_list);
1769 schedule_delayed_work(&mwq->work_q, HZ * 2);
1770 } else
1771 ret = -ENOMEM;
1772
1773 return ret;
1774 }
1775
mvs_sig_time_out(struct timer_list * t)1776 static void mvs_sig_time_out(struct timer_list *t)
1777 {
1778 struct mvs_phy *phy = from_timer(phy, t, timer);
1779 struct mvs_info *mvi = phy->mvi;
1780 u8 phy_no;
1781
1782 for (phy_no = 0; phy_no < mvi->chip->n_phy; phy_no++) {
1783 if (&mvi->phy[phy_no] == phy) {
1784 mv_dprintk("Get signature time out, reset phy %d\n",
1785 phy_no+mvi->id*mvi->chip->n_phy);
1786 MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_HARD_RESET);
1787 }
1788 }
1789 }
1790
mvs_int_port(struct mvs_info * mvi,int phy_no,u32 events)1791 void mvs_int_port(struct mvs_info *mvi, int phy_no, u32 events)
1792 {
1793 u32 tmp;
1794 struct mvs_phy *phy = &mvi->phy[phy_no];
1795
1796 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, phy_no);
1797 MVS_CHIP_DISP->write_port_irq_stat(mvi, phy_no, phy->irq_status);
1798 mv_dprintk("phy %d ctrl sts=0x%08X.\n", phy_no+mvi->id*mvi->chip->n_phy,
1799 MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no));
1800 mv_dprintk("phy %d irq sts = 0x%08X\n", phy_no+mvi->id*mvi->chip->n_phy,
1801 phy->irq_status);
1802
1803 /*
1804 * events is port event now ,
1805 * we need check the interrupt status which belongs to per port.
1806 */
1807
1808 if (phy->irq_status & PHYEV_DCDR_ERR) {
1809 mv_dprintk("phy %d STP decoding error.\n",
1810 phy_no + mvi->id*mvi->chip->n_phy);
1811 }
1812
1813 if (phy->irq_status & PHYEV_POOF) {
1814 mdelay(500);
1815 if (!(phy->phy_event & PHY_PLUG_OUT)) {
1816 int dev_sata = phy->phy_type & PORT_TYPE_SATA;
1817 int ready;
1818 mvs_do_release_task(mvi, phy_no, NULL);
1819 phy->phy_event |= PHY_PLUG_OUT;
1820 MVS_CHIP_DISP->clear_srs_irq(mvi, 0, 1);
1821 mvs_handle_event(mvi,
1822 (void *)(unsigned long)phy_no,
1823 PHY_PLUG_EVENT);
1824 ready = mvs_is_phy_ready(mvi, phy_no);
1825 if (ready || dev_sata) {
1826 if (MVS_CHIP_DISP->stp_reset)
1827 MVS_CHIP_DISP->stp_reset(mvi,
1828 phy_no);
1829 else
1830 MVS_CHIP_DISP->phy_reset(mvi,
1831 phy_no, MVS_SOFT_RESET);
1832 return;
1833 }
1834 }
1835 }
1836
1837 if (phy->irq_status & PHYEV_COMWAKE) {
1838 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, phy_no);
1839 MVS_CHIP_DISP->write_port_irq_mask(mvi, phy_no,
1840 tmp | PHYEV_SIG_FIS);
1841 if (phy->timer.function == NULL) {
1842 phy->timer.function = mvs_sig_time_out;
1843 phy->timer.expires = jiffies + 5*HZ;
1844 add_timer(&phy->timer);
1845 }
1846 }
1847 if (phy->irq_status & (PHYEV_SIG_FIS | PHYEV_ID_DONE)) {
1848 phy->phy_status = mvs_is_phy_ready(mvi, phy_no);
1849 mv_dprintk("notify plug in on phy[%d]\n", phy_no);
1850 if (phy->phy_status) {
1851 mdelay(10);
1852 MVS_CHIP_DISP->detect_porttype(mvi, phy_no);
1853 if (phy->phy_type & PORT_TYPE_SATA) {
1854 tmp = MVS_CHIP_DISP->read_port_irq_mask(
1855 mvi, phy_no);
1856 tmp &= ~PHYEV_SIG_FIS;
1857 MVS_CHIP_DISP->write_port_irq_mask(mvi,
1858 phy_no, tmp);
1859 }
1860 mvs_update_phyinfo(mvi, phy_no, 0);
1861 if (phy->phy_type & PORT_TYPE_SAS) {
1862 MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_PHY_TUNE);
1863 mdelay(10);
1864 }
1865
1866 mvs_bytes_dmaed(mvi, phy_no, GFP_ATOMIC);
1867 /* whether driver is going to handle hot plug */
1868 if (phy->phy_event & PHY_PLUG_OUT) {
1869 mvs_port_notify_formed(&phy->sas_phy, 0);
1870 phy->phy_event &= ~PHY_PLUG_OUT;
1871 }
1872 } else {
1873 mv_dprintk("plugin interrupt but phy%d is gone\n",
1874 phy_no + mvi->id*mvi->chip->n_phy);
1875 }
1876 } else if (phy->irq_status & PHYEV_BROAD_CH) {
1877 mv_dprintk("phy %d broadcast change.\n",
1878 phy_no + mvi->id*mvi->chip->n_phy);
1879 mvs_handle_event(mvi, (void *)(unsigned long)phy_no,
1880 EXP_BRCT_CHG);
1881 }
1882 }
1883
mvs_int_rx(struct mvs_info * mvi,bool self_clear)1884 int mvs_int_rx(struct mvs_info *mvi, bool self_clear)
1885 {
1886 u32 rx_prod_idx, rx_desc;
1887 bool attn = false;
1888
1889 /* the first dword in the RX ring is special: it contains
1890 * a mirror of the hardware's RX producer index, so that
1891 * we don't have to stall the CPU reading that register.
1892 * The actual RX ring is offset by one dword, due to this.
1893 */
1894 rx_prod_idx = mvi->rx_cons;
1895 mvi->rx_cons = le32_to_cpu(mvi->rx[0]);
1896 if (mvi->rx_cons == 0xfff) /* h/w hasn't touched RX ring yet */
1897 return 0;
1898
1899 /* The CMPL_Q may come late, read from register and try again
1900 * note: if coalescing is enabled,
1901 * it will need to read from register every time for sure
1902 */
1903 if (unlikely(mvi->rx_cons == rx_prod_idx))
1904 mvi->rx_cons = MVS_CHIP_DISP->rx_update(mvi) & RX_RING_SZ_MASK;
1905
1906 if (mvi->rx_cons == rx_prod_idx)
1907 return 0;
1908
1909 while (mvi->rx_cons != rx_prod_idx) {
1910 /* increment our internal RX consumer pointer */
1911 rx_prod_idx = (rx_prod_idx + 1) & (MVS_RX_RING_SZ - 1);
1912 rx_desc = le32_to_cpu(mvi->rx[rx_prod_idx + 1]);
1913
1914 if (likely(rx_desc & RXQ_DONE))
1915 mvs_slot_complete(mvi, rx_desc, 0);
1916 if (rx_desc & RXQ_ATTN) {
1917 attn = true;
1918 } else if (rx_desc & RXQ_ERR) {
1919 if (!(rx_desc & RXQ_DONE))
1920 mvs_slot_complete(mvi, rx_desc, 0);
1921 } else if (rx_desc & RXQ_SLOT_RESET) {
1922 mvs_slot_free(mvi, rx_desc);
1923 }
1924 }
1925
1926 if (attn && self_clear)
1927 MVS_CHIP_DISP->int_full(mvi);
1928 return 0;
1929 }
1930
mvs_gpio_write(struct sas_ha_struct * sha,u8 reg_type,u8 reg_index,u8 reg_count,u8 * write_data)1931 int mvs_gpio_write(struct sas_ha_struct *sha, u8 reg_type, u8 reg_index,
1932 u8 reg_count, u8 *write_data)
1933 {
1934 struct mvs_prv_info *mvs_prv = sha->lldd_ha;
1935 struct mvs_info *mvi = mvs_prv->mvi[0];
1936
1937 if (MVS_CHIP_DISP->gpio_write) {
1938 return MVS_CHIP_DISP->gpio_write(mvs_prv, reg_type,
1939 reg_index, reg_count, write_data);
1940 }
1941
1942 return -ENOSYS;
1943 }
1944